A frequency offset compensation method and device

Abstract

A frequency offset compensation method and apparatus are disclosed in this application. In this method, a first device acquires a clock difference range, which characterizes the difference between the number of second clocks and the number of first clocks. The first clock number is the number of clocks initiated under the local clock of the first device. The second clock number is the number of clocks initiated under the local clock of the second device. The first device determines the message insertion interval corresponding to the acquired clock difference range based on the correspondence between the clock difference range and the message insertion interval. Frequency offset compensation messages are inserted into the data sent to the second device according to the determined message insertion interval. The first device can determine the required message insertion interval for inserting frequency offset compensation messages by using the acquired clock difference range. The message insertion interval changes with the clock difference range, thus more accurately compensating for the frequency offset between the local clocks of the first and second devices.

Description

Technical Field

[0001] This application relates to the field of communication technology, and in particular to a frequency offset compensation method and apparatus. Background Technology

[0002] For devices A and B that need to communicate, when device A sends data to device B, device A sends data to device B using its local clock. Device B sends data to device A using its local clock. When the frequencies of device A's and device B's local clocks are the same, device A can retrieve the data sent by device B from its interface using its local clock, and device B can retrieve the data sent by device A from its interface using its local clock.

[0003] In actual communication, there may be situations where the local clock frequency of device A is inconsistent with that of device B, meaning there is a frequency deviation between their local clocks. For example, if the local clock frequency of device A is higher than that of device B, it means that device A is sending data faster than device B is retrieving data. Device A sends more data per unit time than device B retrieves data from its interface per unit time. This will cause device B to be unable to retrieve data sent by device A from its interface in a timely manner.

[0004] Therefore, when device A sends data to device B, it can insert some skip ordered sets (SKPs) into the transmitted data, while still sending data with these SKPs according to device A's local clock. When device B encounters an SKP while retrieving data, it can discard it directly, thus compensating for the frequency deviation between device A's and device B's local clocks. Alternatively, when device B sends data to device A, it can delete some SKPs from the transmitted data, while still sending data with these SKPs deleted according to device B's local clock. When device A retrieves data, the number of SKPs decreases, and the amount of valid data increases, which also compensates for the frequency deviation between device A's and device B's local clocks.

[0005] However, regardless of whether the frequency difference between the local clock of device A and the local clock of device B is too large or too small, the interval for inserting or deleting SKPs remains fixed, lacking flexibility. If the interval is too small, it will increase the cost of the equipment; if the interval is too large, it may not be able to accurately compensate for the frequency deviation between the local clocks of device A and device B. Summary of the Invention

[0006] This application provides a frequency offset compensation method and apparatus for accurately compensating for the frequency deviation of clocks between two interacting devices.

[0007] Firstly, embodiments of this application provide a frequency offset compensation method, which can be executed by a first device, specifically by a data receiving unit (such as an interface) within the first device. In this method, the first device can obtain a clock difference range, which characterizes the difference between the second clock count and the first clock count. The first clock count is the number of clocks initiated under the local clock of the first device. The second clock count is the number of clocks initiated under the local clock of the second device. In other words, the clock difference range indicates the maximum and minimum values ​​of the difference between the second clock count and the first clock count.

[0008] The first device can obtain the correspondence between clock difference ranges and message insertion intervals, where there is a one-to-one correspondence between the clock difference ranges and message insertion intervals. The first device can use this correspondence to determine the message insertion interval corresponding to the obtained clock difference range. After determining the message insertion interval, the first device can insert frequency offset compensation messages into the data sent to the second device according to the determined message insertion interval.

[0009] Using the above method, the first device can determine the message insertion interval required to insert the frequency offset compensation message by obtaining the clock difference range. This message insertion interval is no longer fixed, but changes with the clock difference range. The clock difference range can reflect the frequency offset between the local clock of the first device and the local clock of the second device to a certain extent. By using the message insertion interval determined according to the clock difference range, the frequency offset between the local clock of the first device and the local clock of the second device can be compensated more accurately.

[0010] In one possible implementation, when the first device acquires the clock difference range, it can simultaneously start counting the number of clocks initiated under the local clock of the second device and the number of clocks initiated under the local clock of the first device, respectively obtaining the second clock count and the first clock count. The first clock count and the second clock count are values ​​that gradually increase as the counting continues.

[0011] The first device can calculate the difference between the second clock count and the first clock count to determine the change in the difference between the second clock count and the first clock count. The first device determines the range of the clock difference based on the change in the difference between the second clock count and the first clock count.

[0012] By using the above method, the first device simultaneously counts the number of clocks initiated under the local clock of the second device and the number of clocks initiated under the local clock of the first device, which can ensure that the first device can ultimately obtain an accurate clock difference range and reduce unnecessary errors introduced in the process of determining the clock difference range.

[0013] In one possible implementation, when determining the message insertion interval corresponding to the acquired clock difference range, the first device can also fine-tune the message insertion interval. For example, the first device determines a candidate message insertion interval corresponding to the acquired clock difference range based on the correspondence between the clock difference range and the message insertion interval; then, it adjusts the candidate message insertion interval according to a preset offset to obtain a candidate message insertion interval corresponding to the acquired clock difference range.

[0014] Using the above method, the first device fine-tunes the message insertion interval, making the final determined message insertion interval more consistent with the actual application scenario, and further ensuring that the frequency offset compensation effect can be accurately achieved.

[0015] In one possible implementation, the message insertion interval indicates the data length of the frequency offset compensation message interval. That is, when the device inserts frequency offset compensation messages according to the message insertion interval, it can insert one frequency offset compensation message at intervals of the data length indicated by the message insertion interval.

[0016] Using the above method, the message insertion interval represents the data length of the insertion frequency offset compensation message interval, and this representation method is more intuitive and simple.

[0017] In one possible implementation, before acquiring the clock difference range, the first device can also determine the local clock of the second device based on the data sent by the second device. For example, the local clock of the second device can be determined by the data information sent by the second device, or, for example, by the clock signal sent by the second device.

[0018] Using the above methods, the first device determines the local clock of the second device in different ways, which is applicable to different scenarios. In addition, the way the first device determines the local clock of the second device based on the data sent by the second device can ensure that the first device can accurately determine the local clock of the second device.

[0019] In one possible implementation, the first device can not only insert frequency offset compensation messages into the data sent to the second device, but also delete frequency offset compensation messages from the data sent to the second device. For example, the first device can determine the message deletion interval corresponding to the acquired clock difference range based on the correspondence between the clock difference range and the message deletion interval; then, it deletes the frequency offset compensation messages from the data sent to the second device according to the determined message deletion interval. This approach is suitable for scenarios where the frequency of the first device's local clock is greater than the frequency of the second device's local clock.

[0020] Using the above method, the first device can delete frequency offset compensation messages from the data sent to the second device, effectively expanding the application scenarios.

[0021] In one possible implementation, the frequency offset compensation message is either fixed-length data or a single SKP.

[0022] Using the above method, the length of the frequency offset compensation message is fixed, and the first device can quickly insert and delete the frequency offset compensation message.

[0023] Secondly, embodiments of this application also provide a frequency offset compensation device, which has the function of implementing the behavior of the first device in the method example of the first aspect described above. The beneficial effects can be found in the description of the first aspect and will not be repeated here. The function can be implemented by hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above functions. In one possible design, the frequency offset compensation device includes an acquisition module, a determination module, and a processing module. These modules can perform the corresponding functions in the method example of the first aspect described above, as detailed in the method example, and will not be repeated here.

[0024] Thirdly, embodiments of this application also provide a transmission device, which is deployed in a module that implements data transmission, such as in the interface of a device. The transmission device has the function of implementing the behavior of the first device in the method example of the first aspect described above. The beneficial effects can be found in the description of the first aspect, which will not be repeated here.

[0025] The transmission device includes a processing unit and a memory. The processing unit is configured to support the transmission device in performing the corresponding functions of the method described in the first aspect. The memory is coupled to the processing unit and stores the computer program instructions and data.

[0026] The transmission device includes a processing unit that can run computer program instructions programmed on it to support the computing device in performing the corresponding functions of the first aspect of the method.

[0027] Fourthly, this application also provides another transmission device, which is deployed in the module that implements data transmission, such as in the interface of a device. The transmission device has the function of implementing the behavior of the first device in the method example of the first aspect. The beneficial effects can be found in the description of the first aspect, which will not be repeated here.

[0028] The buffer is used to store the correspondence between the clock difference range and the message insertion interval. Optionally, the buffer can also buffer data sent to a second device.

[0029] The frequency offset adjustment engine is used to obtain the clock difference range, which represents the difference between the second clock count and the first clock count. The first clock count is the number of clocks initiated under the local clock of the first device, and the second clock count is the number of clocks initiated under the local clock of the second device. Based on the correspondence between the clock difference range and the message insertion interval, the message insertion interval corresponding to the obtained clock difference range is determined, and frequency offset compensation messages are inserted into the data sent to the second device according to the determined message insertion interval.

[0030] The sending port is used to send data for the insertion frequency offset compensation message to the second device.

[0031] In one possible implementation, when the frequency offset adjustment engine obtains the clock difference range, it can simultaneously start counting the number of clocks initiated under the local clock of the second device and the number of clocks initiated under the local clock of the first device, and obtain the second clock count and the first clock count respectively; and determine the clock difference range based on the change in the difference between the second clock count and the first clock count.

[0032] In one possible implementation, when the frequency offset adjustment engine determines the message insertion interval corresponding to the obtained clock difference range based on the correspondence between the clock difference range and the message insertion interval, it can determine the candidate message insertion interval corresponding to the obtained clock difference range based on the correspondence; and adjust the candidate message insertion interval according to the preset offset amount to obtain the message insertion interval corresponding to the obtained clock difference range.

[0033] In one possible implementation, the message insertion interval indicates the data length of the insertion frequency offset compensation message interval.

[0034] In one possible implementation, before the frequency offset adjustment engine acquires the clock difference range, it can also determine the local clock of the second device based on the data sent by the second device.

[0035] In one possible implementation, the frequency offset adjustment engine determines the message deletion interval corresponding to the acquired clock difference range based on the correspondence between the clock difference range and the message deletion interval; the frequency offset adjustment engine deletes frequency offset compensation messages in the data sent to the second device according to the determined message deletion interval.

[0036] In one possible implementation, the frequency offset compensation message is either fixed-length data or a single SKP.

[0037] Fifthly, this application also provides a computer-readable storage medium storing instructions that, when executed on a computer, cause the computer to perform the methods described in the first aspect and various possible embodiments thereof.

[0038] In a sixth aspect, this application also provides a computer program product containing instructions that, when run on a computer, cause the computer to perform the methods described in the first aspect and in various possible embodiments of the first aspect.

[0039] In a seventh aspect, this application also provides a computer chip connected to a memory, the chip being used to read and execute a software program stored in the memory, and to execute the methods described in the first aspect and various possible embodiments of the first aspect. Attached Figure Description

[0040] Figure 1 A schematic diagram of the system architecture provided in this application;

[0041] Figure 2 A schematic diagram of the local clock of a first device and the local clock of a second device provided in this application;

[0042] Figure 3 A schematic diagram of a local clock provided in this application;

[0043] Figure 4 This application provides a schematic diagram illustrating the relationship between the phase difference and the range of clock difference values.

[0044] Figure 5 A schematic diagram illustrating the relationship between clock difference range and message insertion interval provided in this application;

[0045] Figure 6 A schematic diagram of a frequency offset compensation method provided in this application;

[0046] Figure 7 This application provides a schematic diagram of the structure of a frequency offset compensation device;

[0047] Figure 8 A schematic diagram of a transmission device structure is provided for this application;

[0048] Figure 9 A schematic diagram of another transmission device structure provided in this application. Detailed Implementation

[0049] The function of a clock is to achieve communication synchronization. Whether it's communication between devices or between modules within a device, data transmission requires a clock. A clock can be understood as a periodically changing signal, with one cycle of the signal being one clock cycle. A common clock is a square wave signal. Taking device-to-device communication as an example, devices can send data when the square wave signal is on its rising or falling edge. In this embodiment, the local clock refers to the information required for communication synchronization. That is, the meaning represented by the local clock is the same as that represented by the clock signal, and the number of clock cycles can be understood as the number of cycles in the clock signal.

[0050] This application uses device-to-device communication as an example for illustration. Communication between modules is similar to device-to-device communication and will not be described in detail here. For two devices that need to communicate, data transmission can be achieved through the communication link between the device interfaces. Taking two devices that need to communicate, device A and device B, as an example, device A needs to send data to device B. Both device A and device B have their own local clocks. Device A or device B uses its own clock to realize some data transmission within the device. For device A, the data interaction within device A needs to be performed based on its local clock. For example, the interface in device A extracts the data sent by device B from the interface in device A based on the local clock, and sends the obtained data to the processor in device A. Or, the interface in device A sends data to device B according to device A's local clock. For device B, the data interaction within device B needs to be performed based on its local clock. For example, the interface in device B extracts the data sent by device A from the interface in device B based on its local clock, and sends the obtained data to the processor in device B. Or, the interface in device B sends data to device A according to device B's local clock.

[0051] When device A sends data through its interface, the data is transmitted according to device A's local clock. Device B, as the data receiver, needs to receive and buffer the data sent by device A according to device A's local clock. Device B's interface then extracts the data sent by device A based on its own local clock and sends the acquired data to its processor or other components.

[0052] When device B sends data through its interface, the data is transmitted according to device B's local clock. Device A, as the data receiver, needs its interface to receive and buffer the data sent by device B according to device B's local clock. Device A's interface, based on its own local clock, will then extract the data sent by device B and send it to its processor or other components.

[0053] As can be seen, both device A and device B need to send data according to their respective local clocks and retrieve the data sent by the other side from their respective interfaces according to their respective local clocks. Therefore, for two devices or modules that need to communicate, it is necessary to keep their local clocks consistent.

[0054] Clocks are typically generated by clock circuits. Device A and Device B use different clock sources, resulting in a frequency deviation between the local clock on Device A and the local clock on Device B. Assuming the communication link between Device A and Device B is a high-speed serial computer expansion bus (Peripheral Component Interconnect Express, PCIe), with PCIe interfaces on both devices, the data rate on the PCIe link can be 2.5 Gbps. The frequency is 2.5 GHz. The PCIe standard allows an error range between -300 ppm and +300 ppm, meaning the frequency range on the PCIe link is between 2.49925 GHz and 2.50075 GHz. Therefore, a frequency deviation between the local clock of Device A and the local clock of Device B is always unavoidable.

[0055] Furthermore, to avoid electromagnetic interference (EMI) problems caused by excessive power in the digital signal or clock at a certain frequency point during communication between devices A and B, spread spectrum clocking (SSC) is permitted in both devices A and B. Taking device A spreading its local clock as an example, device A can use SSC to extend its narrowband local clock into a wideband local clock. SSC is essentially a low-frequency frequency modulation clock, allowing device A to adjust the local clock frequency within a narrow range. For example, with an SSC frequency of 33 MHz and an average local clock frequency of 998.4 MHz, device A can adjust its transmission frequency using SSC to achieve a maximum frequency of approximately 1 GHz and a minimum frequency of approximately 996.8 MHz. Similarly, device B can also adjust its local clock frequency using SSC.

[0056] As can be seen, the introduction of SSC will also increase the frequency deviation of the local clock of device A and the local clock of device B. In order to compensate for the frequency deviation of the local clock of device A and the local clock of device B, the data sender can add some SKPs or delete some SKPs in the data sent to the data receiver.

[0057] For example, device A sends data to device B's interface through its own interface. Device B receives the data from device A using its local clock (which can be obtained by device B by parsing the data signal sent by device A, or by device B obtaining it from the clock signal sent by device A). The amount of data received by device B's interface is equal to the amount of data sent by device A's interface. However, internally, device B extracts data from its own interface using its own local clock. If there is a frequency deviation between the local clock of device A and the local clock of device B, the amount of data received by device B's interface per unit time will be inconsistent with the amount of data extracted by device B from its own interface. Taking a local clock of 100MHz as an example, according to the PCIe protocol, the maximum allowable deviation is +300ppm or -300ppm. Therefore, the local clock frequency can reach a maximum of 100.0003MHz and a minimum of 99.9997MHz. When the frequency of device A's local clock is greater than the frequency of device B's local clock, meaning the amount of data received by device B's interface per unit time is greater than the amount of data extracted by device B from its interface, device A's interface can insert some SKPs (Short Strings) into the data it sends to device B. This way, when device B extracts data from its interface, it can discard any SKPs it encounters, ensuring that device B's interface doesn't miss any valid data received during data extraction. This compensates for the frequency deviation between device A's and device B's local clocks. Conversely, when the frequency of device A's local clock is less than the frequency of device B's local clock, meaning the amount of data received by device B's interface per unit time is less than the amount of data extracted by device B, device A's interface will intersperse some SKPs between valid data when sending data to device B. This means that device A's data always contains some SKPs. When device A sends data to device B, its interface can remove some SKPs from the data it sends. This also allows for compensation of the frequency deviation between the local clock on device A and the local clock on device B.

[0058] Compared to the case without SSC, the interval between adding or removing SKPs in the data sent by the data sender to the data receiver is smaller when SSC is introduced. In other words, device A adds more SKPs or removes more SKPs in the data sent to device B.

[0059] Currently, however, the data sender always adds SKPs to the data sent to the data receiver at fixed intervals or removes SKPs from the data sent to the data receiver.

[0060] However, the frequency offset introduced by the clock circuit may change, and the frequency of the SSC is not fixed. The data transmitter always adds SKP to the data sent to the data receiver or removes SKP from the data sent to the data receiver at fixed intervals, which cannot effectively compensate for the frequency deviation between the local clock of the data transmitter and the local clock of the data receiver.

[0061] To address this, this application provides a frequency offset compensation method. In this method, a first device 100 determines the local clock of the second device 200 based on data sent by the second device 200. The first device 100 can obtain a clock difference range, which is the range of variation between the number of clock cycles initiated by the local clock of the first device 100 and the number of clock cycles initiated by the local clock of the second device 200. The first device 100 determines a message insertion interval based on the correspondence between the clock difference range and the message insertion interval. The first device 100 adds a frequency offset compensation message to the data sent to the second device 200 or deletes a frequency offset compensation message from the data sent to the second device 200 according to the message insertion interval. The clock difference range reflects the frequency deviation between the local clock of the first device 100 and the local clock of the second device 200. The second device 200 can determine the message insertion interval according to the clock difference range. That is, the message insertion interval is no longer fixed. As the clock difference range changes, the message insertion interval will also change, ensuring effective compensation for the frequency deviation between the local clock of the first device 100 and the local clock of the second device 200.

[0062] like Figure 1 The above is a schematic diagram of a system structure provided in an embodiment of this application. The system includes a first device 100 and a second device 200. The first device 100 is provided with a first interface 110. The second device 200 is provided with a second interface 210, and a communication link is established between the first interface 110 and the second interface 210. Data interaction can be performed between the first device 100 and the second device 200.

[0063] When the first device 100 needs to send data to the second device 200, the first device 100 can send the data to the second interface 210 of the second device 200 through the first interface 110 and the communication link. When sending data through the first interface 110, the first device 100 sends the data according to its local clock. The second device 200, as the data receiver, obtains the local clock of the first device 100 by parsing the data received through the second interface 210. It then receives and buffers the data sent by the first device 100 through the second interface 210 according to the local clock of the first device 100, and retrieves the buffered data sent by the first device according to the local clock of the second device 200. Therefore, the clock used by the second interface 210 for receiving and buffering data is the local clock of the first device 100. The clock used by the second interface 210 for retrieving the buffered data is the local clock of the second device 200.

[0064] Similarly, when the second device 200 needs to send data to the first device 100, the second device 200 can send the data to the first interface 110 of the first device 100 via the communication link. When the second device 200 sends data through the second interface 210, it sends the data according to its local clock. The first device 100, as the data receiver, obtains the local clock of the second device 200 by parsing the data received through the second interface 210, receives and buffers the data through the first interface 110 according to the local clock of the second device 200, and retrieves the buffered data from the second interface 210 according to its local clock.

[0065] When the first device 100 sends data to the second device 200, the first device 100 can execute the frequency offset compensation method provided in the embodiments of this application to compensate for the frequency offset between the local clock of the first device 100 and the local clock of the second device 200.

[0066] The first interface 110 has a data buffering function. A transmit buffer area is provided in the first interface 110 to buffer data that needs to be sent to the second device 200. The first interface 110 also has a receive buffer area to buffer received data and retrieves the buffered data from the receive buffer area according to the local clock.

[0067] The first interface 110 has a counting function, which can count the number of clocks initiated by the local clock of the second device 200 and the local clock of the first device 100, starting from the same point in time. For ease of explanation, the number of clocks initiated by the local clock of the second device 200 is called the second clock count, and the number of clocks initiated by the local clock of the first device 100 is called the first clock count. The first clock count and the second clock count will change as the counting progresses.

[0068] The first interface 110 calculates the difference between the second clock count and the first clock count to obtain the clock difference count. This clock difference count refers to the clock difference between the local clock of the second device 200 and the local clock of the first device 100 within a certain time period. The range of variation of this clock difference count is the clock difference range. Since the first clock count and the second clock count change with counting, the clock difference count also changes with counting.

[0069] The first interface 110 has a storage function, storing the correspondence between clock difference ranges and message insertion intervals. In this correspondence, one clock difference range corresponds to one message insertion interval. The message insertion interval indicates the data length of the inserted frequency offset compensation message interval. In this embodiment, the data length of the frequency offset compensation message inserted at certain data intervals is fixed, such as the frequency offset compensation message size being 1 bit, or it could be a skip ordered set (SKP). One message insertion interval indicates one data length. For example, the message insertion interval can indicate that one frequency offset compensation message is inserted every 1000 bits. Another example is that the message insertion interval can indicate that one frequency offset compensation message is inserted every 500 bits.

[0070] The first interface 110 also has a frequency offset compensation message insertion function. Based on this correspondence, the first interface 110 can determine the corresponding message insertion interval according to the obtained clock difference range. After determining the message insertion interval, the first device 100 can insert a frequency offset compensation message into the data sent to the second device 200 according to the message insertion interval.

[0071] It should be noted that the above description uses the example of the first interface 110 inserting a frequency offset compensation message into the data sent to the second device 200. Similarly, the first interface 110 can also delete a frequency offset compensation message from the data sent to the second device 200. The function of the first interface 110 in deleting a frequency offset compensation message from the data sent to the second device 200 is similar to the function of the first interface 110 in inserting a frequency offset compensation message into the data sent to the second device 200. The difference is that the correspondence stored by the first interface 110 is the correspondence between the clock difference range and the message deletion interval. The first interface 110 has a frequency offset compensation message deletion function and can delete the frequency offset compensation message from the data sent to the second device 200 according to the determined message deletion interval.

[0072] When the second device 200 sends data to the first device 100, the second device 200 can also execute the frequency offset compensation method provided in the embodiments of this application to compensate for the frequency offset between the local clock of the first device 100 and the local clock of the second device 200. The functions of the second device 200 are similar to those of the first device 100. For details, please refer to the foregoing description, which will not be repeated here.

[0073] The principle behind establishing the correspondence between clock difference ranges and message insertion intervals is explained below:

[0074] This section uses an example where both the second device 200 and the first device 100 introduce a Signal Controller (SSC), with an SSC frequency of 33MHz, to illustrate the principle of establishing the correspondence between the clock difference range and the message insertion interval. For instance, after the second device 200 adjusts its local clock frequency using the SSC, the maximum local clock frequency of the second device 200 can reach 1GHz, and the minimum can reach 996.8MHz. Similarly, after the first device 100 adjusts its local clock frequency using the SSC, the maximum local clock frequency of the second device 200 can reach 1GHz, and the minimum can reach 996.8MHz.

[0075] like Figure 2 The diagram shows the local clock of the second device 200 obtained by the first device 100 and the local clock of the first device 100 within an adjustment cycle of an SSC. During the adjustment of the local clocks of the first device 100 and the second device 200 using the SSC, the frequencies of the local clocks of the first device 100 and the second device 200 change over time.

[0076] from Figure 2As can be seen, the phase difference between the local clock of the first device 100 and the local clock of the second device 200 is 180 degrees, and the frequency changes of the local clocks of the first device 100 and the second device 200 are completely opposite. While the frequency of the local clock of the first device 100 is increasing, the frequency of the local clock of the second device 200 is decreasing.

[0077] During the initial time period (16.6 microseconds in length, from 0 microseconds to 16.6 microseconds), the average frequency of the local clock of the first device 100 is 998.4MHz. During this time period, the number of clock cycles initiated by the local clock of the first device 100 is: 16.6 x 998.4 x 10^9. -9 =16573.

[0078] During the initial time period (16.6 microseconds in length, from 0 microseconds to 16.6 microseconds), the average frequency of the local clock of the second device 200 is 998.4MHz. During this time period, the number of clock cycles initiated by the local clock of the second device 200 is: 16.6 x 998.4 x 10^9.4. -9 =16573.

[0079] Therefore, due to the introduction of SSC, within half of the SSC adjustment cycle, the number of clock differences caused by the frequency deviation between the local clock of the first device 100 and the local clock of the second device 200 is 0.

[0080] During the intermediate time period (16.6 microseconds in length, ranging from 8.3 microseconds to 24.9 microseconds) (i.e.) Figure 2 (Shaded area) The average frequency of the local clock of the first device 100 is 999.2MHz. During this time period, the number of clock cycles initiated by the local clock of the first device 100 is: 16.6 x 999.2 x 10^6. -9 =16653.

[0081] During the intermediate time period (16.6 microseconds in length, ranging from 8.3 microseconds to 24.9 microseconds) (i.e.) Figure 2 (Shaded area) The average frequency of the local clock of the second device 200 is 997.6MHz. During this time period, the number of clock cycles initiated by the local clock of the second device 200 is: 16.6 x 997.6 x 10^6. -9 =16627.

[0082] Therefore, due to the introduction of SSC, within half of the SSC adjustment cycle, the number of clock differences caused by the frequency deviation between the local clock of the first device 100 and the local clock of the second device 200 is 26.

[0083] As can be seen, when the phase difference between the local clock of the first device 100 and the local clock of the second device 200 is 180 degrees, the frequency offset between the local clocks of the first device 100 and the second device 200 reaches its maximum. The second interface 210 transmits data faster (i.e., the first interface 110 receives data faster), while the first interface 110 extracts the received data more slowly. During half an SSC adjustment cycle, the number of clock differences caused by the frequency offset between the local clocks of the first device 100 and the second device 200 ranges from a minimum of 0 to a maximum of 26. The range of clock differences is 0 to 26, and this range refers to the variation range of the number of clock differences. In this embodiment, this range can be called the clock difference range.

[0084] The phase difference between the local clock of the first device 100 and the local clock of the second device 200 reflects the frequency offset between them. When the phase difference between the local clocks of the first device 100 and the second device 200 is determined, the frequency offset between them is also determined, and the corresponding message insertion interval can be calculated based on this frequency offset. This application embodiment does not limit the method of calculating the corresponding message insertion interval based on the frequency offset between the local clocks of the first device 100 and the second device 200.

[0085] The message insertion interval indicates the data length for inserting frequency offset compensation messages. In other words, one message insertion interval indicates a data length. When inserting frequency offset compensation messages into the data sent to the second device 200, one frequency offset compensation message can be inserted at intervals of this data length. This frequency offset compensation message can be of a fixed length, such as one SKP, or it can be other fixed-length data.

[0086] When the phase difference between the local clock of the first device 100 and the local clock of the second device 200 is 180 degrees, and the frequency change trends of the local clocks of the first device 100 and the second device 200 are completely opposite, the number of clock differences can reach a maximum of 26 clocks and a minimum of 0 clocks within any half-SSC adjustment period, with the number of clock differences ranging from 0 to 26. If the phase difference between the local clocks of the first device 100 and the second device 200 is no longer 180 degrees, and the frequency change trends of the local clocks of the first device 100 and the second device 200 are no longer completely opposite, the maximum and minimum values ​​of the number of clock differences caused by the frequency deviation between the local clocks of the first device 100 and the second device 200 will no longer be 26 and 0. Within half-SSC adjustment period, the number of clock differences caused by the frequency deviation between the local clocks of the first device 100 and the second device 200 will no longer be between 0 and 26.

[0087] The above analysis shows that the phase difference between the local clock of the first device 100 and the local clock of the second device 200 is different, and the range of clock differences caused by the frequency deviation between the local clock of the first device 100 and the local clock of the second device 200 is also different, that is, the range of clock difference values ​​is different.

[0088] The range of clock difference caused by the frequency deviation between the local clock of the first device 100 and the local clock of the second device 200 changes with the phase difference between the two local clocks. That is, there is a corresponding relationship between the phase difference between the local clocks of the first device 100 and the second device 200 and the range of clock difference. In practical applications, the phase difference between the local clocks of the first device 100 and the second device 200 is equal to a certain value, and the range of clock difference is determinable. In other words, regardless of the starting point for counting the number of clocks initiated by the local clocks of the first device 100 and the second device 200, the number of clock differences caused by the frequency deviation between the local clocks of the first device 100 and the second device 200 always varies within a fixed range of clock difference. That is, the maximum and minimum values ​​of the number of clock differences caused by the frequency deviation between the local clocks of the first device 100 and the second device 200 are fixed.

[0089] like Figure 3 The diagram shown illustrates the frequency variation over time of a local clock of a first device 100 and multiple different local clocks of a second device 200, as provided in an embodiment of this application. Figure 3 In the diagram, the dashed line represents the local clock, and the solid line represents the local clock of the first device 100. From... Figure 3As can be seen, there are several different phase differences between the local clock of the first device 100 and the different local clocks of the second device 200.

[0090] Using a method similar to that described above, the range of clock differences caused by the frequency deviation between the local clock of the first device 100 and the local clock of the second device 200 can be calculated, thereby determining the message insertion interval.

[0091] Figure 2 The frequency variation relationship between the local clock of the first device 100 and the local clock of the second device 200 shown is only a representation of the relationship between their frequencies. Figure 3 One of the frequency variation relationships between the local clock of the first device 100 and the multiple different local clocks of the second device 200.

[0092] like Figure 4 As shown, this application embodiment provides a schematic diagram of the relationship between the phase difference between the local clock of a first device 100 and the local clock of a second device 200, and the range of clock difference values.

[0093] from Figure 4 It is known that the phase difference between the local clock of the first device 100 and the local clock of the second device 200 is different, and the corresponding clock difference ranges are also different. Once the clock difference range is determined, the phase difference between the local clock of the first device 100 and the local clock of the second device 200 can be deduced, thereby determining the frequency deviation between the local clocks of the first device 100 and the second device 200. Based on the frequency deviation, the message insertion interval can be determined.

[0094] It is worth noting that, Figure 4 The relationship between phase difference and clock difference range shown is merely an illustrative diagram. In practice, the relationship between phase difference and clock difference range can be analogous to... Figure 4 different.

[0095] Therefore, in the embodiments of this application, the correspondence between the clock difference range and the message insertion interval can be constructed based on the above principle.

[0096] like Figure 5 The diagram illustrates the correspondence between the clock difference range and the message insertion interval constructed in this embodiment of the application. The correspondence between the clock difference range and the message insertion interval can exist in the form of a look-up table (LUT), which records the clock difference range and its corresponding message insertion interval.

[0097] It should be noted that during actual communication between the second device 200 and the first device 100, the frequencies of the local clocks of both the first device 100 and the second device 200 may fluctuate due to environmental interference or the influence of the clock circuit. This will result in fluctuations in the frequency deviation between the local clocks of the first device 100 and the second device 200. These fluctuations in frequency deviation will cause errors in the number of first and second clocks acquired by the second device 200, and consequently, errors in the number and range of clock differences.

[0098] To reduce this error, the second device 200 can control the duration of continuous counting of the clocks initiated under its own local clock and the clocks initiated under the local clock of the first device 100. That is, when the second device 200 starts counting the clocks initiated under its own local clock and the clocks initiated under the local clock of the first device 100 from the same time point, the duration of continuous counting can be equal to a set duration value. Within this duration, the second device 200 acquires the first clock count and the second clock count, calculates the difference between the first clock count and the second clock count, determines the number of clock differences, and thus determines the range of clock differences. After the continuous counting duration reaches the set duration value, the second device 200 can reset the acquired first clock count and second clock count to zero. After being reset, the second device 200 can restart counting the number of clocks initiated by its local clock and the number of clocks initiated by the local clock of the first device 100 from the same point in time, and obtain the first clock count and the second clock count.

[0099] In other words, the second device 200 can start counting the number of clocks initiated under the local clock of the second device 200 and the number of clocks initiated under the local clock of the first device 100 multiple times, and the duration of each count is equal to the set duration value.

[0100] It is worth noting that, in order to ensure that the second device 200 can accurately count the maximum and minimum values ​​of the number of clock differences, the counting duration of the second device 200 for the number of clocks initiated under its own local clock and the number of clocks initiated under the first device 100's local clock cannot be too short. For example, the duration of continuous counting can be greater than one SSC cycle. Another example is that the duration of continuous counting is N SSC cycles, where N is a positive integer.

[0101] In this embodiment, the first interface 110 is allowed to fine-tune the determined message insertion interval. That is, the first interface 110 can appropriately increase or decrease the determined message insertion interval. By fine-tuning the message insertion interval, errors caused by fluctuations in frequency deviation can be adjusted. In this embodiment, the specific value for appropriately increasing or decreasing the determined message insertion interval can be specified, that is, the amount of offset added to the message insertion interval. For example, in… Figure 5 An offset column is added to the LUT shown. The first interface 110 can determine the final invalid insertion frequency based on the packet insertion interval determined in the LUT and the offset of the packet insertion interval. The embodiments of this application do not limit the specific value of the offset; the offset can be an empirical value or obtained through simulation.

[0102] When the frequency of the local clock of the first device 100 is lower than the frequency of the local clock of the second device 200, the first interface 110 needs to delete frequency offset compensation messages from the data sent by the second device 200 according to a certain message deletion interval. The first interface 110 needs to store the correspondence between the clock difference range and the message deletion interval. The principle for constructing the correspondence between the clock difference range and the message deletion interval is similar to that for the above explanation, and will not be repeated here.

[0103] The following is combined with, for example Figure 6 This application provides a method for frequency offset compensation, as illustrated in the embodiments thereof. Figure 6 This is a schematic diagram of a frequency offset compensation method provided in an embodiment of this application. The method is illustrated here using the execution of the frequency offset compensation method by a first device 100 as an example. The method includes:

[0104] Step 601: The second device 200 sends data to the first interface 110 of the first device 100 through the second interface 210 and the communication link. The second device 200 sends data to the first interface 110 of the first device 100 according to the local clock of the second device 200.

[0105] There are two ways in which the second device 200 sends data to the first interface 110 of the first device 100 according to the local clock of the second device 200:

[0106] In the second type, the second device 200 only sends data signals carrying data, and does not send clock signals indicating the local clock.

[0107] The first and second devices 200 simultaneously transmit data signals and clock signals.

[0108] Step 602: The first interface 110 of the first device 100 receives and buffers the data sent by the second device 200.

[0109] When the second device 200 sends only a data signal carrying data, the first interface 110 parses the data signal, determines the local clock of the second device 200, and retrieves and caches the data from the data signal according to the local clock.

[0110] When the second device 200 simultaneously sends a data signal carrying data and a clock signal indicating the local clock, the first interface 110 parses the clock signal, determines the local clock of the second device 200, and retrieves the data from the data signal according to the local clock and caches the data in the receiving buffer area.

[0111] Step 603: The first interface 110 starts counting the number of clocks initiated by the local clock of the second device 200 and the number of clocks initiated by the local clock of the first device 100 from the same time point, and obtains the second clock count and the first clock count respectively.

[0112] This application embodiment does not limit the specific location of the starting point of counting in step 603. For example, the first interface 110 may start counting when it begins to receive data sent by the second device 200, or it may start counting during the process of receiving data sent by the second device 200.

[0113] The first interface 110 can be configured with two counters. One counter is used to count the number of clocks initiated under the local clock of the second device 200, and the count value of this counter is the second clock count. The other counter is used to count the number of clocks initiated under the local clock of the first device 100, and the count value of this counter is the first clock count.

[0114] The first interface 110 can start both counters simultaneously at a certain point in time. As time goes by, the number of the second clock cycle and the number of the first clock cycle recorded by these two counters will accumulate over time.

[0115] Step 604: The first interface 110 calculates the difference between the second clock count and the first clock count in real time, calculates the number of clock differences, and obtains the maximum and minimum values ​​of the number of clock differences, that is, obtains the clock difference range.

[0116] The first interface 110 can calculate the difference between the second clock count and the first clock count in real time to obtain the clock difference count. As can be seen from the foregoing description, when the frequency deviation (i.e., phase difference) between the selected local clocks remains constant, the clock difference count will vary within a certain range, which is the clock difference range.

[0117] The first interface 110 can execute steps 603 and 604 multiple times. That is, the first interface 110 can initiate the counting process multiple times, counting the number of clocks initiated under the local clock of the second device 200. In each counting process, the first interface 110 calculates the difference between the second clock count and the first clock count, determines the number of clock differences, and obtains the clock difference range. The duration of each counting process is equal to a set duration value. Each time the counting process is initiated, the first interface 110 can reset the first clock count and the second clock count obtained in the previous counting process to zero.

[0118] After executing steps 603 and 604 multiple times, the first interface 110 can obtain multiple clock difference ranges. The first interface 110 can calculate the average of these multiple clock difference ranges to obtain the final determined clock difference range.

[0119] Step 605: The first interface 110 determines the message insertion interval corresponding to the obtained clock difference range based on the correspondence between the clock difference range and the message insertion interval.

[0120] If the correspondence between the clock difference range and the message insertion interval also records the offset amount corresponding to the clock difference range, the first interface 110 can adjust the message insertion interval corresponding to the clock difference range according to the offset amount corresponding to the clock difference range to obtain the final message insertion interval.

[0121] For example, the message insertion interval indication for the clock difference range is to insert one frequency offset compensation message every 1000 bits. If the offset corresponding to the clock difference range is 10 bits, indicating that the data length needs to be increased by 10 bits, then the final message insertion interval indication is to insert one frequency offset compensation message every 1010 bits. If the offset corresponding to the clock difference range is -10 bits, indicating that the data length needs to be reduced by 10 bits, then the final message insertion interval indication is to insert one frequency offset compensation message every 990 bits.

[0122] Step 606: The first interface 110 inserts frequency offset compensation messages into the data sent to the second device 200 according to the message insertion interval. The data sent to the second device 200 can be buffered in the transmission buffer area.

[0123] If the message insertion interval indicates that one frequency offset compensation message is inserted every 1010 bits, the first interface 110 can insert one frequency offset compensation message every 1010 bits starting from the beginning of the data in the transmission buffer area until the end of the data.

[0124] If the message insertion interval indicates that a 1-bit frequency offset compensation message is inserted every 990 bits, the first interface 110 can insert one frequency offset compensation message every 990 bits starting from the beginning of the data in the transmit buffer area until the end of the data.

[0125] It is worth noting that in this embodiment, the example given is that the first interface 110 obtains the clock difference range on its own and determines the corresponding message insertion interval through the correspondence between the clock difference range and the message insertion interval. In practical applications, the operations of obtaining the clock difference range and determining the corresponding message insertion interval through the correspondence between the clock difference range and the message insertion interval can also be performed by other modules in the first device 100. After determining the message insertion interval, the other module sends the determined message insertion interval to the first interface 110. After obtaining the message insertion interval, the first interface 110 executes step 606.

[0126] Based on the same inventive concept as the method embodiments, this application also provides a frequency offset compensation device, which is used to perform the above-described... Figure 6 The method executed by the first device (such as the first interface) in the illustrated method embodiment has related features that can be found in the above method embodiments and will not be repeated here. Figure 7 As shown, the frequency offset compensation device 700 includes an acquisition module 701, a determination module 702, and a processing module 703.

[0127] The acquisition module 701 is used to acquire the clock difference range, which is used to characterize the difference range between the second clock count and the first clock count. The second clock count is the number of clocks initiated under the local clock of the second device, and the first clock count is the number of clocks initiated under the local clock of the first device.

[0128] The determination module 702 is used to determine the message insertion interval corresponding to the obtained clock difference range based on the correspondence between the clock difference range and the message insertion interval.

[0129] The processing module 703 is used to insert frequency offset compensation messages into the data sent to the second device according to the determined message insertion interval.

[0130] In one possible implementation, when acquiring the clock difference range, the acquisition unit may simultaneously start counting the number of clocks initiated under the local clock of the second device and the number of clocks initiated under the local clock of the first device, and obtain the second clock count and the first clock count respectively; then, the clock difference range is determined based on the change in the difference between the second clock count and the first clock count.

[0131] In one possible implementation, the determining module 702 can adjust the message insertion interval. For example, the determining module 702 can determine a candidate message insertion interval corresponding to the acquired clock difference range based on the correspondence between the clock difference range and the message insertion interval; then, it can adjust the candidate message insertion interval according to a preset offset to obtain the message insertion interval corresponding to the acquired clock difference range.

[0132] In one possible implementation, the message insertion interval indicates the data length of the insertion frequency offset compensation message interval.

[0133] In one possible implementation, before acquiring the clock difference range, the acquisition module 701 may also determine the local clock of the second device based on the data sent by the second device.

[0134] In one possible implementation, the determining module 702 may further determine the message deletion interval corresponding to the acquired clock difference range based on the correspondence between the clock difference range and the message deletion interval. The processing module 703 may delete frequency offset compensation messages in the data sent to the second device according to the determined message deletion interval.

[0135] In one possible implementation, the frequency offset compensation message is either fixed-length data or a single SKP.

[0136] It should be noted that the module division in this embodiment is illustrative and represents only one logical functional division; in actual implementation, there may be other division methods. The functional modules in this embodiment can be integrated into one processing module, or each module can exist physically separately, or two or more modules can be integrated into one module. The integrated modules can be implemented in hardware or as software functional modules.

[0137] The above embodiments can be implemented, in whole or in part, by software, hardware, firmware, or any other combination thereof. When implemented using software, the above embodiments can be implemented, in whole or in part, as a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded or executed on a computer, all or part of the processes or functions described in the embodiments of the present invention are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more sets of available media. The available medium can be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium. A semiconductor medium can be a solid-state drive (SSD).

[0138] In a simplified embodiment, those skilled in the art will conceive of, as follows: Figure 6 In the illustrated embodiment, the first interface in the first device can be adopted Figure 8 As shown in the figure.

[0139] like Figure 8 The transmission device 800 shown can be deployed in the first interface. The transmission device 800 includes at least one processing unit 801, and optionally, a memory 802.

[0140] Memory 802 may be volatile memory, such as random access memory; memory may also be non-volatile memory, such as read-only memory, flash memory, hard disk drive (HDD), or solid-state drive (SSD); or memory 802 may be any other medium capable of carrying or storing desired program code in the form of instructions or data structures and accessible by a computer, but is not limited thereto. Memory 802 may be a combination of the above-described memories.

[0141] The specific connection medium between the processing unit 801 and the memory 802 is not limited in the embodiments of this application.

[0142] The processing unit 801 can be a central processing unit (CPU), but it can also be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, artificial intelligence chips, on-chip chips, etc. The general-purpose processor can be a microprocessor or any conventional processor.

[0143] When the first interface adopts Figure 8 When in the form shown, Figure 8 The processing unit 801 can invoke computer program instructions stored in the memory 802, enabling the transmission device to execute the method executed by the first interface in any of the above method embodiments. Alternatively, it can execute computer program instructions burned onto the memory 802, enabling the transmission device to execute the method executed by the first interface in any of the above method embodiments.

[0144] In a simple embodiment, those skilled in the art may also conceive of, for example... Figure 6 In the illustrated embodiment, the first interface in the first device can be adopted Figure 9 As shown in the figure.

[0145] like Figure 9 The transmission device 900 shown can be deployed in the first interface. The transmission device 900 includes a buffer 901, a frequency offset adjustment engine 902, and a transmission port 903.

[0146] The buffer 901 has a storage function, which can store the correspondence between clock difference ranges and message insertion intervals. Optionally, it can also buffer data that needs to be sent to a second device. This application does not limit the type of the buffer 901; it can be volatile memory or non-volatile memory.

[0147] The frequency offset adjustment engine 902 is used to implement the frequency offset compensation function and is a core hardware component in the transmission device. This engine 902 can acquire a clock difference range, which characterizes the difference between the second clock count and the first clock count. The first clock count is the number of clocks initiated under the local clock of the first device, and the second clock count is the number of clocks initiated under the local clock of the second device. The frequency offset adjustment engine 902 can also determine the message insertion interval corresponding to the acquired clock difference range based on the correspondence between the clock difference range and the message insertion interval, and insert frequency offset compensation messages into the data sent to the second device according to the determined message insertion interval. The frequency offset adjustment engine 902 is used to perform actions such as... Figure 6 Steps 603 to 606 in the illustrated embodiment. This application does not limit the specific hardware form of the frequency offset adjustment engine 902; the frequency offset adjustment engine 902 can be an ASIC or an FPGA.

[0148] Transmit port 903 is used for data transmission. This transmit port 903 can send data for inserting frequency offset compensation messages to the second device.

[0149] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0150] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to this application. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0151] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0152] These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable apparatus for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0153] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.

Claims

1. A frequency offset compensation method, characterized in that, The method includes: The first device obtains a clock difference range, which is used to characterize the difference range between the second number of clocks and the first number of clocks. The first number of clocks is the number of clocks initiated under the local clock of the first device, and the second number of clocks is the number of clocks initiated under the local clock of the second device. The first device determines the message insertion interval corresponding to the obtained clock difference range based on the correspondence between the clock difference range and the message insertion interval; The first device inserts frequency offset compensation messages into the data sent to the second device according to the determined message insertion interval.

2. The method as described in claim 1, characterized in that, The first device acquires the clock difference range, including: The first device simultaneously starts counting the number of clocks initiated under the local clock of the second device and the number of clocks initiated under the local clock of the first device, and obtains the second clock count and the first clock count respectively; The first device determines the clock difference range based on the second clock count and the difference between the first clock count and the clock count.

3. The method as described in claim 1 or 2, characterized in that, The first device determines the message insertion interval corresponding to the acquired clock difference range based on the correspondence between the clock difference range and the message insertion interval, including: The first device determines the candidate message insertion interval corresponding to the acquired clock difference range based on the correspondence; The first device adjusts the candidate message insertion interval according to a preset offset to obtain a message insertion interval corresponding to the acquired clock difference range.

4. The method according to any one of claims 1-3, characterized in that, The message insertion interval indicates the data length of the insertion frequency offset compensation message interval.

5. The method according to any one of claims 1-4, characterized in that, Before the first device obtains the clock difference range, the method further includes: The first device determines the local clock of the second device based on the data sent by the second device.

6. The method according to any one of claims 1-5, characterized in that, The method further includes: The first device determines the message deletion interval corresponding to the obtained clock difference range based on the correspondence between the clock difference range and the message deletion interval; The first device deletes frequency offset compensation messages in the data sent to the second device according to the determined message deletion interval.

7. The method according to any one of claims 1-6, characterized in that, The frequency offset compensation message is either fixed-length data or a skip sequence SKP.

8. A frequency offset compensation device, characterized in that, The device includes: The acquisition module is used to acquire the clock difference range, which is used to characterize the difference range between the second clock count and the first clock count. The first clock count is the number of clocks initiated under the local clock of the first device, and the second clock count is the number of clocks initiated under the local clock of the second device. The determination module is used to determine the message insertion interval corresponding to the acquired clock difference range based on the correspondence between the clock difference range and the message insertion interval; The processing module is used to insert frequency offset compensation messages into the data sent to the second device according to the determined message insertion interval.

9. The apparatus as claimed in claim 8, characterized in that, The acquisition module is used for: Simultaneously, the number of clocks initiated under the local clock of the second device and the number of clocks initiated under the local clock of the first device are counted to obtain the number of the second clock and the number of the first clock, respectively. The clock difference range is determined based on the difference between the second clock count and the first clock count.

10. The apparatus as claimed in claim 8 or 9, characterized in that, The determining module is used for: Based on the correspondence, the candidate message insertion interval corresponding to the obtained clock difference range is determined; The candidate message insertion interval is adjusted according to a preset bias value to obtain a message insertion interval corresponding to the acquired clock difference range.

11. The apparatus according to any one of claims 8-10, characterized in that, The message insertion interval indicates the data length of the insertion frequency offset compensation message interval.

12. The apparatus according to any one of claims 8-11, characterized in that, Before acquiring the clock difference range, the acquisition module is also used for: The local clock of the second device is determined based on the data sent by the second device.

13. The apparatus according to any one of claims 8-12, characterized in that, The determining module is further configured to determine the message deletion interval corresponding to the obtained clock difference range based on the correspondence between the clock difference range and the message deletion interval; The processing module is further configured to delete frequency offset compensation messages in the data sent to the second device according to the determined message deletion interval.

14. The apparatus according to any one of claims 8-13, characterized in that, The frequency offset compensation message is either fixed-length data or a skip sequence SKP.

15. A transmission device, characterized in that, The device is deployed in a first device, and the device includes: a buffer, a frequency offset adjustment engine, and a transmission port; The cache is used to store the correspondence between the clock difference range and the message insertion interval; The frequency offset adjustment engine is used to obtain a clock difference range, which represents the difference between the second clock count and the first clock count. The first clock count is the number of clocks initiated under the local clock of the first device, and the second clock count is the number of clocks initiated under the local clock of the second device. Based on the correspondence between the clock difference range and the message insertion interval, a message insertion interval corresponding to the obtained clock difference range is determined. Frequency offset compensation messages are inserted into the data sent to the second device according to the determined message insertion interval. The transmitting port is used to send data to the second device to insert the frequency offset compensation message.

16. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores instructions that, when executed on a computer, cause the computer to perform the method as described in any one of claims 1-7.

Images