A one-and-a-half-stage LED power supply circuit

CN117500112BActive Publication Date: 2026-09-18ZHONGSHAN DONE LIGHTING TECH CO LTD
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Patent Information

Application Number
CN202311454746.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-11-03
Publication Date
2026-09-18
Estimated Expiration
2043-11-03

AI Technical Summary

Technical Problem

而在性能上呢,由于两级非隔离应用方案在负载调整率和线性方面很难做到2%以内,产品效率虽然较隔离型应用有了很大的提升,可以做到95%的电源转换效率,但是想进一步的提升效率也是一个比较困难的事情

Benefits of technology

本发明设计出非隔离一级半方案来替代非隔离两级方案,所谓的一级半方案就是由主动PFC升压电路+线性恒流电路构成,由线性恒流电路非常简单,理论上算不上一级,就以半级来称谓,叫做一级半电源电路结构。一级半方案克服了两级方案所有的缺陷,它只需要一个电感,比两级非隔离方案省掉了一个电感,而且,由于后级采用线性恒流,众所周知,线性恒流没有高频开关信号,所以就不存在EMI/EMC 方面的问题,省去了一级的EMI/EMC方面的各种操作。线性恒流还具备了优异的负载调整率和线性调整率,可以做到1%内,效率可以做到96%以上。

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Abstract

A one-and-a-half-stage LED power supply circuit includes a management chip U2. The VDD terminal of the management chip U2 is grounded through capacitors C6 and C7. One end of capacitor C6 is grounded through diodes D3 and ZD9. Diode D3 is also connected to the output terminal of inductor T1 through resistor R63 and capacitor C22. The output terminal of inductor T1 is connected to capacitor C26 and resistor R72. Resistor R72 is connected to the emitter of transistor Q6, whose collector is grounded and whose base is connected to the management chip U2. The output terminal of inductor T1 is connected to the drain of MOSFET Q4. Its gate is connected to the management chip U2 through resistors R15 and R13, and its source is grounded through resistor R21. One end of resistor R21 is connected to resistor R20, which is grounded through capacitor C10 and is also connected to the management chip U2. The output terminal of inductor T1 is also connected to the drain of MOSFET Q9. Its gate is connected to resistors R39 and R72, and its source is connected to resistor R21.
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Description

Technical Field

[0001] This invention relates to the field of LED power supplies, and more particularly to a one-and-a-half-stage LED power supply circuit. Background Technology

[0002] Throughout human history of lighting, traditional lighting technologies have suffered from a series of drawbacks, such as low luminous efficiency (incandescent lamps have a luminous efficiency of only about 20%, while ordinary energy-saving lamps have about 40%-50%), high power consumption, short lifespan, and the presence of large amounts of ultraviolet and infrared radiation. Previously, traditional lighting fixtures were generally AC-driven, inevitably producing flicker that could damage eyesight. Ordinary energy-saving lamps' electronic ballasts generated strong electromagnetic interference, and fluorescent lamps contained large amounts of heavy metals such as mercury and lead, which could not be fully recycled, leading to environmental pollution. Modern production and life urgently require a highly efficient, energy-saving, pollution-free, and harmless green lighting technology to replace traditional lighting technologies. LEDs, or light-emitting diodes, possess significant advantages such as long lifespan, energy saving, safety, greenness, environmental friendliness, and rich colors.

[0003] However, LEDs cannot use a power supply directly like traditional light sources; they require a driver circuit to convert the power supply into direct current before they can operate. The type and structure of LED driver circuits are related to the type of power supply, and they are generally divided into two main categories: DC power supply and AC power supply. DC power supply refers to various dry cell batteries, storage batteries, and solar cells that can directly provide DC current. Based on the power supply voltage provided, it can be divided into three types: low voltage drive, transition voltage drive, and high voltage drive.

[0004] AC power supply (mains-driven): This is the most valuable power supply method for LED lighting applications and a problem that must be solved for the widespread application of semiconductor lighting. AC power supply (mains-driven) for LED drivers generally involves rectification, filtering, and voltage (or current) regulation to convert AC power to DC power. Then, a suitable driving circuit provides the LED with the appropriate operating current, while maintaining high conversion efficiency, small size, and low cost. Safety issues also need to be addressed. Considering the impact on the power grid, electromagnetic interference and power consumption must also be resolved. Currently, the circuit structures of LED driver power supplies in the industry are divided into the following types: BUCK step-down circuit, BOOST step-up circuit, BUCK-BOOST step-up / step-down circuit, Flyback circuit, Forward circuit, Two-Transistor Forward circuit, Push-Pull circuit, Half Bridge circuit, Full Bridge circuit, SEPIC circuit, C'uk circuit, and LLC circuit. The circuit structure of almost any LED driver power supply falls within the scope of the above-mentioned circuit structures. It either employs a single-stage structure or a two-, three-, or more-stage approach to achieve constant voltage or constant current driving of the LED. For example: Isolated type: In low-power applications, there are single-stage single-ended flyback circuits, single-stage PFC circuits (isolated buck-boost), or two-stage (PFC (i.e., boost) + single-ended flyback) applications; in medium and high-power applications, there are also common PFC + quasi-resonant flyback applications, PFC + dual-transistor flyback applications, PFC + dual-transistor forward applications, PFC + LLC applications, PFC + phase-shifted full-bridge applications, etc., which generally belong to a two-stage power supply circuit structure.

[0005] Non-isolated applications also primarily consist of a two-stage circuit structure: an active PFC boost stage + a buck stage. This two-stage non-isolated circuit offers significant simplification compared to isolated two-stage applications. Because it's a non-isolated output, it doesn't require a transformer for isolation, thus greatly reducing power losses. This allows the use of only two small inductors (PFC inductor and buck inductor) instead of the large inductors and transformers required in isolated two-stage circuits. Simultaneously, the number of other peripheral components is correspondingly reduced.

[0006] Although two-stage non-isolated power supplies represent a significant leap in cost and performance compared to isolated power supplies, increasingly fierce competition within the industry has led to higher demands on LED power supplies in both cost and performance. Previously, the cost was around 2 yuan per W, then around 1 yuan per W, then 0.5 yuan per W, and now the ideal is less than a quarter of the cost per W. Regarding performance, two-stage non-isolated solutions struggle to achieve load regulation and linearity below 2%. While efficiency is significantly improved compared to isolated applications, reaching 95% power conversion efficiency, further improvements are difficult. Furthermore, the presence of two high-frequency switching noise sources complicates electromagnetic compatibility and interference (EMC) design. The introduction of EMI / EMC components not only increases product cost but also reduces conversion efficiency to some extent. Summary of the Invention

[0007] To solve the above problems, this technical solution provides a one-and-a-half-stage LED power supply circuit.

[0008] To achieve the above objectives, the technical solution is as follows: A one-and-a-half-stage LED power supply circuit, comprising: The PFC boost circuit is connected to the EMI filter circuit, and its output terminal is equipped with a linear constant current output circuit. The PFC boost circuit includes: The management chip U2 has its VDD terminal grounded through capacitors C6 and C7. One end of capacitor C6 is grounded through diodes D3 and ZD9. Diode D3 is also connected to the output terminal of inductor T1 through resistor R63 and capacitor C22. The output terminal of inductor T1 is equipped with capacitor C26 and resistor R72. Resistor R72 is connected to the emitter of transistor Q6, its collector is grounded, and its base is connected to the management chip U2. The output terminal of inductor T1 is connected to the drain of MOSFET Q4. Its gate is connected to management chip U2 through resistors R15 and R13. Its source is grounded through resistor R21. One end of resistor R21 is connected to resistor R20. Resistor R20 is grounded through capacitor C10. Resistor R20 is also connected to management chip U2. The output terminal of inductor T1 is also connected to the drain of MOSFET Q9. Its gate is connected to resistor R72 through resistor R39. Its source is connected to resistor R21. The COMP terminal of the management chip U2 is grounded through capacitor C8; The output terminal of inductor T1 is connected to resistors R1 and R2 in parallel. The common output terminal of resistors R1 and R2 is connected to capacitor C1. Capacitor C1 is grounded through capacitor C4. Capacitor C1 is connected to the linear constant current output circuit. The output terminal of inductor T1 is connected to capacitor C2. The common output terminal of capacitors C2 and C1 is connected to the FB terminal of management chip U2 in sequence through resistors R6, R9 and R14. Resistor R14 is also grounded through resistors R23, R28 and capacitor C11. The FB terminal of management chip U2 is grounded through capacitor C9, resistor R22 and diode ZD2.

[0009] In some embodiments, the linear constant current output circuit includes; The management chip U1 has its FB terminal grounded via diode ZD1 and resistor R16. One end of resistor R16 is connected to the output terminal of inductor T1 via resistors R10 and R5. The GATE terminal of the management chip U1 is grounded via resistor R67 and connected to the gate of MOSFET Q3 via resistor R66. Q3's drain is connected to the output terminal of inductor T1, and Q3's source is connected to the management chip U1 via resistor R17. Q3's source is also grounded via resistors R59 and R60. The gate terminal of the management chip U1 is connected to the gate of the MOS transistor Q2 through resistor R65, its drain is connected to the output terminal of the inductor T1, its source is connected to the management chip U1 through resistor R70, and its source is also grounded through resistors R27 and R26 respectively. The gate terminal of the management chip U1 is connected to the gate of the MOS transistor Q1 through resistor R64, its drain is connected to the output terminal of the inductor T1, its source is connected to the management chip U1 through resistor R71, and its source is also grounded through resistors R24 and R25 respectively.

[0010] In some embodiments, an auxiliary power supply terminal J1 is also included, which is connected to the output terminal of the inductor T1.

[0011] In some embodiments, the device further includes a dimming chip U4. One end of the dimming chip U4 is provided with a resistor R58 and an inductor L8 in sequence. The inductor L8 is connected to the collector of the transistor Q11, its emitter is connected to the dimming port, and its base is connected to the dimming chip U4 in sequence through resistors R57 and R51. The two ends of the inductor L8 are connected in parallel with the inductor L9 through capacitors C19 and C20, respectively, and the inductor L9 is connected to the dimming port.

[0012] The beneficial effects of this application are: This invention designs a non-isolated one-and-a-half-stage solution to replace the non-isolated two-stage solution. The so-called one-and-a-half-stage solution consists of an active PFC boost circuit and a linear constant current circuit. Since the linear constant current circuit is very simple, theoretically it doesn't qualify as a stage, so it's called a half-stage power supply circuit structure. The one-and-a-half-stage solution overcomes all the shortcomings of the two-stage solution. It only requires one inductor, saving one inductor compared to the two-stage non-isolated solution. Furthermore, because the subsequent stage uses a linear constant current circuit, which, as is well known, does not have high-frequency switching signals, there are no EMI / EMC issues, eliminating the various EMI / EMC operations required for a single stage. The linear constant current circuit also possesses excellent load regulation and line regulation, achieving within 1%, with an efficiency exceeding 96%. Attached Figure Description

[0013] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below.

[0014] Figure 1 This is a schematic diagram of the block structure of an embodiment of the present invention; Figure 2 This is a schematic diagram of the circuit structure according to an embodiment of the present invention. Detailed Implementation

[0015] To make the technical problems solved, the technical solutions, and the beneficial effects of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

[0016] Please refer to Figure 1-2 As shown, a one-and-a-half-stage LED power supply circuit includes: The PFC boost circuit is connected to the EMI filter circuit, and its output terminal is equipped with a linear constant current output circuit. The PFC boost circuit includes: The management chip U2 has its VDD terminal grounded through capacitors C6 and C7. One end of capacitor C6 is grounded through diodes D3 and ZD9. Diode D3 is also connected to the output terminal of inductor T1 through resistor R63 and capacitor C22. The output terminal of inductor T1 is equipped with capacitor C26 and resistor R72. Resistor R72 is connected to the emitter of transistor Q6, its collector is grounded, and its base is connected to the management chip U2. The output terminal of inductor T1 is connected to the drain of MOSFET Q4. Its gate is connected to management chip U2 through resistors R15 and R13. Its source is grounded through resistor R21. One end of resistor R21 is connected to resistor R20. Resistor R20 is grounded through capacitor C10. Resistor R20 is also connected to management chip U2. The output terminal of inductor T1 is also connected to the drain of MOSFET Q9. Its gate is connected to resistor R72 through resistor R39. Its source is connected to resistor R21. The COMP terminal of the management chip U2 is grounded through capacitor C8; The output terminal of inductor T1 is connected to resistors R1 and R2 in parallel. The common output terminal of resistors R1 and R2 is connected to capacitor C1. Capacitor C1 is grounded through capacitor C4. Capacitor C1 is connected to the linear constant current output circuit. The output terminal of inductor T1 is connected to capacitor C2. The common output terminal of capacitors C2 and C1 is connected to the FB terminal of management chip U2 in sequence through resistors R6, R9 and R14. Resistor R14 is also grounded through resistors R23, R28 and capacitor C11. The FB terminal of management chip U2 is grounded through capacitor C9, resistor R22 and diode ZD2.

[0017] In this embodiment, the linear constant current output circuit includes: The management chip U1 has its FB terminal grounded via diode ZD1 and resistor R16. One end of resistor R16 is connected to the output terminal of inductor T1 via resistors R10 and R5. The GATE terminal of the management chip U1 is grounded via resistor R67 and connected to the gate of MOSFET Q3 via resistor R66. Q3's drain is connected to the output terminal of inductor T1, and Q3's source is connected to the management chip U1 via resistor R17. Q3's source is also grounded via resistors R59 and R60. The gate terminal of the management chip U1 is connected to the gate of the MOS transistor Q2 through resistor R65, its drain is connected to the output terminal of the inductor T1, its source is connected to the management chip U1 through resistor R70, and its source is also grounded through resistors R27 and R26 respectively. The gate terminal of the management chip U1 is connected to the gate of the MOS transistor Q1 through resistor R64, its drain is connected to the output terminal of the inductor T1, its source is connected to the management chip U1 through resistor R71, and its source is also grounded through resistors R24 and R25 respectively.

[0018] In this embodiment, an auxiliary power supply terminal J1 is also included, which is connected to the output terminal of the inductor T1.

[0019] In this embodiment, a dimming chip U4 is also included. One end of the dimming chip U4 is provided with a resistor R58 and an inductor L8 in sequence. The inductor L8 is connected to the collector of the transistor Q11, its emitter is connected to the dimming port, and its base is connected to the dimming chip U4 in sequence through resistors R57 and R51. The two ends of the inductor L8 are connected in parallel with the inductor L9 through capacitors C19 and C20, respectively, and the inductor L9 is connected to the dimming port.

[0020] Specifically, mains input and general EMI filtering / input rectification: After power-on, AC mains power of 100-277VAC (global voltage range) is input via the input line. Fuse F1 can effectively disconnect the input in case of a fault in the downstream circuit. Thermistor NTC1, varistor RV2, and RV1 can suppress surge current during power-on. LF2, CX1, L4, CY4, L5, CY5, LF1, L7, and CY3 form a general-purpose EMI filter circuit, which can effectively suppress noise interference from the circuit to other electrical equipment on the power grid and also effectively prevent power grid noise from interfering with the circuit. BD1 is an input bridge rectifier that can rectify the input AC power into a McDonald's waveform. L1, C2, and C3 form a π-type filter circuit, which can effectively filter out EMI conducted interference noise in the 150kHz frequency band.

[0021] PFC stage (i.e., power factor correction circuit, which can be regarded as a complete first-stage circuit): U2 is the power factor correction control management chip. R4, R8, and R12 are the high-voltage startup power supply current-limiting resistors for chip U2. C22, R63, ZD9, D3, C6, and C7 form the VCC power supply circuit after chip U2 starts up, providing the normal operating current for chip U2. C8 is the chip slope compensation capacitor. Pin 4 of the chip is connected to signal ground. R3, R7, R11, ZD2, R22, and C9 form the output voltage sampling feedback circuit of the power factor correction circuit. Adjusting the parameters of this circuit can adjust the output level of the PFC stage. R6, R9, R14, R23, R28, and C11 form the PFC output overvoltage protection sampling circuit. Adjusting the parameters of this circuit can adjust the maximum voltage limit of the PFC output voltage under no-load conditions. R21, R20, and C10 are the cycle-by-cycle current flowing through the power MOSFET Q4 in the PFC circuit. The sampling circuit for the current flow can limit the maximum output power of the PFC stage by adjusting the component parameters of this circuit. Q4, Q9, R13, R15, R39, R18, R40, and Q6 form the PFC main PWM (Pulse Width Modulation) switching circuit. This circuit controls the on and off of Q4 and Q9 by the PWM signal output from the PIN8 pin of the management chip, thereby generating an induced electromotive force on the main winding of the PFC inductor T1, making the input current follow the input voltage. This reduces the high-order harmonic noise (1st, 3rd, 5th, 7th, 9th, etc.) that generates the switching signal, thus polluting the power grid and improving the utilization rate of the power grid. C26 and R72 provide the ZCD (Zero Crossing Detection) sampling signal for chip U2. The chip uses this signal to determine the zero-crossing moment of the PFC inductor's energy storage and turns on the power MOSFET at the zero-crossing moment to achieve the purpose of the input current following the input voltage. As is well known, without this chip control mechanism, due to the inductor's resistance to AC current, the input current usually lags behind the input voltage, resulting in high power supply harmonics and low grid utilization. D2 is a boost diode, and R1, R2, and C1 form a snubber circuit for D2, absorbing high-order harmonic noise caused by the reverse recovery current of the ultra-fast recovery diode. C4 is a large-capacity high-voltage filter electrolytic capacitor. After the PFC circuit operates, this electrolytic capacitor forms a boosted DC voltage to supply the subsequent linear constant current circuit. The auxiliary windings CUT+, CUT-, D4, C24, R68, ZD12, R69, and Q12 of the PFC inductor T1 form a short-circuit self-protection circuit after power-off. After power-on, the AC current on CUT+ and CUT- is rectified, filtered, and clamped by D4, C24, R68, ZD12, and R69, which then opens the field-effect transistor Q12. After power-off, the AC current on CUT+ and CUT- disappears immediately, and Q12 cuts off the path from the large electrolytic capacitor to the output terminal.

[0022] Linear constant current output (half stage): U1 is a linear constant current control management chip; R5, R10, R16, and ZD1 form the output voltage negative terminal feedback sampling circuit. This circuit provides overvoltage protection for the linear constant current MOSFETs. Under normal operating conditions, if a short circuit occurs between the positive and negative terminals of the power supply, the voltage sampling circuit composed of R5, R10, R16, and ZD1 will sample the overvoltage signal. The linear constant current control management chip U1 will promptly pull down the drive level on pin 6 of U1, cutting off the drain and source paths of the linear field-effect transistors Q1, Q2, and Q3, thus protecting the linear constant current circuit from damage. C25 is an auxiliary power supply used for filtering the VCC power supply to the linear constant current control management chip U1. This surface-mount capacitor is connected to ground close to the VCC pin of chip U1, providing a loop for the internal operating current of the chip and enhancing the operating stability of chip U1. R64, R65, R66, R67, Q1, Q2, Q3, R17, R70, R71, R24, R25, R26, R27, R59, and R60 form a linear constant current cooling and current sharing circuit. R64, R65, and R66 are the current-limiting resistors for the gates of linear MOSFETs Q1, Q2, and Q3, respectively; R67 is the lower bias resistor for the gates of Q1, Q2, and Q3; R17, R70, R71, R24, R25, R26, R27, R59, and R60 are the current sampling resistors for the sources of Q1, Q2, and Q3, respectively. The sampling signal is provided to pin 5 of U1. The linear constant current control management chip U1 adjusts the driving levels of Q1, Q2, and Q3 on pin 6 according to the current sampling signal on pin 5, so that Q1, Q2, and Q3 operate in the amplification state to achieve the purpose of constant current output.

[0023] Isolation auxiliary power supply J1 is a small board for isolated auxiliary power supply. Because the three-in-one dimming circuit is a circuit that users will come into contact with, for safety reasons, this part of the circuit requires isolated safety extra-low voltage power supply. Since the auxiliary power supply has a small power, it is made into a relatively independent small isolated power supply on a small board and connected to the motherboard via socket J1.

[0024] Isolation three-in-one dimming circuit The following components constitute an isolated three-in-one dimming circuit: dimming light D+, dimming light D-, PT1, ZD8, Q11, R57, C20, L8, L9, C19, R58, ZD7, D5, R53, R55, C21, U4, R54, C17, R51, C14, R43, ZD6, R49, U3, R38, ZD10, D6, C15, R45, and R36. The PWM signal, 0-10V signal, and potentiometer signal input from the dimming light source D+ and D- can all be processed internally by the dimming management chip U4 and output as a linearly proportional PWM pulse from its PIN6 pin to the PIN2 pin of the optocoupler. The optocoupler's PIN3 and PIN4 pins output a reversed PWM dimming signal at a certain multiple. After being smoothed by the integrating circuit formed by the resistor at D6 and the electrolytic capacitor C15, a linearly changing DC dimming signal is formed. This DC dimming signal is input to the current detection pin PIN4 of the linear constant current chip U1, thereby directly adjusting the output current, which means that the dimming purpose is achieved.

[0025] DIP switch for power adjustment / DIP switch for color temperature adjustment / Voltage switch for current fine-tuning circuit A +24V voltage is output from pin 3 of the isolated auxiliary power supply board socket. After passing through a linear voltage regulator circuit composed of R37, Q7, ZD5, and C12, a stable +14.4V DC voltage is output, which provides a stable voltage source for the linear constant current circuit, the secondary side of the optocoupler of the three-in-one dimming circuit, the DIP switch power adjustment circuit / DIP switch color temperature adjustment circuit / potentiometer fine-tuning current circuit. R19, ​​R34, R33, Q8, R61, ZD3, R52, potentiometer RJ1, R46, R47, R48, DIP switch SW1, DIP switch SW2, and D14 respectively constitute the DIP power adjustment circuit, the DIP color temperature adjustment circuit, and the potentiometer fine-tuning current circuit. DIP switch SW2 is a specially designed 6-pin DIP switch. When it is switched to the first position, PIN2 / PIN5 connects PIN1 / PIN6, and the LED load lamp emits cool white light. When it is switched to the third position, PIN2 / PIN5 connects PIN3 / PIN4, and the LED load lamp emits warm white light. When it is switched to the second position, PIN2 / PIN5 connects both PIN1 / PIN6 and PIN3 / PIN4, and the LED load lamp emits neutral light, thereby achieving the purpose of color temperature adjustment. By adjusting the knob of potentiometer RJ1, the resistance value of RJ1 is changed. When the over-temperature protection circuit (R32, NT1, ZD11, R42, R41, C13, Q5, R35) does not activate, Q8 conducts, connecting R33 to ground. Therefore, the voltage drop across the surface-mount R33 directly affects the level of the current detection pin of the linear constant current chip. When the resistance of potentiometer RJ1 changes, the voltage drop across R33 also changes accordingly. Therefore, adjusting the resistance of potentiometer RJ1 allows for fine-tuning of the output current value. DIP switch SW1 is an 8-pin, three-position switch. When it is switched to the first position, PIN2 / PIN7 connects to PIN1 / PIN8. The circuit connects the surface-mount resistor R48, which is connected in series with PIN1 / PIN8, in parallel with potentiometer RJ1. Because R48 is not surface-mounted, the total resistance of potentiometer RJ1 does not change, and the power output is 100%. When SW1 is switched to the second position, PIN2 / PIN7 connects to PIN3 / PIN6. The circuit connects the surface-mount resistor R47, which is connected in series with PIN3 / PIN6, in parallel with potentiometer RJ1. Therefore, the total resistance of potentiometer RJ1 decreases, the voltage level of the current sensing pin PIN5 of the linear constant current chip U1 rises, and the output current decreases to 80% of the set rated output value. When SW1 is switched to the third position, PIN2 / PIN7 connects to PIN4 / PIN5. The circuit connects the surface-mount resistor R46, which is connected in series with PIN4 / PIN5, in parallel with potentiometer RJ1. Therefore, the total resistance of potentiometer RJ1 decreases further, the voltage level of the current sensing pin PIN5 of the linear constant current chip U1 rises, and the output current decreases to 60% of the set rated output value. This achieves the purpose of adjusting the power using the DIP switch.

[0026] Over-temperature protection circuit R32, NT1, ZD11, R42, R41, C13, Q5, and R35 form an over-temperature protection circuit, where NT1 is a negative temperature coefficient thermistor. When the ambient temperature of the product does not reach the set temperature value, the voltage at the negative terminal of the Zener diode ZD11 cannot turn on the Zener diode. Since the base of transistor Q5 is in a low-level off state, its collector is in a high-level state. The collector of transistor Q5 is connected to the gate of MOSFET Q8, and with the gate of Q8 at a high level, the drain and source of Q8 conduct, connecting R33 to ground. The voltage drop across R33 keeps the product at its normal set output current / power value. When the ambient temperature reaches the temperature threshold set by this circuit, the resistance of NT1 decreases, ZD11 turns on, Q5 is forward biased and conducts, pulling the gate of Q8 low, and Q8 turns off. R33 is also left floating, and the corresponding current detection level at pin PIN5 of the linear constant current management chip rises briefly, causing the output current to drop to 50-60% of the rated current. Therefore, the output power also drops to 50-60% of the rated power, achieving the purpose of over-temperature protection.

[0027] This invention innovates an LED driver power supply circuit structure, significantly reducing costs. It achieves comprehensive product functionality from a linear constant current chip that originally did not support dimming through a unique and ingenious circuit design, including: DIP switch power adjustment, DIP switch color temperature adjustment, potentiometer-based power fine-tuning, isolated PWM dimming, isolated 0-10V dimming, and isolated potentiometer dimming. Furthermore, it overcomes the inherent flaw of linear constant current solutions (i.e., the high heat generation of linear MOSFETs makes it difficult to achieve high overall output power; currently, other companies in the industry can only achieve around 100W, but this invention's circuit can achieve 200W, 300W, or even higher). It also invented an output short-circuit self-protection circuit, achieving flicker-free operation and an extremely wide voltage range (global voltage 100-277VAC IN). Additionally, it invented a low-cost, highly effective surge protection circuit and a cooling and current-sharing circuit. The applicability of this circuit will be extremely broad. The one-and-a-half stage circuit structure of this invention is a milestone invention in the power supply industry compared to the traditional two-stage circuit. In the near future, it will be highly competitive due to its extremely high cost performance, excellent reliability, small product size, and extremely high power density.

[0028] The above description is only a preferred embodiment of this application and is not intended to limit the scope of implementation of this application. Any other embodiments whose principles and basic structures are the same as or similar to those of this application are within the protection scope of this application.

Claims

1. A one-and-a-half stage LED power supply circuit, characterized by, include; The PFC boost circuit is connected to the EMI filter circuit, and its output terminal is equipped with a linear constant current output circuit. The PFC boost circuit includes: The management chip U2 has its VDD terminal grounded through capacitors C6 and C7. One end of capacitor C6 is grounded through diodes D3 and ZD9. Diode D3 is also connected to the output terminal of inductor T1 through resistor R63 and capacitor C22. The output terminal of inductor T1 is equipped with capacitor C26 and resistor R72. Resistor R72 is connected to the emitter of transistor Q6, its collector is grounded, and its base is connected to the management chip U2. The output terminal of inductor T1 is connected to the drain of MOSFET Q4. Its gate is connected to management chip U2 through resistors R15 and R13. Its source is grounded through resistor R21. One end of resistor R21 is connected to resistor R20. Resistor R20 is grounded through capacitor C10. Resistor R20 is also connected to management chip U2. The output terminal of inductor T1 is also connected to the drain of MOSFET Q9. Its gate is connected to resistor R72 through resistor R39. Its source is connected to resistor R21. The COMP terminal of the management chip U2 is grounded through capacitor C8; The output terminal of inductor T1 is connected to resistors R1 and R2 in parallel. The common output terminal of resistors R1 and R2 is connected to capacitor C1. Capacitor C1 is grounded through capacitor C4. Capacitor C1 is connected to the linear constant current output circuit. The output terminal of inductor T1 is connected to capacitor C2. The common output terminal of capacitors C2 and C1 is connected to the FB terminal of management chip U2 through resistors R6, R9, and R14 in sequence. Resistor R14 is also grounded through resistors R23, R28, and capacitor C11. The FB terminal of management chip U2 is grounded through capacitor C9, resistor R22, and diode ZD2 in sequence. The linear constant current output circuit includes: The management chip U1 has its FB terminal grounded via diode ZD1 and resistor R16. One end of resistor R16 is connected to the output terminal of inductor T1 via resistors R10 and R5. The GATE terminal of the management chip U1 is grounded via resistor R67 and connected to the gate of MOSFET Q3 via resistor R66. Q3's drain is connected to the output terminal of inductor T1, and Q3's source is connected to the management chip U1 via resistor R17. Q3's source is also grounded via resistors R59 and R60. The gate terminal of the management chip U1 is connected to the gate of the MOS transistor Q2 through resistor R65, its drain is connected to the output terminal of the inductor T1, its source is connected to the management chip U1 through resistor R70, and its source is also grounded through resistors R27 and R26 respectively. The gate terminal of the management chip U1 is connected to the gate of the MOS transistor Q1 through resistor R64, its drain is connected to the output terminal of the inductor T1, its source is connected to the management chip U1 through resistor R71, and its source is also grounded through resistors R24 and R25 respectively. It also includes an auxiliary power supply terminal J1, which is connected to the output terminal of the inductor T1; It also includes a dimming chip U4, one end of which is provided with a resistor R58 and an inductor L8 in sequence. The inductor L8 is connected to the collector of the transistor Q11, its emitter is connected to the dimming port, and its base is connected to the dimming chip U4 in sequence through resistors R57 and R51. The two ends of the inductor L8 are connected in parallel with the inductor L9 through capacitors C19 and C20 respectively, and the inductor L9 is connected to the dimming port. A +24V voltage is output from pin 3 of the isolated auxiliary power supply board socket. After passing through a linear voltage regulator circuit composed of R37, Q7, ZD5, and C12, a stable +14.4V DC voltage is output, which provides a stable voltage source for the linear constant current circuit, the secondary side of the optocoupler of the three-in-one dimming circuit, the DIP switch power adjustment circuit / DIP switch color temperature adjustment circuit / potentiometer fine-tuning current circuit.

Citation Information

Patent Citations

  • Non-isolated topological afterglow removing circuit

    CN116406053A