Pulse ablation circuit

Abstract

The application provides a pulse ablation circuit. The pulse ablation circuit comprises a pulse generation subcircuit and a software protection subcircuit; the software protection subcircuit is used for monitoring a pulse signal generated by the pulse generation subcircuit, and when the pulse signal meets a first direct current discharge judgment condition, the software protection subcircuit is used for controlling the pulse generation subcircuit to stop working; and the pulse generation subcircuit is used for generating a pulse signal to realize a pulse ablation function. In this way, the pulse signal is monitored by the software protection subcircuit, and when the pulse signal changes, the working of the pulse generation subcircuit is stopped in time, so that a direct current monitoring and protection effect is realized, and the problem of lacking relevant measures for direct current protection in the prior art is solved.

Description

Technical Field

[0001] This invention relates to the field of pulse ablation technology, and in particular to a pulse ablation circuit. Background Technology

[0002] Catheter ablation based on pulmonary vein isolation is one of the important methods for treating atrial fibrillation. Currently, the commonly used ablation methods in clinical practice often use radiofrequency energy or cryoablation energy. However, regardless of radiofrequency or cryoablation, the ablation energy lacks selectivity in destroying the tissue in the ablation area and depends on the adhesion of the catheter, which may cause damage to the adjacent esophagus, coronary arteries, and phrenic nerve. In addition, since radiofrequency and cryoablation are thermal ablation techniques, they are limited by the heat sink effect, making it difficult to achieve full-thickness transmural ablation, which affects the treatment effect.

[0003] Cardiac pulsed electric field ablation is a novel ablation method that utilizes pulsed electric fields as energy. By applying an appropriate pulsed electric field, tiny pores—electroporation—are created in the cell membranes of cardiomyocytes, disrupting the ion balance inside and outside the cardiomyocytes and inducing cardiomyocyte death. Compared to traditional radiofrequency ablation and cryotherapy, pulsed electric field ablation is a non-thermal ablation method. Furthermore, because cardiomyocytes have the lowest pulsed electric field threshold, the pulsed electric field can selectively damage the myocardium while preserving blood vessels, nerves, and surrounding tissues such as the lungs, esophagus, and phrenic nerve.

[0004] The pulse waveforms used in cardiac pulsed electric field ablation systems can be broadly classified into two categories: monophasic waveforms and biphasic waveforms. Monophasic waveforms refer to waveforms consisting only of a positive pulse sequence, such as... Figure 1 As shown; or waveforms consisting only of negative pulse sequences, such as Figure 2 As shown. A biphasic wave refers to a waveform that contains both positive and negative pulses, and the positive and negative pulses are arranged at specific intervals, such as... Figure 3 or Figure 4 As shown. Among them, Figure 3 Indicates a symmetrical biphase wave. Figure 4 This represents an asymmetric biphase wave (in the figure, T represents one pulse period, and β represents the ratio of the correlation parameters). Figure 4 The ratio of the current amplitude to the pulse width is inversely proportional.

[0005] According to the studies published by Reddy et al. (IMPULSE (Safety and feasibility study of the IOWA Approach endocardial ablation system for atrial fibrillation; NCT03700385) and PEFCAT (Safety and feasibility study of the FARAPULSE endocardial ablation system for paroxysmal atrial fibrillation; NCT03714178), monophasic pulsed wave ablation causes severe muscle contractions, requiring general anesthesia; while biphasic pulsed wave ablation allows patients to remain conscious and sedated, exhibiting good tolerability and without significant muscle contractions. Furthermore, parameter-optimized biphasic waves significantly improved pulmonary vein isolation efficiency (from 63% to 100%, with a median follow-up of 84 days after exponential ablation). Therefore, biphasic pulsed wave ablation demonstrates significant advantages. Further research, van Es et al., demonstrated that compared to standard symmetrical biphasic waves, using... Figure 4 The asymmetric biphasic wave shown is characterized by a long pulse width but low amplitude in the negative phase wave, and a short pulse width but high amplitude in the positive phase wave (with a pulse width ratio of 2.6:1, where 2.6 is β), which can produce a deeper ablation foci.

[0006] Pulse width t (e.g.) Figure 1 , Figure 2 , Figure 3 The pulse waveform (as shown) is a crucial parameter that directly affects ablation depth, pulmonary vein isolation efficiency, and, most importantly, patient safety. Whether using a monophasic or biphasic waveform, whether symmetrical or asymmetrical, the pulse width t should not be too large; common pulse widths range from 1 to 100 μs. When software or hardware malfunctions in the pulse ablation device, causing the pulse width to become very large (lasting tens or hundreds of milliseconds) or even become direct current, pulsed electric field ablation (PFA) becomes approximately equivalent to direct current (DC) catheter ablation in the early 1980s.

[0007] Direct current (DC) catheter ablation is associated with serious complications: 1. The high-pressure bubble "explosion" and electric arc generated during discharge can produce pressure waves of up to several atmospheres and temperatures of several thousand degrees Celsius locally. While the instantaneous high temperature may not have obvious serious consequences for heart tissue, the barotrauma caused by the high pressure can cause rupture of the ablation site or the heart. 2. It can lead to serious arrhythmias and subsequent sudden death. 3. During DC discharge, electrolysis on the electrode surface generates a large number of bubbles, which may trigger complications such as asymptomatic cerebral embolism (ACE). 4. DC discharge can cause severe (musculoskeletal) contractions.

[0008] Due to the aforementioned drawbacks, the use of direct current (DC) catheter ablation became increasingly limited, and it was eventually abandoned shortly after the advent of radiofrequency ablation in the 1990s.

[0009] Given the serious complications associated with direct current (DC) ablation, pulsed ablation systems need to be able to detect changes in pulse waveform to DC waveform. When the system detects a DC output, it must promptly shut off the energy output to protect the patient's life. Currently, most pulsed ablation devices or systems do not mention the concept of DC protection, nor do they disclose related circuitry or algorithms.

[0010] In summary, existing technologies lack relevant measures for DC protection. Summary of the Invention

[0011] The purpose of this invention is to provide a pulse ablation circuit to solve the problem of the lack of DC protection measures in the prior art.

[0012] To address the aforementioned technical problems, this invention provides a pulse ablation circuit, comprising a pulse generation sub-circuit and a software protection sub-circuit; the software protection sub-circuit is used to monitor the pulse signal generated by the pulse generation sub-circuit, and when the pulse signal meets a first DC discharge determination condition, the software protection sub-circuit is used to control the pulse generation sub-circuit to stop working; the pulse generation sub-circuit is used to generate a pulse signal to achieve the pulse ablation function.

[0013] Optionally, the software protection sub-circuit includes: a software voltage divider unit, a software signal conditioning unit, a filtering unit, an ADC sampling unit, and a control unit.

[0014] The software voltage divider unit is used to divide the voltage generated by the pulse generation sub-circuit to match the subsequent software signal conditioning unit and ADC sampling unit.

[0015] The software signal conditioning unit is used to adjust the signal range and / or adjust the signal type, wherein adjusting the signal type refers to converting a single-ended signal to a differential signal, or converting a differential signal to a single-ended signal.

[0016] The filtering unit is used to filter out noise interference.

[0017] The ADC sampling unit is used to convert analog signals into digital signals.

[0018] The control unit is used to determine whether the pulse signal meets the first DC discharge determination condition based on the digital signal; if it is determined that the pulse signal meets the first DC discharge determination condition, it outputs a control signal to drive the pulse generation sub-circuit to stop working.

[0019] Optionally, the control unit is configured to execute the following logic: start timing when the digital signal is higher than the first threshold, and reset timing when the digital signal is lower than the first threshold; if the timing duration exceeds the preset duration, determine that the pulse signal meets the first DC discharge determination condition.

[0020] Optionally, the ADC sampling unit is a differential input ADC.

[0021] Optionally, the pulse ablation circuit further includes a hardware protection sub-circuit, which is used to monitor the pulse signal. When the pulse signal meets the second DC discharge determination condition, the hardware protection sub-circuit is used to control the pulse generation sub-circuit to stop working.

[0022] The range of the second DC discharge determination condition is smaller than the range of the first DC discharge determination condition.

[0023] Optionally, the hardware protection sub-circuit includes: a hardware voltage divider unit, a hardware signal conditioning unit, a positive phase DC judgment unit, a negative phase DC judgment unit, and a logic unit; the positive phase DC judgment unit includes a first positive phase voltage comparison sub-unit, a positive phase timing sub-unit, and a second positive phase voltage comparison sub-unit connected in sequence; the negative phase DC judgment unit includes a first negative phase voltage comparison sub-unit, a negative phase timing sub-unit, and a second negative phase voltage comparison sub-unit connected in sequence.

[0024] The hardware voltage divider unit is used to divide the voltage generated by the pulse generation sub-circuit to match the subsequent hardware signal conditioning unit, positive DC judgment unit, and negative DC judgment unit.

[0025] The hardware signal conditioning unit is used to adjust the signal range and / or adjust the signal type, wherein adjusting the signal type refers to converting a single-ended signal to a differential signal, or converting a differential signal to a single-ended signal.

[0026] When the positive pulse signal output by the hardware signal conditioning unit is greater than the second threshold, the first positive phase voltage comparator subunit outputs a first level to drive the positive phase timing subunit to charge; when the positive pulse signal output by the hardware signal conditioning unit is less than the second threshold, the first positive phase voltage comparator subunit outputs a second level to drive the positive phase timing subunit to discharge.

[0027] When the voltage of the positive phase timing subunit is greater than the third threshold, the second positive phase voltage comparison subunit outputs a DC discharge determination signal.

[0028] When the negative pulse signal output by the hardware signal conditioning unit is greater than the fourth threshold, the first negative phase voltage comparison subunit outputs a third level to drive the negative phase timing subunit to charge; when the negative pulse signal output by the hardware signal conditioning unit is less than the fourth threshold, the first negative phase voltage comparison subunit outputs a fourth level to drive the negative phase timing subunit to discharge.

[0029] When the voltage of the negative phase timing subunit is greater than the fifth threshold, the second negative phase voltage comparison subunit outputs the DC discharge determination signal.

[0030] When the DC discharge determination signal is received, the logic unit determines that the pulse signal meets the second DC discharge determination condition and outputs a control signal to drive the pulse generation sub-circuit to stop working.

[0031] Optionally, the positive phase timing subunit is an RC circuit or an integrating circuit, and the negative phase timing subunit is an RC circuit or an integrating circuit.

[0032] Optionally, the pulse generating sub-circuit may cease operation based on at least one of the following actions: turning off the power supply; disconnecting the power output path; stopping the operation of the pulse generating sub-circuit; stopping the operation of the driving module of the pulse generating sub-circuit; and disconnecting the output path of the pulse generating sub-circuit.

[0033] Optionally, the pulse ablation circuit further includes a protection execution unit, which is used to drive the pulse generation subcircuit to stop working in response to the control signals of the software protection subcircuit and the hardware protection subcircuit.

[0034] Optionally, the control signal for the software protection subcircuit to stop the pulse generation subcircuit is a fifth level, and the control signal for the hardware protection subcircuit to stop the pulse generation subcircuit is a sixth level. The protection execution unit includes a first switch and a second switch.

[0035] The first switch is configured to turn off when the fifth level is received, and otherwise turn on; the second switch is configured to turn off when the sixth level is received, and otherwise turn on.

[0036] The first connection terminal of the first switch is used to connect to the power supply through a pull-up resistor, the second connection terminal of the first switch is connected to the first connection terminal of the second switch, and the second connection terminal of the second switch is used to ground; the control terminal of the first switch is used to obtain the control signal output by the software protection sub-circuit, and the control terminal of the second switch is used to obtain the control signal output by the hardware protection sub-circuit.

[0037] The first connection terminal of the first switch is configured as the output terminal of the protection execution unit.

[0038] Compared with existing technologies, the pulse ablation circuit provided by this invention includes a pulse generation sub-circuit and a software protection sub-circuit. The software protection sub-circuit monitors the pulse signal generated by the pulse generation sub-circuit. When the pulse signal meets a first DC discharge determination condition, the software protection sub-circuit controls the pulse generation sub-circuit to stop working. The pulse generation sub-circuit generates a pulse signal to achieve the pulse ablation function. This configuration, by monitoring the pulse signal through the software protection sub-circuit and promptly stopping the pulse generation sub-circuit when the pulse signal changes, achieves DC monitoring and protection, solving the problem of the lack of DC protection measures in existing technologies. Attached Figure Description

[0039] Those skilled in the art will understand that the accompanying drawings are provided to better understand the invention and do not constitute any limitation on the scope of the invention. Wherein:

[0040] Figure 1 This is a schematic diagram of a positive pulse sequence waveform;

[0041] Figure 2 This is a schematic diagram of a negative pulse sequence waveform;

[0042] Figure 3 This is a schematic diagram of a symmetrical biphasic pulse sequence waveform;

[0043] Figure 4 This is a schematic diagram of an asymmetric biphasic pulse sequence waveform;

[0044] Figure 5 This is a schematic diagram of the structure of a pulse ablation circuit according to an embodiment of the present invention;

[0045] Figure 6 This is a schematic diagram of the structure of a software protection sub-circuit according to an embodiment of the present invention;

[0046] Figure 7 This is a schematic diagram of the circuit structure of a software protection sub-circuit according to an embodiment of the present invention;

[0047] Figure 8 This is a flowchart illustrating the software protection function of an embodiment of the present invention;

[0048] Figure 9 This is a schematic diagram of the hardware protection sub-circuit according to an embodiment of the present invention;

[0049] Figure 10 This is a schematic diagram of the circuit structure of a hardware protection sub-circuit according to an embodiment of the present invention;

[0050] Figure 11 This is a schematic diagram of the circuit structure of a logic unit according to an embodiment of the present invention;

[0051] Figure 12 This is a flowchart illustrating the hardware protection function of an embodiment of the present invention.

[0052] in:

[0053] 1-Pulse generation sub-circuit; 2-Software protection sub-circuit; 3-Hardware protection sub-circuit; 4-Protection execution unit; 5-Medical object;

[0054] 21-Software voltage divider unit; 22-Software signal conditioning unit; 23-Filtering unit; 24-ADC sampling unit; 25-Control unit; 31-Hardware voltage divider unit; 32-Hardware signal conditioning unit; 33-Positive phase DC judgment unit; 34-Negative phase DC judgment unit; 35-Logic unit; 331-First positive phase voltage comparison subunit; 332-Positive phase timing subunit; 333-Second positive phase voltage comparison subunit; 341-First negative phase voltage comparison subunit; 342-Negative phase timing subunit; 343-Second negative phase voltage comparison subunit;

[0055] 101-Power supply module; 102-Driver module. Detailed Implementation

[0056] To make the objectives, advantages, and features of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale, and are only used to facilitate and clarify the explanation of the embodiments of this invention. Furthermore, the structures shown in the drawings are often part of the actual structures. In particular, different figures may emphasize different aspects and may sometimes use different scales.

[0057] As used in this invention, the singular forms “a,” “an,” and “the” include plural objects; the term “or” is generally used to mean “and / or”; the term “a number” is generally used to mean “at least one”; and the term “at least two” is generally used to mean “two or more”. Furthermore, the terms “first,” “second,” and “third” are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as “first,” “second,” or “third” may explicitly or implicitly include one or at least two of that feature. “One end” and “the other end,” as well as “proximal end” and “distal end,” generally refer to two corresponding parts, including not only endpoints. The terms “installed,” “connected,” and “joined” should be interpreted broadly, for example, as a fixed connection, a detachable connection, or an integral part; a mechanical connection or an electrical connection; a direct connection or an indirect connection through an intermediate medium; or a connection within two elements or an interaction between two elements. Furthermore, as used in this invention, the phrase "one element is disposed on another element" generally only indicates that there is a connection, coupling, cooperation, or transmission relationship between the two elements, and the connection, coupling, cooperation, or transmission between the two elements can be direct or indirect through an intermediate element. It should not be construed as indicating or implying a spatial positional relationship between the two elements, i.e., one element can be located arbitrarily inside, outside, above, below, or to one side of the other element, unless otherwise explicitly stated. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0058] The core idea of ​​this invention is to provide a pulse ablation circuit to solve the problem of the lack of DC protection measures in the prior art.

[0059] The following description refers to the accompanying drawings.

[0060] Please refer to Figure 5 This embodiment provides a pulse ablation circuit, including a pulse generation sub-circuit 1 and a software protection sub-circuit 2. The software protection sub-circuit 2 is used to monitor the pulse signal generated by the pulse generation sub-circuit 1. When the pulse signal meets a first DC discharge determination condition, the software protection sub-circuit 2 controls the pulse generation sub-circuit to stop working. The pulse generation sub-circuit 1 is used to generate pulse signals to achieve the pulse ablation function. The main function of the pulse generation sub-circuit 1 is to generate pulse signals such as... Figure 1 , Figure 2 The single-phase pulse wave shown or Figure 3 , Figure 4 The biphasic pulse wave shown. Figure 5The diagram shows the pulse generation sub-circuit 1 outputting the pulse signal to the medical object 5. The process of how the pulse signal affects the medical object 5 is not closely related to the core idea of ​​this invention and will not be described in detail here.

[0061] In one embodiment, please refer to Figure 6 The software protection sub-circuit includes: a software voltage divider unit 21, a software signal conditioning unit 22, a filtering unit 23, an ADC sampling unit 24, and a control unit 25.

[0062] Please refer to Figure 7 , Figure 7 This diagram illustrates one specific implementation; however, it is understood that other circuit configurations can be implemented as needed. In the diagram, PFG represents the pulse generator sub-circuit; SVDC represents the software voltage divider unit; SSCC represents the software signal conditioning unit, which consists of a high-speed operational amplifier; FC represents the anti-aliasing filter unit; ADC is the analog-to-digital converter, which performs digital sampling of analog signals, i.e., the ADC sampling unit; and CU is the control unit.

[0063] The main function of the software voltage divider unit 21 is to appropriately attenuate the amplitude of the high-voltage pulse signal generated by the pulse generator sub-circuit to match the input requirements of the subsequent software signal conditioning unit and ADC sampling unit. A suitable attenuation ratio can be set based on the maximum amplitude of the pulse signal. Figure 7 As shown in the SVDC module, the voltage divider circuit can use a simple resistor divider. It should be noted that at higher frequencies, a suitable capacitor needs to be connected in parallel across the resistor to match the input or output impedance of the oscilloscope and probe to prevent distortion of the measured signal.

[0064] That is, the software voltage divider unit is used to divide the voltage generated by the pulse generation sub-circuit to match the subsequent software signal conditioning unit and ADC sampling unit.

[0065] The main functions of the software signal conditioning unit 22 are: 1. Adjusting the input signal range: Adjusting the signal amplitude and DC level of the analog signal after voltage division to match the full-scale input of the ADC. This can be simplified to a simple formula: Y = a*X + b. X is the input analog signal, and Y is the output signal of the signal conditioning circuit. a and b are the functions that the conditioning circuit needs to achieve. 2. Signal type conversion: Depending on the ADC input type, the signal conditioning circuit can convert single-ended signals to differential signals or from differential signals to single-ended signals.

[0066] That is, the software signal conditioning unit is used to adjust the signal range and / or adjust the signal type, wherein adjusting the signal type refers to converting a single-ended signal to a differential signal, or converting a differential signal to a single-ended signal.

[0067] Filtering unit 23 is located between the software signal conditioning unit and the ADC sampling unit, such as Figure 7 As shown in the FC module, taking a differential input ADC as an example, the two resistors and three capacitors configured are mainly used to limit the frequency entering the ADC and prevent noise above the Nyquist frequency (i.e., the minimum sampling frequency required to prevent signal aliasing) from entering the ADC, thus avoiding interference with the measurement.

[0068] That is, the filtering unit is used to filter out noise interference.

[0069] The ADC sampling unit 24 is mainly used to convert analog signals to digital signals. Generally, a differential input ADC is chosen because differential signals can reduce system noise and distortion. Since there is no common ground, they will not couple with ground. Differential signals can also suppress common-mode noise and eliminate even-order distortion products that appear as common-mode signals.

[0070] That is, the ADC sampling unit is used to convert analog signals into digital signals. Preferably, the ADC sampling unit is a differential input ADC.

[0071] The control unit 25 can sample the amplitude and pulse width time of the pulse discharge waveform and execute the corresponding software control commands.

[0072] That is, the control unit is used to determine whether the pulse signal meets the first DC discharge determination condition based on the digital signal; if it is determined that the pulse signal meets the first DC discharge determination condition, it outputs a control signal to drive the pulse generation sub-circuit to stop working.

[0073] The output terminal of the control unit 25 can be connected in the following ways, and the pulse generating sub-circuit can be driven to stop working based on at least one of the following ways (two or more correspond to the idea of ​​redundancy).

[0074] Method 1: Connect to the control terminal of the drive module 102, set the input signal spc03 to 1, disable the enable pin of module 102, and cut off the energy output path.

[0075] Method 2: Connect in parallel with the output port of the drive module 102, set the output signal spc01 of the drive module 102 to 0, thereby disabling the DC power output of the power supply module 101 and cutting off the energy source.

[0076] Method 3: Connect in parallel with the output port of the drive module 102, set the output signal spc02 of the drive module 102 to 0, disable the pulse generation sub-circuit 1 of the PFG, and cut off the energy output path.

[0077] Method 4: Connect to the control terminal of the switching element K3, turn off K3, and cut off the energy output path.

[0078] Method 5: Connect to the control terminals of switching elements K1 and K2, close K1 and K2, and cut off the energy output path.

[0079] Among them, connection methods 2 to 5 were not included. Figure 7 The above connection methods can be implemented through direct connection or indirect connection, such as through a protection execution unit 4. The specific working principle of the protection execution unit will be introduced later.

[0080] In one embodiment, spc01, spc02 and spc03 are linked, that is, spc03 can control spc01 and spc02. In other embodiments, such a relationship may not be set.

[0081] That is, the pulse generating sub-circuit stops working based on at least one of the following actions: turning off the power supply; disconnecting the power output path; stopping the operation of the pulse generating sub-circuit; stopping the operation of the driving module of the pulse generating sub-circuit; and disconnecting the output path of the pulse generating sub-circuit.

[0082] The execution logic of the control unit is as follows: Figure 8 As shown, the execution steps are as follows:

[0083] 1. The timing starts when the control unit detects that the voltage after passing through the voltage divider circuit, signal conditioning circuit, and filter circuit is higher than the set software voltage threshold Vs.

[0084] 2. When the software timer accumulates to the software's time threshold Ts, the software detects DC.

[0085] 3. The control unit activates one or more software protection measures and shuts down the pulse generation circuit or pulse discharge circuit.

[0086] 4. The software will output DC output, indicating the end of the pulse ablation process.

[0087] That is, the control unit is used to execute the following logic: when the digital signal is higher than the first threshold (i.e., Vs), the timing starts; when the digital signal is lower than the first threshold, the timing is reset; if the timing duration exceeds the preset duration (i.e., Ts), it is determined that the pulse signal meets the first DC discharge determination condition.

[0088] The first DC discharge determination condition is that the digital signal is higher than the first threshold and the timing duration exceeds the preset duration.

[0089] The advantages of the software protection sub-circuit are: 1. Based on the PFG discharge waveform, by selecting an appropriate ADC sampling rate, the control unit can accurately reconstruct the pulse discharge waveform. 2. By judging parameters such as pulse width and inter-pulse delay, the control unit can accurately detect whether the discharge waveform has a DC current whose amplitude and time both exceed the alarm threshold. 3. It can integrate software filtering algorithms to filter out noise signals whose amplitude and time both exceed the alarm threshold, avoiding false alarms during normal pulse ablation. 4. It can detect in real time at each stage of the pulse ablation device's operation, and can also control the DC protection detection in a specific state through software state machine control (for example, some pulse ablation devices use DC to discharge voltage to the internal discharge resistor when the capacitor voltage is discharged, in which case software DC alarms should be avoided), making it flexible and convenient. That is, the control unit is also used to respond to the control signals of the previous level to start or stop working.

[0090] Please refer to Figure 5 The pulse ablation circuit further includes a hardware protection sub-circuit 3. This hardware protection sub-circuit monitors the pulse signal, and when the pulse signal meets the second DC discharge determination condition, it controls the pulse generation sub-circuit to stop operating.

[0091] The range of the second DC discharge determination condition is smaller than the range of the first DC discharge determination condition. That is, if a situation meets the second DC discharge determination condition, it must also meet the first DC discharge determination condition; however, if a situation meets the first DC discharge determination condition, it may not necessarily meet the second DC discharge determination condition. A specific case will be described later.

[0092] Please refer to Figure 9 The hardware protection sub-circuit includes: a hardware voltage divider unit 31, a hardware signal conditioning unit 32, a positive phase DC judgment unit 33, a negative phase DC judgment unit 34, and a logic unit 35; the positive phase DC judgment unit 33 includes a first positive phase voltage comparison sub-unit 331, a positive phase timing sub-unit 332, and a second positive phase voltage comparison sub-unit 333 connected in sequence; the negative phase DC judgment unit 34 includes a first negative phase voltage comparison sub-unit 341, a negative phase timing sub-unit 342, and a second negative phase voltage comparison sub-unit 343 connected in sequence.

[0093] The functions of the hardware voltage divider unit and the hardware signal conditioning unit are the same as those of the software voltage divider unit and the software signal conditioning unit. However, because the voltage division ratio, signal output type and range are different, the hardware voltage divider unit and the hardware signal conditioning unit need to be designed independently.

[0094] That is, the hardware voltage divider unit is used to divide the voltage generated by the pulse generation sub-circuit to match the subsequent hardware signal conditioning unit, positive DC judgment unit and negative DC judgment unit.

[0095] The hardware signal conditioning unit is used to adjust the signal range and / or adjust the signal type, wherein adjusting the signal type refers to converting a single-ended signal to a differential signal, or converting a differential signal to a single-ended signal.

[0096] For biphase pulse waves, the hardware system needs to be able to identify whether the DC current is generated by the positive phase pulse wave or the negative phase pulse wave. Therefore, a first voltage comparison subunit, a timing subunit, and a second voltage comparison subunit need to be designed for the positive and negative pulse waveforms respectively.

[0097] The function of the first positive / negative phase voltage comparison subunit is to extract the voltage after passing through the hardware voltage divider unit and the hardware signal conditioning unit respectively. If this voltage exceeds the positive phase first DC protection threshold voltage Vhp1 or the negative phase first DC protection threshold voltage Vhn1 (for the negative phase, exceeding means exceeding the absolute value), the corresponding positive / negative phase voltage comparison subunit outputs a trigger signal to enable the corresponding positive / negative phase timing subunit to start the hardware timing function.

[0098] The main function of the positive / negative phase timing subunit is to accumulate the trigger time T of the first positive / negative phase voltage comparison subunit. When T is greater than the positive phase hardware DC protection time threshold Thrp or the negative phase hardware DC protection time threshold Thn, the output of the corresponding positive / negative phase timing subunit (i.e., the input of the second positive / negative phase voltage comparison subunit) reaches the second DC protection threshold voltage Vhp2 or Vhn2. A simple timing circuit can be implemented using an RC circuit or an integrating circuit, etc. Based on the charging formula of an RC circuit: (Assuming the initial voltage of the capacitor is 0 and the fully charged voltage is E) or the voltage output formula of the integrator circuit: Once the hardware DC protection time threshold Thrp or Thn and the second DC protection threshold voltage Vhp2 or Vhn2 are determined, the value of R*C can be calculated. Once one of R or C is determined, the other value is also determined.

[0099] The function of the second positive / negative phase voltage comparison subunit is similar to that of the first positive / negative phase voltage comparison subunit. When the input of the second positive / negative phase voltage comparison subunit exceeds the positive phase second DC protection threshold voltage Vhp2 or the negative phase second DC protection threshold voltage Vhn2, it outputs a low-level signal (which can be understood as a DC discharge judgment signal), indicating that a positive or negative pulse has occurred. The second DC protection threshold voltage Vhp2 or Vhn2 can be the same as or different from the first DC protection threshold voltage Vhp1 or Vhn1.

[0100] That is, when the positive pulse signal output by the hardware signal conditioning unit is greater than the second threshold Vhp1, the first positive phase voltage comparator subunit outputs a first level to drive the positive phase timing subunit to charge; when the positive pulse signal output by the hardware signal conditioning unit is less than the second threshold, the first positive phase voltage comparator subunit outputs a second level to drive the positive phase timing subunit to discharge.

[0101] When the voltage of the positive phase timing subunit is greater than the third threshold Vhp2, the second positive phase voltage comparison subunit outputs a DC discharge determination signal.

[0102] When the negative pulse signal output by the hardware signal conditioning unit is greater than the fourth threshold Vhn1, the first negative phase voltage comparison subunit outputs a third level to drive the negative phase timing subunit to charge; when the negative pulse signal output by the hardware signal conditioning unit is less than the fourth threshold, the first negative phase voltage comparison subunit outputs a fourth level to drive the negative phase timing subunit to discharge.

[0103] When the voltage of the negative phase timing subunit is greater than the fifth threshold Vhn2, the second negative phase voltage comparison subunit outputs the DC discharge determination signal.

[0104] The first and second levels are opposite, the third and fourth levels are opposite, and the first and third levels can be the same or different.

[0105] The DC discharge determination signal can be set according to actual needs. In one embodiment, the DC discharge determination signal is a low level.

[0106] When the DC discharge determination signal is received, the logic unit determines that the pulse signal meets the second DC discharge determination condition and outputs a control signal to drive the pulse generation sub-circuit to stop working.

[0107] The structure of the logic unit can be complex or simple. In one embodiment, the logic unit is an AND logic circuit.

[0108] Please refer to Figure 5 The pulse ablation circuit further includes a protection execution unit 4, which is used to drive the pulse generation subcircuit to stop working in response to the control signals of the software protection subcircuit and the hardware protection subcircuit.

[0109] It is understandable that, in different embodiments, one of the software / hardware protection sub-circuits may be connected to the protection execution unit, while the other software / hardware protection sub-circuit may be directly connected to the controlled object.

[0110] A schematic diagram of a hardware protection sub-circuit using an RC circuit as a timer is shown below. Figure 10 As shown in the diagram, PFG represents the pulse generation sub-circuit; LOGIC represents the protection execution unit; HVDC represents the hardware voltage divider circuit; HSCC represents the hardware signal conditioning unit, which is composed of a high-speed operational amplifier. PFVC and NFVC represent the first positive / negative phase voltage comparison sub-units, which are composed of high-speed voltage comparators and complete the setting and comparison of Vhp1 and Vhn1. PTC and NTC represent the positive / negative phase timing sub-units, which complete the circuit timing function. PSVC and NSVC represent the second positive / negative phase voltage comparison sub-units, which are composed of high-speed voltage comparators and complete the setting and comparison of Vhp2 and Vhn2. AND represents the hardware AND circuit, i.e., the logic unit, used to perform the AND logic operation of the DC protection signal.

[0111] The figure also shows the CU, or control unit. The relative positions of the other units in the software protection sub-circuit can be understood from the preceding text and common knowledge in the field, and will not be repeated here. Figure 10 As shown in the image.

[0112] Figure 10 In this embodiment, the output terminal of LOGIC is connected to the control terminal of the drive module 102. In other embodiments, the output terminal of LOGIC can also be connected to the control terminal of other components, such as the control terminal of K3. Figure 10 The AND module uses a diode circuit to perform the AND operation, which is active low.

[0113] In one embodiment, the control signal for the software protection subcircuit to stop the pulse generation subcircuit is a fifth level, and the control signal for the hardware protection subcircuit to stop the pulse generation subcircuit is a sixth level. The protection execution unit includes a first switch and a second switch.

[0114] The first switch is configured to turn off when the fifth level is received, and otherwise turn on; the second switch is configured to turn off when the sixth level is received, and otherwise turn on.

[0115] The first connection terminal of the first switch is used to connect to the power supply through a pull-up resistor, the second connection terminal of the first switch is connected to the first connection terminal of the second switch, and the second connection terminal of the second switch is used to ground; the control terminal of the first switch is used to obtain the control signal output by the software protection sub-circuit, and the control terminal of the second switch is used to obtain the control signal output by the hardware protection sub-circuit.

[0116] The first connection terminal of the first switch is configured as the output terminal of the protection execution unit.

[0117] Figure 11A specific structure of a protection execution unit is shown, in which the fifth and sixth levels are both low. S_EN is the output signal of the software protection sub-circuit, and HW_DC is the output signal of the hardware protection sub-circuit. Figure 11 As shown, when at least one of S_EN and HW_DC is low, OE is high level, and OE is low level. This can be adjusted according to actual needs. Alternatively, OE can be used as the output signal.

[0118] Figure 11 In this configuration, NMOS transistor Q1 can be considered the first switch, and NMOS transistor Q2 the second switch. In this case, resistors R1, R2, R4, and R5 can be considered auxiliary components. Alternatively, the local structure formed by R1, R2, and Q1 can be considered the first switch, and the local structure formed by R4, R5, and Q2 the second switch. That is to say, the standard for defining the first and second switches should be based on functionality, not on the specific number of components or their connection relationships. Additionally, R3 is the pull-up resistor.

[0119] Hardware protection execution logic as follows Figure 12 As shown. Taking positive phase pulse wave detection as an example, the steps are as follows:

[0120] 1. When the input voltage of the first positive phase voltage comparison subunit after passing through the hardware voltage divider unit and the hardware signal conditioning unit is higher than the first hardware DC protection threshold voltage Vhp1, the timing function of the positive phase timing subunit is started.

[0121] 2. As time accumulates, the output voltage of the positive phase timing subunit, i.e. the input voltage of the second positive phase voltage comparison subunit, continuously increases. When the time reaches Thrp1, the output voltage of the timing circuit rises to the positive phase second DC protection threshold voltage Vhp2.

[0122] 3. When the output voltage of the timing circuit continues to rise above Vhp2, the second positive phase voltage comparator unit outputs a low-level signal, indicating that a DC positive phase pulse wave has been detected.

[0123] 4. After hardware and logic operations, regardless of whether a negative phase pulse wave is detected as DC, the hardware protection execution circuit is activated and the pulse generation sub-circuit is shut down.

[0124] 5. The hardware will output DC output, ending the pulse ablation process.

[0125] The advantages of the hardware DC protection sub-circuit are: it is completely independent of software judgment and processing, resulting in a faster response speed. The selected high-speed operational amplifier and high-speed voltage comparator have extremely low propagation delay (<10ns), fully meeting the requirements for pulse ablation waveform detection with pulse widths in the microsecond range and rise and fall times in the hundreds of nanoseconds.

[0126] The execution sequence of software DC protection and hardware DC protection is as follows: when the system detects DC and the software system is fault-free, software DC protection is executed first; when the software system fails, hardware DC protection is executed. Therefore, the voltage threshold Vs of software DC protection ≤ the first voltage threshold Vhp1 or Vhn1 of hardware DC protection; the time threshold Ts of software DC protection ≤ the time threshold Thp or Thn of hardware DC protection. The combination of software DC protection and hardware DC protection ensures dual-function safety.

[0127] This embodiment is the first to propose the concept of DC protection in cardiac pulse electric field ablation systems, describes the hazards caused by pulse voltage becoming DC voltage, and creatively designs a DC protection circuit for cardiac pulse electric field ablation systems.

[0128] To avoid the safety risks to patients caused by a single system failure, the DC protection circuit is further subdivided into a software-controlled DC protection circuit and a hardware-controlled protection circuit. Both types of DC protection circuits can easily detect potential DC risks in single-phase or biphase cardiac pulse electric field ablation systems and minimize these risks through various protective measures, thereby protecting the patient's life.

[0129] The beneficial effects of this embodiment are summarized as follows:

[0130] 1. A DC protection circuit for a cardiac pulse electric field ablation system was designed, providing two DC protection circuit schemes based on software and hardware to ensure dual-function safety.

[0131] 2. This DC protection circuit can detect whether there is a DC risk in a single-phase or biphase cardiac pulse electric field ablation system. Once a DC risk is detected on the bus, the pulse generation circuit can be shut down through various measures to minimize the patient's safety risk.

[0132] In summary, this embodiment provides a pulse ablation circuit. The pulse ablation circuit includes a pulse generation sub-circuit and a software protection sub-circuit. The software protection sub-circuit monitors the pulse signal generated by the pulse generation sub-circuit. When the pulse signal meets a first DC discharge determination condition, the software protection sub-circuit controls the pulse generation sub-circuit to stop working. The pulse generation sub-circuit generates a pulse signal to achieve the pulse ablation function. With this configuration, by monitoring the pulse signal through the software protection sub-circuit and promptly stopping the pulse generation sub-circuit when the pulse signal changes, DC monitoring and protection are achieved, solving the problem of the lack of DC protection measures in the prior art.

[0133] The above description is only a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the present invention.

Claims

1. A pulse ablation circuit, characterized by, It includes a pulse generation sub-circuit and a software protection sub-circuit; the software protection sub-circuit is used to monitor the pulse signal generated by the pulse generation sub-circuit, and when the pulse signal meets the first DC discharge determination condition, the software protection sub-circuit is used to control the pulse generation sub-circuit to stop working; The pulse generation sub-circuit is used to generate pulse signals to achieve pulse ablation function; The software protection sub-circuit includes: a software voltage divider unit, a software signal conditioning unit, a filtering unit, an ADC sampling unit, and a control unit; The software voltage divider unit is used to divide the voltage generated by the pulse generation sub-circuit to match the subsequent software signal conditioning unit and ADC sampling unit; the software signal conditioning unit is used to adjust the signal range and / or adjust the signal type, wherein adjusting the signal type refers to converting a single-ended signal to a differential signal, or vice versa; the filtering unit is used to filter out noise interference; the ADC sampling unit is used to convert the analog signal into a digital signal; the control unit is used to determine whether the pulse signal meets the first DC discharge determination condition based on the digital signal; if the determination is that it meets the first DC discharge determination condition, a control signal is output to drive the pulse generation sub-circuit to stop working. The control unit is used to execute the following logic: when the digital signal is higher than the first threshold, the timing starts; when the digital signal is lower than the first threshold, the timing is reset; if the timing duration exceeds the preset duration, the pulse signal is determined to meet the first DC discharge determination condition.

2. The pulse ablation circuit of claim 1, wherein, The ADC sampling unit is a differential input ADC.

3. The pulse ablation circuit of claim 1, wherein, The pulse ablation circuit also includes a hardware protection sub-circuit, which is used to monitor the pulse signal. When the pulse signal meets the second DC discharge determination condition, the hardware protection sub-circuit is used to control the pulse generation sub-circuit to stop working. The range of the second DC discharge determination condition is smaller than the range of the first DC discharge determination condition.

4. The pulse ablation circuit of claim 3, wherein, The hardware protection sub-circuit includes: a hardware voltage divider unit, a hardware signal conditioning unit, a positive phase DC judgment unit, a negative phase DC judgment unit, and a logic unit; the positive phase DC judgment unit includes a first positive phase voltage comparison sub-unit, a positive phase timing sub-unit, and a second positive phase voltage comparison sub-unit connected in sequence; the negative phase DC judgment unit includes a first negative phase voltage comparison sub-unit, a negative phase timing sub-unit, and a second negative phase voltage comparison sub-unit connected in sequence; The hardware voltage divider unit is used to divide the voltage generated by the pulse generation sub-circuit to match the subsequent hardware signal conditioning unit, positive DC judgment unit and negative DC judgment unit. The hardware signal conditioning unit is used to adjust the signal range and / or adjust the signal type, wherein adjusting the signal type refers to converting a single-ended signal to a differential signal, or converting a differential signal to a single-ended signal. When the positive pulse signal output by the hardware signal conditioning unit is greater than the second threshold, the first positive phase voltage comparison subunit outputs a first level to drive the positive phase timing subunit to charge; when the positive pulse signal output by the hardware signal conditioning unit is less than the second threshold, the first positive phase voltage comparison subunit outputs a second level to drive the positive phase timing subunit to discharge. When the voltage of the positive phase timing subunit is greater than the third threshold, the second positive phase voltage comparison subunit outputs a DC discharge determination signal; When the negative pulse signal output by the hardware signal conditioning unit is greater than the fourth threshold, the first negative phase voltage comparison subunit outputs a third level to drive the negative phase timing subunit to charge; when the negative pulse signal output by the hardware signal conditioning unit is less than the fourth threshold, the first negative phase voltage comparison subunit outputs a fourth level to drive the negative phase timing subunit to discharge. When the voltage of the negative phase timing subunit is greater than the fifth threshold, the second negative phase voltage comparison subunit outputs the DC discharge determination signal; When the DC discharge determination signal is received, the logic unit determines that the pulse signal meets the second DC discharge determination condition and outputs a control signal to drive the pulse generation sub-circuit to stop working.

5. The pulse ablation circuit of claim 4, wherein, The positive phase timing subunit is an RC circuit or an integrating circuit, and the negative phase timing subunit is an RC circuit or an integrating circuit.

6. The pulse ablation circuit according to claim 1 or 3, characterized in that, The pulse generation subcircuit stops operating based on at least one of the following actions: Turn off the power; disconnect the power output path; stop the operation of the pulse generating sub-circuit; stop the operation of the drive module of the pulse generating sub-circuit; and disconnect the output path of the pulse generating sub-circuit.

7. The pulse ablation circuit according to claim 3, characterized in that, The pulse ablation circuit also includes a protection execution unit, which is used to drive the pulse generation subcircuit to stop working in response to the control signals of the software protection subcircuit and the hardware protection subcircuit.

8. The pulse ablation circuit according to claim 7, characterized in that, The control signal that drives the pulse generating subcircuit to stop working in the software protection subcircuit is the fifth level, and the control signal that drives the pulse generating subcircuit to stop working in the hardware protection subcircuit is the sixth level. The protection execution unit includes a first switch and a second switch. The first switch is configured to turn off when the fifth level is received, and otherwise turn on; the second switch is configured to turn off when the sixth level is received, and otherwise turn on. The first connection terminal of the first switch is used to connect to the power supply through a pull-up resistor, the second connection terminal of the first switch is connected to the first connection terminal of the second switch, and the second connection terminal of the second switch is used to ground; the control terminal of the first switch is used to obtain the control signal output by the software protection sub-circuit, and the control terminal of the second switch is used to obtain the control signal output by the hardware protection sub-circuit. The first connection terminal of the first switch is configured as the output terminal of the protection execution unit.

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