Display panel and display device

Abstract

This application discloses a display panel and display device, comprising: a switch module, which includes a switch input terminal, a switch output terminal, and a switch control terminal; a GOA module connected to the switch input terminal; an array test point connected to the switch control terminal; and a TFT substrate connected to the switch output terminal. A voltage supply module is connected to the array test point, providing voltage to the array test point to enable conduction between the switch input terminal and the switch output terminal in the switch module. This application monitors the voltage state of the array test point using the switch module. Voltage fluctuations caused by damage to the array test point will not affect the GOA signal generated by the GOA module, thus effectively protecting the TFT substrate. Simultaneously, other components inside the liquid crystal display panel will not be damaged.

Description

Technical Field

[0001] The embodiments of this application relate to the field of display technology, and in particular to a display panel and display device. Background Technology

[0002] Liquid crystal displays (LCDs) have become the mainstream display technology in the market due to their advantages such as high brightness, long lifespan, wide viewing angle, and large display size. In recent years, with the rapid development of the semiconductor display industry, new technologies such as LTPS, AM-OLED, and Micro-LED have posed a threat to LCDs in the small and medium-sized display field. However, LCDs still maintain an unshakeable position in the large-size display field due to their mature technology and manufacturing processes. Therefore, improving LCD displays, perfecting LCD technology, increasing LCD production yield, and reducing costs are the main tasks for LCDs in the face of numerous new technological challenges.

[0003] When performing array testing on an LCD, pins need to be inserted into the array test points using an array testing machine to provide test signals to the LCD. However, this pinning process can easily cause burrs to form on the array test points, resulting in ITO film protrusions. During vacuum bonding, these protrusions can cause short circuits in the LCD's internal circuitry, thereby damaging internal components. Summary of the Invention

[0004] The embodiments of this application provide a display panel and a display device to solve the technical problem in the prior art where protrusions caused by pins during array testing damage the internal components of a liquid crystal display.

[0005] To address the aforementioned technical problems, embodiments of this application disclose the following technical solutions:

[0006] In a first aspect, a display panel is provided, comprising:

[0007] A switch module, comprising a switch input terminal, a switch output terminal, and a switch control terminal;

[0008] GOA module, wherein the GOA module is connected to the switch input terminal;

[0009] An array of test points, which are connected to the switch control terminal;

[0010] A TFT substrate, wherein the TFT substrate is connected to the switch output terminal;

[0011] A voltage supply module is connected to each array test point. The voltage supply module provides voltage to the array test points to enable the switch input terminal and the switch output terminal in the switch module to conduct.

[0012] In conjunction with the first aspect, the switching module includes a p-TFT, the switching control terminal is the gate of the p-TFT, the switching input terminal is the source of the p-TFT, and the switching output terminal is the drain of the p-TFT.

[0013] In conjunction with the first aspect, the GOA module provides a GOA signal, which is input to the TFT substrate when the switch input terminal and the switch output terminal are turned on.

[0014] In conjunction with the first aspect, the voltage supply module includes a constant voltage circuit and a voltage source, and the voltage range provided by the voltage supply module to the array test points is -15V to -5V.

[0015] In conjunction with the first aspect, the GOA module has multiple modules, which are disposed on both sides of the TFT substrate and arranged sequentially along the first direction X. The GOA module includes a first clock terminal, a second clock terminal, a voltage terminal, a signal input terminal, a signal output terminal, and a reset terminal.

[0016] The signal output terminal is connected to the switch input terminal.

[0017] In conjunction with the first aspect, the TFT substrate includes a first pixel, a second pixel, and a third pixel. The first pixel, the second pixel, and the third pixel are arranged along a second direction Y to form a pixel group. The pixel group is arranged along the first direction X and / or the second direction Y. The switch output terminal is connected to the first pixel, the second pixel, and the third pixel, or the switch output terminal is connected to the pixel group.

[0018] Wherein, the first direction X and the second direction Y are perpendicular.

[0019] In conjunction with the first aspect, the display panel further includes a wiring harness, the wiring harness including voltage lines and clock lines, the clock lines including a first clock signal, a second clock signal, a third clock signal and a fourth clock signal;

[0020] The first clock terminal is connected to one of the first clock signal, the second clock signal, the third clock signal, and the fourth clock signal;

[0021] The second clock terminal is connected to one of the first clock signal, the second clock signal, the third clock signal, and the fourth clock signal;

[0022] The voltage terminal is connected to the voltage line.

[0023] In conjunction with the first aspect, the first clock terminal of each of the four consecutive GOA modules is connected to only one of the first clock signal, the second clock signal, the third clock signal, and the fourth clock signal;

[0024] The second clock input of each of the four consecutive GOA modules is connected to only one of the first clock signal, the second clock signal, the third clock signal, and the fourth clock signal;

[0025] Furthermore, the first clock terminal and the second clock terminal in the same GOA module are connected to different clock lines.

[0026] In conjunction with the first aspect, the signal input terminal is connected to the signal output terminal of the non-adjacent GOA module in the front row of the same column;

[0027] The reset terminal is connected to the signal output terminal of the non-adjacent GOA module in the same row.

[0028] A second aspect provides a display device including a display panel as described in any of the above embodiments.

[0029] One of the above technical solutions has the following advantages or beneficial effects:

[0030] Compared with existing technologies, this application discloses a display panel comprising: a switch module, which includes a switch input terminal, a switch output terminal, and a switch control terminal; a GOA module connected to the switch input terminal; an array test point connected to the switch control terminal; and a TFT substrate connected to the switch output terminal. A voltage supply module is connected to the array test point, providing voltage to the array test point to enable conduction between the switch input terminal and the switch output terminal in the switch module. This application monitors the voltage state of the array test point using the switch module. Voltage fluctuations caused by damage to the array test point will not affect the GOA signal generated by the GOA module, thus effectively protecting the TFT substrate. Simultaneously, other components inside the liquid crystal display panel will not be damaged. Attached Figure Description

[0031] The technical solution and other beneficial effects of this application will become apparent from the following detailed description of specific embodiments in conjunction with the accompanying drawings.

[0032] Figure 1 This is a schematic diagram of the module connection structure provided in an embodiment of this application;

[0033] Figure 2 This is a schematic diagram of the circuit structure provided in the embodiments of this application;

[0034] Figure 3 A schematic diagram of the p-TFT connection is provided for embodiments of this application;

[0035] Figure 4 This is a schematic diagram of the pixel group arrangement structure provided in an embodiment of this application. Detailed Implementation

[0036] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. In the description of this application, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the accompanying drawings and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0037] TFT substrates are thin-film transistors used to drive liquid crystal pixels, enabling high-speed, high-brightness, and high-contrast display of screen information. They are currently the most mature and mainstream technology in flat panel display (FPD) technology. During the manufacturing process of LCDs, testing is required at each stage to ensure product quality. The applicant noted that during array testing of LCDs, the testing equipment pricks the array test points. This pricking causes protrusions, and when these protrusions are pressed together, they can cause short circuits in the display panel's internal circuitry, resulting in component damage.

[0038] The specific implementation methods of this application are illustrated below through examples:

[0039] like Figure 1As shown in the illustration, this application provides a display panel including a switch module, a GOA module, an array of test points, and a TFT substrate. The switch module includes a switch input terminal, a switch output terminal, and a switch control terminal. The GOA module is connected to the switch input terminal; the array of test points is connected to the switch control terminal; and the TFT substrate is connected to the switch output terminal. A voltage supply module is connected to the array of test points to provide voltage, thereby enabling the switch input terminal and switch output terminal in the switch module to conduct. It is understood that the GOA module provides a GOA signal, which is input to the TFT substrate, causing the TFT substrate to drive liquid crystal pixels according to the GOA signal. The switch module has two operating states: on and off. Both operating states are influenced by the voltage received at the switch control terminal. When the voltage received at the switch control terminal is in the ON state, the switch input and output terminals in the switch module are connected, allowing the signal connected to the switch input terminal to be transmitted to the switch output terminal, and the TFT substrate can function normally. Conversely, when the voltage received at the switch control terminal is in the OFF state, the switch input and output terminals are disconnected, preventing the signal from being transmitted from the switch input terminal to the switch output terminal, and the TFT substrate cannot function normally due to the lack of signal. In this application, the array test points are connected to the aperture control terminal in the switch module, and a voltage supply module is connected to the array test points, providing a constant voltage. When the switch control terminal is connected to the array test points, the constant voltage keeps the switch module in the ON state. During array testing, if a probe causes a protrusion at the array test point, the voltage at the array test point will suddenly increase. This sudden increase in voltage, input to the aperture control terminal, can promptly shut down the switch module, thus ensuring timely disconnection of the switch input and output terminals. This prevents the GOA signal generated by the GOA module from being input to the TFT substrate and its in-plane, thereby avoiding damage to the TFT substrate and other components.

[0040] like Figure 2 As shown in the embodiments of this application, the switching module includes a p-TFT, the switching control terminal is the gate of the p-TFT, the switching input terminal is the source of the p-TFT, and the switching output terminal is the drain of the p-TFT. The p-TFT is a good control device; when a suitable voltage is input to the gate, the source and drain of the p-TFT can conduct, and when the gate voltage continues to increase, the source and drain of the p-TFT will be cut off. Therefore, using a p-TFT as a switching module circuit is simple and efficient. In some other embodiments of this application, the switching module can also be other components or circuits capable of implementing two additional conductions and cutoffs based on voltage changes.

[0041] like Figure 2As shown in the embodiment of this application, the GOA module provides a GOA signal, which is input to the TFT substrate when the switch input and switch output terminals are turned on. GOA is short for Gate Driven on Array, meaning gate drive integration on the array substrate. GOA enables the progressive scan driving function of the liquid crystal panel. In traditional active matrix liquid crystal displays, the row scan signal is implemented by an external integrated circuit (G-COF). However, when using GOA driving, the row scan driving circuit is fabricated using the same process as thin-film transistors, based on the external circuit providing only a few control signals, to achieve the progressive scan driving function. Therefore, using GOA driving saves the integrated circuits related to scan driving, thereby reducing the manufacturing cost of the liquid crystal display. It can be understood that the GOA signal is a crucial driving signal for realizing the liquid crystal display function. To ensure that a sudden increase in voltage during array testing does not cause abnormalities in the GOA signal and damage to the TFT substrate or components, a p-TFT is connected between the GOA signal and the TFT substrate to control the GOA signal. As long as the voltage at the array test point does not suddenly increase, the GOA signal can be input to the TFT substrate as usual.

[0042] like Figure 2 As shown in this embodiment, the voltage supply module includes a constant voltage circuit and a voltage source. The voltage range provided by the voltage supply module to the array test points is -15V to -5V. It can be understood that the voltage supply module is used to provide a constant voltage. To ensure that the GOA signal can be normally input to the TFT substrate to drive the liquid crystal display, it is necessary to ensure that the control terminal of the p-TFT always receives a stable voltage signal so that the p-TFT can always be in the on state. Depending on the operating state and doping of the p-TFT, the voltage provided by the voltage supply module can be selected from: -15V, -14V, -13V, -12V, -11V, -10V, -9V, -8V, -7V, -6V, and -5V. It should be noted that, depending on the type of switching module selected, the voltage range provided by the voltage supply module can also be less than -15V or greater than -5V. Furthermore, the voltage supply module can be a constant voltage circuit or a voltage source, or other circuits or components capable of providing voltage.

[0043] like Figure 2As shown in this embodiment, multiple GOA modules are disposed on both sides of the TFT substrate and arranged sequentially along the first direction X. Each GOA module includes a first clock terminal, a second clock terminal, a voltage terminal, a signal input terminal, a signal output terminal, and a reset terminal; the signal output terminal is connected to the switch input terminal. In large-size TFT substrates, the in-plane gate lines have a large load. To enable normal gate line activation, GOA modules are disposed on both sides of the TFT substrate. The GOA signals generated by the GOA modules on both sides charge and drive a row of gate lines. Since the connection circuits of the GOA modules on both sides are symmetrical, this is called bilateral driving. Therefore, the switch module needs to be connected to both sides of the TFT substrate to control the GOA signals input to the TFT substrate and prevent sudden changes in the GOA signals from damaging the TFT substrate. In some other embodiments of this application, i.e., when the TFT substrate size is small, a single-sided driving method can also be used. In this case, the GOA module can be connected only on one side of the TFT substrate, and the switch module also only needs to be connected on one side.

[0044] like Figure 2 and Figure 4 As shown in the embodiment of this application, the TFT substrate includes a first pixel, a second pixel, and a third pixel. The first pixel, the second pixel, and the third pixel are arranged along the second direction Y to form a pixel group. The pixel group is arranged along the first direction X and / or the second direction Y. A switch output terminal is connected to the first pixel, the second pixel, and the third pixel, or the switch output terminal is connected to the pixel group; wherein, the first direction X and the second direction Y are perpendicular. To improve the effect of the liquid crystal display, three types of pixels are used as the basic color display points of the liquid crystal display. For example... Figure 4 As shown, RGB pixels are arranged sequentially along the second direction Y, with three pixels forming a group, and each column often contains multiple pixel groups. After arrangement, the pixel groups are arranged in rows to form multiple rows. Pixels or pixel groups emit light under control according to the received GOA signal, thereby realizing the display of the liquid crystal display.

[0045] like Figure 2As shown in this embodiment, the display panel further includes a wiring harness, which includes a voltage line Vss and a clock line. The clock line includes a first clock signal CLK1, a second clock signal CLK2, a third clock signal CLKB1, and a fourth clock signal CLKB2. The first clock terminal is connected to one of the first clock signal CLK1, the second clock signal CLK2, the third clock signal CLKB1, and the fourth clock signal CLKB2. The second clock terminal is connected to one of the first clock signal CLK1, the second clock signal CLK2, the third clock signal CLKB1, and the fourth clock signal CLKB2. The voltage terminal is connected to the voltage line. It can be understood that the voltage terminal in the GOA module is connected to the voltage line Vss in the wiring harness to obtain a voltage signal. The third clock signal CLKB1 is the inverted signal of the first clock signal CLK1, i.e., the phase is opposite, and the fourth clock signal CLKB2 is the inverted signal of the second clock signal CLK2. Using multiple clock signals avoids the clock signal attenuation during transmission, preventing insufficient charging voltage for later signal lines.

[0046] like Figure 2 As shown in this embodiment, the first clock terminal of each of the four consecutive GOA modules is connected to only one of the following clock signals: CLK1, CLK2, CLKB1, and CLKB2; the second clock terminal of each of the four consecutive GOA modules is connected to only one of the following clock signals: CLK1, CLK2, CLKB1, and CLKB2; and the first and second clock terminals within the same GOA module are connected to different clock lines. It can be understood that the four clock signals complete one cycle and are sequentially input into the GOA module. Therefore, for each individual clock signal line, only one out of every four provides an output voltage, significantly reducing the clock signal load. The third clock signal CLKB1 and the fourth clock signal CLKB2 input to the GOA module mainly serve to control noise.

[0047] like Figure 2 As shown, in this embodiment, the signal input terminal is connected to the signal output terminal of a non-adjacent GOA module in the front row of the same column; the reset terminal is connected to the signal output terminal of a non-adjacent GOA module in the back row of the same column. It can be understood that the signal output terminal of the current GOA module serves as both the driving signal for the current row and the reset signal for the GOA module in the second row above and the input signal for the GOA module in the second row below. This connection method allows the GOA module to reset the GOA module in the second row above and input a signal to the GOA module in the second row below when outputting a signal, thereby increasing the stability of the signal output terminal.

[0048] like Figure 3As shown, in some other embodiments of this application, the clock line also includes four clock signals with the same phase direction. The phase difference between adjacent clock signals is one-eighth of the phase. By providing driving signals with more clock signals, the pressure on the gate lines on the TFT substrate can be reduced, thereby making the TFT substrate display more stable.

[0049] This application also provides a display device, including a display panel as described in any of the above embodiments. The display panel in this type of display device includes all the features mentioned in the above embodiments and achieves the same beneficial effects, which will not be repeated here.

[0050] The above provides a detailed description of a display panel and display device provided in the embodiments of this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the technical solutions and core ideas of this application. Those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A display panel, characterized in that, include: A switch module, comprising a switch input terminal, a switch output terminal, and a switch control terminal; The switching module includes a p-TFT; GOA module, wherein the GOA module is connected to the switch input terminal; An array of test points, which are connected to the switch control terminal; A TFT substrate, wherein the TFT substrate is connected to the switch output terminal; The array test points are connected to a voltage supply module, which provides a constant voltage to the array test points so that the switch input terminal and the switch output terminal in the switch module remain connected. In the event of a voltage surge caused by a pin puncture at the array test points, the switch input terminal and the switch output terminal are disconnected to block the signal input of the GOA module to the TFT substrate.

2. The display panel as described in claim 1, characterized in that, The switch control terminal is the gate of the p-TFT, the switch input terminal is the source of the p-TFT, and the switch output terminal is the drain of the p-TFT.

3. The display panel as described in claim 1, characterized in that, The GOA module provides a GOA signal, which is input to the TFT substrate when the switch input terminal and the switch output terminal are turned on.

4. The display panel as described in claim 1, characterized in that, The voltage supply module includes a constant voltage circuit and a voltage source. The voltage range provided by the voltage supply module to the array test points is -15V to -5V.

5. The display panel as described in claim 4, characterized in that, The GOA module has multiple modules, which are disposed on both sides of the TFT substrate and arranged sequentially along the first direction (X). The GOA module includes a first clock terminal, a second clock terminal, a voltage terminal, a signal input terminal, a signal output terminal, and a reset terminal. The signal output terminal is connected to the switch input terminal.

6. The display panel as described in claim 5, characterized in that, The TFT substrate includes a first pixel, a second pixel, and a third pixel. The first pixel, the second pixel, and the third pixel are arranged along a second direction (Y) to form a pixel group. The pixel group is arranged along the first direction (X) and / or the second direction (Y). The switch output terminal is connected to the first pixel, the second pixel, and the third pixel, or the switch output terminal is connected to the pixel group. Wherein, the first direction (X) and the second direction (Y) are perpendicular.

7. The display panel as described in claim 6, characterized in that, The display panel also includes a wiring harness, which includes voltage lines and clock lines, and the clock lines include a first clock signal, a second clock signal, a third clock signal and a fourth clock signal; The first clock terminal is connected to one of the first clock signal, the second clock signal, the third clock signal, and the fourth clock signal; The second clock terminal is connected to one of the first clock signal, the second clock signal, the third clock signal, and the fourth clock signal; The voltage terminal is connected to the voltage line.

8. The display panel as described in claim 7, characterized in that, The first clock terminal of each of the four consecutive GOA modules is connected to only one of the first clock signal, the second clock signal, the third clock signal, and the fourth clock signal; The second clock input of each of the four consecutive GOA modules is connected to only one of the first clock signal, the second clock signal, the third clock signal, and the fourth clock signal; Furthermore, the first clock terminal and the second clock terminal in the same GOA module are connected to different clock lines.

9. The display panel as described in claim 8, characterized in that, The signal input terminal is connected to the signal output terminal of the non-adjacent GOA module in the front row of the same column; The reset terminal is connected to the signal output terminal of the non-adjacent GOA module in the same row.

10. A display device, characterized in that, Includes the display panel as described in any one of claims 1-9.

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