Data packet classification method, system, electronic device and storage medium
Patent Information
- Application Number
- CN202311541860.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-11-17
- Publication Date
- 2026-09-04
- Estimated Expiration
- 2043-11-17
AI Technical Summary
[0005]本发明提供一种数据包分类方法、系统、电子设备及存储介质,用以解决现有技术中在对DimTree进行配置时,需要对所需写操作的CPU系统增加写锁,导致其他CPU系统无法从DimTree中读取数据,并且写锁的加锁范围大、时间长,严重影响数据包分类性能的缺陷,实现便捷有效地提高数据包分类性能
[0030]本发明提供的数据包分类方法、系统、电子设备及存储介质,通过配置第一多维树以及第二多维树,在确定第一多维树为写树,第二多维树为读树的情况下,根据各第一处理器核传输的写请求,控制各第一处理器核将各自访问控制表中的目标分类条件写入第一多维树,并在写入过程中,可同步根据各第二处理器核传输的读请求,在多个读写锁中为各第二处理器核分配对应的读锁,以在各第二处理器核获取到对应的读锁时根据读请求,控制各第二处理器核从第二多维树读取各第二处理器核对应的包分类算法,以对各第二处理器核中的待分类数据包进行分类,一方面在对一棵DimTree进行写操作的同时,可以同步对另一棵DimTree进行读操作,由此降低数据包分类延迟,解决了写锁范围大、时间长问题,优化写锁效率;另一方面,每个处理器核配置有各自对应的读锁,优化了多核间读锁竞争问题,使包分类性能最大化。
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Figure CN117519998B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of data processing technology, and in particular to a data packet classification method, system, electronic device, and storage medium. Background Technology
[0002] Packet classification, including that of firewalls, is a crucial part of computer networks. It is an important technology for network traffic management and security policy implementation. Therefore, how to perform high-performance packet classification is an important issue that the industry urgently needs to address.
[0003] In related technologies, in multi-core CPU (Central Processing Unit) systems, the same DimTree (Dimensional Tree) is used for packet classification. However, due to resource contention issues, locking is required when reading and writing to the DimTree for packet classification. That is, a write lock is added when configuring the DimTree, and a read lock is added when using the DimTree to implement the classification function.
[0004] However, since multi-core CPU systems need to share the same DimTree and configure a pair of read-write locks for the same DimTree, when configuring the DimTree, a write lock needs to be added to the CPU system that needs to perform the write operation. This prevents other CPU systems from reading data from the DimTree. Furthermore, the write lock has a large locking range and a long locking time, which seriously affects the performance of packet classification. Summary of the Invention
[0005] This invention provides a data packet classification method, system, electronic device, and storage medium to solve the defects in the prior art where, when configuring a DimTree, a write lock needs to be added to the CPU system that needs to perform the write operation, which prevents other CPU systems from reading data from the DimTree. Furthermore, the write lock has a large locking range and a long locking time, which seriously affects the performance of data packet classification. This invention achieves a convenient and effective improvement in data packet classification performance.
[0006] This invention provides a data packet classification method applied to a computer device comprising multiple processor cores, wherein the multiple processor cores include at least one first processor core with write permissions and at least one second processor core with read permissions, the method comprising:
[0007] When the first multi-dimensional tree is determined to be a write tree and the second multi-dimensional tree is a read tree, according to the write requests transmitted by each of the first processor cores, each of the first processor cores is controlled to write the target classification conditions in its respective access control table into the first multi-dimensional tree, and the write operation progress of the first multi-dimensional tree is obtained.
[0008] If it is determined that the write operation of the first multidimensional tree is not completed based on the write operation progress, a corresponding read lock is allocated to each of the second processor cores from among multiple read-write locks according to the read requests transmitted by each of the second processor cores.
[0009] If it is determined that each of the second processor cores has acquired the corresponding read lock, according to the read request, each of the second processor cores is controlled to read the packet classification algorithm corresponding to each of the second processor cores from the second multidimensional tree, so that each of the second processor cores can classify the data packets to be classified in each of the second processor cores according to the packet classification algorithm corresponding to each of the second processor cores.
[0010] According to a packet classification method provided by the present invention, after obtaining the write operation progress of the first multidimensional tree, the method further includes:
[0011] If the write operation of the first multidimensional tree is completed based on the write operation progress, a corresponding write lock is allocated to each processor core among the multiple read-write locks;
[0012] Switch the first multidimensional tree to a read tree and the second multidimensional tree to a write tree;
[0013] Once it is determined that the first multi-dimensional tree switch is completed and the second multi-dimensional tree switch is completed, the write lock corresponding to each of the processor cores is released.
[0014] According to a packet classification method provided by the present invention, after releasing the write locks corresponding to each of the processor cores, the method further includes:
[0015] Based on the read request, a corresponding read lock is reallocated to each of the multiple read-write locks for each of the second processor cores;
[0016] If it is determined that each of the second processor cores has acquired the corresponding read lock, then according to the read request, each of the second processor cores is controlled to read the packet classification algorithm corresponding to each of the second processor cores from the first multidimensional tree.
[0017] According to a packet classification method provided by the present invention, after releasing the write locks corresponding to each of the processor cores, the method further includes:
[0018] According to the write request, each of the first processor cores is controlled to synchronously write the target classification conditions in its respective access control table to the second multidimensional tree.
[0019] According to a data packet classification method provided by the present invention, the step of switching the first multidimensional tree to a read tree and the second multidimensional tree to a write tree includes:
[0020] Switch the pointer of the first pointer pointing to the read tree from the second multi-dimensional tree to the first multi-dimensional tree;
[0021] Switch the pointer of the second pointer that is pointing to the write tree from the first multidimensional tree to the second multidimensional tree.
[0022] According to a data packet classification method provided by the present invention, the number of read / write locks is determined based on the number of processor cores.
[0023] The present invention also provides a data packet classification system applied to a computer device comprising multiple processor cores, wherein the multiple processor cores include at least one first processor core with write permissions and at least one second processor core with read permissions, and the system comprises:
[0024] The first control unit is configured to, when determining that the first multi-dimensional tree is a write tree and the second multi-dimensional tree is a read tree, control each of the first processor cores to write the target classification conditions in their respective access control tables into the first multi-dimensional tree according to the write requests transmitted by each of the first processor cores, and obtain the write operation progress of the first multi-dimensional tree.
[0025] The second control unit is configured to allocate a corresponding read lock to each of the second processor cores from among multiple read-write locks, based on the read request transmitted by each of the second processor cores, when it is determined from the write operation progress that the write operation of the first multidimensional tree has not been completed.
[0026] The third control unit is configured to, upon determining that each of the second processor cores has acquired the corresponding read lock, control each of the second processor cores to read the packet classification algorithm corresponding to each of the second processor cores from the second multidimensional tree according to the read request, so that each of the second processor cores can classify the data packets to be classified in each of the second processor cores according to the packet classification algorithm corresponding to each of the second processor cores.
[0027] The present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the packet classification method as described above.
[0028] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the data packet classification method as described above.
[0029] The present invention also provides a computer program product, including a computer program that, when executed by a processor, implements any of the data packet classification methods described above.
[0030] The data packet classification method, system, electronic device, and storage medium provided by this invention, by configuring a first multi-dimensional tree and a second multi-dimensional tree, and determining that the first multi-dimensional tree is a write tree and the second multi-dimensional tree is a read tree, controls each first processor core to write the target classification conditions from its access control table into the first multi-dimensional tree according to the write requests transmitted by each first processor core. During the writing process, corresponding read locks can be allocated to each second processor core from multiple read-write locks according to the read requests transmitted by each second processor core. When each second processor core acquires the corresponding read lock, it can read the packet classification algorithm corresponding to its own second processor core from the second multi-dimensional tree according to the read request, so as to classify the data packets to be classified in each second processor core. On the one hand, while performing a write operation on one DimTree, a read operation on another DimTree can be performed simultaneously, thereby reducing the data packet classification latency, solving the problems of large write lock range and long time, and optimizing write lock efficiency. On the other hand, each processor core is configured with its own corresponding read lock, optimizing the read lock contention problem between multiple cores and maximizing packet classification performance. Attached Figure Description
[0031] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0032] Figure 1 This is one of the flowcharts illustrating the data packet classification method provided by the present invention;
[0033] Figure 2 This is the second flowchart of the data packet classification method provided by the present invention;
[0034] Figure 3 This is a schematic diagram of the data packet classification system provided by the present invention;
[0035] Figure 4 This is a schematic diagram of the structure of the electronic device provided by the present invention. Detailed Implementation
[0036] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.
[0037] Current firewall packet classification uses the DimTree algorithm, a tree-based data indexing and approximate query algorithm suitable for high-dimensional datasets. Due to its efficient query performance, it is also well-suited for network packet classification.
[0038] In related technologies, in multi-core CPU (Central Processing Unit) systems, the same DimTree (Dimensional Tree) is used for packet classification. However, due to resource contention issues, locking is required when reading and writing to the DimTree for packet classification. That is, a write lock is added when configuring the DimTree, and a read lock is added when using the DimTree to implement the classification function.
[0039] However, since multi-core CPU systems need to share the same DimTree, when configuring the DimTree, a write lock needs to be added to the CPU system that needs to perform write operations. This prevents other CPU systems from reading data from the DimTree, and the locking range of the write lock is large and the locking time is long. In addition, configuring a pair of read and write locks for the same DimTree leads to a certain degree of contention for read locks among multiple cores, resulting in a decrease in read lock performance. Therefore, this packet classification method seriously affects the packet classification performance.
[0040] To address this, this embodiment provides a packet classification method. This method employs multiple DimTrees and configures multiple read-write locks based on the number of processor cores. On one hand, while writing to one DimTree, reading from another DimTree can be performed simultaneously, thereby reducing packet classification latency and solving the problems of large write lock range and long time. On the other hand, each processor core is configured with its own corresponding read lock, so there is no contention for read locks among multiple processor cores, solving the problem of read lock contention among multiple cores, thus maximizing packet classification performance.
[0041] The following is combined Figures 1-2 This invention describes a data packet classification method. The method is applied to a computer device including multiple processor cores, which may be a server or other devices; this embodiment does not specifically limit this. The computer device may include at least one first processor core with write permissions and at least one second processor core with read permissions. It should be noted that the number of processor cores included in the first and second processor cores can be adjusted according to actual needs; that is, a processor core may have read permissions or write permissions, and this embodiment does not specifically limit this.
[0042] Figure 1 This is one of the schematic flowcharts of a data packet classification method provided in an embodiment of this application; such as Figure 1 As shown, the method includes the following steps:
[0043] Step 101: When it is determined that the first multi-dimensional tree is a write tree and the second multi-dimensional tree is a read tree, according to the write request transmitted by each of the first processor cores, control each of the first processor cores to write the target classification conditions in their respective access control tables into the first multi-dimensional tree, and obtain the write operation progress of the first multi-dimensional tree.
[0044] It should be noted that before executing step 101, two DimTrees need to be pre-configured, namely the first multidimensional tree (hereinafter referred to as DT1) and the second multidimensional tree (hereinafter referred to as DT2). DT1 and DT2 are tree structures for high-dimensional data indexing and querying, formed by configuring various classification conditions. DT1 and DT2 can be read trees or write trees, but only one tree can be a read tree and the other a write tree at any given time; the read tree here is only used for read operations, and the write tree here is only used for write operations.
[0045] Optionally, it can be determined whether the first multi-dimensional tree is a write tree and whether the second multi-dimensional tree is a read tree. If the first multi-dimensional tree is determined to be a write tree and the second multi-dimensional tree is a read tree, then when configuring the shared DimTree, the configuration information of the classification conditions can be written into the first multi-dimensional tree. When classifying data packets, the packet classification algorithm can be read from the second multi-dimensional tree to classify the data packets to be classified. If the first multi-dimensional tree is a read tree and the second multi-dimensional tree is a write tree, then when configuring the shared DimTree, the configuration information of the classification conditions can be written into the second multi-dimensional tree. When classifying data packets, the packet classification algorithm can be read from the first multi-dimensional tree to classify the data packets to be classified. The specific configuration can be made according to actual needs.
[0046] The following description focuses on the case where the first multi-dimensional tree is determined to be a write tree and the second multi-dimensional tree to be a read tree. Adaptive replacements can be made for cases where the second multi-dimensional tree is determined to be a write tree and the first multi-dimensional tree to be a read tree.
[0047] Optionally, if the first multi-dimensional tree is determined to be a write tree and the second multi-dimensional tree to be a read tree, each first processor core is controlled to perform a write operation on DT1 according to the target classification conditions in its respective access control table based on the write request transmitted by each first processor core, so as to configure the target classification conditions in its respective access control table into DT1.
[0048] The Access Control List (ACL) here is a collection of one or more access control entries; an access control entry is a statement that describes the conditions for matching packets, such as source and destination addresses, port numbers, protocol types, etc.
[0049] Optionally, when a write request is received from each of the first processor cores, each of the first processor cores is controlled to write the target classification conditions in its respective access control table into the first multidimensional tree, so as to update the classification conditions of the first multidimensional tree and monitor the write operation progress of the first multidimensional tree in real time.
[0050] The write requests transmitted by each first processor core here are requests initiated by each first processor core when it needs to configure the classification conditions in DimTree in real time according to the classification conditions in its respective access control table.
[0051] The target classification conditions here are the classification conditions that each first processor core needs to write into the shared DimTree from its own access control table, such as the classification conditions added to or modified in the access control table of each first processor core. This embodiment does not specifically limit this.
[0052] Step 102: If it is determined that the write operation of the first multidimensional tree is not completed according to the write operation progress, a corresponding read lock is allocated to each of the second processor cores from multiple read-write locks according to the read requests transmitted by each of the second processor cores.
[0053] The number of read-write locks here can be configured according to actual needs, or it can be adapted to the number of processor cores contained in the computer device. This embodiment does not specifically limit this.
[0054] In some embodiments, the number of read-write locks is determined based on the number of processor cores.
[0055] Optionally, a corresponding number of read-write locks can be requested according to the number of processor cores. For example, eight read-write locks can be requested for eight processor cores, so that each processor core can apply for and allocate the corresponding read-write locks independently. This reduces the scope of lock contention to within each processor core, reduces lock contention between different processor cores, lowers the probability of lock conflicts, and thus better achieves parallelism of read operations, improves system performance and throughput, thereby enhancing packet classification performance.
[0056] Optionally, after obtaining the write operation progress of the first multi-dimensional tree through step 101, it can be determined whether the write operation of the first multi-dimensional tree is completed based on the write operation progress of the first multi-dimensional tree; if the write operation of the first multi-dimensional tree is not completed, the first multi-dimensional tree is still identified as a write tree and the second multi-dimensional tree is identified as a read tree; at this time, when the read requests transmitted by each second processor core are obtained, read locks of the same number as the number of second processor cores can be randomly selected from multiple read-write locks and allocated to each second processor core so that the second processor core can perform read operations on the second multi-dimensional tree.
[0057] The read request here is generated when each of the second processor cores needs to read the packet classification algorithm from the shared resource (DimTree). The read request may carry attribute information of the packet classification algorithm to be read, such as the node position and node name of the packet classification algorithm in the data structure, etc., but this embodiment does not specifically limit this.
[0058] Step 103: If it is determined that each of the second processor cores has acquired the corresponding read lock, according to the read request, control each of the second processor cores to read the packet classification algorithm corresponding to each of the second processor cores from the second multidimensional tree, so that each of the second processor cores can classify the data packets to be classified in each of the second processor cores according to the packet classification algorithm corresponding to each of the second processor cores.
[0059] Optionally, after allocating a corresponding read lock to each second processor core from multiple read-write locks, it is also necessary to monitor the read lock acquisition status of each second processor core in real time to determine whether each second processor core has acquired the corresponding read lock. If it is determined that each second processor core has acquired the corresponding read lock, the attribute information of the corresponding packet classification algorithm is obtained from the read request. Based on the attribute information of the packet classification algorithm, each second processor core is controlled to read the corresponding packet classification algorithm from the second multidimensional tree. After acquiring the corresponding packet classification algorithm, each second processor core can classify the data packets to be classified in its own kernel based on the corresponding packet classification algorithm.
[0060] The data packet classification method provided in this embodiment configures a first multi-dimensional tree and a second multi-dimensional tree. When the first multi-dimensional tree is determined to be a write tree and the second multi-dimensional tree to be a read tree, based on the write requests transmitted by each first processor core, it controls each first processor core to write the target classification conditions from its access control table into the first multi-dimensional tree. During the writing process, it can simultaneously allocate corresponding read locks to each second processor core from multiple read-write locks based on the read requests transmitted by each second processor core. When each second processor core acquires the corresponding read lock, it controls each second processor core to read its corresponding packet classification algorithm from the second multi-dimensional tree according to the read request, thus classifying the data packets to be classified in each second processor core. On the one hand, while performing a write operation on one DimTree, a read operation on another DimTree can be performed simultaneously, thereby reducing data packet classification latency, solving the problems of large write lock range and long time, and optimizing write lock efficiency. On the other hand, each processor core is configured with its own corresponding read lock, optimizing the read lock contention problem between multiple cores and maximizing packet classification performance.
[0061] In some embodiments, after performing step 101, the method further includes:
[0062] If the write operation of the first multidimensional tree is completed based on the write operation progress, a corresponding write lock is allocated to each processor core among the multiple read-write locks;
[0063] Switch the first multidimensional tree to a read tree and the second multidimensional tree to a write tree;
[0064] Once it is determined that the first multi-dimensional tree switch is completed and the second multi-dimensional tree switch is completed, the write lock corresponding to each of the processor cores is released.
[0065] Optionally, if the write operation of the first multi-dimensional tree is completed based on the write operation progress of the first multi-dimensional tree, a corresponding write lock is allocated to each processor core among multiple read-write locks. This restricts each processor core from performing read operations on the first and second multi-dimensional trees when switching between read and write functions. This not only prevents erroneous data reading, unauthorized access, and inconsistent data reading during the switching process, thus improving data security, integrity, and consistency, but also avoids read operation conflicts between different processor cores, thereby improving reliability and stability.
[0066] Next, the first multi-dimensional tree is switched to a read tree, and the second multi-dimensional tree is switched to a write tree. The switching progress is monitored. Once it is confirmed that the switching of the first and second multi-dimensional trees is complete, the write locks corresponding to each processor core are released. This allows each second processor core to perform read operations on the first multi-dimensional tree based on read requests and write operations on the second multi-dimensional tree based on write requests. This ensures data synchronization between the first and second multi-dimensional trees, facilitating the acquisition of richer packet classification algorithms from the dynamically configured first multi-dimensional tree by each second processor core. Furthermore, the tree switching operation is very fast, much shorter than locking the entire tree, solving the problems of large write lock range and long time, thereby effectively improving packet classification performance.
[0067] The switching methods here include switching the pointers of the read and write pointers (e.g., pointing the read pointer to the first multi-dimensional tree and the write pointer to the second multi-dimensional tree), or modifying the values of the flag bits used to indicate the read and write functions in the first and second multi-dimensional trees (e.g., changing the flag bit of the first multi-dimensional tree to the read flag bit and the flag bit of the second multi-dimensional tree to the write flag bit). This embodiment does not specifically limit this.
[0068] In some embodiments, after releasing the write lock corresponding to each of the processor cores, the method further includes:
[0069] Based on the read request, a corresponding read lock is reallocated to each of the multiple read-write locks for each of the second processor cores;
[0070] If it is determined that each of the second processor cores has acquired the corresponding read lock, then according to the read request, each of the second processor cores is controlled to read the packet classification algorithm corresponding to each of the second processor cores from the first multidimensional tree.
[0071] Optionally, after releasing the write locks corresponding to each processor core, read locks of the same number as the number of second processor cores can be randomly selected from multiple read-write locks and redistributed to each second processor core so that the second processor cores can perform read operations on the first multidimensional tree.
[0072] Optionally, after determining that each second processor core has acquired the corresponding read lock, the attribute information of the corresponding packet classification algorithm is obtained from the read request. Based on this attribute information, each second processor core is controlled to read its corresponding packet classification algorithm from the first multidimensional tree. After acquiring the corresponding packet classification algorithm, each second processor core can classify the packets to be classified in its own kernel based on that algorithm.
[0073] The method provided in this embodiment switches each second processor core to the first multidimensional tree for read operations after the first multidimensional tree is switched to a read tree and the second multidimensional tree is switched to a write tree. This allows each second processor core to obtain richer and more up-to-date packet classification algorithms from the dynamically configured first multidimensional tree, thereby further improving packet classification performance.
[0074] In some embodiments, after releasing the write lock corresponding to each of the processor cores, the method further includes:
[0075] According to the write request, each of the first processor cores is controlled to synchronously write the target classification conditions in its respective access control table to the second multidimensional tree.
[0076] Optionally, after releasing the write lock corresponding to each processor core, each first processor core can be controlled to synchronously write the target classification conditions in its respective access control table into the second multi-dimensional tree, so as to synchronously update the classification conditions of the second multi-dimensional tree, thereby ensuring the data consistency between the first and second multi-dimensional trees, and thus improving the reliability and accuracy of packet classification.
[0077] In some embodiments, switching the first multidimensional tree to a read tree and the second multidimensional tree to a write tree includes:
[0078] Switch the pointer of the first pointer pointing to the read tree from the second multi-dimensional tree to the first multi-dimensional tree;
[0079] Switch the pointer of the second pointer that is pointing to the write tree from the first multidimensional tree to the second multidimensional tree.
[0080] Optionally, the read / write switching steps include:
[0081] First, create read and write pointers: In order to switch between read and write operations, two pointers need to be created, namely the first pointer pointing to the read tree and the second pointer pointing to the write tree.
[0082] Next, the first pointer pointing to the read tree is switched from the second multi-dimensional tree to the first multi-dimensional tree, and the second pointer pointing to the write tree is switched from the first multi-dimensional tree to the second multi-dimensional tree. This ensures that read operations only access data in the first multi-dimensional tree, and write operations only operate on the second multi-dimensional tree. This improves the efficiency of read and write operations, making the switching time much shorter than the time required to lock the entire tree. It solves the problems of large write lock range and long lock time, optimizes write lock efficiency, reduces the impact on read locks, and thus improves the performance of packet classification.
[0083] The following describes the data packet classification method provided in this embodiment using specific examples; Figure 2 This is the second flowchart illustrating the data packet classification method provided in this embodiment. The method includes:
[0084] First, two DimTree trees are predefined, namely the first multidimensional tree DT1 and the second multidimensional tree DT2.
[0085] Next, the first multi-dimensional tree DT1 and the second multi-dimensional tree DT2 are configured so that the two trees meet the following conditions: DT1 and DT2 can both be read trees or write trees, but only one tree can be a read tree and the other tree can be a write tree at any given time; the read tree is only used for read operations and the write tree is only used for write operations.
[0086] Next, initialize DT1 as a write tree and DT2 as a read tree; and request read-write locks according to the number of processor cores, for example: request 8 read-write locks for 8 processor cores.
[0087] Next, when configuring DimTree, control the first processor core to perform a write operation on the write tree DT1, and after the operation is completed, add write locks to all processor cores.
[0088] Next, switch DT1 to read the tree and switch DT2 to write the tree.
[0089] Next, when DT2 has switched to write tree, the first processor core controls the configuration to be rewritten to the DT2 tree to ensure the consistency of the two trees.
[0090] Next, after the switch is completed, since the packet classification function module runs on each second processor, when it is determined that a data packet has entered the packet classification module, it is necessary to lock the read lock of the current second processor, then read the read tree DT1, execute the packet classification algorithm, and then unlock it after completion, thereby achieving high-performance packet classification.
[0091] The data packet classification system provided by the present invention is described below. The data packet classification system described below can be referred to in correspondence with the data packet classification method described above.
[0092] Figure 3 This is a schematic diagram of the structure of a data packet classification system provided in an embodiment of this application. The system is applied to a computer device containing multiple processor cores, wherein the multiple processor cores include at least one first processor core with write permissions and at least one second processor core with read permissions; as shown... Figure 3 As shown, the system includes:
[0093] The first control unit 301 is used to, when determining that the first multi-dimensional tree is a write tree and the second multi-dimensional tree is a read tree, control each of the first processor cores to write the target classification conditions in their respective access control tables into the first multi-dimensional tree according to the write requests transmitted by each of the first processor cores, and obtain the write operation progress of the first multi-dimensional tree.
[0094] The second control unit 302 is used to allocate a corresponding read lock to each of the second processor cores from among multiple read-write locks, based on the read request transmitted by each of the second processor cores, when it is determined from the write operation progress that the write operation of the first multidimensional tree has not been completed.
[0095] The third control unit 303 is used to, upon determining that each of the second processor cores has acquired the corresponding read lock, control each of the second processor cores to read the packet classification algorithm corresponding to each of the second processor cores from the second multidimensional tree according to the read request, so that each of the second processor cores can classify the data packets to be classified in each of the second processor cores according to the packet classification algorithm corresponding to each of the second processor cores.
[0096] The packet classification system provided in this embodiment, by configuring a first multi-dimensional tree and a second multi-dimensional tree, determines that the first multi-dimensional tree is a write tree and the second multi-dimensional tree is a read tree. Based on the write requests transmitted by each first processor core, it controls each first processor core to write the target classification conditions from its access control table into the first multi-dimensional tree. During the writing process, it can simultaneously allocate corresponding read locks to each second processor core from multiple read-write locks based on the read requests transmitted by each second processor core. When each second processor core acquires the corresponding read lock, it controls each second processor core to read the packet classification algorithm corresponding to its own second processor core from the second multi-dimensional tree according to the read request, in order to classify the packets to be classified in each second processor core. On the one hand, while performing a write operation on one DimTree, a read operation on another DimTree can be performed simultaneously, thereby reducing packet classification latency, solving the problems of large write lock range and long time, and optimizing write lock efficiency. On the other hand, each processor core is configured with its own corresponding read lock, optimizing the read lock contention problem between multiple cores and maximizing packet classification performance.
[0097] In some embodiments, a fourth control unit is further included, for:
[0098] If the write operation of the first multidimensional tree is completed based on the write operation progress, a corresponding write lock is allocated to each processor core among the multiple read-write locks;
[0099] Switch the first multidimensional tree to a read tree and the second multidimensional tree to a write tree;
[0100] Once it is determined that the first multi-dimensional tree switch is completed and the second multi-dimensional tree switch is completed, the write lock corresponding to each of the processor cores is released.
[0101] In some embodiments, the fourth control unit is further configured to:
[0102] Based on the read request, a corresponding read lock is reallocated to each of the multiple read-write locks for each of the second processor cores;
[0103] If it is determined that each of the second processor cores has acquired the corresponding read lock, then according to the read request, each of the second processor cores is controlled to read the packet classification algorithm corresponding to each of the second processor cores from the first multidimensional tree.
[0104] In some embodiments, the fourth control unit is further configured to:
[0105] According to the write request, each of the first processor cores is controlled to synchronously write the target classification conditions in its respective access control table to the second multidimensional tree.
[0106] In some embodiments, the fourth control unit is further configured to:
[0107] Switch the pointer of the first pointer pointing to the read tree from the second multi-dimensional tree to the first multi-dimensional tree;
[0108] Switch the pointer of the second pointer that is pointing to the write tree from the first multidimensional tree to the second multidimensional tree.
[0109] In some embodiments, the number of read-write locks is determined based on the number of processor cores.
[0110] Figure 4 An example is a schematic diagram of the physical structure of an electronic device, such as... Figure 4 As shown, the electronic device may include: a processor 401, a communication interface 402, a memory 403, and a communication bus 404, wherein the processor 401, the communication interface 402, and the memory 403 communicate with each other through the communication bus 404. Processor 401 can invoke logical instructions in memory 403 to execute a packet classification method. This method includes: when a first multi-dimensional tree is determined to be a write tree and a second multi-dimensional tree to be a read tree, controlling each of the first processor cores to write target classification conditions from its access control table into the first multi-dimensional tree according to write requests transmitted by each of the first processor cores, and obtaining the write operation progress of the first multi-dimensional tree; when the write operation progress indicates that the write operation of the first multi-dimensional tree is incomplete, allocating a corresponding read lock to each of the second processor cores from multiple read-write locks according to read requests transmitted by each of the second processor cores; and when it is determined that each of the second processor cores has acquired the corresponding read lock, controlling each of the second processor cores to read the packet classification algorithm corresponding to each of the second processor cores from the second multi-dimensional tree according to the read request, so that each of the second processor cores can classify the packets to be classified in each of the second processor cores according to the packet classification algorithm corresponding to each of the second processor cores.
[0111] Furthermore, the logical instructions in the aforementioned memory 403 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, essentially, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.
[0112] On the other hand, the present invention also provides a computer program product, which includes a computer program that can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer is able to execute the data packet classification method provided by the above methods. The method includes: when it is determined that the first multi-dimensional tree is a write tree and the second multi-dimensional tree is a read tree, according to the write request transmitted by each of the first processor cores, controlling each of the first processor cores to write the target classification conditions in its respective access control table into the first multi-dimensional tree and obtaining the write operation progress of the first multi-dimensional tree; when it is determined that the write operation of the first multi-dimensional tree is not completed according to the write operation progress, according to the read request transmitted by each of the second processor cores, allocating a corresponding read lock for each of the second processor cores among a plurality of read-write locks; when it is determined that each of the second processor cores has acquired the corresponding read lock, according to the read request, controlling each of the second processor cores to read the packet classification algorithm corresponding to each of the second processor cores from the second multi-dimensional tree, so that each of the second processor cores can classify the data packets to be classified in each of the second processor cores according to the packet classification algorithm corresponding to each of the second processor cores.
[0113] In another aspect, the present invention also provides a non-transitory computer-readable storage medium storing a computer program thereon. When executed by a processor, the computer program implements the packet classification method provided by the above methods. The method includes: when it is determined that a first multi-dimensional tree is a write tree and a second multi-dimensional tree is a read tree, according to the write requests transmitted by each of the first processor cores, controlling each of the first processor cores to write the target classification conditions in its respective access control table into the first multi-dimensional tree and obtaining the write operation progress of the first multi-dimensional tree; when it is determined that the write operation of the first multi-dimensional tree is not completed according to the write operation progress, according to the read requests transmitted by each of the second processor cores, allocating a corresponding read lock for each of the second processor cores among a plurality of read-write locks; when it is determined that each of the second processor cores has acquired the corresponding read lock, according to the read request, controlling each of the second processor cores to read the packet classification algorithm corresponding to each of the second processor cores from the second multi-dimensional tree, so that each of the second processor cores can classify the packets to be classified in each of the second processor cores according to the packet classification algorithm corresponding to each of the second processor cores.
[0114] The system embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.
[0115] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.
[0116] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims
1. A data packet classification method, characterized in that, A method applicable to a computer device comprising multiple processor cores, wherein the multiple processor cores include at least one first processor core with write permissions and at least one second processor core with read permissions, the method comprising: When the first multi-dimensional tree is determined to be a write tree and the second multi-dimensional tree is a read tree, according to the write requests transmitted by each of the first processor cores, each of the first processor cores is controlled to write the target classification conditions in its respective access control table into the first multi-dimensional tree, and the write operation progress of the first multi-dimensional tree is obtained. If it is determined that the write operation of the first multidimensional tree is not completed based on the write operation progress, a corresponding read lock is allocated to each of the second processor cores from among multiple read-write locks according to the read requests transmitted by each of the second processor cores. If it is determined that each of the second processor cores has acquired the corresponding read lock, according to the read request, each of the second processor cores is controlled to read the packet classification algorithm corresponding to each of the second processor cores from the second multidimensional tree, so that each of the second processor cores can classify the data packets to be classified in each of the second processor cores according to the packet classification algorithm corresponding to each of the second processor cores; After obtaining the write operation progress of the first multidimensional tree, the method further includes: If the write operation of the first multidimensional tree is completed based on the write operation progress, a corresponding write lock is allocated to each processor core among the multiple read-write locks; Switch the first multidimensional tree to a read tree and the second multidimensional tree to a write tree; Once it is determined that the first multi-dimensional tree switch is completed and the second multi-dimensional tree switch is completed, the write lock corresponding to each of the processor cores is released. Based on the read request, a corresponding read lock is reallocated to each of the multiple read-write locks for each of the second processor cores; If it is determined that each of the second processor cores has acquired the corresponding read lock, then according to the read request, each of the second processor cores is controlled to read the packet classification algorithm corresponding to each of the second processor cores from the first multidimensional tree.
2. The data packet classification method according to claim 1, characterized in that, After releasing the write locks corresponding to each of the processor cores, the method further includes: According to the write request, each of the first processor cores is controlled to synchronously write the target classification conditions in its respective access control table to the second multidimensional tree.
3. The data packet classification method according to claim 1, characterized in that, The step of switching the first multidimensional tree to a read tree and the second multidimensional tree to a write tree includes: Switch the pointer of the first pointer pointing to the read tree from the second multi-dimensional tree to the first multi-dimensional tree; Switch the pointer of the second pointer that is pointing to the write tree from the first multidimensional tree to the second multidimensional tree.
4. The data packet classification method according to any one of claims 1-3, characterized in that, The number of read-write locks is determined based on the number of processor cores.
5. A data packet classification system, characterized in that, A system applicable to a computer device comprising multiple processor cores, wherein the multiple processor cores include at least one first processor core with write permissions and at least one second processor core with read permissions, the system comprising: The first control unit is configured to, when determining that the first multi-dimensional tree is a write tree and the second multi-dimensional tree is a read tree, control each of the first processor cores to write the target classification conditions in their respective access control tables into the first multi-dimensional tree according to the write requests transmitted by each of the first processor cores, and obtain the write operation progress of the first multi-dimensional tree. The second control unit is configured to allocate a corresponding read lock to each of the second processor cores from among multiple read-write locks, based on the read request transmitted by each of the second processor cores, when it is determined from the write operation progress that the write operation of the first multidimensional tree has not been completed. The third control unit is configured to, upon determining that each of the second processor cores has acquired the corresponding read lock, control each of the second processor cores to read the packet classification algorithm corresponding to each of the second processor cores from the second multidimensional tree according to the read request, so that each of the second processor cores can classify the data packets to be classified in each of the second processor cores according to the packet classification algorithm corresponding to each of the second processor cores; The data packet classification system is also used for: If the write operation of the first multidimensional tree is completed based on the write operation progress, a corresponding write lock is allocated to each processor core among the multiple read-write locks; Switch the first multidimensional tree to a read tree and the second multidimensional tree to a write tree; Once it is determined that the first multi-dimensional tree switch is completed and the second multi-dimensional tree switch is completed, the write lock corresponding to each of the processor cores is released. Based on the read request, a corresponding read lock is reallocated to each of the multiple read-write locks for each of the second processor cores; If it is determined that each of the second processor cores has acquired the corresponding read lock, then according to the read request, each of the second processor cores is controlled to read the packet classification algorithm corresponding to each of the second processor cores from the first multidimensional tree.
6. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the program, it implements the data packet classification method as described in any one of claims 1 to 4.
7. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the data packet classification method as described in any one of claims 1 to 4.
8. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the data packet classification method as described in any one of claims 1 to 4.
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