A distributed high-computing-capacity satellite-borne computing platform system design method

Abstract

The application discloses a kind of distributed high computing power satellite-borne computing platform system design methods, adopt the platform topology structure of cross cold backup and cross storage, realize the high-speed data stream full routing interconnection in platform system by high-speed serial GTH / GTX interface;Realize the independent work of remote control telemetry and the control flow of upper injection reconstruction based on point-to-point LVDS serial port;Using minimum system, each unit module is independently powered on and off controlled, realize the flexible control management of platform system internal energy flow;And for the telemetry state in the working process under the space radiation environment, the abnormality monitored is handled by hierarchical health management strategy to carry out autonomous recovery and autonomous switching processing to distributed computing unit.The method solves the reliability problem of high computing power satellite-borne computing platform under long-term power-on working in cosmic radiation environment, realizes the flexible control switching of platform internal data flow, control flow and energy flow, and autonomous health management and replacement operation processing.

Description

Technical Field

[0001] This invention relates to a design method for a distributed high-computing-power spaceborne computing platform system, belonging to the field of on-orbit intelligent processing technology. Background Technology

[0002] With the rapid development of imaging technology, remote sensing images are characterized by continuously improving spatial, temporal, and spectral resolution. This exponentially increasing data volume creates a significant contradiction with the limited resources of platform transmission and storage. The raw data volumes of tens or even hundreds of Gbps not only put enormous pressure on traditional data processing and transmission links, but also make the manual discovery and confirmation of high-value information from the massive amounts of data transmitted to the ground extremely time-consuming. High-value information is contained within the massive amounts of raw data, and the effective data volume is very small, resulting in a large amount of essentially invalid and redundant data being transmitted. Currently, traditional data processing aims to save link bandwidth by increasing the compression ratio of transmitted remote sensing images; however, remote sensing image compression technology has not seen a breakthrough for many years, and reducing the amount of transmitted data through compression has reached a bottleneck. my country has relatively few ground data receiving stations globally and weak relay transmission capabilities, facing significant pressure for rapid data transmission. The remote sensing data acquired on satellite, transmitted to the ground for processing, and provided to users to extract useful information presents a contradictory situation of "too much and too little" satellite data. On the one hand, ground systems acquire massive amounts of Earth observation data daily; on the other hand, this massive amount of data is difficult to process in a timely manner, resulting in significant waste. The traditional information acquisition model involves satellites acquiring data, transmitting it to ground stations, then processing centers generating image products, and finally distributing it to end users level by level. This process is characterized by long links, significant latency, and poor timeliness. Therefore, by using on-orbit intelligent processing technology to directly generate information products on-board and distribute different levels of application products directly to end users at various levels through distribution channels, more timely information services can be provided. Through on-orbit intelligent processing technology, high-value time-sensitive information can be rapidly extracted from massive amounts of raw remote sensing data, reducing the amount of remote sensing data by hundreds of times. This not only saves satellite data storage and transmission resources but also significantly improves the application efficiency of satellite data transmission systems.

[0003] For on-orbit intelligent processing, real-time performance is crucial, necessitating a high-performance on-orbit computing platform. Different processing algorithms require corresponding templates and parameters for coordination. To continuously improve the application efficiency of on-orbit processing, the platform's algorithms must also possess the capability for evolution and upgrades. However, due to limitations in the performance of aerospace application processing chips and the extreme temperatures under vacuum conditions, the types of processing chips available are very limited. Furthermore, the computing power of a single processing chip is limited, requiring consideration of reliability during long-term operation under cosmic radiation conditions. Especially for the rapid on-orbit processing requirements of raw payload data reaching tens or even hundreds of Gbps, parallel processing with multiple devices is necessary to enhance computing power. Parallel processing among multiple devices involves issues such as payload data splitting, clock synchronization, status monitoring, health management, and autonomous switching in case of distributed computing anomalies, making the process and operation extremely complex. Summary of the Invention

[0004] The technical problem solved by this invention is to overcome the shortcomings of the prior art and propose a distributed high-computing-power spaceborne computing platform system design method. By adopting a platform topology structure of cross-cold backup and cross-storage, the high computing power requirements of the platform are met.

[0005] The technical solution of this invention is:

[0006] A distributed high-performance onboard computing platform system includes two control units that serve as cold backups for each other, two routing units that serve as cold backups for each other, multiple cross-backup computing units, a power supply unit, and a baseboard unit.

[0007] The routing unit receives multi-source payload data, processes the payload data into blocks, distributes them to the computing units specified by the control unit, and transmits its own health status information to the control unit.

[0008] The power supply unit includes several power modules, each of which has an independent power control function to turn the routing unit or computing unit on and off.

[0009] The control unit receives indirect instructions, attitude and orbit control information, and second pulse signals sent by the satellite bus, synchronizes the time base, forwards them to the routing unit and computing unit in the form of broadcast, and monitors the current and voltage information of the routing unit and computing unit in operation. It then combines the received health status information of the routing unit and computing unit to determine the health status of the corresponding routing unit and computing unit, and performs autonomous replacement of routing units and computing units with abnormal status.

[0010] The computing unit receives payload data and broadcast information, performs distributed parallel processing, and transmits its own health status information to the control unit.

[0011] The base plate unit is equipped with multiple data channels, including a full-duplex GTH or GTX interface, a point-to-point LVDS remote control and telemetry interface, a point-to-point LVDS superstructure interface, and a secondary power supply interface, to realize the interconnection of information flow, control flow, and energy flow between the routing unit, computing unit, and control unit.

[0012] Preferably, the computational units with abnormal states are processed in a hierarchical manner, including:

[0013] If any of the voltage, current, or temperature exceeds the threshold range, the control unit immediately shuts down the corresponding computing unit, then selects a computing unit from the cross-stored backup computing units as a replacement and powers it on. The control unit sends attitude and orbit control information and time reference signals to the selected replacement computing unit. Simultaneously, the routing unit routes the load data originally sent to the faulty computing unit to the powered-on replacement computing unit. Based on the received load data, attitude and orbit control information, and time reference signals, the computing unit searches for and extracts the frame header signal of the load data. During the idle state of load data transmission, it synchronizes with the processing of other powered computing units, and all powered computing units return to a parallel and synchronized computing processing state.

[0014] If both the command count and the correct command count are detected to be abnormal, the control unit will report the early warning information to the corresponding calculation unit via telemetry. The higher-level equipment will then make a comprehensive judgment before taking any action.

[0015] If the processing progress and output results of the computing unit are abnormal, an early warning report will be sent for the computing unit with abnormal function.

[0016] Preferably, the handling of routing units with abnormal status includes: if the control unit detects abnormal health status information, current, or voltage of the currently operating primary routing unit, it autonomously performs a power-off operation on the routing unit, and then powers on the backup routing unit. At the same time, it reports the abnormal status of the primary routing unit and the primary / backup switching information through the primary bus, and simultaneously monitors the health status information of the backup routing unit. If the backup routing unit also shows abnormality, the control unit does not perform the autonomous switchover to the primary unit, but reports the abnormal status to the primary bus for arbitration and handling by the primary bus.

[0017] Preferably, the routing unit has the capability to receive payload data via a TLK2711 / CXP / fiber high-speed interface, an LVDS medium-speed interface, and an RS422 low-speed interface, and has an FPGA processing chip. The FPGA processing chip divides the multi-source payload data into several blocks and routes them to each computing unit through the multi-channel full-duplex GTH / GTX interface of the baseboard unit according to the agreed protocol format. It receives LVDS remote control signals from the control unit and the processing results from each computing unit, and outputs the combined processing results.

[0018] The routing unit is equipped with an antifuse FPGA and an external NOR FLASH, which are used for centralized storage and management of the unit's configuration program and processing parameters, as well as for periodic refresh and autonomous repair. It also receives LVDS uploading channel data from the control unit to realize uploading structure management of the routing unit.

[0019] Preferably, the computing unit adopts a high-performance hybrid heterogeneous, scalable, and reconfigurable on-orbit processing architecture, which is composed of an FPGA chip and any one of DSP, GPU, or CPU to form the processing core; the FPGA is capable of interconnecting with the main and backup routing units through the GTH or GTX interface of the baseboard unit to realize data flow interaction, and is capable of communicating with the main and backup control units for remote control, telemetry, and uploading channels through the point-to-point LVDS interface of the baseboard unit.

[0020] The computing unit is equipped with an antifuse FPGA and external NOR Flash and NAND Flash memory chips. The antifuse FPGA and external NOR Flash chips are used for EDAC management, maintenance, and autonomous repair of FPGA, CPU, and GPU programs, and store processing algorithm application programs. The computing unit FPGA receives LVDS serial signals from the control unit to realize remote control management of the computing unit. The antifuse FPGA receives LVDS uplink channel data from the control unit to realize uplink structure management of the computing unit. The NAND Flash memory chip is used to store key process and processing result data of the on-orbit processing algorithm.

[0021] Preferably, the control unit is an FPGA or FPGA+CPU architecture, adopting a minimum system design method. Both the FPGA and CPU adopt a heterogeneous backup method for storing and managing the configuration program. The heterogeneous backup method of the configuration program is to simultaneously store the PROM bit stream and the NOR Flash bit stream that can be updated by uploading.

[0022] The control unit adopts a two-level bus topology. The first-level bus communicates with external devices, and the second-level bus communicates with each unit within the system. The control unit communicates with the main and backup routing units and each computing unit through a point-to-point LVDS interface. It sends enable signals to the power supply unit to control the power supply of the corresponding power modules of the computing units or routing units. It collects the voltage and current of the main and backup routing units or computing units through AD.

[0023] A distributed high-performance spaceborne computing method includes:

[0024] After the control unit is powered on, it selects the routing unit master and the corresponding k computing units for power-on by default, according to the instructions of the space bus.

[0025] After the k computing units are powered on, they respectively load and run the processing algorithm application program and template parameter information of the processing algorithm stored in their respective antifuse FPGA external NOR Flash chips;

[0026] The routing unit receives external multi-source loads, divides the multi-source loads into k parts, and distributes them to the corresponding k powered computing units;

[0027] The computing unit performs calculations based on the processing algorithm and sends its own remote control command count, telemetry return count, temperature telemetry, processing progress, and operating status to the control unit.

[0028] The control unit monitors the operating current and voltage information of each computing unit in real time. Based on the real-time monitoring information and the health status information sent by each computing unit, it determines the status of each computing unit, performs hierarchical processing on computing units that are determined to be abnormal, and reports to the first-level bus.

[0029] Preferably, based on real-time monitoring information and health status information sent by each computing unit, the status of each computing unit is determined, and computing units determined to be abnormal are subjected to tiered processing. The tiered processing method is as follows:

[0030] If any of the voltage, current, or temperature exceeds the threshold range, the control unit immediately shuts down the corresponding computing unit, then selects another computing unit from the cross-backup computing units as a replacement and powers it on, sending attitude and orbit control and time reference signals to the selected computing unit; the computing unit searches for and extracts the frame header signal of the load data based on the received load data, attitude and orbit control information, and time reference signal, and synchronizes with the processing of other powered computing units when the load data is in an idle state, so that all powered computing units are back in a parallel synchronous computing processing state;

[0031] If both the remote control command count and the command execution correctness count are abnormal, the control unit will report the early warning information to the corresponding calculation unit via telemetry. The higher-level equipment will then make a comprehensive judgment before taking any action.

[0032] If the processing progress and output results of the computing unit are abnormal, an early warning report will be sent for the computing unit with abnormal function.

[0033] Preferably, if the control unit detects an abnormal health status information of the primary router, it autonomously performs a power-off operation on the primary router and then powers on the backup router. At the same time, it reports the abnormal status of the primary router and the primary / backup switch information through the primary bus, and monitors the health status information of the backup router. If the backup router also becomes abnormal, the control unit will not perform the autonomous switchover operation, but will only report the abnormal status to the primary bus for arbitration and handling.

[0034] Preferably, the health status information of the computing unit includes the configuration program loading status, the temperature of the core processing chip, the count of instructions received from the control unit, and the count of instructions executed correctly; the health status information of the routing unit includes the temperature of the core processing chip, the count of instructions received from the control unit and the count of instructions executed correctly, and the processing progress and output results received by the routing unit from each computing unit.

[0035] The advantages of this invention compared to the prior art are:

[0036] (1) This invention proposes a distributed high-performance spaceborne computing platform topology architecture with cross-cold backup of routing units and control units and cross-storage of computing units. The high computing power requirements of the platform are met through parallel computing of cross-storage, and flexible control switching of data flow, control flow and energy flow and autonomous health management are realized within the platform.

[0037] (2) This invention designs a two-level bus to realize the management of control flow and proposes a point-to-point LVDS remote control and telemetry and uploading structure channel between the control unit and the routing and computing unit, which can realize the rapid uploading and updating of processing programs, templates and parameters during normal processing business operation.

[0038] (3) The present invention designs a dedicated anti-fuse FPGA external NOR Flash chip to realize EDAC management, maintenance and autonomous repair of the FPGA / CPU / GPU program of this unit. It has the ability to store multiple processing algorithm application programs, and can also maintain multiple templates, parameters, coefficients and other information required for the corresponding processing algorithms.

[0039] (4) Based on the power-on / off status and health status of the routing or computing unit, the present invention designs a health management strategy to realize autonomous recovery and autonomous switching of the detected anomalies. Attached Figure Description

[0040] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings:

[0041] Figure 1 This is a structural diagram of the spaceborne distributed high-performance computing platform according to an embodiment of the present invention;

[0042] Figure 2 This is a schematic diagram of error correction and detection management according to an embodiment of the present invention;

[0043] Figure 3This is a topology diagram of the control flow bus for the remote control, telemetry, and injection channels in an embodiment of the present invention.

[0044] Figure 4 This is a topology diagram of the energy flow management system in an embodiment of the present invention;

[0045] Figure 5 This is a schematic diagram of the energy flow, control flow, and information flow of the platform system in an embodiment of the present invention;

[0046] Figure 6 This is a schematic diagram of the computing unit composition in an embodiment of the present invention. Detailed Implementation

[0047] Exemplary embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

[0048] A distributed high-performance spaceborne computing platform system includes a control unit, a routing unit, a computing unit, a power supply unit, and a baseboard unit. Control units A and B serve as cold backups for each other, routing units A and B also serve as cold backups for each other, and the n computing units are cross-backed up. The high computing power of the spaceborne computing platform is achieved by distributing and simultaneously operating k of the n computing units. Figure 1 As shown. The power supply unit receives primary power (+100V / +42V / +28V, etc.) from external devices, and performs functions such as filtering, surge protection, overcurrent protection, and undervoltage protection for the primary power supply. It also converts the primary power supply into secondary power required by various units within the system. The baseboard unit enables interconnection and interoperability of control flow, data flow, and energy flow between units. Data flows between routing and computing within the system are designed with cross-backup, as are information flows between control and routing / computing. The control unit independently controls and monitors the power supply to the secondary power supply of each unit on the computing platform.

[0049] The primary and backup routing units are interconnected with each computing unit via full-duplex GTH / GTX on the baseboard unit. The number of GTH / GTX channels can be selected as needed, and the protocol running on the GTH / GTX interface can be Aurora, SRIO, etc. The primary and backup control units, the primary and backup routing units, and each computing unit communicate via two independent point-to-point LVDS interfaces for remote control, telemetry, and upper-level structure management. Both the primary and backup control units output independent enable signals to control the power supply to the corresponding power modules of the primary and backup routing units and each computing unit. The enable signals from the primary and backup units are combined to control the power supply enable of the corresponding modules in the power units. The power modules receive secondary enable signals from the control units to achieve independent zoned power supply to the routing units and computing units. The baseboard unit enables interconnection and interoperability of information flow, control flow, and energy flow between the routing units, computing units, and control units. See [link to relevant documentation]. Figure 5 As shown.

[0050] 1) Control Unit

[0051] The control unit employs an FPGA or FPGA+CPU architecture with a two-level bus topology. The first-level bus, such as 1553B / SpaceWire / CAN, communicates with external devices, while the second-level bus communicates with other units within the system. The control unit adopts a minimum system design approach, with its FPGA / CPU using heterogeneous backup for storing and managing configuration programs. A PROM is used for storing the configuration program as a backup, and a read / write NOR Flash memory is used for uploading and updating.

[0052] The control unit not only communicates with the primary and backup routing units and various computing units via point-to-point LVDS for control flow, but also sends enable signals to control the power supply of the corresponding power modules in the computing or routing units. The control unit uses AD converters to collect voltage and current data from the routing or computing units and receives telemetry information from powered-on routing and computing units. The platform system's computing units operate in distributed parallel computing. During operation, the temperature, error correction and detection information, instruction count, telemetry count, voltage, and current of each computing unit generally remain within a fixed range under normal conditions. The control unit compares and monitors the status information of each computing unit in parallel processing in real time.

[0053] 2) Routing Unit

[0054] The routing unit possesses data receiving capabilities for high-speed interfaces such as TLK2711 / CXP / fiber optic interfaces, medium-speed LVDS interfaces, and low-speed RS422 interfaces. The core of the routing unit is an FPGA with multiple full-duplex GTH / GTX channels. The FPGA routes received external multi-source payload data to various computing units through the multi-channel full-duplex GTH / GTX interfaces of the baseboard unit according to a predetermined block size and a pre-defined protocol format. The routing unit FPGA can also receive LVDS remote control and telemetry signals from the control unit. Both the main and backup routing units have an antifuse FPGA and an external large-capacity NOR FLASH to centrally store and manage the unit's configuration program and processing parameters, as well as perform periodic refreshes and autonomous repairs. After the routing unit is powered on, the antifuse FPGA first loads the configuration program into the routing FPGA. Upon receiving a request from the routing FPGA, it transmits the corresponding processing parameters, templates, and other information to the routing FPGA. The routing unit's antifuse FPGA can receive LVDS uploading channel data from the control unit, enabling uploading structure management of the routing unit's internal software.

[0055] 3) Calculation unit

[0056] The computing unit adopts a high-performance, hybrid heterogeneous, scalable, and reconfigurable on-orbit processing architecture, with each unit possessing high computing power. The computing platform system design utilizes n computing units; k units selected from n can operate in parallel to meet on-orbit processing requirements, achieving cross-backup. The computing unit's processing core consists of an FPGA, DSP / GPU / CPU, etc. Its core processing FPGA can interconnect with the routing unit's primary and backup units via the high-speed GTH or GTX of the baseboard unit to achieve data flow interaction. It also has the capability to communicate with the control unit's primary and backup units via point-to-point LVDS of the baseboard unit for remote control, telemetry, and uploading channels. The computing unit's processing FPGA is externally connected to a large-capacity NAND Flash memory chip to store key process and processing result data of the on-orbit processing algorithm. Each computing unit has an antifuse FPGA and an external large-capacity NOR FLASH to centrally store, manage, periodically refresh, and autonomously repair the FPGA / DSP / GPU configuration programs and processing parameters of its unit. After the computing unit is powered on, the antifuse FPGA first loads the configuration program for the FPGA / DSP / GPU in a time-division multiplexing manner. Upon receiving a corresponding request, it transmits the relevant processing parameters, templates, and other information to the FPGA / DSP / GPU of the computing unit. The antifuse FPGA of the computing unit is capable of receiving LVDS uploading channel data from the control unit, realizing uploading structure management of related processing chip applications within the computing unit.

[0057] In this embodiment, the computing unit consists of one main processing FPGA, one coprocessor FPGA, one TI DSP and DDR cache, and one GPU. Figure 6 As shown. The main processing FPGA has an external large-capacity NAND Flash chip for storing user data and the board's parameter / template information. It can receive remote control information from the main and backup control units and return corresponding telemetry data to the control units. The main processing FPGA has multiple high-speed GTH / GTX interfaces. It achieves bidirectional communication with the FPGA of the routing unit through the GTH interconnected on the backplane. The main processing FPGA communicates with the coprocessor FPGA, DSP, and GPU through SRIO / PCIE / GTH interfaces. The processing chips in the computing unit can communicate with each other through high-speed interfaces such as SRIO / PCIE / GTH, as well as through low-speed signals such as GPIO and LVDS.

[0058] The upper structure management of the computing unit is implemented through an antifuse FPGA, which is capable of receiving upper structure channel information from the main and backup control units. The antifuse FPGA mainly implements functions such as loading, refreshing, on-orbit reconstruction, monitoring, and autonomous recovery of core digital processing devices such as SRAM-type FPGAs and DSPs.

[0059] 4) Power supply unit

[0060] The power supply unit is equipped to receive power-on or power-off enable signals sent by the main or backup control unit. The power supply unit can provide independent power to the main or backup routing unit or each computing unit, and perform power-on or power-off operations according to the enable signals.

[0061] 5) Computing platform health management strategy

[0062] The health status of the computing platform includes: the operating voltage and current of each unit, the configuration program loading status, the temperature of the core processing chip of the routing unit and computing unit, the count of primary bus commands received by the control unit and the count of correctly executed primary bus commands, the count of commands received by the routing unit and computing unit from the control unit and the count of correct commands, and the processing progress and output results received by the routing unit from each computing unit. The lower limit of the operating voltage threshold for each functional unit is 90% of the normal operating voltage, the upper limit of the operating voltage threshold for each functional module is 110% of the normal operating voltage, and the upper limit of the operating current threshold for each functional module is 110% of the normal operating current. The upper limit of the temperature threshold for the core processing chip of each functional unit is 90% of the highest rated temperature. Based on the monitored platform health status, the corresponding health management strategy is as follows:

[0063] Immediate Action: When the system is operating, if the voltage or current of the routing and computing unit exceeds a threshold range, or if the temperature of the core chip of the routing and computing unit exceeds a threshold range, the following actions will be taken: The voltage and current of the routing and computing unit are monitored in real time by the control unit, while the temperature of the core chip is independently collected by the unit and transmitted to the control unit via telemetry. If any of the above monitoring states become abnormal, the control unit will execute the appropriate action. The immediate action function can be enabled or disabled according to the specified requirements.

[0064] Telemetry Early Warning Reporting and Handling: The control unit counts the forwarding status of control commands, time broadcast reference signals, and attitude and orbit control information sent by the powered-on routing and computing units. The routing and computing units interpret the frame format and checksum of the received commands, time broadcasts, and attitude and orbit control information, and count the number of received commands and the number of correct commands. If the control unit detects more than three consecutive anomalies, it reports the early warning information via telemetry, and the higher-level equipment performs a comprehensive interpretation before taking further action.

[0065] Functional warning reporting and handling: Based on the broadcast information sent by the control unit, the routing unit can find out which of the n computing units are powered on and working, and route the load data to k computing units (k≤n, where n and k are both positive integers); Since the computing units are all distributed parallel computing, under a unified time base, the processing progress of each computing unit is basically consistent. Each computing unit returns the processing results to the routing unit in a certain frame format. The routing unit compares and analyzes the processing status of the k computing units within and between units, and reports warnings for computing units with abnormal functions.

[0066] 6) Autonomous replacement processing of computing platform

[0067] When the computing platform is powered on and operating under space radiation for an extended period, a failure in a routing or computing unit can lead to a decrease in the system's computing power. The computing platform performs autonomous replacement processing based on the monitored health status and the following strategy to ensure that the system's computing power does not decrease due to the failure and to enable the normal operation of remote sensing data processing under different algorithms in orbit.

[0068] (1) When the control unit detects abnormalities in the voltage, current, backup configuration program loading status, EDAC error correction and detection of the primary router unit, it autonomously performs a power-off operation on the primary router unit and then powers on the backup router unit. At the same time, it reports the abnormal status of the primary router unit and the router primary / backup switch information through the primary bus and monitors the health status information of the backup router unit. If the backup router unit also shows abnormalities, the control unit will no longer perform the autonomous switch to the primary router unit, but will only report the abnormal status to the primary bus for arbitration and handling by the primary bus.

[0069] (2) When the control unit detects abnormalities in the voltage, current, backup configuration program loading status, EDAC error correction and detection of a certain computing unit, it autonomously performs a power-off operation on the abnormal computing unit, and then selects one of the (nk) computing units to perform a power-on operation. At the same time, it reports the abnormal status of the computing unit and the computing unit switching information through the first-level bus, and monitors the health status information of the alternative computing units. If the alternative computing unit also shows abnormality, it selects another one from the (nk-1) computing units to perform a power-on operation, and reports the abnormal status to the first-level bus, and so on.

[0070] (3) During system operation, the routing unit receives external multi-source loads, divides them into k blocks according to a certain strategy, and routes these k blocks of data to k computing units. Each computing unit processes one load data block in parallel. The computing unit reports its instruction count, telemetry count, temperature telemetry, processing progress, and other information to the control unit. The control unit also monitors the operating current and voltage information of the computing units in real time. Based on its own monitoring and the status information reported by each computing unit, the control unit performs statistics on the status information of these k computing units and makes threshold judgments. It performs a power-off operation on computing units with obviously abnormal telemetry information or monitoring results and reports to the first-level bus.

[0071] (4) When the system is working, if a computing unit is detected to be abnormal, the control unit will handle it in a graded manner according to the voltage abnormality, current abnormality, temperature abnormality, function abnormality, telemetry count abnormality, etc. When any of the voltage, current, and temperature is significantly abnormal, the control unit will immediately power off the corresponding computing unit, and then select a computing unit from the backup computing units in the ring as a replacement and power it on; when the function, instruction count, and telemetry count are all abnormal, the control unit will send a telemetry warning report to the corresponding computing unit.

[0072] (5) After the control unit powers on the alternative computing unit, it sends attitude control and time reference signals to the alternative computing board. After receiving the load data and attitude control and time reference signals, the computing unit searches for and extracts the frame header signal of the load data. When the load data is in the idle state, it synchronizes with the processing process of other computing boards. Thus, each of the k computing units is back in the parallel synchronous computing processing state.

[0073] A design method for a distributed high-performance spaceborne computing platform system includes the following processing steps:

[0074] (1) After the control unit is powered on, it selects the main routing unit and the corresponding "k out of n" computing units for power-on according to the instructions from the Star1553B, SpaceWire, or CAN bus. After the corresponding routing unit and computing unit are powered on, they load and run the processing algorithm application stored in the NOR Flash chip attached to the antifuse FPGA of their respective units. The templates, parameters, and other information required for the processing algorithm are also loaded. The configuration and loaded program and algorithm template parameters are managed by the antifuse FPGA of the routing unit and computing unit itself for error correction and monitoring. The loading results of the application and the correctness of the template parameters are also monitored. If the application loading fails or the parameter template information exceeds the error correction capability of the EDAC, it automatically switches to the backup storage space of the NOR Flash chip attached to the antifuse FPGA of this unit for reconfiguration and loading. The routing unit or computing unit reports this information to the control unit through its own antifuse FPGA.

[0075] (2) When the control unit detects abnormalities in the voltage, current, backup configuration program loading status, EDAC error correction and detection of the primary router unit, it autonomously performs a power-off operation on the primary router unit and then powers on the backup router unit. At the same time, it reports the abnormal status of the primary router unit and the router primary / backup switch information through the primary bus and monitors the health status information of the backup router unit. If the backup router unit also shows abnormalities, the control unit will no longer perform the autonomous switch to the primary router unit, but will only report the abnormal status to the primary bus for arbitration and handling by the primary bus.

[0076] (3) When the control unit detects that the voltage, current, backup configuration program loading status, EDAC error correction and detection information of a certain computing unit is abnormal, it will automatically perform a power-off operation on the abnormal computing unit, and then select another computing unit from (nk) computing units to perform a power-on operation. At the same time, it will report the abnormal status of the computing unit and the computing unit switching information through the first-level bus, and monitor the health status information of the alternative computing units. If the alternative computing unit is also abnormal, it will select another computing unit from (nk-1) computing units to perform a power-on operation, and report the abnormal status to the first-level bus, and so on.

[0077] (4) During system operation, the routing unit receives external multi-source loads, divides them into k blocks according to a certain strategy, and routes these k blocks of data to "k out of n" computing units. Each computing unit processes one load data block in parallel. The computing unit reports its instruction count, telemetry count, temperature telemetry, processing progress, and other information to the control unit. The control unit also monitors the operating current and voltage information of the computing units in real time. Based on its own monitoring and the status information reported by each computing unit, the control unit performs statistics on the status information of these k computing units and makes threshold judgments. It performs a power-off operation on computing units with obviously abnormal telemetry information or monitoring results and reports to the first-level bus.

[0078] (5) When the system is working, if a computing unit is detected to be abnormal, the control unit will handle it in a graded manner according to the voltage abnormality, current abnormality, temperature abnormality, function abnormality, telemetry count abnormality, etc. When any of the voltage, current, and temperature is significantly abnormal, the control unit will immediately power off the corresponding computing unit, and then select a computing unit from the backup computing units in the ring as a replacement and power it on; when the function, instruction count, and telemetry count are all abnormal, the control unit will send a telemetry warning report to the corresponding computing unit.

[0079] (6) After the control unit powers on the alternative computing unit, it sends attitude control and time reference signals to the alternative computing board. After receiving the load data and attitude control and time reference signals, the computing unit searches for and extracts the frame header signal of the load data. When the load data is in the idle state, it synchronizes with the processing process of other computing boards. Thus, the k computing units are back in the parallel synchronous computing processing state.

[0080] In steps (2) and (3), the routing unit and computing unit are generally composed of FPGA, DSP, GPU, etc., and the loading configuration level standards differ between different series of chip models. The conventional approach is to use level conversion chips to achieve the conversion between different levels. However, level conversion chips require a large layout area and are costly, thus limiting their use. This patent uses an antifuse FPGA to store and manage the configuration programs of different models of processing chips in the routing and computing units, and utilizes the configurable levels of different banks of the FPGA to achieve compatibility management of multiple level standards. At the same time, the antifuse FPGA uses a large-capacity NOR Flash to store and manage the processing chip configuration programs, and has flexible read, write, and erase management according to chip, substrate, sector, etc. The configuration program data is EDAC encoded before being written to the NOR Flash storage medium, and then the data and encoded information are written to the storage medium simultaneously; during playback, the data and encoded information are read out and then decoded to obtain the error-corrected recovery data. See [link to relevant documentation]. Figure 2 As shown.

[0081] In steps (2) and (3), the control unit, main / backup unit, routing unit, and computing unit communicate via independent point-to-point LVDS signal pairs for remote control, telemetry, and uploading of structural information. The system's remote control, telemetry, and uploading of structural information can communicate with external devices not only through primary buses such as 1553B / SpaceWire / CAN, but also through a dedicated RS422 interface to upload program, parameter, and template information. The remote control, telemetry, and uploading channels within the system platform are completely independent. The control unit can upload and update programs, templates, and parameters during the normal operation of the routing unit or computing unit. See [link to relevant documentation]. Figure 3 As shown.

[0082] In steps (2) and (3), the control unit, both the primary and backup units, output independent enable signals to control the power supply to the primary and backup routing units and the corresponding power modules of each computing unit. The enable signals from the primary and backup units are then combined to control the power supply enable of the corresponding modules in the power units. Thus, either the primary or backup control unit can control the power supply to the corresponding modules on each power board. The control unit collects the secondary voltage and current of the power supply modules to the routing and computing units in real time, and performs health status monitoring based on a certain adjustable threshold range. (See [link to relevant documentation]). Figure 4 As shown.

[0083] The embodiments described above are merely preferred embodiments of the present invention. Ordinary variations and substitutions made by those skilled in the art within the scope of the technical solution of the present invention should be included within the protection scope of the present invention.

Claims

1. A distributed high-performance spaceborne computing platform system, characterized in that, It includes two control units that are cold backups of each other, two routing units that are cold backups of each other, multiple cross-backup computing units, power supply units, and backplane units; The routing unit receives multi-source payload data, processes the payload data into blocks, distributes them to the computing units specified by the control unit, and transmits its own health status information to the control unit. The power supply unit includes several power modules, each of which has an independent power control function to turn the routing unit or computing unit on and off. The control unit receives indirect instructions, attitude and orbit control information, and second pulse signals sent by the satellite bus, synchronizes the time base, forwards them to the routing unit and computing unit in the form of broadcast, and monitors the current and voltage information of the routing unit and computing unit in operation. It then combines the received health status information of the routing unit and computing unit to determine the health status of the corresponding routing unit and computing unit, and performs autonomous replacement of routing units and computing units with abnormal status. The computing unit receives payload data and broadcast information, performs distributed parallel processing, and transmits its own health status information to the control unit. The base plate unit is equipped with multiple data channels, including a full-duplex GTH or GTX interface, a point-to-point LVDS interface, and a secondary power supply interface, to realize the interconnection of information flow, control flow, and energy flow between the routing unit, computing unit, and control unit. The computational units exhibiting abnormal states are processed in a hierarchical manner, including: If any of the voltage, current, or temperature exceeds the threshold range, the control unit immediately shuts down the corresponding computing unit, then selects a computing unit from the cross-backup computing units as a replacement and powers it on. The control unit sends attitude and orbit control information and a time reference signal to the selected replacement computing unit. Simultaneously, the routing unit routes the load data originally sent to the malfunctioning computing unit to the powered-on replacement computing unit. Based on the received load data, attitude and orbit control information, and time reference signal, the computing unit searches for and extracts the frame header signal of the load data. When the load data transmission is idle, it synchronizes with the processing of other powered computing units, and all powered computing units return to a parallel and synchronized computing state. If both the command count and the correct command count are detected to be abnormal, the control unit will report the early warning information to the corresponding calculation unit via telemetry. The higher-level equipment will then make a comprehensive judgment before taking any action. If the processing progress and output results of the computing unit are abnormal, an early warning report will be sent for the computing unit with abnormal function.

2. The distributed high-computing-power spaceborne computing platform system according to claim 1, characterized in that, The handling of routing units with abnormal status includes: if the control unit detects abnormal health status information, current, or voltage of the currently operating primary routing unit, it autonomously performs a power-off operation on the routing unit, and then powers on the backup routing unit. At the same time, it reports the abnormal status of the primary routing unit and the primary / backup switching information through the primary bus, and simultaneously monitors the health status information of the backup routing unit. If the backup routing unit also shows abnormality, the control unit will not perform the autonomous switchover to the primary unit, but will report the abnormal status to the primary bus for arbitration and handling.

3. The distributed high-computing-power spaceborne computing platform system according to claim 1, characterized in that, The routing unit has the capability to receive payload data via TLK2711 / CXP / fiber high-speed interface, LVDS medium-speed interface, and RS422 low-speed interface, and has an FPGA processing chip. The FPGA processing chip divides the multi-source payload data into several blocks and routes them to each computing unit through the multi-channel full-duplex GTH / GTX interface of the baseboard unit according to the agreed protocol format. It receives LVDS remote control signals from the control unit and the processing results from each computing unit, and outputs the processed results after combining them. The routing unit is equipped with an antifuse FPGA and an external NOR FLASH, which are used to centrally store and manage the configuration program and processing parameters of the unit, refresh them periodically, perform autonomous repairs, and receive LVDS uploading channel data from the control unit to realize uploading structure management of the routing unit.

4. The distributed high-computing-power spaceborne computing platform system according to claim 1, characterized in that, The computing unit adopts a high-performance hybrid heterogeneous, scalable, and reconfigurable on-orbit processing architecture, which is composed of an FPGA chip and any one of DSP, GPU, or CPU to form the processing core. The FPGA is capable of interconnecting with the main and backup routing units through the GTH or GTX interface of the baseboard unit to realize data flow interaction, and is capable of communicating with the main and backup control units for remote control, telemetry, and uploading channels through the point-to-point LVDS interface of the baseboard unit. The computing unit is equipped with an antifuse FPGA and external NOR Flash and NAND Flash memory chips. The antifuse FPGA and external NOR Flash chips are used for EDAC management, maintenance and autonomous repair of FPGA, CPU and GPU programs, and store processing algorithm application programs. The antifuse FPGA receives LVDS serial signals from the control unit to realize remote control management of the computing unit. The antifuse FPGA receives LVDS uploading channel data from the control unit to realize uploading structure management of the computing unit; the NAND Flash memory chip is used to store key process and processing result data of the on-orbit processing algorithm.

5. The distributed high-computing-power spaceborne computing platform system according to claim 1, characterized in that, The control unit is an FPGA or FPGA+CPU architecture, using a minimum system design method. Both the FPGA and CPU adopt a heterogeneous backup method for storing and managing the configuration program. The heterogeneous backup method of the configuration program uses both PROM drop-on storage bit stream and NOR Flash storage bit stream that can be uploaded and updated. The control unit adopts a two-level bus topology, with the first-level bus communicating with external devices and the second-level bus communicating with each unit within the system. The control unit communicates with the primary and backup routing units and each computing unit via a point-to-point LVDS interface, sends an enable signal to the power supply unit to control the power supply of the corresponding power modules of the computing unit or routing unit, and collects the voltage and current of the primary and backup routing units or computing units.

6. A distributed high-performance spaceborne computing method, the method being implemented based on the computing platform system described in any one of claims 1 to 5, characterized in that, include: After the control unit is powered on, it selects the main routing unit and its corresponding routing unit by default, according to the instructions from the space bus. k Each computing unit is powered on; k After each computing unit is powered on, it loads and runs the processing algorithm application program and template parameter information of the processing algorithm stored in its respective antifuse FPGA external NOR Flash chip; The routing unit receives external multi-source payloads and divides them into... k Distribute to the corresponding k Each powered computing unit; The computing unit performs calculations based on the processing algorithm and sends its own remote control command count, telemetry return count, temperature telemetry, processing progress, and operating status to the control unit. The control unit monitors the operating current and voltage information of each computing unit in real time. Based on the real-time monitoring information and the health status information sent by each computing unit, it determines the status of each computing unit, performs hierarchical processing on computing units that are determined to be abnormal, and reports to the first-level bus.

7. The distributed high-computing-power spaceborne computing method according to claim 6, characterized in that, Based on real-time monitoring information and health status information sent by each computing unit, the status of each computing unit is determined. Computing units deemed abnormal are then subject to tiered processing. The tiered processing method is as follows: If any of the voltage, current, or temperature exceeds the threshold range, the control unit immediately shuts down the corresponding computing unit, then selects another computing unit from the cross-backup computing units as a replacement and powers it on, sending attitude and orbit control and time reference signals to the selected computing unit; the computing unit searches for and extracts the frame header signal of the load data based on the received load data, attitude and orbit control information, and time reference signal, and synchronizes with the processing of other powered computing units when the load data transmission is idle, and all powered computing units are back in a parallel synchronous computing processing state; If both the remote control command count and the command execution correctness count are abnormal, the control unit will report the early warning information to the corresponding calculation unit via telemetry. The higher-level equipment will then make a comprehensive judgment before taking any action. If the processing progress and output results of the computing unit are abnormal, an early warning report will be sent for the computing unit with abnormal function.

8. The distributed high-computing-power spaceborne computing method according to claim 6, characterized in that, If the control unit detects an abnormal health status of the primary router, it will automatically power off the primary router and power on the backup router. At the same time, it will report the abnormal status of the primary router and the primary / backup switch information through the primary bus, and monitor the health status of the backup router. If the backup routing unit also fails, the control unit will no longer perform the autonomous switchover to the primary unit, but will only report the abnormal status to the primary bus for arbitration and handling.

9. A distributed high-computing-power spaceborne computing method according to claim 6, characterized in that, The health status information of the computing unit includes the configuration program loading status, the temperature of the core processing chip, the count of instructions received from the control unit, and the count of instructions executed correctly; the health status information of the routing unit includes the temperature of the core processing chip, the count of instructions received from the control unit and the count of instructions executed correctly, and the processing status and output results of each computing unit received by the routing unit.

Images