Power consumption and long line sensitive power shutdown design physical implementation method and system

CN117521585BActive Publication Date: 2026-10-30NAT UNIV OF DEFENSE TECH
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Patent Information

Application Number
CN202311449893.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-11-02
Publication Date
2026-10-30
Estimated Expiration
2043-11-02

AI Technical Summary

Technical Problem

在超大规模集成电路设计中,设计频率随着集成电路设计片上频率、集成度的上升与集成电路设计规模的扩大,为保证电源关断功能的稳定与满足设计对电压降的要求,实现电源关断功能可能会插入更多的电源关断单元,从而导致带电源关断设计中长线、长链的出现概率提升

Benefits of technology

[0015]和现有技术相比,本发明具有下述优点:现有电源关断的物理实现流程通常是单链的、分布均匀的,且不会在布局布线之前考虑电源关断链对时序、布线以及功耗的影响的。在高度集成的、大规模的、对长线与功耗敏感的设计中,常规的电源关断的物理实现往往会导致时序、功耗的恶化或是版图设计规则违反,增大了后续工作量,从而严重影响设计进度。本发明所提出的电源关断设计的物理实现方法能够在布局布线之前便针对长线、功耗等问题进行提前优化,从而在设计伊始便有意识地去规避传统电源关断流程所带来的一系列潜在问题,可以极大程度改善电源关断设计对布局布线的干扰,也可在大面积的电源域中摆放更多的电源关断单元而不对后续时序验证产生影响,从而减少布局布线后功能工程翻新(Engineering Change Order, ECO)的工作量。

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Abstract

The application discloses a physical implementation method and system of a power consumption and long line sensitive power-off design, and comprises the following steps: dividing a unified power consumption format file of a physical design into power domains; planning the use of a power-off chain and a power-off unit; performing physical implementation of standard unit power-off and hard macro unit power-off in a power-off domain; if there is a super-long or cross-power-domain logic connection line, returning to adjust the power-off chain and the power-off unit; planning and generating a power grid, performing power coverage checking, low power consumption checking and consistency checking, and if the checking fails, returning to adjust the power-off chain and the power-off unit; performing layout and wiring operation and generating a physical design state; performing power consumption and timing checking on the physical design state, and if the checking fails, returning to adjust the power-off chain and the power-off unit; otherwise, ending and exiting. The application aims to realize the power-off function while reducing the long lines related to power-off in the design and the power consumption problem caused by the power-off design.
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Description

Technical Field

[0001] This invention belongs to the field of low-power optimization technology for physical design in integrated circuit physical design, specifically involving a physical implementation method and system for power-power and long-line sensitive power-off design. Background Technology

[0002] Since the advent of CMOS integrated circuit technology, the integration density and complexity of integrated circuits and chips have increased exponentially, leading to increasingly complex physical designs. Simultaneously, with the continuous increase in integrated circuit integration density, the power wall problem has become increasingly prominent, making power optimization more crucial for physical design, and the application of power-off technology has become a major trend. In VLSI design, as the design frequency, on-chip frequency, integration density, and design scale increase, to ensure the stability of the power-off function and meet the design's voltage drop requirements, implementing the power-off function may require inserting more power-off units, thus increasing the probability of long traces and long chains in power-off designs. For high-performance designs, the long traces resulting from power-off design may lead to local winding resource congestion, causing timing violations, layout design rule violations, and other problems. As the integration density, area, and on-chip frequency of integrated circuits increase, the problems caused by these phenomena become increasingly severe, bringing greater workload to subsequent Engineering Change Order (ECO) work. On the other hand, since mainstream static timing analysis tools (such as Prime Time) have limitations on the number of stages of a path, an excessively long power-off chain may also cause problems in subsequent timing analysis.

[0003] Current power-off technologies focus more on device-level performance or functional optimization, with little attention paid to the issues mentioned above. How to design power-off without affecting wiring or incurring additional power consumption has become a major challenge in the field of integrated circuit physical design. Summary of the Invention

[0004] The technical problem to be solved by this invention is to provide a physical implementation method and system for power shutdown design that is sensitive to power consumption and long-line power supply, in response to the above-mentioned problems in the prior art. This invention aims to provide a standardized design process that enables the rational planning of the power domain, the rational placement of the power shutdown chain, and the rational arrangement of the power grid, thereby reducing the long lines related to shutdown and the power consumption problems introduced by the shutdown design while realizing the power shutdown function.

[0005] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is as follows: A physical implementation method for a power-power- and long-line-sensitive power-off design includes: S101 divides the power domain into the unified power consumption format file of the physical design to obtain the power off domain and the power normally on domain. S102, Plan the use of power shutdown chain and shutdown unit according to the area size of power shutdown domain; S103, performs the physical implementation of turning off the standard cell in the power-off domain; S104 executes the physical implementation of turning off hard macrocells in the power-off domain; S105, check whether the placed power shutdown chain has excessively long or cross-power domain logic connection lines. If it does, jump to step S102 to adjust the usage plan of the power shutdown chain and shutdown unit; otherwise, jump to step S106. S106, Performs power grid planning and generation; S107, Perform power coverage check, low power check and consistency check on the power grid. If the check fails, jump to step S102 to adjust the power shutdown chain and shutdown unit usage plan; otherwise, jump to step S108. S108, Perform placement and routing operations on the design and generate the physical design state after placement and routing; S109, perform power consumption and timing checks on the physical design state. If the check fails, jump to step S102 to adjust the power shutdown chain and the usage plan of the shutdown unit; otherwise, determine that the power shutdown design is finished.

[0006] Optionally, when planning the use of the power shutdown chain and shutdown unit in step S102, the planning of the power shutdown chain includes: S201, Randomly select a shutdown unit from the shutdown unit library as the current shutdown unit; S202, determine the size of the radiation range of the shutdown unit; S203, determine the number of power shutdown chains n based on the area of ​​the power shutdown domain, the radiation range of the shutdown unit, and the maximum number of units in the timing path in the timing analysis tool. S204. Based on the relative positional relationship between the input / output ports of the power-off control signal and the power-off domain, divide n power-off chains psc_1~psc_n into n power-off subdomain regions psc_s1~ps_sn that need to be managed. S205, if there are n pairs of input / output ports for power-off control signals in the design netlist of the physical design, then n power-off rules ps_1 to ps_n are directly created in the unified power consumption format file of the physical design, and the input / output ports of the i-th pair of power-off control signals are used to control the power-off subdomain region ps_si based on the i-th power-off rule ps_i; if there is only one pair of input / output ports for power-off control signals in the design netlist of the physical design, then the input / output ports of the pair of power-off control signals are expanded using input / output buffers to create n power-off rules ps_1 to ps_n in the unified power consumption format file of the physical design, and the input / output ports of the i-th pair of power-off control signals obtained after expansion are used to control the power-off subdomain region ps_si based on the i-th power-off rule ps_i; S206 defines the placement rules for n power off chains in the unified power consumption format file of the physical design; S207, Write the executable file and use the placement and routing tool to create n power shutdown chains.

[0007] Optionally, when determining the radiation range of the shutdown unit in step S202, if it is the first time to determine the radiation range of the shutdown unit, the preset initial value is used as the radiation range of the shutdown unit; otherwise, the original radiation range of the shutdown unit is adjusted and used as the new radiation range of the current shutdown unit.

[0008] Optionally, the functional expression for determining the number of power-off chains in step S203 is: n = roundup( (Area_ps / Area_sw) / Maxmum_path), In the above formula, n represents the number of power-off chains, n≥1; roundup means rounding up. Area_ps is the area size of the power-off domain, Area_sw is the radiation range of the power-off cell, and Maximum_path is the maximum number of cells in the timing path in the timing analysis tool.

[0009] Optionally, in step S205, based on the input / output ports of the pair of power-off control signals, input / output buffers are used to expand n power-off rules ps_1 to ps_n in the unified power consumption format file of the physical design. The input / output ports of the i-th pair of power-off control signals obtained after expansion are used to control the power-off subdomain region ps_si based on the i-th power-off rule ps_i, including: S301, insert n input / output buffers iobufin_1 to inbufin_n near the input port of the power-off control signal, and connect the input interfaces of the n input / output buffers iobufin_1 to inbufin_n to the input port of the power-off control signal; insert n+1 input / output buffers iobufout_0 to iobufout_n near the output port of the power-off control signal, and connect the output interfaces of the input / output buffers iobufout_1 to iobufout_n to the input interface of the input / output buffer iobufout_0 through n AND gates; finally, connect the output interface of the input / output buffer iobufout_0 to the output port of the power-off control signal. S302, create n power-off rules ps_1 to ps_n in the unified power consumption format file. The control signal input interface of power-off rule ps_1 is connected to the output interface of input / output buffer iobufin_1, the control signal return interface of ps_1 is connected to the input interface of input / output buffer iobufout_1, and so on. The control signal input interface of ps_n is connected to the output interface of input / output buffer iobufin_n, and the control signal return interface of ps_n is connected to the input interface of input / output buffer iobufout_n.

[0010] Optionally, after step S207, long-term avoidance optimization is also included: S301, determine whether there is mutual interference between the positional relationship of the power domain, the power-off control signal input / output port and the hard macro unit. If there is no mutual interference, proceed to step S303; otherwise, proceed to step S302. S302, select a coordinate that is closest to the input / output port of the power-off control signal and whose distance from the boundary of the power-off domain is greater than a specified multiple of the length of the shutdown unit. Using this coordinate as the starting point, place the main power-off chain psc_main in the region where the positional relationship between the power domain, the input / output port of the power-off control signal, and the hard macro unit is least affected by mutual interference. Place a power-off chain psc_area separately in the region where the main power-off chain psc_main is not placed. Connect the control signal transmission line of the power-off chain psc_area to the control signal transmission line of the power-off chain psc_main. S303, for the power shutdown chain at the corner of the power shutdown domain, by adjusting the spacing or starting point of the power shutdown chain at the corner of the power shutdown domain, or by splitting the power shutdown chain at the corner of the power shutdown domain, so that the power shutdown chain at the corner of the power shutdown domain is not connected by two columns of power shutdown chains at the corner.

[0011] Optionally, the planning and generation of the power grid in step S106 includes: S401, generate a power grid for the normally open power domain to obtain the top-level power grid and bottom-level power grid of the normally open power domain; generate a top-level power grid for the normally open power domain, the top-level power grid covers the power-off cells to supply power to the power-off cells; generate a bottom-level power grid for the standard cell area of ​​the power-off domain, the bottom-level power grid of the power-off domain cannot be connected to the bottom-level power grid of the normally open power domain. S402, Determine whether there are hard macro cells in the power off domain. If there are hard macro cells in the power off domain, generate a power grid for the hard macro cells to meet the power supply requirements of the hard macro cells.

[0012] Optionally, performing a power coverage check on the power grid in step S107 means determining whether there is a connection between the underlying power supply in the normally open power supply domain and the power off power supply domain, or whether the power off chain is not covered by the normally open power supply. If it is true, the power coverage check is determined to fail. Otherwise, the power coverage check is determined to pass.

[0013] Furthermore, the present invention also provides a physical implementation system for a power consumption and long-line sensitive power shutdown design, including an interconnected microprocessor and a memory, wherein the microprocessor is programmed or configured to execute the physical implementation method of the power consumption and long-line sensitive power shutdown design.

[0014] Furthermore, the present invention also provides a computer-readable storage medium storing a computer program for being programmed or configured by a microprocessor to perform a physical implementation method of the power consumption and long-line sensitive power-off design.

[0015] Compared with existing technologies, this invention has the following advantages: Existing physical implementations of power-off are typically single-chain and uniformly distributed, and do not consider the impact of the power-off chain on timing, routing, and power consumption before placement and routing. In highly integrated, large-scale designs sensitive to long traces and power consumption, conventional physical implementations of power-off often lead to timing and power degradation or violations of layout design rules, increasing subsequent workload and severely impacting design progress. The physical implementation method for power-off design proposed in this invention can optimize for long traces and power consumption issues before placement and routing, thus consciously avoiding a series of potential problems caused by traditional power-off processes from the outset. This can greatly reduce the interference of power-off design on placement and routing, and allows for the placement of more power-off units in a large power domain without affecting subsequent timing verification, thereby reducing the workload of post-placement engineering change order (ECO). Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the basic process of the method in an embodiment of the present invention.

[0017] Figure 2 This is a schematic diagram of the power shutdown chain planning process in an embodiment of the present invention. Detailed Implementation

[0018] like Figure 1 As shown, the physical implementation method of the power consumption and long-term sensitive power-off design in this embodiment includes: S101 divides the power domain into the unified power consumption format file of the physical design to obtain the power off domain and the power normally on domain. S102, Plan the use of power shutdown chain and shutdown unit according to the area size of power shutdown domain; S103, performs the physical implementation of turning off the standard cell in the power-off domain; S104 executes the physical implementation of turning off hard macrocells in the power-off domain; S105, check whether the completed power shutdown chain has excessively long or cross-power domain logic connection lines (such as cross-corner connection relationships in the corner area of ​​the power domain). If it is true, jump to step S102 to adjust the usage plan of the power shutdown chain and shutdown unit; otherwise, jump to step S106. S106, performs power grid planning and generation; S107, Perform power coverage check, low power check and consistency check on the power grid. If the check fails, jump to step S102 to adjust the power shutdown chain and shutdown unit usage plan; otherwise, jump to step S108. S108, Perform placement and routing operations on the design and generate the physical design state after placement and routing; S109, perform power consumption and timing checks on the physical design state. If the check fails, jump to step S102 to adjust the power shutdown chain and the usage plan of the shutdown unit; otherwise, determine that the power shutdown design is finished.

[0019] Step S101 is used to divide the power domain of the Unified Power Format (UPF) file of the physical design into a power-off domain and a power-on domain. By reading the Unified Power Format (UPF) file of the physical design, the design intent of the power-off can be understood, and the power-off domain psd_0 and the power-on domain pad_0 can be divided according to the specific floor plan of the design.

[0020] Step S102 is used to rationally plan the use of the power shutdown chain and shutdown unit. For example... Figure 2 As shown, in step S102 of this embodiment, when planning the use of the power shutdown chain and the shutdown unit, the planning of the power shutdown chain includes: S201, Randomly select a shutdown unit from the shutdown unit library as the current shutdown unit; S202, determine the size of the radiation range of the shutdown unit; S203, determine the number n of power shutdown chains based on the area of ​​the power shutdown domain psd_0, the radiation range of the shutdown unit, and the maximum number of units in the timing path in the timing analysis tool; in this embodiment, assume n=2.

[0021] S204. Based on the relative positional relationship between the input / output ports of the power-off control signal and the power-off domain psd_0, divide n power-off chains psc_1 to psc_n into n power-off subdomain regions ps_s1 to ps_sn that need to be managed. S205, if the physical design netlist contains n pairs of input / output ports for power-off control signals, then directly create n power-off rules ps_1 to ps_n in the unified power consumption format file of the physical design, and control the power-off subdomain ps_si based on the i-th pair of power-off control signal input / output ports according to the i-th power-off rule ps_i; if the physical design netlist contains only one pair of power-off control signal input / output ports, then expand the input / output ports of this pair of power-off control signals using input / output buffers to achieve the same effect in the physical design. A unified power consumption format file creates n power-off rules ps_1 to ps_n. The input and output ports of the i-th pair of power-off control signals obtained after expansion are used to control the power-off subdomain region ps_si based on the i-th power-off rule ps_i. In this embodiment, according to the relative positional relationship between the power-off control signal input and output ports port_ps_i, port_ps_o and the power-off domain psd_0, the power-off chains psc_1 and psc_2 are divided into power-off subdomain regions psd_0_s1 and psd_0_s2 that need to be managed by the power-off chains psc_1 and psc_2, respectively. S206, define the placement rules for n power shutdown chains in the unified power consumption format file of the physical design; in this embodiment, n power shutdown chains refer to power shutdown chains chain1 and chain2. Therefore, the rules for placing power shutdown chains chain1 and chain2 to be placed are defined in the unified power consumption format file of the physical design (denoted as upf_0), specifically including: power domain name, power shutdown input and output signal connection, top-level / bottom-level power connection, etc. S207, Write the executable file and use the place-and-route tool to create n power shutdown chains. Specifically, in this embodiment, the executable file add_power_switch.tcl is written to create power shutdown chains chain1 and chain2 in the place-and-route tool. The script contains information including: applicable power rules, power shutdown chain placement area, cell spacing, power shutdown chain spacing, top / bottom power connections, etc.

[0022] In this embodiment, when determining the radiation range of the shutdown unit in step S202, if it is the first time the radiation range of the shutdown unit is determined, the preset initial value is used as the radiation range of the shutdown unit; otherwise, the original radiation range of the shutdown unit is adjusted and used as the new radiation range of the current shutdown unit.

[0023] In this embodiment, the functional expression for determining the number of power shutdown chains in step S203 is: n = roundup( (Area_ps / Area_sw) / Maxmum_path), In the above formula, n represents the number of power-off chains, n≥1; roundup means rounding up. Area_ps is the area size of the power-off domain psd_0, Area_sw is the radiation range of the power-off cell, and Maximum_path is the maximum number of cells in the timing path in the timing analysis tool.

[0024] In this embodiment, step S205 involves expanding the input / output ports of the power-off control signals using input / output buffers to create n power-off rules ps_1 to ps_n in the unified power consumption format file of the physical design. Controlling the power-off subdomain ps_si based on the i-th pair of power-off control signals obtained after expansion using the i-th power-off rule ps_i includes: S301, insert n input / output buffers iobufin_1 to inbufin_n near the input port of the power-off control signal, and connect the input interfaces of the n input / output buffers iobufin_1 to inbufin_n to the input port of the power-off control signal; insert n+1 input / output buffers iobufout_0 to iobufout_n near the output port of the power-off control signal, and connect the output interfaces of the input / output buffers iobufout_1 to iobufout_n to the input interface of the input / output buffer iobufout_0 through n AND gates; finally, connect the output interface of the input / output buffer iobufout_0 to the output port of the power-off control signal. S302, create n power-off rules ps_1 to ps_n in the unified power consumption format file. The control signal input interface of power-off rule ps_1 is connected to the output interface iobufin_1 / Z of input / output buffer iobufin_1, and the control signal return interface of ps_1 is connected to the input interface iobufout_1 / I of input / output buffer iobufout_1. Similarly, the control signal input interface of ps_n is connected to the output interface iobufin_n / Z of input / output buffer iobufin_n, and the control signal return interface of ps_n is connected to the input interface iobufout_n / I of input / output buffer iobufout_n.

[0025] Arranging power shutdown chains in the power threshold corner region can easily result in long lines crossing the corner. When the long line exceeds a certain threshold, the check in step S105 or step S107 will fail and the process will return to step S102. Considering this situation, this embodiment includes long line avoidance optimization after step S207: S301, determine whether there is mutual interference between the positional relationship of the power domain, the power-off control signal input / output port and the hard macro unit. If there is no mutual interference, proceed to step S303; otherwise, proceed to step S302. S302, select a coordinate that is closest to the input / output port of the power-off control signal and whose distance from the boundary of the power-off domain psd_0 is greater than a specified value (greater than 1, and in this embodiment, the value is 1.5) times the length of the shutdown unit. Using this coordinate as the starting point, place the main power-off chain psc_main in the region where the positional relationship between the power domain, the input / output port of the power-off control signal, and the hard macro unit is least affected by mutual interference. Place a power-off chain psc_area separately in the region where the main power-off chain psc_main is not placed. Connect the control signal transmission line of the power-off chain psc_area to the control signal transmission line of the power-off chain psc_main. S303, for the power shutdown chain at the corner of the power shutdown domain psd_0, by adjusting the spacing or starting point of the power shutdown chain at the corner of the power shutdown domain psd_0, or by splitting the power shutdown chain at the corner of the power shutdown domain psd_0, so that the power shutdown chain at the corner of the power shutdown domain psd_0 is not connected by two columns of power shutdown chains at the corner.

[0026] In this embodiment, when performing the physical implementation of standard cell shutdown in the power shutdown domain psd_0 in step S103, it includes running the executable file add_power_switch.tcl in the physical design state db_init after initialization and placement of basic physical units (such as welltap, endcap, etc.) to complete the placement of the power shutdown chain in the power shutdown domain psd_0.

[0027] In this embodiment, the physical implementation of turning off the hard macro cell in the power shutdown domain in step S104 includes: connecting the power enable port of the hard macro cell in the power shutdown domain to the power shutdown signal transmission line of the power shutdown chain. It is important to note whether the effective level of the power enable port of the hard macro cell is the same as the effective level of the power shutdown signal of the power shutdown chain. If they are not the same, an inverter needs to be inserted in front of the power enable port of the hard macro cell.

[0028] When planning and generating the power grid in step S106, it is important to ensure that the underlying power supplies between different power domains are isolated, and that the power shutdown chain in the power shutdown domain ensures that the power grid supplying it is always on. Specifically, in this embodiment, the planning and generation of the power grid in step S106 includes: S401, generate a power grid for the normally open power domain to obtain the top-level power grid and bottom-level power grid of the normally open power domain; generate a top-level normally open power grid for the power off domain psd_0, the top-level power grid covers the power off cells to supply power to the power off cells; generate a bottom-level power grid for the standard cell area of ​​the power off domain psd_0, the bottom-level power grid of the power off domain psd_0 cannot be connected to the bottom-level power grid of the normally open power domain. S402, Determine whether there are hard macro cells in the power off domain psd_0. If there are hard macro cells in the power off domain psd_0, then generate a power grid for the hard macro cells to meet the power supply requirements of the hard macro cells.

[0029] In step S107 of this embodiment, performing a power coverage check on the power grid means determining whether there is a connection between the underlying power supply in the normally open power supply domain and the power off power supply domain psd_0, or whether the power off power supply chain is not covered by the normally open power supply. If it is true, the power coverage check is determined to fail. Otherwise, the power coverage check is determined to pass.

[0030] In this embodiment, step S107 performs power coverage checks, low power consumption checks, and consistency checks on the power grid, including: Power coverage check: Check the generation status of the power grid. If there are situations such as different power domains being connected at the bottom layer or the power shutdown chain not being covered by the normally open power supply, return to step S102 to re-plan the power grid. Otherwise, save the current physical design state as db_ps and generate a netlist netlist_pg with power information, and continue to perform low power check. Low power consumption check: Use a low power consumption check tool (Conformal, etc.) to perform a low power consumption check on the netlist netlist_pg, synthesis netlist netlist_syn and unified power format file upf_0 generated by the power coverage check. Confirm whether the current design state db_pg strictly follows the requirements of the unified power format file upf_0 to implement the physical power shutdown. If there is a problem, return to step S102 to re-plan the power shutdown. Otherwise, continue to perform the consistency check. Consistency check: Perform a consistency check between the netlist_pg and the synthesized netlist_syn to confirm that the power shutdown implementation process has not changed the logical structure of the design. If there is a problem, return to step S102 to replan the power shutdown; otherwise, continue to step S108.

[0031] In step S108 of this embodiment, placement and routing operations are performed on the design based on the current physical design state db_pg, and a physical design state db_pr after placement and routing is generated. In step S109 of this embodiment, power consumption and timing checks are performed on the physical design state db_pr. If there are power consumption and timing issues caused by power-off design, the process returns to step S102 to adjust the power-off chain and the usage plan of the power-off unit. If no issues are found, the power-off design is considered complete.

[0032] In summary, this embodiment proposes a standardized design flow for the physical implementation of power shutdown design that is sensitive to power consumption and long traces. This flow includes: power domain partitioning, shutdown unit usage planning, power shutdown physical implementation, long trace checks, power grid planning and physical implementation, power coverage checks, low-power checks, consistency checks, and timing and power verification after placement and routing. This embodiment's method achieves reasonable power shutdown planning through the design flow, thus addressing long traces and power consumption issues in advance during the early stages of power shutdown implementation. This reduces the impact of the physical implementation of power shutdown on later placement and routing in long trace and power-sensitive designs, thereby minimizing the risk of power consumption and timing violations caused by power shutdown and reducing the workload of later functional engineering modifications.

[0033] Furthermore, this embodiment also provides a physical implementation system for a power consumption and long-line sensitive power shutdown design, including an interconnected microprocessor and a memory, wherein the microprocessor is programmed or configured to execute the physical implementation method of the power consumption and long-line sensitive power shutdown design.

[0034] Furthermore, this embodiment also provides a computer-readable storage medium storing a computer program for being programmed or configured by a microprocessor to perform a physical implementation method of the power consumption and long-line sensitive power-off design.

[0035] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-readable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code. This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create a machine for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The functions specified in one or more boxes. These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable apparatus for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0036] The above description is merely a preferred embodiment of the present invention. The scope of protection of the present invention is not limited to the above embodiments. All technical solutions falling within the scope of the present invention's concept are within the scope of protection of the present invention. It should be noted that for those skilled in the art, any improvements and modifications made without departing from the principles of the present invention should also be considered within the scope of protection of the present invention.

Claims

1. A physical implementation method for a power-saving and long-line-sensitive power-off design, characterized in that, include: S101 divides the power domain into the unified power consumption format file of the physical design to obtain the power off domain and the power normally on domain. S102, Based on the area size of the power shutdown domain, plan the use of power shutdown chains and shutdown units, including determining the number n of power shutdown chains based on the area size of the power shutdown domain, the radiation range of the shutdown units, and the maximum number of units in the timing path in the timing analysis tool, and dividing the n power shutdown chains psc_1~psc_n into n power shutdown sub-domain regions psc_s1~ps_sn that need to be managed based on the relative positional relationship between the input and output ports of the power shutdown control signal and the power shutdown domain; S103, performs the physical implementation of turning off the standard cell in the power-off domain; S104 executes the physical implementation of turning off hard macrocells in the power-off domain; S105, check whether the placed power shutdown chain has excessively long or cross-power domain logic connection lines. If it does, jump to step S102 to adjust the usage plan of the power shutdown chain and shutdown unit; otherwise, jump to step S106. S106, Performs power grid planning and generation; S107, perform power coverage check, low power consumption check and consistency check on the power grid. If the check fails, jump to step S102 to adjust the usage plan of the power shutdown chain and shutdown unit; otherwise, jump to step S108. The power coverage check refers to determining whether there is a connection between the underlying power and the power shutdown domain, or whether the power shutdown chain is not covered by the normally open power. If it is, the power coverage check fails; otherwise, the power coverage check passes. S108, Perform placement and routing operations on the design and generate the physical design state after placement and routing; S109, perform power consumption and timing checks on the physical design state. If the check fails, jump to step S102 to adjust the power shutdown chain and the usage plan of the shutdown unit. Otherwise, the power-off design is considered complete.

2. The physical implementation method of the power consumption and long-line sensitive power-off design according to claim 1, characterized in that, When planning the use of the power shutdown chain and shutdown unit in step S102, the power shutdown chain usage planning includes: S201, Randomly select a shutdown unit from the shutdown unit library as the current shutdown unit; S202, determine the size of the radiation range of the shutdown unit; S203, determine the number of power shutdown chains n based on the area of ​​the power shutdown domain, the radiation range of the shutdown unit, and the maximum number of units in the timing path in the timing analysis tool. S204. Based on the relative positional relationship between the input / output ports of the power-off control signal and the power-off domain, divide n power-off chains psc_1~psc_n into n power-off subdomain regions psc_s1~ps_sn that need to be managed. S205, if there are n pairs of input / output ports for power-off control signals in the design netlist of the physical design, then n power-off rules ps_1 to ps_n are directly created in the unified power consumption format file of the physical design, and the input / output ports of the i-th pair of power-off control signals are used to control the power-off subdomain region ps_si based on the i-th power-off rule ps_i; if there is only one pair of input / output ports for power-off control signals in the design netlist of the physical design, then the input / output ports of the pair of power-off control signals are expanded using input / output buffers to create n power-off rules ps_1 to ps_n in the unified power consumption format file of the physical design, and the input / output ports of the i-th pair of power-off control signals obtained after expansion are used to control the power-off subdomain region ps_si based on the i-th power-off rule ps_i; S206 defines the placement rules for n power off chains in the unified power consumption format file of the physical design; S207, Write the executable file and use the placement and routing tool to create n power shutdown chains.

3. The physical implementation method of the power consumption and long-line sensitive power-off design according to claim 2, characterized in that, In step S202, when determining the radiation range of the shutdown unit, if it is the first time the radiation range of the shutdown unit is determined, the preset initial value is used as the radiation range of the shutdown unit; otherwise, the original radiation range of the shutdown unit is adjusted and used as the new radiation range of the current shutdown unit.

4. The physical implementation method of the power consumption and long-line sensitive power-off design according to claim 2, characterized in that, The functional expression for determining the number of power-off chains in step S203 is: n = roundup( (Area_ps / Area_sw) / Maxmum_path), In the above formula, n represents the number of power-off chains, n≥1; roundup means rounding up. Area_ps is the area size of the power-off domain, Area_sw is the radiation range of the power-off cell, and Maximum_path is the maximum number of cells in the timing path in the timing analysis tool.

5. The physical implementation method of the power consumption and long-line sensitive power-off design according to claim 2, characterized in that, In step S205, based on the input / output ports of the power-off control signals, input / output buffers are used to expand the power-off control signals to create n power-off rules ps_1 to ps_n in the unified power consumption format file of the physical design. The input / output ports of the i-th pair of power-off control signals obtained after expansion are used to control the power-off subdomain region ps_si based on the i-th power-off rule ps_i, including: S301, insert n input / output buffers iobufin_1 to inbufin_n near the input port of the power-off control signal, and connect the input interfaces of the n input / output buffers iobufin_1 to inbufin_n to the input port of the power-off control signal; insert n+1 input / output buffers iobufout_0 to iobufout_n near the output port of the power-off control signal, and connect the output interfaces of the input / output buffers iobufout_1 to iobufout_n to the input interface of the input / output buffer iobufout_0 through n AND gates; finally, connect the output interface of the input / output buffer iobufout_0 to the output port of the power-off control signal. S302, create n power-off rules ps_1 to ps_n in the unified power consumption format file. The control signal input interface of power-off rule ps_1 is connected to the output interface of input / output buffer iobufin_1, the control signal return interface of ps_1 is connected to the input interface of input / output buffer iobufout_1, and so on. The control signal input interface of ps_n is connected to the output interface of input / output buffer iobufin_n, and the control signal return interface of ps_n is connected to the input interface of input / output buffer iobufout_n.

6. The physical implementation method of the power consumption and long-line sensitive power-off design according to claim 2, characterized in that, Following step S207, long-term avoidance optimization is also included: S301, determine whether there is mutual interference between the positional relationship of the power domain, the power-off control signal input / output port and the hard macro unit. If there is no mutual interference, proceed to step S303; otherwise, proceed to step S302. S302, select a coordinate that is closest to the input / output port of the power-off control signal and whose distance from the boundary of the power-off domain is greater than a specified multiple of the length of the shutdown unit. Using this coordinate as the starting point, place the main power-off chain psc_main in the region where the positional relationship between the power domain, the input / output port of the power-off control signal, and the hard macro unit is least affected by mutual interference. Place a power-off chain psc_area separately in the region where the main power-off chain psc_main is not placed. Connect the control signal transmission line of the power-off chain psc_area to the control signal transmission line of the power-off chain psc_main. S303, for the power shutdown chain at the corner of the power shutdown domain, by adjusting the spacing or starting point of the power shutdown chain at the corner of the power shutdown domain, or by splitting the power shutdown chain at the corner of the power shutdown domain, so that the power shutdown chain at the corner of the power shutdown domain is not connected by two columns of power shutdown chains at the corner.

7. The physical implementation method of the power consumption and long-line sensitive power-off design according to claim 1, characterized in that, Step S106, which involves planning and generating the power grid, includes: S401, generate a power grid for the normally open power domain to obtain the top-level power grid and bottom-level power grid of the normally open power domain; generate a top-level power grid for the normally open power domain, the top-level power grid covers the power-off cells to supply power to the power-off cells; generate a bottom-level power grid for the standard cell area of ​​the power-off domain, the bottom-level power grid of the power-off domain cannot be connected to the bottom-level power grid of the normally open power domain. S402, Determine whether there are hard macro cells in the power off domain. If there are hard macro cells in the power off domain, generate a power grid for the hard macro cells to meet the power supply requirements of the hard macro cells.

8. A physical implementation system for a power-saving and long-line-sensitive power-off design, comprising an interconnected microprocessor and a memory, characterized in that, The microprocessor is programmed or configured to execute a physical implementation method of the power consumption and long-line sensitive power shutdown design according to any one of claims 1 to 7.

9. A computer-readable storage medium storing a computer program, characterized in that, The computer program is used to be programmed or configured by a microprocessor to execute the physical implementation method of the power consumption and long-line sensitive power shutdown design according to any one of claims 1 to 7.

Citation Information

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