A power line carrier communication circuit based on a PWM rectifier

Abstract

The application relates to a power line carrier communication circuit based on a PWM rectifier. The technical scheme is as follows: the terminals V m , b of the PWM rectifier circuit (101) are connected with the terminals V mm , mb of the main control unit (104) in correspondence, the terminals V t of the PWM rectifier circuit (101) are connected with the terminals V ms , mca of the signal processing circuit (102) of the main control unit (104) in correspondence, the terminals V mr1 , mc1 of the main control unit (104) are connected with the terminals V ro , rc of the second signal receiving circuit (105) in correspondence, and the terminals V mr2 , mc2 of the main control unit (104) are connected with the terminals V ro , rc of the first signal receiving circuit (105) in correspondence. The direct current side and the alternating current side of the power line carrier communication circuit based on the PWM rectifier are connected with corresponding direct current buses and alternating current buses. The application has simple structure, small hardware cost, can transmit signals by using the alternating current buses and the direct current buses, and can realize composite transmission of power and signals on the alternating current buses and the direct current buses.

Description

Technical Field

[0001] This invention belongs to the technical field of power line carrier communication circuits. Specifically, it relates to a power line carrier communication circuit based on a PWM rectifier. Background Technology

[0002] Power line carrier communication uses power distribution lines as the transmission medium, eliminating the need for separate data transmission lines. This can save significant construction costs for long-distance power distribution network systems. Furthermore, power line carrier communication can adapt its communication carrier network to changes in the power distribution network's operating mode, making it a natural fit for the power grid structure. However, due to the susceptibility of signals to interference and low transmission rates in power distribution network lines, it has long been considered an alternative solution. Nevertheless, with the rapid development of communication and power electronics technologies, these problems are being resolved, and power line carrier communication technology is gradually being applied in power distribution network communication.

[0003] Power and signal composite transmission based on power electronic converters is a novel power line carrier communication technology that combines power line carrier communication with power electronic converters. Power and signal composite transmission has promising development prospects, applicable not only to distributed power systems but also to smart grids, photovoltaic power generation, and other scenarios. If information can be injected into the power line simultaneously with power transmission via the power electronic converter, combining information transmission with power transmission to achieve composite power and signal transmission, no additional signal transmission lines or signal coupling devices are required. This reduces the complexity of communication equipment, lowers system costs, and improves the stability and reliability of information transmission, thus attracting the attention of those skilled in the art.

[0004] The patented technology, "Power Line Carrier Communication Circuit" (CN 116318265 A), consists of a signal transmitting circuit, a transmitting coupling circuit, a receiving coupling circuit, a signal receiving circuit, and a filtering circuit. In this technology, the main control unit outputs the signal to the signal transmitting circuit, which amplifies the signal and outputs it to the transmitting coupling circuit. The transmitting coupling circuit couples the signal to the power line for transmission. The signal is received first through the receiving coupling circuit, and then the coupled signal is output to the main control unit through the signal receiving circuit, thus achieving power line carrier communication. The drawback of this technology is that it requires both amplifying the transmitted signal and coupling the amplified signal to the power line using a coupling circuit, increasing system complexity and hardware overhead.

[0005] The patented technology, "A Synchronous Transmission System for Energy and Information" (CN 102624427 A), utilizes a Boost converter to achieve composite power and signal transmission. Traditional Boost converters use a DC signal as the fundamental frequency and a triangular wave as the carrier wave to generate a PWM (Pulse Width Modulation) signal to control the switching on and off of transistors in the Boost converter. The amplitude ratio of the fundamental frequency to the carrier wave is used to adjust the duty cycle of the PWM signal, ultimately controlling the output voltage of the Boost converter. Unlike traditional Boost converters that only transmit power, achieving composite power and signal transmission requires not only changing the duty cycle of the PWM signal to adjust the output power but also changing the carrier frequency to achieve signal transmission. Generally, carrier signals have two frequencies; therefore, the output of the Boost converter contains two high-frequency components representing "0" and "1" respectively. When digital signals need to be transmitted, the digital signal to be sent is modulated using FSK, and then the modulated signal is used as the carrier wave of the PWM generator in the Boost converter. This modulated signal is then compared with the fundamental DC signal used to control the power to obtain the final PWM signal. Therefore, the output voltage of a Boost converter mainly consists of a DC component and two high-frequency components of different frequencies. The DC component controls the output power, while the high-frequency components are used to transmit digital signals. However, signal transmission in this technology is limited by the converter's operating state, and can only achieve combined power and signal transmission on the DC bus.

[0006] The patented technology, "A Power / Signal Composite Transmission System Based on Coupled Inductor" (CN 103368609 A), proposes a power / signal composite transmission method based on a Buck converter. This method uses a Buck converter to simultaneously transmit power and signals, and its basic idea and control method are the same as those described above. Because the input and output ports of the Buck converter contain current harmonic signals related to the carrier signal, and these input port harmonic signals change with the load, an energy storage inductor needs to be connected in series at the input to ensure the stability of the input port harmonic signals and thus guarantee reliable data communication. However, the current harmonic signals at the output port of the Buck converter are less affected by the load; therefore, only an energy storage inductor needs to be added to the input port. Both the input and output ports of the Buck converter can serve as communication ports, but only composite power and signal transmission on a DC bus can be achieved.

[0007] Zhang Y et al. (Zhang Y, Chen G, Hu Y, et al. Cascaded multilevel inverter-based power and signal multiplex transmission for electric vehicles[J]. CES Transactions on Electrical Machines and Systems, 2020, 4(2): 123-129.) proposed a power and signal multiplex transmission method based on a cascaded multilevel inverter. In this method, the cascaded multilevel inverter consists of four H-bridge units connected in series. The DC side of each H-bridge unit is independent, while the AC side is connected in series to form the output of the cascaded multilevel inverter. Three of the four series-connected H-bridge units are used to transmit energy, and one is used to transmit signals. This method uses two sets of PWM signals to control the output power and signal respectively. One set of PWM signals simultaneously controls the three H-bridge units used for energy transmission, adjusting the duty cycle to control the inverter's output power. The other set of PWM signals controls the H-bridge unit used for signal transmission. Two carrier waves of different frequencies are used to control the H-bridge units to generate output signals of different frequencies to represent "0" and "1". Since the H-bridge unit used for signal transmission is connected in series with the other three H-bridge units used for energy transmission, the transmitted signal is superimposed on the output voltage, and a filter can be used to extract the transmitted signal. However, in this method, power and signal processing are implemented by different H-bridge units, which increases the complexity and hardware overhead of the system, and can only realize unidirectional transmission of power and signal. Summary of the Invention

[0008] The present invention aims to overcome the shortcomings of the prior art and provides a power line carrier communication circuit based on a PWM rectifier with a simple structure and low hardware overhead. The power line carrier communication circuit based on the PWM rectifier can transmit signals using both AC bus and DC bus, and can also realize the composite transmission of power and signal on AC bus and DC bus.

[0009] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0010] The power line carrier communication circuit based on the PWM rectifier consists of a PWM rectifier circuit, a signal processing circuit, a first signal receiving circuit, a second signal receiving circuit, and a main control unit.

[0011] Terminal V of the PWM rectifier circuit m Terminal V of the main control unit mm Connect the V terminal of the PWM rectifier circuit. b Terminal V of the main control unitmb Connect the V terminal of the PWM rectifier circuit. t Terminal V of the signal processing circuit tri Connection; terminal V of the signal processing circuit send Terminal V of the main control unit ms Connect to the terminal V of the signal processing circuit. car Terminal V of the main control unit mca Connection; Terminal V of the main control unit mr2 Terminal V of the first signal receiving circuit ro Connection, terminal V of the main control unit mc2 Terminal V of the first signal receiving circuit rc Connection; Terminal V of the main control unit mr1 Terminal V of the second signal receiving circuit ro Connection, terminal V of the main control unit mc1 Terminal V of the second signal receiving circuit rc connect.

[0012] Terminal V of the PWM rectifier circuit ACL Connected to one end of the AC bus, the V terminal of the PWM rectifier circuit ACN Connect to the other end of the AC bus; terminal V of the PWM rectifier circuit DCL The PWM rectifier circuit's terminal V is connected to the positive terminal of the DC bus. DCN Connect to the negative terminal of the DC bus.

[0013] Terminal V of the first signal receiving circuit Lr The terminal V of the first signal receiving circuit is connected to the positive terminal of the DC bus. Nr Connected to the negative terminal of the DC bus; terminal V of the second signal receiving circuit. Lr Connected to one end of the AC bus, terminal V of the second signal receiving circuit Nr Connect to the other end of the AC bus.

[0014] The PWM rectifier circuit consists of an inductor, a first resistor, a second resistor, a first insulated-gate bipolar transistor (IGBT), a second IGBT, a third IGBT, a fourth IGBT, a first capacitor, a first inverter, a second inverter, a first multiplier, a second multiplier, a first voltage comparator, a second voltage comparator, and a third voltage comparator.

[0015] One end of the inductor is connected to one end of the first resistor. The other end of the first resistor is connected to the emitter of the first insulated-gate bipolar transistor (IGBT) and the collector of the second IGBT. The collector of the first IGBT is connected to the collector of the third IGBT, one end of the first capacitor, and one end of the second resistor. The emitter of the second IGBT is connected to the emitter of the fourth IGBT, the other end of the first capacitor, and the other end of the second resistor. The emitter of the third IGBT and the collector of the fourth IGBT are connected. The output terminal M of the first multiplier is... o respectively connected to the input terminal V of the first voltage comparator + The input terminal V of the second voltage comparator + and the input terminal V of the third voltage comparator + Connect the input terminal V of the first voltage comparator. - Connected to GND, the output terminal V of the first voltage comparator o The first inverter is connected to the input terminal of the first inverter and the gate of the first insulated-gate bipolar transistor, respectively. The output terminal of the first inverter is connected to the gate of the second insulated-gate bipolar transistor. The input terminal V of the second voltage comparator is connected to the gate of the second insulated-gate bipolar transistor. - Connected to GND, the input terminal M1 of the second multiplier is connected to the output terminal V of the second voltage comparator. o Connect to the output terminal M of the second multiplier. o With the input terminal V of the third voltage comparator - Connect to the output terminal V of the third voltage comparator. o The second inverter is connected to the input of the second inverter and the gate of the fourth insulated-gate bipolar transistor, respectively. The output of the second inverter is connected to the gate of the third insulated-gate bipolar transistor.

[0016] The other end of the inductor is connected to the terminal V of the PWM rectifier circuit. ACL The connection is made between the emitter of the third insulated-gate bipolar transistor and the collector of the fourth insulated-gate bipolar transistor, and the terminal V of the PWM rectifier circuit. ACN The connection is made so that one end of the second resistor is connected to the terminal V of the PWM rectifier circuit. DCL The other end of the second resistor is connected to the terminal V of the PWM rectifier circuit. DCN The connection is made between the input terminal M2 of the second multiplier and the terminal V of the PWM rectifier circuit. t The connection is made between the input terminal M1 of the first multiplier and the terminal V of the PWM rectifier circuit. m The connection is made between the input terminal M2 of the first multiplier and the terminal V of the PWM rectifier circuit. b connect.

[0017] The signal processing circuit consists of a third multiplier, a first filter circuit, a fourth voltage comparator, and an integrator circuit. The output terminal M of the third multiplier... o With the input terminal V of the first filter circuit + Connect the input terminal V of the first filter circuit. - Connected to GND, the output terminal V of the first filter circuit o With the input terminal V of the fourth voltage comparator + Connect to the input terminal V of the fourth voltage comparator. - Connected to GND, the output terminal V of the fourth voltage comparator o With the input terminal V of the integrator circuit in connect.

[0018] The input terminal M1 of the third multiplier is connected to the terminal V of the signal processing circuit. send The connection is made between the input terminal M2 of the third multiplier and the terminal V of the signal processing circuit. car Connection; Output terminal V of the integrator circuit o Terminal V of the signal processing circuit tri connect.

[0019] The first signal receiving circuit consists of a third resistor, a fourth resistor, a fifth resistor, a second filter circuit, and a fourth multiplier. One end of the third resistor is connected to one end of the fourth resistor and the input terminal V of the second filter circuit. + The other end of the fourth resistor is connected to the input terminal V of the second filter circuit. - Connect GND and one end of the 5th resistor to the output terminal V of the 2nd filter circuit. o Connect to the input terminal M2 of the 4th multiplier.

[0020] The other end of the third resistor is connected to terminal V of the first signal receiving circuit. Lr The other end of the fifth resistor is connected to terminal V of the first signal receiving circuit. Nr Connection; the input terminal M1 of the fourth multiplier is connected to the terminal V of the first signal receiving circuit. rc Connect to the output terminal M of the 4th multiplier. o Terminal V of the first signal receiving circuit ro With connection.

[0021] The second signal receiving circuit is the same as the first signal receiving circuit.

[0022] The integrating circuit consists of a 6th resistor, a 7th resistor, an 8th resistor, a 2nd capacitor, and a 1st operational amplifier. One end of the 6th resistor is connected to one end of the 7th resistor, one end of the 2nd capacitor, and V1 of the 1st operational amplifier. +Terminal connections: the other end of the 7th resistor is connected to the other end of the 2nd capacitor and the output terminal V of the 1st operational amplifier, respectively. o Connection, input terminal V of the first operational amplifier - Connect one end of the 8th resistor to GND, and connect the other end of the 8th resistor to GND.

[0023] The other end of the sixth resistor is connected to the terminal V of the integrating circuit. in Connect the output terminal V of the first operational amplifier. o With the integrator circuit terminal V o connect.

[0024] The first filter circuit consists of resistors 9, 10, 11, 12, 13, and 14, capacitor 3, capacitor 4, operational amplifier 2, and operational amplifier 3. One end of resistor 9 is connected to one end of resistor 10 and the input terminal V of operational amplifier 2. - The connection is made so that one end of the 14th resistor is connected to one end of the 3rd capacitor and the input terminal V of the 2nd operational amplifier. + The other end of the third capacitor is connected to GND, and the output terminal V of the second operational amplifier is connected to GND. o The other end of the 10th resistor and one end of the 4th capacitor are connected respectively. The other end of the 4th capacitor is connected to one end of the 13th resistor and the input terminal V of the 3rd operational amplifier. + The other end of resistor 13 is connected to GND, and the input terminal V of operational amplifier 3 is connected to GND. - Connect one end of resistor 11 and one end of resistor 12 respectively. Connect the other end of resistor 11 to GND. Connect the other end of resistor 12 to the output terminal V of operational amplifier 3. o connect.

[0025] The other end of the 9th resistor is connected to terminal V of the 1st filter circuit. - The other end of the 14th resistor is connected to terminal V of the 1st filter circuit. + Connection; Output terminal V of the third operational amplifier o Terminal V of the first filter circuit o connect.

[0026] The second filter circuit is the same as the first filter circuit.

[0027] By adopting the above technical solution, the present invention has the following advantages compared with the prior art:

[0028] This invention comprises a PWM rectifier circuit, a signal processing circuit, a first signal receiving circuit, a second signal receiving circuit, and a main control unit. The PWM rectifier circuit has terminal V... m V b Terminal V of the main control unit mm V mb Corresponding connection, the V terminal of the PWM rectifier circuit t Through the signal processing circuit and the main control unit's terminal V ms V mca Connection, terminal V of the main control unit mr1 V mc1 Terminal V of the second signal receiving circuit ro V rc Corresponding connection, terminal V of the main control unit mr2 V mc2 Terminal V of the first signal receiving circuit ro V rc Corresponding connections are made. The DC and AC sides of the power line carrier communication circuit based on the PWM rectifier are connected to the corresponding DC and AC buses. Therefore, the power line carrier communication circuit based on the PWM rectifier has a simple structure and low hardware overhead.

[0029] Based on the characteristic that the direction of power transmission is different in different operating states of PWM rectifier circuit, this invention realizes the composite transmission of power and signal on AC bus and DC bus.

[0030] In this invention, the sinusoidal signal to be transmitted is modulated by single-sideband (SSB) to obtain a modulated wave signal. This modulated wave signal is then converted into a triangular wave signal, which is used as the carrier signal of the PWM rectifier circuit. This triangular wave signal is compared with the fundamental signal for controlling the power to obtain an SPWM signal, which controls the switching on and off of the transistors in the PWM rectifier circuit. Because changes in the carrier signal in the PWM rectifier circuit cause corresponding changes in the high-frequency components of the AC and DC currents, unlike existing converter-based power and signal composite transmission methods, this invention can transmit signals using both AC and DC buses.

[0031] In this invention, the fundamental component of the SPWM signal controls the output power of the PWM rectifier circuit, while the high-frequency component of the SPWM signal controls the modulation signals at the input and output terminals of the PWM rectifier circuit. Since the switching of the PWM rectifier circuit's operating state is achieved by controlling the amplitude and phase of the fundamental component of the SPWM signal, and is independent of the high-frequency component, this invention can control the PWM rectifier circuit to operate in different states to achieve bidirectional power transmission between the AC bus and the DC bus, and especially to achieve composite power and signal transmission.

[0032] Therefore, this invention not only has the characteristics of simple structure, low hardware overhead, and the ability to transmit signals using both AC bus and DC bus, but also enables composite transmission of power and signals on both AC bus and DC bus. Attached Figure Description

[0033] Figure 1 This is a schematic diagram of one structure of the present invention;

[0034] Figure 2 for Figure 1 A schematic diagram of a PWM rectifier circuit 101;

[0035] Figure 3 for Figure 1 A schematic diagram of a signal processing circuit 102;

[0036] Figure 4 for Figure 1 A schematic diagram of a structure of the first signal receiving circuit 103;

[0037] Figure 5 for Figure 3 A schematic diagram of a medium integrator circuit 304;

[0038] Figure 6 for Figure 3 A schematic diagram of one structure of the first filter circuit 302 in the middle;

[0039] Figure 7 for Figure 2 The diagram shows the voltage waveform and the transmitted signal waveform on the AC bus when the PWM rectifier circuit 101 transmits a signal in inverter mode.

[0040] Figure 8 for Figure 2 The diagram shows the voltage waveform on the DC bus and the transmitted signal waveform when the PWM rectifier circuit 101 in inverter mode transmits a signal.

[0041] Figure 9 for Figure 2 The diagram shows the voltage waveform and the transmitted signal waveform on the AC bus when the PWM rectifier circuit 101 transmits a signal in the rectified state.

[0042] Figure 10 for Figure 2 The diagram shows the voltage waveform on the DC bus and the transmitted signal waveform when the PWM rectifier circuit 101 transmits a signal in the rectification state.

[0043] Figure 11 for Figure 2The diagram shows the voltage waveform and the transmitted signal waveform on the AC bus when the PWM rectifier circuit 101 transmits another signal in inverter mode.

[0044] Figure 12 for Figure 2 The diagram shows the voltage waveform on the DC bus and the transmitted signal waveform when the PWM rectifier circuit 101 transmits another signal in inverter mode.

[0045] Figure 13 for Figure 2 The diagram shows the voltage waveform and the transmitted signal waveform on the AC bus when the PWM rectifier circuit 101 transmits another signal in the rectification state.

[0046] Figure 14 for Figure 2 The diagram shows the voltage waveform on the DC bus and the transmitted signal waveform when the PWM rectifier circuit 101 transmits another signal in the rectification state. Detailed Implementation

[0047] The present invention will be further described below with reference to the accompanying drawings and specific embodiments, but this is not intended to limit the scope of protection thereof.

[0048] Example 1

[0049] A power line carrier communication circuit based on a PWM rectifier. The power line carrier communication circuit based on a PWM rectifier is as follows... Figure 1 As shown, it consists of a PWM rectifier circuit 101, a signal processing circuit 102, a first signal receiving circuit 103, a second signal receiving circuit 105, and a main control unit 104.

[0050] like Figure 1 As shown, the V terminal of the PWM rectifier circuit 101 m Terminal V of the main control unit 104 mm Connect the PWM rectifier circuit 101 to terminal V. b Terminal V of the main control unit 104 mb Connect the PWM rectifier circuit 101 to terminal V. t Terminal V of signal processing circuit 102 tri Connection; Terminal V of signal processing circuit 102 send Terminal V of the main control unit 104 ms Connection, terminal V of signal processing circuit 102 car Terminal V of the main control unit 104 mca Connection; Terminal V of main control unit 104 mr2 Terminal V of the first signal receiving circuit 103 ro Connection, terminal V of main control unit 104 mc2Terminal V of the first signal receiving circuit 103 rc Connection; Terminal V of main control unit 104 mr1 Terminal V of the second signal receiving circuit 105 ro Connection, terminal V of main control unit 104 mc1 Terminal V of the second signal receiving circuit 105 rc connect.

[0051] like Figure 1 As shown, the terminal V of the PWM rectifier circuit 101 ACL The PWM rectifier circuit 101 is connected to one end of the AC bus, and its terminal V... ACN Connected to the other end of the AC bus; terminal V of PWM rectifier circuit 101 DCL The terminal V of the PWM rectifier circuit 101 is connected to the positive terminal of the DC bus. DCN Connect to the negative terminal of the DC bus.

[0052] like Figure 1 As shown, the terminal V of the first signal receiving circuit 103 Lr The terminal V of the first signal receiving circuit 103 is connected to the positive terminal of the DC bus. Nr Connected to the negative terminal of the DC bus; terminal V of the second signal receiving circuit 105 Lr The terminal V of the second signal receiving circuit 105 is connected to one end of the AC bus. Nr Connect to the other end of the AC bus.

[0053] like Figure 2 As shown, the PWM rectifier circuit 101 consists of an inductor 201, a first resistor 202, a second resistor 208, a first insulated-gate bipolar transistor 203, a second insulated-gate bipolar transistor 204, a third insulated-gate bipolar transistor 205, a fourth insulated-gate bipolar transistor 206, a first capacitor 207, a first inverter 211, a second inverter 209, a first multiplier 215, a second multiplier 212, a first voltage comparator 213, a second voltage comparator 214, and a third voltage comparator 210.

[0054] like Figure 2As shown, one end of inductor 201 is connected to one end of first resistor 202. The other end of first resistor 202 is connected to the emitter of first insulated-gate bipolar transistor 203 and the collector of second insulated-gate bipolar transistor 204. The collector of first insulated-gate bipolar transistor 203 is connected to the collector of third insulated-gate bipolar transistor 205, one end of first capacitor 207, and one end of second resistor 208. The emitter of second insulated-gate bipolar transistor 204 is connected to the emitter of fourth insulated-gate bipolar transistor 206, the other end of first capacitor 207, and the other end of second resistor 208. The emitter of third insulated-gate bipolar transistor 205 and the collector of fourth insulated-gate bipolar transistor 206 are connected. The output terminal M of first multiplier 215... o The input terminals V of the first voltage comparator 213 are respectively connected to the input terminals V. + The input terminal V of the second voltage comparator 214 + and the input terminal V of the third voltage comparator 210 + Connect the input terminal V of the first voltage comparator 213. - Connected to GND, the output terminal V of the first voltage comparator 213 o The first inverter 211 is connected to the input terminal of the first inverter 211 and the gate of the first insulated-gate bipolar transistor 203, respectively. The output terminal of the first inverter 211 is connected to the gate of the second insulated-gate bipolar transistor 204. The input terminal V of the second voltage comparator 214 is connected to the gate of the second insulated-gate bipolar transistor 204. - Connected to GND, the input terminal M1 of the second multiplier 212 is connected to the output terminal V of the second voltage comparator 214. o Connect to the output terminal M of the second multiplier 212. o The input terminal V of the third voltage comparator 210 - Connect to the output terminal V of the third voltage comparator 210. o The second inverter 209 is connected to the input terminal of the second inverter 209 and the gate of the fourth insulated gate bipolar transistor 206, respectively. The output terminal of the second inverter 209 is connected to the gate of the third insulated gate bipolar transistor 205.

[0055] like Figure 2 As shown, the other end of inductor 201 is connected to terminal V of PWM rectifier circuit 101. ACL The emitter of the third insulated-gate bipolar transistor 205 and the collector of the fourth insulated-gate bipolar transistor 206 are connected to the terminal V of the PWM rectifier circuit 101. ACN The connection is made so that one end of the second resistor 208 is connected to terminal V of the PWM rectifier circuit 101. DCL The other end of the second resistor 208 is connected to terminal V of the PWM rectifier circuit 101. DCNThe input terminal M2 of the second multiplier 212 is connected to the terminal V of the PWM rectifier circuit 101. t The input terminal M1 of the first multiplier 215 is connected to the terminal V of the PWM rectifier circuit 101. m The input terminal M2 of the first multiplier 215 is connected to the terminal V of the PWM rectifier circuit 101. b connect.

[0056] like Figure 3 As shown, the signal processing circuit 102 consists of a third multiplier 301, a first filter circuit 302, a fourth voltage comparator 303, and an integrator circuit 304. The output terminal M of the third multiplier 301... o The input terminal V of the first filter circuit 302 + Connect the input terminal V of the first filter circuit 302. - Connected to GND, the output terminal V of the first filter circuit 302 o The input terminal V of the fourth voltage comparator 303 + Connect the input terminal V of the fourth voltage comparator 303. - Connected to GND, the output terminal V of the fourth voltage comparator 303 o With the input terminal V of the integrator circuit 304 in connect.

[0057] like Figure 3 As shown, the input terminal M1 of the third multiplier 301 is connected to the terminal V of the signal processing circuit 102. send The input terminal M2 of the third multiplier 301 is connected to the terminal V of the signal processing circuit 102. car Connection; Output terminal V of integrator circuit 304 o Terminal V of signal processing circuit 102 tri connect.

[0058] like Figure 4 As shown, the first signal receiving circuit 103 consists of a third resistor 401, a fourth resistor 402, a fifth resistor 405, a second filter circuit 403, and a fourth multiplier 404. One end of the third resistor 401 is connected to one end of the fourth resistor 402 and the input terminal V of the second filter circuit 403. + The other end of the fourth resistor 402 is connected to the input terminal V of the second filter circuit 403. - GND and one end of the fifth resistor 405 are connected, and the output terminal V of the second filter circuit 403 is connected. o It is connected to the input terminal M2 of the fourth multiplier 404.

[0059] like Figure 4As shown, the other end of the third resistor 401 is connected to terminal V of the first signal receiving circuit 103. Lr The other end of the fifth resistor 405 is connected to terminal V of the first signal receiving circuit 103. Nr Connection; the input terminal M1 of the fourth multiplier 404 is connected to the terminal V of the first signal receiving circuit 103. rc Connect to the output terminal M of the fourth multiplier 404. o Terminal V of the first signal receiving circuit 103 ro With connection.

[0060] like Figure 4 As shown, the second signal receiving circuit 105 is the same as the first signal receiving circuit 103.

[0061] like Figure 5 As shown, the integrating circuit 304 consists of a sixth resistor 501, a seventh resistor 502, an eighth resistor 505, a second capacitor 503, and a first operational amplifier 504. One end of the sixth resistor 501 is connected to one end of the seventh resistor 502, one end of the second capacitor 503, and the V1 of the first operational amplifier 504. + Terminal connections: the other end of the 7th resistor 502 is connected to the other end of the 2nd capacitor 503 and the output terminal V of the 1st operational amplifier 504, respectively. o Connect the input terminal V of the first operational amplifier 504. - It is connected to one end of the 8th resistor 505, and the other end of the 8th resistor 505 is connected to GND.

[0062] like Figure 5 As shown, the other end of the sixth resistor 501 is connected to terminal V of the integrating circuit 304. in Connect to the output terminal V of the first operational amplifier 504. o Terminal V of the integrator circuit 304 o connect.

[0063] like Figure 6 As shown, the first filter circuit 302 consists of a 9th resistor 601, a 10th resistor 602, an 11th resistor 603, a 12th resistor 604, a 13th resistor 606, a 14th resistor 610, a 3rd capacitor 609, a 4th capacitor 607, a 2nd operational amplifier 608, and a 3rd operational amplifier 605. One end of the 9th resistor 601 is connected to one end of the 10th resistor 602 and the input terminal V of the 2nd operational amplifier 608. - The connection is made such that one end of the 14th resistor 610 is connected to one end of the 3rd capacitor 609 and the input terminal V of the 2nd operational amplifier 608. +The other end of the third capacitor 609 is connected to GND, and the output terminal V of the second operational amplifier 608 is connected to GND. o The other end of the 10th resistor 602 and one end of the 4th capacitor 607 are respectively connected to the other end of the 13th resistor 606 and the input terminal V of the 3rd operational amplifier 605. + The other end of resistor 606 (number 13) is connected to GND, and the input terminal V of operational amplifier 605 is connected to GND. - The resistor is connected to one end of the 11th resistor 603 and one end of the 12th resistor 604, respectively. The other end of the 11th resistor 603 is connected to GND, and the other end of the 12th resistor 604 is connected to the output terminal V of the 3rd operational amplifier 605. o connect.

[0064] like Figure 6 As shown, the other end of the 9th resistor 601 is connected to terminal V of the 1st filter circuit 302. - The other end of the 14th resistor 610 is connected to terminal V of the 1st filter circuit 302. + Connection; Output terminal V of the third operational amplifier 605 o Terminal V of the first filter circuit 302 o connect.

[0065] like Figure 6 As shown, the second filter circuit 404 is the same as the first filter circuit 302.

[0066] In this embodiment, the given circuit component parameters are as follows: the resistance of the first resistor 202 is 1Ω, the resistance of the second resistor 208 is 100Ω, the resistance of the third resistor 401 is 10MΩ, the resistance of the fourth resistor 402 is 1KΩ, the resistance of the fifth resistor 405 is 10MΩ, the resistance of the sixth resistor 501 is 100KΩ, the resistance of the seventh resistor 502 is 100KΩ, the resistance of the eighth resistor 505 is 10MΩ, the resistance of the ninth resistor 601 is 1KΩ, the resistance of the tenth resistor 602 is 1KΩ, the resistance of the eleventh resistor 603 is 1KΩ, and the resistance of the twelfth resistor 604 is 1KΩ. The resistance of resistor 606 (13th resistor) is 2.8KΩ, the resistance of resistor 610 (14th resistor) is 1KΩ, the capacitance of capacitor 207 (1st capacitor) is 4700μF, the capacitance of capacitor 503 (2nd capacitor) is 10pF, the capacitance of capacitor 609 (3rd capacitor) is 100nF, the capacitance of capacitor 607 (4th capacitor) is 100nF, the inductance of inductor 201 is 10mH, the model of multipliers 215 (1st multiplier), 212 (2nd multiplier), 301 (3rd multiplier), and 404 (4th multiplier) is AD633AN, the model of operational amplifier 504 (1st operational amplifier) ​​is AD706AQ, and the model of operational amplifiers 608 (2nd operational amplifier) ​​and 605 (3rd operational amplifier) ​​is LM124J.

[0067] In this embodiment, the terminal V of the main control unit 104 ms The given transmission signal is V T

[0068] V T =sin(2πft) (1)

[0069] In this embodiment, the terminal V of the main control unit 104 mca V mc1 With V mc2 The given modulated carrier signal is V T2

[0070] V T2 =cos(2πf2t) (2)

[0071] In this embodiment, the terminal V of the main control unit 104 mm The given amplitude of the SPWM fundamental signal is V M Terminal V of main control unit 104 mb The given SPWM fundamental signal is V s

[0072]

[0073] In Formula 1 to Formula 3:

[0074] f represents the frequency of the transmitted signal, measured in Hz;

[0075] f2 represents the frequency of the high-frequency carrier signal in single-sideband modulation, in Hz;

[0076] V M This indicates the amplitude of the SPWM fundamental signal, expressed in V.

[0077] f M This indicates the frequency of the SPWM fundamental signal, in Hz.

[0078] This indicates the phase of the SPWM fundamental signal, expressed in degrees (°).

[0079] In the power line carrier communication circuit based on the PWM rectifier, the main control unit 104 controls the SPWM fundamental signal V in the PWM rectifier circuit 101. s The phase and amplitude are controlled to switch the working state of the PWM rectifier circuit 101.

[0080] When given V M =1V, When the PWM rectifier circuit 101 is operating in rectification mode, V M =1V, The PWM rectifier circuit 101 operates in inverter mode. This example demonstrates how to convert the 1000Hz transmission signal V under both operating modes. T With a high-frequency carrier signal V of f2 = 10000Hz T2 Single-sideband modulation is performed, and then the modulated signal is converted into a triangular wave signal, which serves as the SPWM carrier signal in the PWM rectifier circuit 101, so that it is connected to the AC side terminal V of the PWM rectifier circuit 101. ACL V ACN and DC side terminal V DCL V DCN The connected AC and DC buses contain high-frequency components that can be used to represent the transmitted signals.

[0081] Obtained using Simulink circuit simulation software; Figure 7 The diagram shows the voltage waveform and the transmitted signal waveform on the AC bus when the PWM rectifier circuit 101 transmits a signal in inverter mode. Figure 8 The diagram shows the voltage waveform on the DC bus and the transmitted signal waveform when the PWM rectifier circuit 101 transmits a signal in inverter mode. Figure 9 The diagram shows the voltage waveform and the transmitted signal waveform on the AC bus when the PWM rectifier circuit 101 transmits a signal in the rectified state. Figure 10The diagram shows the voltage waveform on the DC bus and the transmitted signal waveform when the PWM rectifier circuit 101 transmits a signal in rectification mode. Figures 7-10 As shown in the waveform diagram, regardless of whether the PWM rectifier circuit 101 is operating in inverter or rectifier mode, the DC side can obtain the transmitted signal through the first signal receiving circuit 103 and the AC side through the second signal receiving circuit 105. This verifies that the power line carrier communication circuit based on the PWM rectifier can achieve composite transmission of power and signal regardless of whether it is operating in rectifier or inverter mode.

[0082] Example 2

[0083] A power line carrier communication circuit based on a PWM rectifier. The power line carrier communication circuit based on a PWM rectifier is as follows... Figure 1 As shown, it consists of a PWM rectifier circuit 101, a signal processing circuit 102, a first signal receiving circuit 103, a second signal receiving circuit 105, and a main control unit 104.

[0084] like Figure 1 As shown, the V terminal of the PWM rectifier circuit 101 m Terminal V of the main control unit 104 mm Connect the PWM rectifier circuit 101 to terminal V. b Terminal V of the main control unit 104 mb Connect the PWM rectifier circuit 101 to terminal V. t Terminal V of signal processing circuit 102 tri Connection; Terminal V of signal processing circuit 102 send Terminal V of the main control unit 104 ms Connection, terminal V of signal processing circuit 102 car Terminal V of the main control unit 104 mca Connection; Terminal V of main control unit 104 mr2 Terminal V of the first signal receiving circuit 103 ro Connection, terminal V of main control unit 104 mc2 Terminal V of the first signal receiving circuit 103 rc Connection; Terminal V of main control unit 104 mr1 Terminal V of the second signal receiving circuit 105 ro Connection, terminal V of main control unit 104 mc1 Terminal V of the second signal receiving circuit 105 rc connect.

[0085] like Figure 1 As shown, the V terminal of the PWM rectifier circuit 101 ACLThe PWM rectifier circuit 101 is connected to one end of the AC bus, and its terminal V... ACN Connected to the other end of the AC bus; terminal V of PWM rectifier circuit 101 DCL The terminal V of the PWM rectifier circuit 101 is connected to the positive terminal of the DC bus. DCN Connect to the negative terminal of the DC bus.

[0086] like Figure 1 As shown, the terminal V of the first signal receiving circuit 103 Lr The terminal V of the first signal receiving circuit 103 is connected to the positive terminal of the DC bus. Nr Connected to the negative terminal of the DC bus; terminal V of the second signal receiving circuit 105 Lr The terminal V of the second signal receiving circuit 105 is connected to one end of the AC bus. Nr Connect to the other end of the AC bus.

[0087] like Figure 2 As shown, the PWM rectifier circuit 101 consists of an inductor 201, a first resistor 202, a second resistor 208, a first insulated-gate bipolar transistor 203, a second insulated-gate bipolar transistor 204, a third insulated-gate bipolar transistor 205, a fourth insulated-gate bipolar transistor 206, a first capacitor 207, a first inverter 211, a second inverter 209, a first multiplier 215, a second multiplier 212, a first voltage comparator 213, a second voltage comparator 214, and a third voltage comparator 210.

[0088] like Figure 2 As shown, one end of inductor 201 is connected to one end of first resistor 202. The other end of first resistor 202 is connected to the emitter of first insulated-gate bipolar transistor 203 and the collector of second insulated-gate bipolar transistor 204. The collector of first insulated-gate bipolar transistor 203 is connected to the collector of third insulated-gate bipolar transistor 205, one end of first capacitor 207, and one end of second resistor 208. The emitter of second insulated-gate bipolar transistor 204 is connected to the emitter of fourth insulated-gate bipolar transistor 206, the other end of first capacitor 207, and the other end of second resistor 208. The emitter of third insulated-gate bipolar transistor 205 and the collector of fourth insulated-gate bipolar transistor 206 are connected. The output terminal M of first multiplier 215... o The input terminals V of the first voltage comparator 213 are respectively connected to the input terminals V. + The input terminal V of the second voltage comparator 214 + and the input terminal V of the third voltage comparator 210 + Connect the input terminal V of the first voltage comparator 213. -Connected to GND, the output terminal V of the first voltage comparator 213 o The first inverter 211 is connected to the input terminal of the first inverter 211 and the gate of the first insulated-gate bipolar transistor 203, respectively. The output terminal of the first inverter 211 is connected to the gate of the second insulated-gate bipolar transistor 204. The input terminal V of the second voltage comparator 214 is connected to the gate of the second insulated-gate bipolar transistor 204. - Connected to GND, the input terminal M1 of the second multiplier 212 is connected to the output terminal V of the second voltage comparator 214. o Connect to the output terminal M of the second multiplier 212. o The input terminal V of the third voltage comparator 210 - Connect to the output terminal V of the third voltage comparator 210. o The second inverter 209 is connected to the input terminal of the second inverter 209 and the gate of the fourth insulated gate bipolar transistor 206, respectively. The output terminal of the second inverter 209 is connected to the gate of the third insulated gate bipolar transistor 205.

[0089] like Figure 2 As shown, the other end of inductor 201 is connected to terminal V of PWM rectifier circuit 101. ACL The emitter of the third insulated-gate bipolar transistor 205 and the collector of the fourth insulated-gate bipolar transistor 206 are connected to the terminal V of the PWM rectifier circuit 101. ACN The connection is made so that one end of the second resistor 208 is connected to terminal V of the PWM rectifier circuit 101. DCL The other end of the second resistor 208 is connected to terminal V of the PWM rectifier circuit 101. DCN The input terminal M2 of the second multiplier 212 is connected to the terminal V of the PWM rectifier circuit 101. t The input terminal M1 of the first multiplier 215 is connected to the terminal V of the PWM rectifier circuit 101. m The input terminal M2 of the first multiplier 215 is connected to the terminal V of the PWM rectifier circuit 101. b connect.

[0090] like Figure 3 As shown, the signal processing circuit 102 consists of a third multiplier 301, a first filter circuit 302, a fourth voltage comparator 303, and an integrator circuit 304. The output terminal M of the third multiplier 301... o The input terminal V of the first filter circuit 302 + Connect the input terminal V of the first filter circuit 302. - Connected to GND, the output terminal V of the first filter circuit 302 o The input terminal V of the fourth voltage comparator 303 + Connect the input terminal V of the fourth voltage comparator 303. -Connected to GND, the output terminal V of the fourth voltage comparator 303 o With the input terminal V of the integrator circuit 304 in connect.

[0091] like Figure 3 As shown, the input terminal M1 of the third multiplier 301 is connected to the terminal V of the signal processing circuit 102. send The input terminal M2 of the third multiplier 301 is connected to the terminal V of the signal processing circuit 102. car Connection; Output terminal V of integrator circuit 304 o Terminal V of signal processing circuit 102 tri connect.

[0092] like Figure 4 As shown, the first signal receiving circuit 103 consists of a third resistor 401, a fourth resistor 402, a fifth resistor 405, a second filter circuit 403, and a fourth multiplier 404. One end of the third resistor 401 is connected to one end of the fourth resistor 402 and the input terminal V of the second filter circuit 403. + The other end of the fourth resistor 402 is connected to the input terminal V of the second filter circuit 403. - GND and one end of the fifth resistor 405 are connected, and the output terminal V of the second filter circuit 403 is connected. o It is connected to the input terminal M2 of the fourth multiplier 404.

[0093] like Figure 4 As shown, the other end of the third resistor 401 is connected to terminal V of the first signal receiving circuit 103. Lr The other end of the fifth resistor 405 is connected to terminal V of the first signal receiving circuit 103. Nr Connection; the input terminal M1 of the fourth multiplier 404 is connected to the terminal V of the first signal receiving circuit 103. rc Connect to the output terminal M of the fourth multiplier 404. o Terminal V of the first signal receiving circuit 103 ro With connection.

[0094] like Figure 4 As shown, the second signal receiving circuit 105 is the same as the first signal receiving circuit 103.

[0095] like Figure 5 As shown, the integrating circuit 304 consists of a sixth resistor 501, a seventh resistor 502, an eighth resistor 505, a second capacitor 503, and a first operational amplifier 504. One end of the sixth resistor 501 is connected to one end of the seventh resistor 502, one end of the second capacitor 503, and the V1 of the first operational amplifier 504. +Terminal connections: the other end of the 7th resistor 502 is connected to the other end of the 2nd capacitor 503 and the output terminal V of the 1st operational amplifier 504, respectively. o Connect the input terminal V of the first operational amplifier 504. - It is connected to one end of the 8th resistor 505, and the other end of the 8th resistor 505 is connected to GND.

[0096] like Figure 5 As shown, the other end of the sixth resistor 501 is connected to terminal V of the integrating circuit 304. in Connect to the output terminal V of the first operational amplifier 504. o Terminal V of the integrator circuit 304 o connect.

[0097] like Figure 6 As shown, the first filter circuit 302 consists of a 9th resistor 601, a 10th resistor 602, an 11th resistor 603, a 12th resistor 604, a 13th resistor 606, a 14th resistor 610, a 3rd capacitor 609, a 4th capacitor 607, a 2nd operational amplifier 608, and a 3rd operational amplifier 605. One end of the 9th resistor 601 is connected to one end of the 10th resistor 602 and the input terminal V of the 2nd operational amplifier 608. - The connection is made such that one end of the 14th resistor 610 is connected to one end of the 3rd capacitor 609 and the input terminal V of the 2nd operational amplifier 608. + The other end of the third capacitor 609 is connected to GND, and the output terminal V of the second operational amplifier 608 is connected to GND. o The other end of the 10th resistor 602 and one end of the 4th capacitor 607 are respectively connected to the other end of the 13th resistor 606 and the input terminal V of the 3rd operational amplifier 605. + The other end of resistor 606 (number 13) is connected to GND, and the input terminal V of operational amplifier 605 is connected to GND. - The resistor is connected to one end of the 11th resistor 603 and one end of the 12th resistor 604, respectively. The other end of the 11th resistor 603 is connected to GND, and the other end of the 12th resistor 604 is connected to the output terminal V of the 3rd operational amplifier 605. o connect.

[0098] like Figure 6 As shown, the other end of the 9th resistor 601 is connected to terminal V of the 1st filter circuit 302. - The other end of the 14th resistor 610 is connected to terminal V of the 1st filter circuit 302. + Connection; Output terminal V of the third operational amplifier 605 o Terminal V of the first filter circuit 302o connect.

[0099] like Figure 6 As shown, the second filter circuit 404 is the same as the first filter circuit 302.

[0100] In this embodiment, the given circuit component parameters are as follows: the resistance of the first resistor 202 is 1Ω, the resistance of the second resistor 208 is 100Ω, the resistance of the third resistor 401 is 10MΩ, the resistance of the fourth resistor 402 is 1KΩ, the resistance of the fifth resistor 405 is 10MΩ, the resistance of the sixth resistor 501 is 100KΩ, the resistance of the seventh resistor 502 is 100KΩ, the resistance of the eighth resistor 505 is 10MΩ, the resistance of the ninth resistor 601 is 5.1KΩ, the resistance of the tenth resistor 602 is 1KΩ, the resistance of the eleventh resistor 603 is 1KΩ, and the resistance of the twelfth resistor 604 is 1KΩ. The resistance of the 13th resistor 606 is 16KΩ, the resistance of the 14th resistor 610 is 1KΩ, the capacitance of the 1st capacitor 207 is 4700μF, the capacitance of the 2nd capacitor 503 is 10pF, the capacitance of the 3rd capacitor 609 is 100nF, the capacitance of the 4th capacitor 607 is 100nF, the inductance of the 201 is 10mH, the model of the 1st multiplier 215, the 2nd multiplier 212, the 3rd multiplier 301, and the 4th multiplier 404 is AD633AN, the model of the 1st operational amplifier 504 is AD706AQ, and the model of the 2nd operational amplifier 608 and the 3rd operational amplifier 605 is LM124J.

[0101] In this embodiment, the terminal V of the main control unit 104 ms The given transmission signal is V T

[0102] V T =sin(2πft) (1) In this embodiment, the terminal V of the main control unit 104 mca V mc1 With V mc2 The given modulated carrier signal is V T2

[0103] V T2 =cos(2πf2t) (2)

[0104] In this embodiment, the terminal V of the main control unit 104 mm The given amplitude of the SPWM fundamental signal is V M Terminal V of main control unit 104 mb The given SPWM fundamental signal is V s

[0105]

[0106] In Formula 1 to Formula 3:

[0107] f represents the frequency of the transmitted signal, measured in Hz;

[0108] f2 represents the frequency of the high-frequency carrier signal in single-sideband modulation, in Hz;

[0109] V M This indicates the amplitude of the SPWM fundamental signal, in V.

[0110] f M This indicates the frequency of the SPWM fundamental signal, in Hz.

[0111] This indicates the phase of the SPWM fundamental signal, expressed in degrees (°).

[0112] In the power line carrier communication circuit based on the PWM rectifier, the main control unit controls the SPWM fundamental signal V in the PWM rectifier circuit 101. s The phase and amplitude are controlled to switch the working state of the PWM rectifier circuit 101.

[0113] When given V M =1V, When the PWM rectifier circuit 101 is operating in rectification mode, V M =1V, The PWM rectifier circuit 101 operates in inverter mode. This example demonstrates how to convert the 200Hz transmission signal V under both operating modes. T With a high-frequency carrier signal V of f2 = 5000Hz T2 Single-sideband modulation is performed, and then the modulated signal is converted into a triangular wave signal, which serves as the SPWM carrier signal in the PWM rectifier circuit 101, so that it is connected to the AC side terminal V of the PWM rectifier circuit 101. ACL V ACN and DC side terminal V DCL V DCN The connected AC and DC buses contain high-frequency components that can be used to represent the transmitted signals.

[0114] Obtained using Simulink circuit simulation software; Figure 11 The diagram shows the voltage waveform and the transmitted signal waveform on the AC bus when the PWM rectifier circuit 101 transmits another signal in inverter mode. Figure 12 The diagram shows the voltage waveform on the DC bus and the transmitted signal waveform when the PWM rectifier circuit 101 transmits another signal in inverter mode. Figure 13 The diagram shows the voltage waveform and the transmitted signal waveform on the AC bus when the PWM rectifier circuit 101 transmits another signal in the rectification state. Figure 14 The diagram shows the voltage waveform on the DC bus and the transmitted signal waveform when the PWM rectifier circuit 101 transmits another signal in rectification mode. Figures 11-14 As shown in the waveform diagram, regardless of whether the PWM rectifier circuit 101 is operating in inverter or rectifier mode, the DC side can obtain the transmitted signal through the first signal receiving circuit 103 and the AC side through the second signal receiving circuit 105. This verifies that the power line carrier communication circuit based on the PWM rectifier can achieve composite transmission of power and signal regardless of whether it is operating in rectifier or inverter mode.

[0115] Compared with the prior art, the beneficial effects of this specific embodiment are as follows:

[0116] This specific embodiment consists of a PWM rectifier circuit 101, a signal processing circuit 102, a first signal receiving circuit 103, a second signal receiving circuit 105, and a main control unit 104. The PWM rectifier circuit 101 has terminal V... m V b Terminal V of the main control unit 104 mm V mb Corresponding connection, the terminal V of the PWM rectifier circuit 101 t Through the signal processing circuit 102 and the main control unit 104 terminal V ms V mca Connection, terminal V of main control unit 104 mr1 V mc1 Terminal V of the second signal receiving circuit 105 ro V rc Corresponding connection, terminal V of main control unit 104 mr2 V mc2 Terminal V of the first signal receiving circuit 103 ro V rc Corresponding connections are made. The DC and AC sides of the power line carrier communication circuit based on the PWM rectifier are connected to the corresponding DC and AC buses. Therefore, the power line carrier communication circuit based on the PWM rectifier has a simple structure and low hardware overhead.

[0117] This specific implementation method is based on the characteristic that the direction of power transmission is different in different working states of the PWM rectifier circuit 101, and realizes the composite transmission of power and signal on the AC bus and DC bus.

[0118] In this specific embodiment, the sinusoidal signal to be transmitted is modulated by single-sideband modulation to obtain a modulated wave signal. This modulated wave signal is then converted into a triangular wave signal, which is used as the carrier signal of the PWM rectifier circuit 101. This triangular wave signal is compared with the fundamental signal for controlling the power to obtain an SPWM signal, which controls the switching on and off of the transistors in the PWM rectifier circuit 101. Since changes in the carrier signal in the PWM rectifier circuit 101 cause corresponding changes in the high-frequency components of the AC and DC currents of the PWM rectifier circuit 101, this specific embodiment differs from existing converter-based power and signal composite transmission methods. Therefore, this specific embodiment can use both AC and DC buses to transmit signals.

[0119] In this specific embodiment, the fundamental component of the SPWM signal controls the output power of the PWM rectifier circuit 101, while the high-frequency component of the SPWM signal controls the modulation wave signals at the input and output terminals of the PWM rectifier circuit 101. Since the switching of the operating state of the PWM rectifier circuit 101 is achieved by controlling the amplitude and phase of the fundamental component of the SPWM signal, and is independent of the high-frequency component, this specific embodiment can control the PWM rectifier circuit 101 to be in different operating states to achieve bidirectional power transmission between the AC bus and the DC bus, and especially to achieve composite power and signal transmission.

[0120] Therefore, this specific implementation not only has the characteristics of simple structure, low hardware overhead, and the ability to transmit signals using both AC bus and DC bus, but also enables composite transmission of power and signals on both AC bus and DC bus.

Claims

1. A power line carrier communication circuit based on a PWM rectifier, characterized in that: The power line carrier communication circuit based on the PWM rectifier consists of a PWM rectifier circuit (101), a signal processing circuit (102), a first signal receiving circuit (103), a second signal receiving circuit (105), and a main control unit (104). Terminal V of the PWM rectifier circuit (101) m Terminal V of the main control unit (104) mm Connect the terminal V of the PWM rectifier circuit (101) b Terminal V of the main control unit (104) mb Connect the terminal V of the PWM rectifier circuit (101) t Terminal V of the signal processing circuit (102) tri Connection; Terminal V of the signal processing circuit (102) send Terminal V of the main control unit (104) ms The connection is made to the terminal V of the signal processing circuit (102). car Terminal V of the main control unit (104) mca Connection; Terminal V of the main control unit (104) mr2 Terminal V of the first signal receiving circuit (103) ro Connection, terminal V of the main control unit (104) mc2 Terminal V of the first signal receiving circuit (103) rc Connection; Terminal V of the main control unit (104) mr1 Terminal V of the second signal receiving circuit (105) ro Connection, terminal V of the main control unit (104) mc1 Terminal V of the second signal receiving circuit (105) rc connect; Terminal V of the PWM rectifier circuit (101) ACL The terminal V of the PWM rectifier circuit (101) is connected to one end of the AC bus. ACN Connected to the other end of the AC bus; terminal V of the PWM rectifier circuit (101) DCL The terminal V of the PWM rectifier circuit (101) is connected to the positive terminal of the DC bus. DCN Connect to the negative terminal of the DC bus; Terminal V of the first signal receiving circuit (103) Lr The terminal V of the first signal receiving circuit (103) is connected to the positive terminal of the DC bus. Nr Connected to the negative terminal of the DC bus; terminal V of the second signal receiving circuit (105) Lr The terminal V of the second signal receiving circuit (105) is connected to one end of the AC bus. Nr Connect to the other end of the AC bus; The PWM rectifier circuit (101) consists of an inductor (201), a first resistor (202), a second resistor (208), a first insulated-gate bipolar transistor (203), a second insulated-gate bipolar transistor (204), a third insulated-gate bipolar transistor (205), a fourth insulated-gate bipolar transistor (206), a first capacitor (207), a first inverter (211), a second inverter (209), a first multiplier (215), a second multiplier (212), a first voltage comparator (213), a second voltage comparator (214), and a third voltage comparator (210). One end of the inductor (201) is connected to one end of the first resistor (202), and the other end of the first resistor (202) is connected to... The emitter of the first insulated-gate bipolar transistor (203) and the collector of the second insulated-gate bipolar transistor (204) are connected separately. The collector of the first insulated-gate bipolar transistor (203) is connected to the collector of the third insulated-gate bipolar transistor (205), one end of the first capacitor (207), and one end of the second resistor (208). The emitter of the second insulated-gate bipolar transistor (204) is connected to the emitter of the fourth insulated-gate bipolar transistor (206), the other end of the first capacitor (207), and the other end of the second resistor (208). The emitter of the third insulated-gate bipolar transistor (205) and the collector of the fourth insulated-gate bipolar transistor (206) are connected separately. The output terminal M of the first multiplier (215) is connected separately. o The input terminals V of the first voltage comparator (213) are respectively connected to the input terminals V. + The input terminal V of the second voltage comparator (214) + and the input terminal V of the third voltage comparator (210) + Connect the input terminal V of the first voltage comparator (213). - The output terminal V of the first voltage comparator (213) is connected to GND. o The first inverter (211) is connected to the input terminal of the first inverter (211) and the gate of the first insulated-gate bipolar transistor (203), respectively. The output terminal of the first inverter (211) is connected to the gate of the second insulated-gate bipolar transistor (204). The input terminal V of the second voltage comparator (214) is connected to the gate of the second insulated-gate bipolar transistor (204). - Connected to GND, the input terminal M1 of the second multiplier (212) is connected to the output terminal V of the second voltage comparator (214). o Connect to the output terminal M of the second multiplier (212). o The input terminal V of the third voltage comparator (210) - Connect to the output terminal V of the third voltage comparator (210). o The second inverter (209) is connected to the input terminal of the second inverter (209) and the gate of the fourth insulated gate bipolar transistor (206), respectively. The output terminal of the second inverter (209) is connected to the gate of the third insulated gate bipolar transistor (205). The other end of the inductor (201) is connected to the terminal V of the PWM rectifier circuit (101). ACL The emitter of the third insulated-gate bipolar transistor (205) and the collector of the fourth insulated-gate bipolar transistor (206) are connected to the terminal V of the PWM rectifier circuit (101). ACN The connection is made so that one end of the second resistor (208) is connected to the terminal V of the PWM rectifier circuit (101). DCL The other end of the second resistor (208) is connected to the terminal V of the PWM rectifier circuit (101). DCN The input terminal M2 of the second multiplier (212) is connected to the terminal V of the PWM rectifier circuit (101). t The input terminal M1 of the first multiplier (215) is connected to the terminal V of the PWM rectifier circuit (101). m The input terminal M2 of the first multiplier (215) is connected to the terminal V of the PWM rectifier circuit (101). b connect; The signal processing circuit (102) consists of a third multiplier (301), a first filter circuit (302), a fourth voltage comparator (303), and an integrator circuit (304); the output terminal M of the third multiplier (301) o The input terminal V of the first filter circuit (302) + Connect the input terminal V of the first filter circuit (302) - The output terminal V of the first filter circuit (302) is connected to GND. o The input terminal V of the fourth voltage comparator (303) + Connect the input terminal V of the fourth voltage comparator (303). - The output terminal V of the fourth voltage comparator (303) is connected to GND. o With the input terminal V of the integrating circuit (304) in connect; The input terminal M1 of the third multiplier (301) is connected to the terminal V of the signal processing circuit (102). send The input terminal M2 of the third multiplier (301) is connected to the terminal V of the signal processing circuit (102). car Connection; Output terminal V of the integrator circuit (304) o Terminal V of the signal processing circuit (102) tri connect; The first signal receiving circuit (103) consists of a third resistor (401), a fourth resistor (402), a fifth resistor (405), a second filter circuit (403), and a fourth multiplier (404); one end of the third resistor (401) is connected to one end of the fourth resistor (402) and the input terminal V of the second filter circuit (403). + The other end of the fourth resistor (402) is connected to the input terminal V of the second filter circuit (403). - GND and one end of the 5th resistor (405) are connected, and the output terminal V of the 2nd filter circuit (403) is connected. o Connect to input terminal M2 of the fourth multiplier (404); The other end of the third resistor (401) is connected to terminal V of the first signal receiving circuit (103). Lr The other end of the fifth resistor (405) is connected to the terminal V of the first signal receiving circuit (103). Nr Connection; the input terminal M1 of the fourth multiplier (404) is connected to the terminal V of the first signal receiving circuit (103). rc Connect to the output terminal M of the 4th multiplier (404) o Terminal V of the first signal receiving circuit (103) ro With connection; The second signal receiving circuit (105) is the same as the first signal receiving circuit (103).

2. The power line carrier communication circuit based on a PWM rectifier according to claim 1, characterized in that... The integrator circuit (304) consists of a 6th resistor (501), a 7th resistor (502), an 8th resistor (505), a 2nd capacitor (503), and a 1st operational amplifier (504); one end of the 6th resistor (501) is connected to one end of the 7th resistor (502), one end of the 2nd capacitor (503), and the V1 of the 1st operational amplifier (504). + Terminal connections: the other end of the 7th resistor (502) is connected to the other end of the 2nd capacitor (503) and the output terminal V of the 1st operational amplifier (504). o Connect the input terminal V of the first operational amplifier (504). - One end of the 8th resistor (505) is connected to the 8th resistor (505), and the other end of the 8th resistor (505) is connected to GND; The other end of the sixth resistor (501) is connected to the terminal V of the integrator circuit (304). in Connect to the output terminal V of the first operational amplifier (504). o With the integrator circuit (304) terminal V o connect.

3. The power line carrier communication circuit based on a PWM rectifier according to claim 1, characterized in that... The first filter circuit (302) consists of a 9th resistor (601), a 10th resistor (602), an 11th resistor (603), a 12th resistor (604), a 13th resistor (606), a 14th resistor (610), a 3rd capacitor (609), a 4th capacitor (607), a 2nd operational amplifier (608), and a 3rd operational amplifier (605); one end of the 9th resistor (601) is connected to one end of the 10th resistor (602) and the input terminal V of the 2nd operational amplifier (608). - The connection is made so that one end of the 14th resistor (610) is connected to one end of the 3rd capacitor (609) and the input terminal V of the 2nd operational amplifier (608). + The other end of the third capacitor (609) is connected to GND, and the output terminal V of the second operational amplifier (608) is connected to GND. o The other end of the 10th resistor (602) and one end of the 4th capacitor (607) are respectively connected, and the other end of the 4th capacitor (607) is respectively connected to one end of the 13th resistor (606) and the input terminal V of the 3rd operational amplifier (605). + The other end of resistor 13 (606) is connected to GND, and the input terminal V of operational amplifier 3 (605) is connected to GND. - The resistor is connected to one end of the 11th resistor (603) and one end of the 12th resistor (604), respectively. The other end of the 11th resistor (603) is connected to GND, and the other end of the 12th resistor (604) is connected to the output terminal V of the 3rd operational amplifier (605). o connect; The other end of the 9th resistor (601) is connected to the terminal V of the 1st filter circuit (302). - The other end of the 14th resistor (610) is connected to the terminal V of the 1st filter circuit (302). + Connection; Output terminal V of the third operational amplifier (605) o Terminal V of the first filter circuit (302) o connect; The first filter circuit (302) is the same as the second filter circuit (404).

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