Method and apparatus for measuring junction capacitance of power diode modules

Abstract

This invention relates to the field of high-voltage power supplies, specifically a method and apparatus for measuring the junction capacitance of a power diode module. The method includes: connecting a test capacitor in parallel across a diode module; applying a pulsed high voltage to the test capacitor while simultaneously providing an initial voltage across the diode module; obtaining a first charging time required for the voltage of the test capacitor to rise from zero to its maximum value; disconnecting the diode module from the test capacitor; obtaining a second charging time required for the voltage of the test capacitor to rise from zero to its maximum value; and calculating the junction capacitance value of the power diode module based on the first and second charging times. The power diode module junction capacitance measurement method and apparatus provided by this invention can measure the junction capacitance of a diode module under high-voltage reverse bias.

Description

Technical Field

[0001] This invention relates to the field of high-voltage power supplies, specifically a method and apparatus for measuring the junction capacitance of a power diode module. Background Technology

[0002] In high-power, high-voltage power supplies, power diode modules are commonly used for absorption in snubber circuits, typically employing multiple modules in series. Due to the junction capacitance of the diodes, when absorbing reverse voltage, the uneven voltage across each module can cause overvoltage failure. Therefore, a method and apparatus are needed to measure the junction capacitance of diode modules under high-voltage reverse bias conditions, allowing for the selection of diode modules with similar junction capacitances to form a snubber circuit and ensure the normal operation of the diode modules.

[0003] When a reverse bias voltage is applied to the PN junction of a diode, the thickness of the built-in electric field region stabilizes at a constant value. If the reverse voltage across the PN junction increases, the thickness of the built-in electric field region also increases, meaning the internal charge increases. Conversely, if the voltage decreases, the internal charge decreases. Therefore, the junction capacitance of a diode module is affected by the voltage across the PN junction. However, ordinary LCR testing equipment cannot test the junction capacitance of a power diode module under high reverse bias conditions. Therefore, a testing method and apparatus are needed to measure the junction capacitance of a diode module under high reverse bias conditions. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to overcome the shortcomings of the existing technology and provide a method and device for measuring the junction capacitance of a power diode module, which can measure the junction capacitance of a diode module under high voltage reverse bias.

[0005] To achieve the above-mentioned technical objectives, on the one hand, the present invention provides a method for measuring the junction capacitance of a power diode module, comprising:

[0006] A test capacitor is connected in parallel across the diode module. A pulsed high voltage is applied to the test capacitor while an initial voltage is provided across the diode module. The first charging time required for the test capacitor voltage to rise from zero to its maximum value is obtained. The directions of the pulsed high voltage and the initial voltage are opposite to the conduction direction of the diode module.

[0007] After disconnecting the diode module from both ends of the test capacitor, obtain the second charging time required for the voltage of the test capacitor to rise from zero to its maximum value;

[0008] The junction capacitance value of the power diode module is calculated based on the first charging time and the second charging time.

[0009] Specifically, applying a pulsed high voltage to the test capacitor includes:

[0010] The narrow pulse voltage module generates a pulse voltage and outputs it to the boost isolation module.

[0011] The boost isolation module boosts the pulse voltage to a high pulse voltage and then applies it to the test capacitor.

[0012] Specifically, the narrow pulse voltage module includes: an energy storage capacitor and a magnetic compression inductor;

[0013] The narrow pulse voltage module generates a pulse voltage and outputs it to the boost isolation module, specifically including:

[0014] The energy storage capacitor stores energy through an AC power source, providing the original pulse for the magnetic compression inductor;

[0015] The magnetic compression inductor compresses the original pulse to obtain a pulse voltage output to the boost isolation module.

[0016] Specifically, the boost isolation module includes: a transformer;

[0017] Based on the first charging time and the second charging time, the junction capacitance value of the power diode module is calculated, specifically including:

[0018] By combining the second charging time, the capacitance value of the energy storage capacitor, the capacitance value of the test capacitor, and the number of transformer turns, the equivalent value of the magnetic compression inductance and the total inductance in the circuit on the transformer secondary side is calculated.

[0019] The junction capacitance of the power diode module is calculated based on the equivalent value, the first charging time, and the capacitance value of the test capacitor.

[0020] On the other hand, the present invention provides a power diode module junction capacitance measurement device, characterized in that it comprises: a high voltage pulse module, a test capacitor and a DC reverse bias module connected in sequence;

[0021] The diode module is positioned between the high-voltage pulse module and the DC reverse bias module, and is connected in parallel with the test capacitor.

[0022] The high-voltage pulse module applies a pulsed high voltage to the test capacitor;

[0023] The DC reverse bias module provides an initial voltage to the diode module;

[0024] The direction of the pulsed high voltage and the initial voltage is opposite to the conduction direction of the diode module.

[0025] Specifically, the high-voltage pulse module includes: a narrow pulse voltage module and a boost isolation module;

[0026] The narrow pulse voltage module generates a pulse voltage and outputs it to the boost isolation module;

[0027] The boost isolation module boosts the pulse voltage to a high pulse voltage and then applies it to the test capacitor.

[0028] Specifically, the narrow pulse voltage module includes: an energy storage capacitor and a magnetic compression inductor;

[0029] An AC power supply is connected in parallel across the energy storage capacitor.

[0030] One end of the magnetic compression inductor is connected to one end of the energy storage capacitor, and the other end is connected to the boost isolation module.

[0031] Specifically, the narrow pulse voltage module further includes: a charging resistor and a power switch;

[0032] The charging resistor is connected in series with the power switch and then connected to one end of the AC power supply and one end of the energy storage capacitor, respectively.

[0033] The other end of the AC power supply is connected to the other end of the energy storage capacitor.

[0034] Specifically, the boost isolation module includes: a transformer and a DC blocking capacitor;

[0035] The primary side of the transformer is connected in parallel with the narrow pulse voltage module, and the secondary side is connected in series with the DC blocking capacitor and then in parallel with the test capacitor.

[0036] Specifically, the DC reverse bias module includes: a DC power supply and an AC isolation inductor;

[0037] The DC power supply and the AC isolation inductor are connected in series and then in parallel across the test capacitor.

[0038] The DC power supply provides current in the opposite direction to the conduction direction of the diode module.

[0039] In this embodiment, the initial voltage applied to the diode module makes the diode module capacitive. At the same time, a pulsed high voltage is applied across the diode module to give the diode module a reverse high voltage environment. Then, the first charging time and the second charging time are measured, and the junction capacitance of the diode module can be obtained under high voltage reverse bias. Attached Figure Description

[0040] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0041] Figure 1 This is a schematic flowchart of the power diode module junction capacitance measurement method according to an embodiment of this application;

[0042] Figure 2 This is a schematic diagram of the power diode module junction capacitance measuring device according to an embodiment of this application;

[0043] Figure 3 This is a schematic diagram of the module structure of the power diode module junction capacitance measuring device according to an embodiment of this application;

[0044] Figure 4 This is a circuit connection diagram of the power diode module junction capacitance measuring device according to an embodiment of this application;

[0045] Figure 5 The waveform of the test capacitor during the first charging time is shown in the embodiment of this application. Detailed Implementation

[0046] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0047] like Figure 1 As shown, this application provides a method for measuring the junction capacitance of a power diode module, including:

[0048] 101. Connect the test capacitor in parallel across the diode module. Apply a pulsed high voltage to the test capacitor while providing an initial voltage across the diode module. Obtain the first charging time required for the test capacitor voltage to rise from zero to its maximum value. The directions of the pulsed high voltage and the initial voltage are opposite to the conduction direction of the diode module.

[0049] 102 After disconnecting the diode module from both ends of the test capacitor, obtain the second charging time required for the voltage of the test capacitor to rise from zero to its maximum value;

[0050] 103. Calculate the junction capacitance value of the power diode module based on the first charging time and the second charging time.

[0051] The high voltage applied to the test capacitor and the initial voltage provided to the diode module are both adjustable and can be determined according to requirements.

[0052] Conventional diode junction capacitance is typically measured directly using an LCR (inductance, capacitance, resistance) tester when a reverse DC voltage is applied to the diode module. However, the actual capacitance of a diode varies with the reverse DC voltage. capacitanceFurthermore, LCR testing equipment can only test capacitance values ​​at a maximum frequency of 1 MHz. When power diode modules are used for absorption in buffer circuits, they operate in a high-frequency, high-voltage environment, typically withstanding voltages of around 1 kV and frequencies up to 10 MHz. Therefore, this testing method cannot reflect the actual junction capacitance value.

[0053] like Figure 2 As shown, in this embodiment, the initial voltage applied to diode module 3 causes it to exhibit capacitive behavior. A pulsed high voltage is applied across diode module 3, placing it under reverse high voltage bias. The first charging time and the second charging time are then measured, and the junction capacitance of diode module 3 is calculated. The initial voltage ensures the reverse initial state of diode module 3, making it capacitive from the initial measurement stage, thus guaranteeing the accuracy of the junction capacitance obtained under the pulsed high voltage condition. In other words, if diode module 3 does not exhibit capacitive behavior in its initial state, the calculated junction capacitance will certainly be inaccurate, even under high voltage reverse bias.

[0054] The application of a pulsed high voltage to the test capacitor specifically includes:

[0055] 1011. The narrow pulse voltage module generates a pulse voltage and outputs it to the boost isolation module;

[0056] 1012. The boost isolation module boosts the pulse voltage to a high pulse voltage and then applies it to the test capacitor.

[0057] like Figure 3 As shown, the narrow pulse voltage module 11 generates a pulse voltage, and the boost isolation module 12 amplifies the pulse voltage to obtain a high-voltage pulse that is transmitted to the test capacitor 2. Since the voltage is in pulse form during the above process, the voltage value on the test capacitor 2 changes over time.

[0058] The narrow pulse voltage module includes: an energy storage capacitor and a magnetic compression inductor;

[0059] The narrow pulse voltage module generates a pulse voltage and outputs it to the boost isolation module, specifically including:

[0060] 10111. The energy storage capacitor stores energy through an AC power supply to provide the original pulse for the magnetic compression inductor;

[0061] 10112. The magnetic compression inductor compresses the original pulse to obtain a pulse voltage output to the boost isolation module.

[0062] like Figure 4As shown, the energy storage capacitor C0 stores energy through the AC power supply Ps1. In this embodiment, the AC power supply Ps1 outputs AC voltage waveforms with opposite conduction directions from the diode modules. Figure 5 As shown in Figure UC0, UC0 represents the voltage across the energy storage capacitor C0. The rising edge of UC0, i.e., the waveform from zero to its maximum value, represents the charging process of the energy storage capacitor C0. Figure 5 The falling edge of UC0, i.e., the waveform of UC0 decreasing from its maximum value to zero, represents the discharge process of the energy storage capacitor C0. Due to the presence of a magnetic compression inductor L1 in the narrow pulse voltage module 11, according to the volt-second product principle, when the energy storage capacitor C0 has finished charging, the magnetic compression inductor L1, after saturation, will compress the falling edge of UC0 during the discharge process. Figure 5 As shown, the falling edge width of UC0 is narrower than its rising edge width. In this embodiment, the falling edge width of UC0 is compressed to approximately 100 ns.

[0063] If there is no magnetic compression inductor L1 in the narrow pulse voltage module 11, then the rising and falling edges of UC0 will be axisymmetric. Therefore, in this embodiment, the original pulse refers to the pulse of the energy storage capacitor C0 without the magnetic compression inductor L1, i.e., a pulse with symmetrical rising and falling edges. Figure 5 The waveform after compression of the falling edge of UC0 is a pulse voltage waveform.

[0064] The boost isolation module includes: a transformer.

[0065] like Figure 4 As shown, transformer Tr1 increases the amplitude of the pulse voltage waveform. (As...) Figure 5 As shown, UC2 represents the voltage across capacitor C2. Because... Figure 5 For illustrative purposes only, the maximum value of UC2 is not significantly higher than the maximum value of UC0. However, due to the action of transformer Tr1, the maximum value of UC2 in this embodiment is higher than the maximum value of UC0.

[0066] like Figure 5 As shown in UC2, the waveform of the high-voltage pulse is such that when the energy storage capacitor C0 discharges, the test capacitor C2 begins to charge. In this embodiment, the charging time of the test capacitor C2 is T1-T0, which is the same as the discharging time of the energy storage capacitor C0, approximately 100ns. Therefore, the first charging time t1 is T1-T0 when the test capacitor C2 is connected in parallel with the diode module D1 (diode module 3), and the second charging time t2 is T1-T0 after the test capacitor C2 is disconnected from the diode module D1.

[0067] Based on the first charging time and the second charging time, the junction capacitance value of the power diode module is calculated, specifically including:

[0068] By combining the second charging time, the capacitance value of the energy storage capacitor, the capacitance value of the test capacitor, and the number of transformer turns, the equivalent value of the magnetic compression inductance and the total inductance in the circuit on the transformer secondary side is calculated.

[0069] The junction capacitance of the power diode module is calculated based on the equivalent value, the first charging time, and the capacitance value of the test capacitor.

[0070] like Figure 5 As shown, in this embodiment, the second charging time t2 can be expressed as follows, based on the capacitor charging time formula:

[0071]

[0072] In formula (1), L * C is the equivalent value of the magnetic compression inductance L1 and the total inductance in the circuit on the secondary side of transformer Tr1. * This is to test the values ​​of capacitor C2 and energy storage capacitor C0 after they are equivalent to the secondary winding of transformer Tr1.

[0073] C * It can be represented as:

[0074]

[0075] In formula (2), C′0 is the value of energy storage capacitor C0 after being equivalent to the secondary winding of transformer Tr1, and C2 is the capacitance value of test capacitor C2.

[0076] C′0 can be represented as:

[0077]

[0078] In formula (3), C0 is the capacitance value of the energy storage capacitor C0, and n is the number of turns of the transformer Tr1.

[0079] Since C0, n, C2, and t2 are known, we can obtain L by combining formulas (1) to (3). * The value of .

[0080] In this embodiment, L * The value is the equivalent value obtained under the condition of L1 saturation.

[0081] Similarly, the first charging time t1 can be expressed as:

[0082]

[0083] In formula (4), C″ is the value of the energy storage capacitor C0, the test capacitor C2 and the junction capacitance of the diode module D1 after being equivalent to the secondary side of the transformer Tr1.

[0084] C″ can be represented as:

[0085]

[0086] In formula (5), C d This is the junction capacitance of diode module D1.

[0087] Because of C0, L * Given t1 and C2, we can obtain C by simultaneously solving formulas (3) to (5). d The value of .

[0088] Therefore, the junction capacitance of diode module D1 can be obtained using the above method.

[0089] like Figure 2 As shown, this application embodiment also provides a power diode module junction capacitance measurement device, including: a high voltage pulse module 1, a test capacitor 2 and a DC reverse bias module 4 connected in sequence;

[0090] The diode module 3 is disposed between the high voltage pulse module 1 and the DC reverse bias module 4, and is connected in parallel with the test capacitor 2;

[0091] The high-voltage pulse module 1 applies a pulsed high voltage to the test capacitor 2;

[0092] The DC reverse bias module 4 provides an initial voltage to the diode module 3;

[0093] The direction of the pulsed high voltage and the initial voltage is opposite to the conduction direction of the diode module.

[0094] In this embodiment, diode module 3 is capacitive under the initial voltage provided by DC reverse bias module 4. High-voltage pulse module 1 provides a pulsed high voltage to test capacitor 2, allowing test capacitor 2 to charge. Then, by measuring the charging time of test capacitor 2 in both the parallel connection state of diode module 3 and the disconnection state of diode module 3, the junction capacitance of diode module 3 can be calculated. Obviously, the charging time can be measured by various measuring devices; in this embodiment, an oscilloscope is used for measurement.

[0095] like Figure 3 As shown, the high-voltage pulse module 1 includes: a narrow pulse voltage module 11 and a boost isolation module 12;

[0096] The narrow pulse voltage module 11 generates a pulse voltage and outputs it to the boost isolation module 12;

[0097] The boost isolation module 12 boosts the pulse voltage to a high pulse voltage and then applies it to the test capacitor 2.

[0098] like Figure 5 As shown, the waveform of the pulse voltage is shown as waveform UC0, and the waveform of the pulse high voltage is shown as waveform UC2.

[0099] like Figure 4 As shown, the narrow pulse voltage module 11 includes: an energy storage capacitor C0 and a magnetic compression inductor L1;

[0100] An AC power supply Ps1 is connected in parallel across the energy storage capacitor C0.

[0101] One end of the magnetic compression inductor L1 is connected to one end of the energy storage capacitor C0, and the other end is connected to the boost isolation module 12.

[0102] In this embodiment, Ps1 is a 0-600V pulse power supply, and the energy storage capacitor C0 is generally selected with a value of n²C² based on the number of turns n of the transformer Tr1. The energy storage capacitor C0 begins charging by receiving AC power from the AC power supply Ps1, and the waveform is as follows... Figure 5 The rising edge of the UC0 waveform shown indicates that after charging is complete, the energy storage capacitor C0 discharges. The magnetic compression inductor L1 is made with a soft magnetic core, which rapidly reaches saturation after satisfying the volt-second product principle. When the energy storage capacitor C0 is fully charged, according to the volt-second product principle, the magnetic compression inductor L1, after saturation, compresses the falling edge of the UC0 waveform, thus obtaining the pulse voltage waveform UC0. Specifically, the magnetic compression inductor L1 utilizes its ability to rapidly reach saturation, reducing the falling edge of the UC0 waveform to the 100ns level.

[0103] like Figure 5 As shown, the narrow pulse voltage module 11 further includes: a charging resistor R1 and a power switch Q1;

[0104] The charging resistor R1 is connected in series with the power switch Q1 and then connected to one end of the AC power supply Ps1 and one end of the energy storage capacitor C0, respectively.

[0105] The other end of the AC power supply Ps1 is connected to the other end of the energy storage capacitor.

[0106] In this embodiment, after the power switch Q1 is turned on, the AC power generated by the AC power supply Ps1 charges the energy storage capacitor C0 through the charging resistor R1. The function of the charging resistor R1 is to limit the current of the AC power, and it is a high-power charging resistor. The power switch Q1 is controlled to turn on and off by a drive circuit. The drive circuit is set separately, or it can be part of the device described in this embodiment.

[0107] like Figure 5 As shown, the boost isolation module 12 includes: a transformer Tr1 and a DC blocking capacitor C1;

[0108] The primary side of the transformer Tr1 is connected in parallel with the narrow pulse voltage module 11, and the secondary side is connected in series with the DC blocking capacitor and then in parallel with the test capacitor.

[0109] In this embodiment, transformer Tr1 is a step-up transformer, capable of boosting the voltage to approximately 1000V. Test capacitor C2 is a resonant capacitor, selected with a capacitance value similar to the junction capacitance of diode module D1, typically ranging from tens to hundreds of picofarads. One end of magnetic compression inductor L1 is connected to one end of energy storage capacitor C0, while the other ends of magnetic compression inductor L1 and energy storage capacitor C0 are respectively connected to the primary winding of transformer Tr1. DC blocking capacitor C1 prevents DC signals from interfering with the device. Depending on the signal frequency, DC blocking capacitor C1 isolates 10MHz signals, typically selected as 0.01uF-0.1uF. High-voltage pulse module 1 charges test capacitor C2 and the junction capacitance of diode module D1 through DC blocking capacitor C1. Therefore, this embodiment can provide high-frequency, high-voltage conditions for diode module D1, resulting in a more accurate junction capacitance.

[0110] Measure the voltage waveform UC2 across the test capacitor C2 at this time, and record the accurate first charging time t1 from T0 to T1; after removing the diode module D1, measure the voltage waveform UC2 across the test capacitor C2 again, and record the accurate second charging time t2 from T0 to T1. Calculate the junction capacitance of the diode module D1 according to formulas (1) to (5) in the above method.

[0111] like Figure 5 As shown, the DC reverse bias module 4 includes: a DC power supply DC and an AC isolation inductor L2;

[0112] The DC power supply DC and the AC isolation inductor L2 are connected in series and then in parallel across the test capacitor C2;

[0113] The DC power supply provides current in the opposite direction to the conduction direction of diode module D1.

[0114] In this embodiment, the function of the AC isolation inductor L2 is to isolate AC pulses; based on experience, an inductance of 10-20mH is generally selected. In this embodiment, the diode module D1 needs to exhibit capacitive behavior under reverse DC voltage bias to allow for junction capacitance measurement. Therefore, the DC power supply DC ensures that the diode module D1 exhibits capacitive behavior for easier measurement. Additionally, depending on the requirements, the DC power supply DC can be used to apply DC reverse bias to the diode module D1, ensuring its capacitive behavior and making the measurement more accurate.

[0115] The working process of the power diode module junction capacitance measuring device described in this embodiment will not be repeated here. For any details not covered, please refer to the above description.

[0116] The power diode module junction capacitance measurement method and apparatus described in this embodiment uses a DC reverse bias module 4 to subject the diode module D1 to capacitive behavior under DC reverse bias. Simultaneously, a high-voltage pulse module 1 subjects the diode module D1 to high-voltage reverse bias, and the charging time of the test capacitor C2 under different conditions is measured to calculate the junction capacitance of the diode module D1 connected in parallel. This method and apparatus allow the junction capacitance value of the diode module D1 to be obtained using only the charging time and known parameters, regardless of the specific conditions.

[0117] It should be understood that the specific order or hierarchy of steps in the disclosed process is an example of an exemplary method. Based on design preferences, it should be understood that the specific order or hierarchy of steps in the process may be rearranged without departing from the scope of this disclosure. The appended method claims provide elements of various steps in an exemplary order and are not intended to limit the scope to the specific order or hierarchy described.

[0118] To make the description of this disclosure more detailed and complete, illustrative descriptions of the embodiments and specific examples of the present invention have been provided above; however, this is not the only form of implementing or utilizing the specific examples of the present invention. The embodiments cover the features of multiple specific examples and the method steps and their order for constructing and operating these specific examples. However, other specific examples may also be used to achieve the same or equivalent functions and order of steps.

[0119] In the detailed description above, various features are combined together in a single embodiment to simplify this disclosure. This approach to disclosure should not be construed as reflecting an intention that embodiments of the claimed subject matter require more features than are explicitly stated in each claim. Rather, as reflected in the appended claims, the invention is presented with fewer features than all of the features in a single disclosed embodiment. Therefore, the appended claims are hereby explicitly incorporated into the detailed description, with each claim representing a separate preferred embodiment of the invention.

[0120] The disclosed embodiments have been described above to enable any person skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be applied to other embodiments without departing from the spirit and scope of this disclosure. Therefore, this disclosure is not limited to the embodiments given herein, but is consistent with the broadest scope of the principles and novel features disclosed in this application.

[0121] The foregoing description includes examples of one or more embodiments. It is certainly impossible to describe all possible combinations of components or methods in order to describe the above embodiments, but those skilled in the art will recognize that further combinations and arrangements of the various embodiments are possible. Therefore, the embodiments described herein are intended to cover all such changes, modifications, and variations that fall within the scope of the appended claims. Furthermore, the term "comprising" as used in the specification or claims is interpreted in a manner similar to the term "including," as interpreted when used as a conjunction in the claims. Additionally, the use of any term "or" in the specification of the claims is intended to mean "non-exclusive or."

[0122] Those skilled in the art will also understand that the various illustrative logical blocks, units, and steps listed in the embodiments of the present invention can be implemented by electronic hardware, computer software, or a combination of both. To clearly demonstrate the interchangeability of hardware and software, the functions of the various illustrative components, units, and steps described above have been generally described. Whether such functionality is implemented through hardware or software depends on the specific application and the overall system design requirements. Those skilled in the art can implement the described functions using various methods for each specific application, but such implementation should not be construed as exceeding the scope of protection of the embodiments of the present invention.

[0123] The various illustrative logic blocks or units described in the embodiments of this invention can be implemented or operate the described functions using a general-purpose processor, digital signal processor, application-specific integrated circuit (ASIC), field-programmable gate array or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof. The general-purpose processor can be a microprocessor; alternatively, it can be any conventional processor, controller, microcontroller, or state machine. The processor can also be implemented using a combination of computing devices, such as a digital signal processor and a microprocessor, multiple microprocessors, one or more microprocessors combined with a digital signal processor core, or any other similar configuration.

[0124] The steps of the methods or algorithms described in the embodiments of this invention can be directly embedded in hardware, a software module executed by a processor, or a combination of both. The software module can be stored in RAM, flash memory, ROM, EPROM, EEPROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium in the art. Exemplarily, the storage medium can be connected to the processor so that the processor can read information from and write information to the storage medium. Optionally, the storage medium can also be integrated into the processor. The processor and storage medium can be housed in an ASIC, which can be housed in a user terminal. Optionally, the processor and storage medium can also be housed in different components of the user terminal.

[0125] In one or more exemplary designs, the functions described in the embodiments of the present invention can be implemented in hardware, software, firmware, or any combination of these three. If implemented in software, these functions can be stored on a computer-readable medium or transmitted on a computer-readable medium in the form of one or more instructions or code. Computer-readable media include computer storage media and communication media that facilitate the transfer of computer programs from one place to another. Storage media can be any available media that can be accessed by a general-purpose or special-purpose computer. For example, such computer-readable media can include, but is not limited to, RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store program code in the form of instructions or data structures and other forms that can be read by a general-purpose or special-purpose computer, or a general-purpose or special-purpose processor. Furthermore, any connection can be suitably defined as a computer-readable medium, for example, if the software is transmitted from a website, server or other remote resource via a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL) or wirelessly, such as infrared, wireless and microwave, it is also included in the defined computer-readable medium. The disks and discs mentioned include compressed disks, laser discs, optical discs, DVDs, floppy disks, and Blu-ray discs. Disks typically copy data magnetically, while disks typically copy data optically using lasers. Combinations of the above can also be contained in computer-readable media.

[0126] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above description is only a specific embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for measuring the junction capacitance of a power diode module, characterized in that, include: A test capacitor is connected in parallel across the diode module. A pulsed high voltage is applied to the test capacitor while an initial voltage is provided across the diode module. The first charging time required for the test capacitor voltage to rise from zero to its maximum value is obtained. The directions of the pulsed high voltage and the initial voltage are opposite to the conduction direction of the diode module. After disconnecting the diode module from both ends of the test capacitor, obtain the second charging time required for the voltage of the test capacitor to rise from zero to its maximum value; The junction capacitance value of the power diode module is calculated based on the first charging time and the second charging time. The application of a pulsed high voltage to the test capacitor specifically includes: The narrow pulse voltage module generates a pulse voltage and outputs it to the boost isolation module. The boost isolation module boosts the pulse voltage to a high pulse voltage and then applies it to the test capacitor. The narrow pulse voltage module includes: an energy storage capacitor and a magnetic compression inductor; The narrow pulse voltage module generates a pulse voltage and outputs it to the boost isolation module, specifically including: The energy storage capacitor stores energy through an AC power source, providing the original pulse for the magnetic compression inductor; The magnetic compression inductor compresses the original pulse to obtain a pulse voltage output to the boost isolation module; The boost isolation module includes: a transformer; Based on the first charging time and the second charging time, the junction capacitance value of the power diode module is calculated, specifically including: By combining the second charging time, the capacitance value of the energy storage capacitor, the capacitance value of the test capacitor, and the number of transformer turns, the equivalent value of the magnetic compression inductance and the total inductance in the circuit on the transformer secondary side is calculated. The junction capacitance of the power diode module is calculated based on the equivalent value, the first charging time, and the capacitance value of the test capacitor. The second charging time can be expressed as: （1） In formula (1), This is the equivalent value of the magnetic compression inductance and the total inductance of the circuit in the transformer secondary winding. The values ​​of the test capacitor and the energy storage capacitor equivalent to those on the transformer secondary winding are expressed as follows: （2） In formula (2), This is the value of the energy storage capacitor C0 after being equivalently applied to the secondary winding of transformer Tr1. To test the capacitance value of capacitor C2; It can be represented as: （3） In formula (3), Where n is the capacitance value of the energy storage capacitor and n is the number of turns of the transformer; The first charging time can be expressed as: （4） In formula (4), The values ​​of the energy storage capacitor, test capacitor, and diode module junction capacitance, equivalent to those on the transformer secondary winding, can be expressed as: （5） In formula (5), This is the junction capacitance value of the diode module. To test the capacitance value of the capacitor, This is the value of the energy storage capacitor after being equivalent to the secondary winding of the transformer.

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