Methods to improve overlay accuracy

Abstract

This invention provides a method for improving overlay accuracy. A wafer is provided, on which a previous layer structure and a current layer structure are formed. Multiple alignment marks are formed on the previous layer structure. A resistance distribution map of the sheet resistance of the current layer structure is obtained, where the resistance value characterizes the thickness of the current layer structure. A uniformity distribution map of the uncompensated alignment amount is obtained based on the difference between the positions of the actual previous layer alignment marks and the theoretical current layer alignment marks. Modeling and fitting are performed based on the resistance distribution map and the uniformity distribution map of the uncompensated alignment amount to obtain the positions and number of current layer alignment marks where the uncompensated alignment amount is less than a preset value, and these are used as the selection positions for alignment mark shots. This invention can optimize the selection positions of alignment mark shots, resulting in higher overlay accuracy between actual patterns.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a method for improving overlay accuracy. Background Technology

[0002] During the exposure process on ASML equipment, the wafer is aligned with the previous layer by using alignment marks in the dicing channel.

[0003] In the back-end Al (aluminum) process, the uniformity of aluminum deposition thickness varies periodically with the change of the target material cycle. The longer the target material is used, the worse the uniformity of deposition thickness on the wafer becomes. Excessive Al deposition will affect the morphology of ASML alignment marks. Poor alignment mark morphology will cause errors in the lithography machine's calculations, which will then feed back an incorrect calculated value to the lithography machine. This may result in the alignment deviation between the previous layer and the current layer of the lithography machine becoming larger and larger. Then, during OVL (overlay) measurement, there will be a large OVL deviation, resulting in a large difference in overlay accuracy compensation value.

[0004] To solve the above problems, a new method for improving overlay accuracy is needed. Summary of the Invention

[0005] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a method for improving overlay accuracy, which solves the problem that in the prior art, the longer the target material is used, the worse the uniformity of the deposition thickness on the wafer becomes, and the excessively thick film deposition will affect the morphology of the alignment marks of the lithography machine, thereby affecting the alignment of the lithography machine and resulting in large differences in overlay accuracy compensation value.

[0006] To achieve the above and other related objectives, the present invention provides a method for improving overlay accuracy, comprising:

[0007] Step 1: Provide a wafer, on which a front layer structure and a current layer structure located on the front layer structure are formed, and a plurality of front layer alignment marks are formed on the front layer structure;

[0008] Step 2: Obtain the resistance distribution diagram of the sheet resistance of the current layer structure, wherein the resistance value is used to characterize the thickness of the current layer structure;

[0009] Step 3: Obtain the uniformity distribution map of the uncompensable alignment amount based on the difference between the actual positions of the previous layer alignment marks and the theoretical alignment marks of the current layer.

[0010] Step 4: Based on the resistance distribution map and the uniformity distribution map of the uncompensated alignment amount, perform modeling and fitting to obtain the position and number of the alignment marks in the current layer when the uncompensated alignment amount is less than a preset value, and use them as the selection position of the alignment mark shot.

[0011] Preferably, the front layer alignment mark in step one is set in the cutting channel.

[0012] Preferably, the front layer structure in step one is further provided with a front layer overprint mark.

[0013] Preferably, the front layer overlay mark in step one is set in the cutting channel.

[0014] Preferably, the layer structure in step one is a patterned metal layer.

[0015] Preferably, the material of the metal layer in step one is aluminum.

[0016] Preferably, the correlation between the resistance distribution map and the non-compensable uniformity distribution map in step four is greater than a first preset value.

[0017] Preferably, the correlation between the number of the previous layer alignment marks and the corresponding current layer alignment marks in step four and the alignment stability is greater than a second preset value.

[0018] Preferably, the number of the front-layer alignment marks in step four is greater than 20.

[0019] Preferably, in step four, the alignment mark of the current layer that obtains the alignment non-compensation amount less than a preset value is located at least in the middle and edge positions of the wafer.

[0020] As described above, the method for improving overlay accuracy of the present invention has the following beneficial effects:

[0021] This invention can optimize the selection position of the alignment mark shot, select the shot with good alignment mark symmetry, reduce signal noise during photolithography alignment, and thus obtain the overlay accuracy between real patterns. Attached Figure Description

[0022] Figure 1 The diagram shows a method for improving overlay accuracy according to the present invention.

[0023] Figure 2 The diagram shown is a schematic representation of the alignment marks before the modification of this invention.

[0024] Figure 3 The diagram shows the resistance distribution of the sheet resistor of the present invention.

[0025] Figure 4 The diagram shows the uniformity distribution of the non-compensable residual in the alignment according to the present invention.

[0026] Figure 5 The diagram shows the correlation between the resistance distribution diagram and the uniformity distribution diagram of the uncompensated amount in the alignment, which is a schematic diagram of the present invention.

[0027] Figure 6 This diagram illustrates the correlation between the number of alignment markers and alignment stability in this invention.

[0028] Figure 7 The diagram shows the modified alignment mark of the present invention.

[0029] Figure 8 The diagram shows a comparison of the optimized OVL EXP values ​​of the TM (photolayer, top metal layer) after the alignment mark optimization in the prior art with those of the TM (photolayer, top metal layer) after the alignment mark optimization in this invention.

[0030] Figure 9 The diagram shows a comparison between the present invention and the inline OVL (online monitored OVL value) of the M PH (top metal layer) of existing metals. Detailed Implementation

[0031] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0032] Please see Figure 1 The present invention provides a method for improving overlay accuracy, comprising:

[0033] Step 1: Provide a wafer, and form a front layer structure and a current layer structure on the front layer structure on the wafer. Multiple front layer alignment marks are formed on the front layer structure.

[0034] For example, the distribution of the front layer alignment markers is as follows Figure 2 As shown.

[0035] In embodiments of the present invention, the front layer alignment mark in step one is typically set in the cutting channel.

[0036] In an embodiment of the present invention, a front layer overprint mark is also provided on the front layer structure in step one, and the overprint accuracy can be obtained based on the position difference between the front layer overprint mark and the current layer mark.

[0037] In embodiments of the present invention, the pre-layer overlay mark in step one is typically set in the cutting path.

[0038] In an embodiment of the present invention, the layer structure in step one is a patterned metal layer.

[0039] In an embodiment of the present invention, the material of the metal layer in step one is aluminum. It should be understood that the metal layer here can also be made of materials such as copper, and is not specifically limited here.

[0040] Step 2: Obtain the resistance distribution diagram of the sheet resistance of the current layer structure. The resistance value is used to characterize the thickness of the current layer structure.

[0041] For example, in an embodiment of the present invention, the resistance distribution diagram of the sheet resistor is as follows: Figure 3 As shown.

[0042] Step 3: Obtain the uniformity distribution map of the uncompensated alignment amount based on the difference between the actual alignment marks of the previous layer and the theoretical alignment marks of the current layer; the uniformity distribution map of the uncompensated alignment amount can usually be obtained in ASML's lithography machine;

[0043] For example, in an embodiment of the present invention, the uniformity distribution map of the residue is as follows: Figure 4 As shown.

[0044] Step 4: Based on the resistance distribution map and the uniformity distribution map of the uncompensated alignment amount, modeling and fitting are performed to obtain the influence of the previous layer alignment mark on the film thickness of the current layer structure. Then, the position and number of the current layer alignment marks with the uncompensated alignment amount less than the preset value are obtained, which are used as the selection position of the subsequent alignment mark shot (forming the current layer alignment mark on the current layer structure corresponding to the previous layer alignment mark). That is, the shot with good alignment mark symmetry is selected to ensure that the selected alignment mark can truly reflect the deviation between the previous layer and the current layer. Only when the alignment is accurate can the subsequent overlay measurement be real, reducing the signal noise during photolithography alignment, thereby obtaining the overlay accuracy between real patterns.

[0045] In an embodiment of the present invention, please refer to Figure 5 The correlation between the resistance distribution map and the uniformity distribution map of the uncompensated quantity in step four is greater than the first preset value.

[0046] In an embodiment of the present invention, please refer to Figure 6 In step four, the correlation between the number of the previous layer alignment marks and the corresponding current layer alignment marks and the alignment stability is greater than the second preset value.

[0047] In an embodiment of the present invention, the number of front-layer alignment marks in step four is greater than 20.

[0048] In an embodiment of the present invention, in step four, the alignment mark of the current layer that is less than a preset value is located at least in the middle and edge positions of the wafer.

[0049] For example, the position and number of alignment markers in the layer when the corrected alignment non-compensation amount is less than a preset value, as shown in the method of the present invention. Figure 7 As shown.

[0050] Please see Figure 8 The diagram shows a comparison of the optimized OVL EXP values ​​of the existing unoptimized alignment marking and the optimized alignment marking of the TM (photo layer, top metal layer) by the present invention, through a slab experiment. EXP is one of the ten complement values ​​of OVL, which is a parameter representing the wafer level (chip test) and the pattern expansion and contraction effect between the current and previous layers. The OVL (overlay accuracy) stability after using the optimized alignment marking is much better than that of the unoptimized one, the optimal OVL value of the lot becomes more convergent, and the inter-wafer difference is effectively improved.

[0051] Please see Figure 9 Based on the long-term performance of the new alignment marker positions: TM PH (top metal layer) inline OVL (online monitored OVL value) is significantly improved and more stable, and the OCAP ratio (the proportion of the value exceeding the spec line in the SPC chart to the total value) has decreased from 13% to 0.

[0052] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0053] In summary, this invention optimizes the selection of alignment mark shots, choosing shots with good alignment mark symmetry, reducing signal noise during photolithography alignment, and thus achieving higher overlay accuracy between actual patterns. Therefore, this invention effectively overcomes various shortcomings of existing technologies and has high industrial application value.

[0054] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A method of improving overlay accuracy, comprising: At least including: Step 1: Provide a wafer, on which a front layer structure and a current layer structure located on the front layer structure are formed, and a plurality of front layer alignment marks are formed on the front layer structure; Step 2: Obtain the resistance distribution diagram of the sheet resistance of the current layer structure, wherein the resistance value is used to characterize the thickness of the current layer structure; Step 3: Obtain the uniformity distribution map of the uncompensable alignment amount based on the difference between the actual positions of the previous layer alignment marks and the theoretical alignment marks of the current layer. Step 4: Based on the resistance distribution map and the uniformity distribution map of the uncompensated alignment amount, perform modeling and fitting to obtain the position and number of alignment marks in the current layer when the uncompensated alignment amount is less than the preset value, and use them as the selection position of the alignment mark shot.

2. The method for improving overlay accuracy according to claim 1, characterized in that: The alignment mark mentioned in step one is set in the cutting channel.

3. The method for improving overlay accuracy according to claim 1, characterized in that: The front layer structure described in step one is also provided with front layer overprint marks.

4. The method for improving overlay accuracy according to claim 3, characterized in that: The pre-layer overlay markings mentioned in step one are set in the cutting path.

5. The method for improving overlay accuracy according to claim 1, characterized in that: The layer structure mentioned in step one is a patterned metal layer.

6. The method for improving overlay accuracy according to claim 5, characterized in that: The material of the metal layer in step one is aluminum.

7. The method for improving overlay accuracy according to claim 1, characterized in that: The correlation between the resistance distribution map and the non-compensable uniformity distribution map in step four is greater than the first preset value.

8. The method for improving overlay accuracy according to claim 1, characterized in that: The correlation between the number of the preceding layer alignment marks and the corresponding current layer alignment marks in step four and the alignment stability is greater than the second preset value.

9. The method for improving overlay accuracy according to claim 8, characterized in that: The number of the preceding alignment markers in step four is greater than 20.

10. The method for improving overlay accuracy according to claim 1, characterized in that: In step four, the alignment mark of the current layer, which is less than a preset value, is located at least in the middle and edge positions of the wafer.

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