Design method for improving stability of multi-stage amplification chip, chip, device and equipment
Patent Information
- Application Number
- CN202311245493.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-09-25
- Publication Date
- 2026-09-08
- Estimated Expiration
- 2043-09-25
AI Technical Summary
[0003]本发明的目的在于克服现有技术的不足,提供一种改善多级放大芯片稳定性的设计方法、芯片、器件及设备,避免了使用大宽度、高功率容量的薄膜电阻导致不连续性过大,影响芯片整体性能的问题
本发明避免了使用大宽度、高功率容量的薄膜电阻导致不连续性过大,影响芯片整体性能的问题。
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Figure CN117540697B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of microwave integrated circuits, and more specifically, to a design method, chip, device, and equipment for improving the stability of multi-stage amplifier chips. Background Technology
[0002] Impedance matching technology is a key technology for achieving good performance in microwave and radio frequency circuits. The purpose of matching technology is to transform the source and load impedances of a system to the specific impedance required by the device. This specific impedance may achieve minimum noise, optimal efficiency, optimal power, or a combination of multiple performance parameters. There is an urgent need in the field to develop better impedance matching solutions. Summary of the Invention
[0003] The purpose of this invention is to overcome the shortcomings of the prior art and provide a design method, chip, device and equipment to improve the stability of multi-stage amplifier chips, avoiding the problem of excessive discontinuity caused by the use of large-width, high-power-capacity thin-film resistors, which affects the overall performance of the chip.
[0004] The objective of this invention is achieved through the following solution: A design method for improving the stability of multi-stage amplifier chips includes the following steps: A low-pass topology matching network structure is adopted as the inter-stage matching structure of the multi-stage amplifier chip. The low-pass topology matching network structure includes an inductor. In the millimeter-wave band, the inductor of the low-pass topology matching network structure is equivalent to a transmission line. In addition, a microstrip transmission line structure composed of a thin gold layer is used in the final stage of the multi-stage amplifier chip to avoid the discontinuity problem caused by excessively wide resistance.
[0005] Furthermore, the low-pass topology matching network structure is designed with a transmission line of a certain length. By designing the length of the thin gold layer used in the transmission line of a certain length, the equivalent resistance of different resistance values can be achieved, which is used to conveniently optimize the loss.
[0006] Furthermore, the transmission line of a certain length is specifically designed to consist of transmission lines of a certain length connected in series.
[0007] Furthermore, the multi-stage amplification chip is a multi-stage amplification MMIC chip.
[0008] Furthermore, the multi-stage amplification MMIC chip includes a millimeter-wave band watt-level power amplification MMIC chip.
[0009] Furthermore, the millimeter-wave band watt-level power amplifier MMIC chip is fabricated using a 0.15µm GaN process.
[0010] A chip, wherein the matching structure is designed using the design method for improving the stability of multi-stage amplifier chips as described in any of the preceding claims.
[0011] Furthermore, the chip includes a millimeter-wave band watt-level power amplifier MMIC chip.
[0012] A device employing a design method to improve the stability of multi-stage amplifier chips, the device using the chip described above.
[0013] An apparatus employing a design method for improving the stability of multi-stage amplifier chips, the apparatus employing the device described above.
[0014] The beneficial effects of this invention include: This invention avoids the problem of excessive discontinuity caused by using large-width, high-power thin-film resistors, which affects the overall performance of the chip. Attached Figure Description
[0015] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0016] Figure 1 For MMICs that use resistors as loss matching devices; Figure 2 For MMICs that use resistors as loss matching devices; Figure 3 For an MMIC that uses a resistor as a loss matching device in the final stage. Figure 4 To match the network topology; Figure 5 This is a typical MMIC process metal layer; Figure 6 To achieve lossy matching using a thin gold layer; Figure 7 The results are stability simulations without loss matching. Figure 8 To introduce a power gain comparison after loss matching; Figure 9 To introduce power gain comparison after loss matching. Detailed Implementation
[0017] All features disclosed in all embodiments of this specification, or steps in all methods or processes implied in the disclosure, may be combined and / or extended or replaced in any way, except for mutually exclusive features and / or steps.
[0018] In view of the problems mentioned in the background, the inventors of this invention further analyzed the shortcomings of the prior art and creatively conceived corresponding solutions, and first discovered the following technical problems: An amplifier typically requires multiple cascaded stages to increase gain, especially in the millimeter-wave band where single-transistor gain is low, generally requiring four or more cascaded stages. This poses a significant challenge to the overall amplifier stability design. Hybrid integrated circuits can improve the stability of multi-stage amplification using isolators and balanced topologies. However, for MMIC amplifiers, easier-to-cascade amplifier topologies, such as lossy matched topologies, are more commonly used. Lossy matched amplifiers use resistors within their matching network, thus achieving a range of advantages including better stability, flat gain over a wide frequency range, and good input / output VSWR.
[0019] Current microwave integrated circuit technology offers various resistor fabrication methods, including TFR and MESA resistors, which can be used for matching circuit design. Many existing chips utilize resistors for lossy matching, such as... Figure 1 , Figure 2 As shown. These resistors are commonly found in the preamplifier stages of low-noise amplifier MMICs or power amplifier MMICs. The current passing through these resistors is very small, and their current capacity can be disregarded. However, the inventors discovered that sometimes lossy matching is required in the final preamplifier stage of a power amplifier MMIC, at which point the current capacity of the resistors must be considered. Figure 3 This is a matching circuit in the pre-amplitude stage of a millimeter-wave power amplifier. At this stage, the power handling capability of the resistors needs to be considered, requiring the resistor width to be widened to improve the power / current handling capacity. This matching structure improves the amplifier's stability; however, due to the significant difference between the resistor width and the microstrip line width, there is a noticeable discontinuity, thus sacrificing overall performance.
[0020] To address the aforementioned newly discovered technical problems, this invention improves the design of existing lossy matching topologies, including the use of a low-pass topology matching network structure 1 and a microstrip transmission line 2 composed of a thin gold layer. Wherein: Low-pass topology matching network structure 1: Various matching network topologies can achieve impedance matching. The low-pass structure is selected as the inter-stage matching structure for power amplifier MMICs (see...). Figure 4 In the millimeter-wave band, this inductor can be equivalently represented by a transmission line. The use of this transmission line provides the conditions for realizing the microstrip transmission line composed of a thin gold layer in this invention.
[0021] 2. Microstrip transmission lines composed of thin gold layers. MMIC processes generally employ multiple metal layers; typical microwave integrated circuit processes are shown in [reference needed]. Figure 5In common microwave integrated circuit processes, the typical thickness of a thin gold layer is 1µm. Compared to transmission lines using double-layer metal, it exhibits greater losses. Simultaneously, the current-carrying capacity of a thin gold layer is significantly greater than that of resistive materials, with a current-carrying capacity per unit width several times that of resistive materials. Using this structure in the final stage can effectively avoid discontinuity problems caused by excessively wide resistors. Furthermore, low-pass structure matching can generally be designed by using a transmission line of a certain length in series. By designing the length of the thin gold layer used in this transmission line, equivalent resistances of different values can be achieved, facilitating optimization of losses.
[0022] For example, a certain millimeter-wave power amplifier (MMIC) employs a 4-stage amplification structure. Without loss matching, the amplifier's stability factor K is only 0.266 at in-band frequencies, and the Mu value also has frequency bands where it is less than 1 (e.g., ...). Figure 7 The amplifier has an unstable region and is at risk of self-oscillation; the lossy matching scheme of this invention (e.g., [missing information]) is used in the final stage. Figure 6 The stability has been significantly improved, with the stability coefficient K value being a minimum of 1.5 across the entire frequency band, and the Mu value being greater than 1 across the entire frequency band. The entire amplifier is in an unconditionally stable state (e.g., Figure 8 Furthermore, after applying the lossy matching scheme of this invention, the overall performance of the amplifier did not change significantly, with only a slight decrease in power gain (e.g., Figure 9 ).
[0023] It should be noted that, within the scope of protection defined in the claims of this invention, the following embodiments can be combined and / or extended or replaced in any logical manner from the above specific embodiments, such as the disclosed technical principles, disclosed technical features or implicitly disclosed technical features.
[0024] Example 1 A design method for improving the stability of multi-stage amplifier chips includes the following steps: A low-pass topology matching network structure is adopted as the inter-stage matching structure of the multi-stage amplifier chip. The low-pass topology matching network structure includes an inductor. In the millimeter-wave band, the inductor of the low-pass topology matching network structure is equivalent to a transmission line. In addition, a microstrip transmission line structure composed of a thin gold layer is used in the final stage of the multi-stage amplifier chip to avoid the discontinuity problem caused by excessively wide resistance.
[0025] Example 2 Based on Example 1, the low-pass topology matching network structure is designed with a transmission line of a certain length. By designing the length of the thin gold layer used in the transmission line of a certain length, the equivalent resistance of different resistance values can be achieved, which is used to conveniently optimize the loss.
[0026] Example 3 Based on Example 2, the transmission line with a certain length is specifically designed as a series of transmission lines of a certain length.
[0027] Example 4 Based on Example 1, the multi-stage amplification chip is a multi-stage amplification MMIC chip.
[0028] Example 5 Based on Example 4, the multi-stage amplification MMIC chip includes a millimeter-wave band watt-level power amplification MMIC chip.
[0029] Example 6 Based on Example 5, the millimeter-wave band watt-level power amplifier MMIC chip is fabricated using a 0.15µm GaN process.
[0030] Example 7 A chip employs a matching structure designed using the design method for improving the stability of multi-stage amplifier chips as described in any one of Examples 1 to 6.
[0031] Example 8 Based on Example 1, the chip includes a millimeter-wave band watt-level power amplifier MMIC chip.
[0032] Example 9 A device that uses the chip described in Example 8.
[0033] Example 10 An apparatus that employs the device described in Example 9.
[0034] All parts not covered in this invention are the same as or can be implemented using existing technologies.
[0035] The above technical solution is only one embodiment of the present invention. For those skilled in the art, based on the application methods and principles disclosed in the present invention, it is easy to make various types of improvements or modifications, and not limited to the methods described in the above specific embodiments of the present invention. Therefore, the methods described above are only preferred and are not restrictive.
[0036] In addition to the examples above, other embodiments may be obtained by those skilled in the art based on the above disclosure or by making modifications using knowledge or technology in related fields. The features of each embodiment may be interchanged or replaced. Modifications and changes made by those skilled in the art that do not depart from the spirit and scope of the present invention should be within the protection scope of the appended claims.
Claims
1. A design method for improving the stability of a multi-stage amplifier chip, characterized in that, Includes the following steps: A low-pass topology matching network structure is adopted as the inter-stage matching structure of the multi-stage amplifier chip. The low-pass topology matching network structure includes an inductor. In the millimeter-wave band, the inductor of the low-pass topology matching network structure is equivalent to a transmission line. In addition, a microstrip transmission line structure composed of a thin gold layer is used in the final stage of the multi-stage amplifier chip to avoid the discontinuity problem caused by excessively wide resistance.
2. The design method for improving the stability of a multi-stage amplifier chip according to claim 1, characterized in that, The low-pass topology matching network structure is designed with a transmission line of a certain length. By designing the length of the thin gold layer used in the transmission line of a certain length, the equivalent resistance of different resistance values can be achieved, which is used to conveniently optimize the loss.
3. The design method for improving the stability of a multi-stage amplifier chip according to claim 2, characterized in that, The design of the transmission line of a certain length specifically refers to the transmission lines of a certain length connected in series.
4. The design method for improving the stability of a multi-stage amplifier chip according to claim 1, characterized in that, The multi-stage amplifier chip is a multi-stage amplifier MMIC chip.
5. The design method for improving the stability of a multi-stage amplifier chip according to claim 4, characterized in that, The multi-stage amplification MMIC chip includes a millimeter-wave band watt-level power amplification MMIC chip.
6. The design method for improving the stability of a multi-stage amplifier chip according to claim 5, characterized in that, The millimeter-wave band watt-level power amplifier MMIC chip is fabricated using a 0.15µm GaN process.
7. A chip, characterized in that, The matching structure is designed using the design method for improving the stability of multi-stage amplifier chips as described in any one of claims 1 to 6.
8. The chip according to claim 7, characterized in that, The chip includes a millimeter-wave band watt-level power amplifier MMIC chip.
9. A device employing a design method to improve the stability of multi-stage amplifier chips, characterized in that, The device uses the chip described in claim 8.
10. A device employing a design method to improve the stability of multi-stage amplifier chips, characterized in that, The device uses the component described in claim 9.
Citation Information
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