A semiconductor device and a method of fabricating the same

Abstract

The application provides a semiconductor device and a manufacturing method thereof, which can realize pre-segmentation of the conductive substrate at the wafer end through solution corrosion or dry etching or laser cutting or a patterned electroplating process. Based on this, after a sub-semiconductor unit array is prepared subsequently, no cutting and splitting is needed, thereby avoiding a series of problems such as high cost of equipment, low cutting efficiency, wafer warping, cutting edge wire drawing, metal particle pollution and the like in the subsequent conductive substrate cutting process.

Description

Technical Field

[0001] This invention relates to the field of semiconductors, and more particularly to a semiconductor device and a method for manufacturing the same. Background Technology

[0002] Semiconductor devices are ubiquitous in today's society, and semiconductor manufacturers are constantly seeking to improve the performance of their products. Vertical semiconductor devices, in particular, involve transferring the semiconductor epitaxial layer onto a second substrate using a lift-off process. This avoids a series of problems inherent in the original substrate (such as GaAs or sapphire substrates), including light absorption, non-conductivity, poor heat dissipation, and poor mechanical properties. Typically, this second substrate is a doped semiconductor conductive substrate such as Si, Ge, GaP, or SiC, or a metal substrate such as Mo, Gu, or CuW. The high conductivity and high thermal conductivity of conductive substrates, in particular, make vertical LED chips perform even better. However, the fabrication process of vertical semiconductor devices on conductive substrates mainly faces the following challenges:

[0003] First, metal bonding is used to bond the thin-film conductive substrate to the semiconductor epitaxial layer. However, due to the large difference in thermal expansion coefficients between metal and semiconductor materials, significant wafer warping occurs after the growth substrate is peeled off due to this thermal mismatch. This severely affects subsequent semiconductor device processes such as photolithography, etching, and deposition. Currently, this problem is mainly alleviated by temporarily bonding a temporary rigid substrate or thickening the conductive substrate to increase its mechanical strength.

[0004] Secondly, the final step is to cut the conductive substrate wafer array into individual sub-semiconductor units. This is usually done using blade mechanical cutting or ultraviolet laser cutting. The conductive substrate has good ductility, but blade cutting can cause problems such as burrs at the joints and edge wire drawing. Laser cutting uses high heat at the laser focus to vaporize or melt the metal to cut the conductive substrate, which carries risks such as thermal deformation, oxidation, and debris splashing. All of these can affect the reliability of semiconductor devices.

[0005] Then, if a conductive silicon substrate is used, the mechanical properties are very poor after the silicon substrate is thinned, resulting in a high breakage rate and very high process requirements.

[0006] In view of this, the inventor has specifically designed a semiconductor device and a method for manufacturing the same, which leads to this invention. Summary of the Invention

[0007] The purpose of this invention is to provide a semiconductor device and a method for manufacturing the same, which eliminates the problem of poor reliability caused by the cutting process of the conductive substrate by dividing the conductive substrate at the wafer end to match the sub-semiconductor units.

[0008] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0009] A method for fabricating a semiconductor device, comprising:

[0010] S01, Provide a growth substrate;

[0011] S02. Growing an epitaxial stack, wherein the epitaxial stack includes at least a first type semiconductor layer, an active layer, and a second type semiconductor layer stacked sequentially along the surface of the growth substrate;

[0012] S03. Etch the epitaxial stack to a portion of the first type semiconductor layer to form a plurality of mesa isolated from each other by trenches;

[0013] S04. A second electrode is formed on the surface of each of the mezzanines, and a first electrode corresponding to the mezzanine is formed in the trench.

[0014] S05. A dicing channel for dividing and forming a plurality of sub-semiconductor units is preset in the trench, and a first insulating layer is made. The first insulating layer exposes the dicing channel and extends to the side wall of the mesa by covering the first electrode.

[0015] S06. Deposit a first metal layer, which is formed on the surface of the sub-semiconductor unit as a bonding metal by contacting the second electrode, and the first metal layer is isolated from the first electrode by the first insulating layer.

[0016] S07. A composite substrate is provided, the composite substrate including a temporary substrate and a conductive substrate separately formed on the surface of the temporary substrate; each of the conductive substrates is aligned with the sub-semiconductor unit;

[0017] S08. Deposit a second metal layer on the surface of the conductive substrate;

[0018] S09. The first metal layer and the second metal layer are aligned and bonded together, so that the conductive substrate serves as an independent carrier plate for the sub-semiconductor unit;

[0019] S10. Remove the growth substrate to expose the first type of semiconductor layer;

[0020] S11. On the surface of the first type semiconductor layer, the first electrode and the first type semiconductor layer above the dicing channel are removed by photolithography and etching processes to divide the sub-semiconductor units and expose the first electrode corresponding to each sub-semiconductor unit.

[0021] S12. A transition film is provided. After the transition film is adhered to the surface of the first type of semiconductor layer, the temporary substrate is removed to expose the conductive substrate. The surface of the conductive substrate is then adhered to the conductive film and the transition film is removed. After spot testing of each sub-semiconductor unit through the exposed surfaces of the conductive film and the first electrode, the sorting of each sub-semiconductor unit is completed by expanding the film with a blue film.

[0022] Preferably, the composite substrate is obtained by the following method:

[0023] S07-1, Provide a temporary substrate;

[0024] S07-2, A conductive substrate is bonded to the surface of the temporary substrate by a bonding material layer;

[0025] S07-3. The conductive substrate is separated and formed on the surface of the temporary substrate, and each of the conductive substrates is aligned with the sub-semiconductor unit.

[0026] Preferably, the conductive substrate is separated by solution etching, dry etching, laser cutting, or patterned electroplating.

[0027] Preferably, the bonding material includes oxide bonding materials, metal bonding materials, or organic compound bonding materials.

[0028] Preferably, the conductive substrate comprises a metal substrate or a doped semiconductor substrate. Further, the metal substrate includes, but is not limited to, copper substrates, molybdenum substrates, and copper-tungsten substrates, and the doped semiconductor substrate includes, but is not limited to, silicon, germanium, gallium phosphide, and silicon carbide.

[0029] Preferably, step S12 specifically includes:

[0030] S12-1. Provide a transition film and adhere the transition film to the surface of the first type semiconductor layer;

[0031] S12-2, Adhere the transition film to the surface of the sensing layer;

[0032] S12-3. Remove the temporary carrier and temporary bonding material to expose the conductive substrate;

[0033] S12-4. The surface of the conductive substrate is adhered to the conductive film, and the sensing layer and the transition film are desorbed by the corresponding sensing source to expose the surface of the first electrode.

[0034] S12-5. Perform point measurements on each of the sub-semiconductor units through the exposed surfaces of the conductive film and the first electrode;

[0035] S12-6. The semiconductor device is transferred from the conductive film to the blue film, and the blue film is heated and expanded to complete the sorting of each sub-semiconductor unit by increasing the spacing between each sub-semiconductor unit located on the surface of the blue film.

[0036] Preferably, the sensing layer comprises any one of thermal sensing materials, ultraviolet light sensing materials, laser sensing materials, radiation sensing materials, plasma sensing materials, and microwave sensing materials.

[0037] Correspondingly, the sensing source includes a heat source, an ultraviolet light source, a laser source, a radiation source, a plasma source, or a microwave source.

[0038] The present invention also provides a semiconductor device manufactured by any of the methods described above.

[0039] Preferably, the semiconductor device includes a GaN-based LED chip.

[0040] Preferably, the semiconductor device includes a solar cell.

[0041] Preferably, the semiconductor device includes a semiconductor laser.

[0042] As can be seen from the above technical solutions, based on the semiconductor device and its fabrication method provided by the present invention, the conductive substrate can be pre-divided at the wafer end through solution etching, dry etching, laser cutting, or patterned electroplating processes. Therefore, after the subsequent fabrication of the sub-semiconductor unit array, there is no need for further cutting and splitting, thus avoiding a series of problems such as expensive equipment, low cutting efficiency, wafer warping, edge drawing, and metal particle contamination during subsequent conductive substrate cutting. Attached Figure Description

[0043] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0044] Figures 1 to 12 This is a schematic diagram of the structure corresponding to the steps of the semiconductor device fabrication method provided in the embodiments of the present invention;

[0045] Explanation of symbols in the diagram:

[0046] 1. Growth substrate, 2. Buffer layer, 3. Type I semiconductor layer, 4. Active layer, 5. Type II semiconductor layer, 6. Trench, 7. Mesa, 8. Second electrode, 9. First electrode, 10. First insulating layer, 11. First metal layer, 12. Temporary substrate, 13. Bonding material layer, 14. Conductive substrate, 15. Second metal layer. Detailed Implementation

[0047] To make the content of this invention clearer, the following description, in conjunction with the accompanying drawings, further illustrates the invention. This invention is not limited to this specific embodiment. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without inventive effort are within the scope of protection of this invention.

[0048] A method for fabricating a semiconductor device, comprising:

[0049] S01, such as Figure 1 As shown, a growth substrate 1 is provided;

[0050] It should be noted that, in one embodiment of the present invention, the growth substrate 1 includes, but is not limited to, a sapphire substrate or a GaAs substrate.

[0051] S02, such as Figure 2 As shown, an epitaxial stack is grown, the epitaxial stack comprising at least a first type semiconductor layer 3, an active layer 4, and a second type semiconductor layer 5 sequentially stacked along the surface of the growth substrate 1;

[0052] In one embodiment of the present invention, the semiconductor device includes an LED chip, a laser device, or a solar cell device. Further, the epitaxial stack includes an InP-based, GaAs-based, or GaN-based semiconductor material functional layer.

[0053] It should be noted that, in one embodiment of the present invention, a buffer layer 2 or the like for improving crystal quality may be provided between the growth substrate 1 and the first type semiconductor layer 3, and this application does not limit this.

[0054] In one embodiment of the present invention, the types of the first type semiconductor layer 3, the active layer 4 and the second type semiconductor layer 5 are not limited in the semiconductor device of this embodiment. For example, the first type semiconductor layer 3 may be, but is not limited to, an N-type gallium nitride layer, and correspondingly, the second type semiconductor layer 5 may be, but is not limited to, a P-type gallium nitride layer.

[0055] S03, such as Figure 3 As shown, the epitaxial stack is etched to a portion of the first type semiconductor layer 3 to form a plurality of mesa 7 that are isolated from each other by trenches 6;

[0056] In one embodiment of the present invention, MESA etching is performed by photolithography and etching to form a plurality of mesa 7 isolated from each other by trench 6.

[0057] It should be emphasized that, in order to highlight the technical points of the present invention, only two mesa 7 in the micro-light-emitting device are shown in the figure. In actual use, the substrate surface may contain tens of thousands of mesa 7, depending on the specific situation. This application does not limit this.

[0058] S04, such as Figure 4 As shown, a second electrode 8 is formed on the surface of each of the mesa 7, and a first electrode 9 corresponding to the mesa 7 is formed in the groove 6;

[0059] In one embodiment of the present invention, the second electrode 8 and the first electrode 9 comprise one or more of indium, tin, aluminum, gold, platinum, zinc, silver, titanium, lead, and nickel.

[0060] S05, such as Figure 5 As shown, a dicing channel for dividing and forming a plurality of sub-semiconductor units is preset in the trench 6, and a first insulating layer 10 is fabricated. The first insulating layer 10 exposes the dicing channel and extends to the sidewall of the mesa 7 by covering the first electrode 9.

[0061] In one embodiment of the present invention, the first insulating layer 10 is exposed by photolithography and etching and extends to the sidewall of the mesa 7 by covering the first electrode 9.

[0062] Based on the above embodiments, in one embodiment of this application, the first insulating layer 10 includes, but is not limited to, a silicon dioxide layer.

[0063] S06, such as Figure 6 As shown, a first metal layer 11 is deposited, which is formed on the surface of the sub-semiconductor unit by contacting the second electrode 8 as a bonding metal, and the first metal layer 11 is isolated from the first electrode 9 by the first insulating layer 10.

[0064] In one embodiment of this application, the first metal layer 11 includes a bonding metal layer.

[0065] S07. A composite substrate is provided, the composite substrate including a temporary substrate 12 and a conductive substrate 14 separately formed on the surface of the temporary substrate 12; each of the conductive substrates 14 is aligned with the sub-semiconductor unit;

[0066] Based on the above embodiments, in one embodiment of this application, such as Figure 7As shown, the conductive substrate 14 is bonded to the surface of the temporary substrate 12 via a bonding material layer 13; specifically, the composite substrate is obtained by the following method:

[0067] S07-1, Provide a temporary substrate 12;

[0068] S07-2, A conductive substrate 14 is bonded to the surface of the temporary substrate 12 through a bonding material layer 13;

[0069] S07-3. The conductive substrate 14 is separated and formed on the surface of the temporary substrate 12, and each of the conductive substrates 14 is aligned with the sub-semiconductor unit.

[0070] Based on the above embodiments, in one embodiment of this application, the bonding material includes oxide bonding materials, metal bonding materials, or organic compound bonding materials.

[0071] Based on the above embodiments, in one embodiment of this application, the conductive substrate 14 includes a metal substrate or a doped semiconductor substrate. Further, the metal substrate includes, but is not limited to, a copper substrate, a molybdenum substrate, or a copper-tungsten substrate, and the doped semiconductor substrate includes, but is not limited to, silicon, germanium, gallium phosphide, or silicon carbide.

[0072] Based on the above embodiments, in one embodiment of this application, the temporary substrate 12 includes a sapphire substrate.

[0073] Based on the above embodiments, in one embodiment of this application, the conductive substrate 14 is separated by solution etching, dry etching, laser cutting, or patterned electroplating processes.

[0074] S08, such as Figure 8 As shown, a second metal layer 15 is deposited on the surface of the conductive substrate 14;

[0075] In one embodiment of this application, the second metal layer 15 includes a bonding metal layer.

[0076] S09, such as Figure 9 As shown, the first metal layer 11 and the second metal layer 15 are aligned and bonded to obtain the following... Figure 10 The structure shown allows the conductive substrate 14 to serve as an independent carrier plate for the sub-semiconductor unit;

[0077] S10, such as Figure 11 As shown, the growth substrate 1 is removed to expose the first type semiconductor layer 3;

[0078] Based on the above embodiments, in one embodiment of this application, the growth substrate 1 is removed by laser stripping.

[0079] In one embodiment of the present invention, when a buffer layer 2 or the like for improving crystal quality is provided between the growth substrate 1 and the first type semiconductor layer 3, it must be removed at the same time in order to expose the first type semiconductor layer 3.

[0080] In one embodiment of the present invention, step S10 further includes: forming a roughened surface on the exposed surface of the first type semiconductor layer 3 by an etching process.

[0081] S11, such as Figure 12 As shown, on the surface of the first type semiconductor layer 3, the first electrode 9 and the first type semiconductor layer 3 above the dicing channel are removed by photolithography and etching processes to divide the sub-semiconductor units and expose the first electrode 9 corresponding to each sub-semiconductor unit.

[0082] S12. A transition film is provided. After the transition film is adhered to the surface of the first type semiconductor layer 3, the temporary substrate 12 is removed to expose the conductive substrate 14. The surface of the conductive substrate 14 is then adhered to the conductive film, and the transition film is removed again. After spot testing of each sub-semiconductor unit through the exposed surfaces of the conductive film and the first electrode 9, the sorting of each sub-semiconductor unit is completed by expanding the film with a blue film.

[0083] In one embodiment of the present invention, step S12 specifically includes:

[0084] S12-1. Provide a transition film and adhere the transition film to the surface of the first type semiconductor layer 3;

[0085] S12-2, Adhere the transition film to the surface of the sensing layer;

[0086] In one embodiment of the present invention, the sensing layer includes any one of thermal sensing materials, ultraviolet light sensing materials, laser sensing materials, radiation sensing materials, plasma sensing materials, and microwave sensing materials.

[0087] S12-3. Remove the temporary carrier plate and temporary bonding material to expose the conductive substrate 14;

[0088] S12-4. The surface of the conductive substrate 14 is attached to the conductive film, and the sensing layer and the transition film are desorbed by the corresponding sensing source to expose the surface of the first electrode 9.

[0089] Correspondingly, the sensing source includes a heat source, an ultraviolet light source, a laser source, a radiation source, a plasma source, or a microwave source.

[0090] S12-5. Point measurements are performed on each of the sub-semiconductor units through the exposed surfaces of the conductive film and the first electrode 9.

[0091] S12-6. The semiconductor device is transferred from the conductive film to the blue film, and the blue film is heated and expanded to complete the sorting of each sub-semiconductor unit by increasing the spacing between each sub-semiconductor unit located on the surface of the blue film.

[0092] This invention also provides a semiconductor device manufactured by any of the methods described above.

[0093] In one embodiment of the present invention, the semiconductor device includes a GaN-based LED chip.

[0094] In another embodiment of the invention, the semiconductor device includes a solar cell.

[0095] In yet another embodiment of the invention, the semiconductor device includes a semiconductor laser.

[0096] As can be seen from the above technical solutions, based on the semiconductor device and its fabrication method provided by the present invention, the conductive substrate 14 can be pre-divided at the wafer end through solution etching, dry etching, laser cutting, or patterned electroplating processes. Therefore, after the subsequent fabrication of the sub-semiconductor unit array, there is no need for further cutting and splitting, thus avoiding a series of problems such as expensive equipment, low cutting efficiency, wafer warping, edge drawing, and metal particle contamination during the subsequent cutting of the conductive substrate 14.

[0097] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0098] It should also be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that an article or apparatus comprising a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such an article or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the article or apparatus that includes the aforementioned element.

[0099] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for fabricating a semiconductor device, characterized in that, include: S01, Provide a growth substrate; S02. Growing an epitaxial stack, wherein the epitaxial stack includes at least a first type semiconductor layer, an active layer, and a second type semiconductor layer stacked sequentially along the surface of the growth substrate; S03. Etch the epitaxial stack to a portion of the first type semiconductor layer to form a plurality of mesa isolated from each other by trenches; S04. A second electrode is formed on the surface of each of the mezzanines, and a first electrode corresponding to the mezzanine is formed in the trench. S05. A dicing channel for dividing and forming a plurality of sub-semiconductor units is preset in the trench, and a first insulating layer is made. The first insulating layer exposes the dicing channel and extends to the side wall of the mesa by covering the first electrode. S06. Deposit a first metal layer, which is formed on the surface of the sub-semiconductor unit as a bonding metal by contacting the second electrode, and the first metal layer is isolated from the first electrode by the first insulating layer. S07. A composite substrate is provided, the composite substrate including a temporary substrate and a conductive substrate separately formed on the surface of the temporary substrate; each of the conductive substrates is aligned with the sub-semiconductor unit; S08. Deposit a second metal layer on the surface of the conductive substrate; S09. The first metal layer and the second metal layer are aligned and bonded together, so that the conductive substrate serves as an independent carrier plate for the sub-semiconductor unit; S10. Remove the growth substrate to expose the first type of semiconductor layer; S11. On the surface of the first type semiconductor layer, the first electrode and the first type semiconductor layer above the dicing channel are removed by photolithography and etching processes to divide the sub-semiconductor units and expose the first electrode corresponding to each sub-semiconductor unit. S12. A transition film is provided. After the transition film is adhered to the surface of the first type of semiconductor layer, the temporary substrate is removed to expose the conductive substrate. The surface of the conductive substrate is then adhered to the conductive film and the transition film is removed. After spot testing of each sub-semiconductor unit through the exposed surfaces of the conductive film and the first electrode, the sorting of each sub-semiconductor unit is completed by expanding the film with a blue film.

2. The method for fabricating a semiconductor device according to claim 1, characterized in that, The composite substrate is obtained by the following method: S07-1, Provide a temporary substrate; S07-2, A conductive substrate is bonded to the surface of the temporary substrate by a bonding material layer; S07-3. The conductive substrate is separated and formed on the surface of the temporary substrate, and each of the conductive substrates is aligned with the sub-semiconductor unit.

3. The method for fabricating a semiconductor device according to claim 2, characterized in that, The conductive substrate is separated by solution etching, dry etching, laser cutting, or patterned electroplating processes.

4. The method for fabricating a semiconductor device according to claim 2, characterized in that, The bonding material includes oxide bonding materials, metal bonding materials, or organic compound bonding materials.

5. The method for fabricating a semiconductor device according to claim 1, characterized in that, The conductive substrate includes a metal substrate or a doped semiconductor substrate.

6. The method for fabricating a semiconductor device according to claim 1, characterized in that, Step S12 specifically includes: S12-1. Provide a transition film and adhere the transition film to the surface of the first type semiconductor layer; S12-2, Adhere the transition film to the surface of the sensing layer; S12-3. Remove the temporary substrate and temporary bonding material to expose the conductive substrate; S12-4. The surface of the conductive substrate is adhered to the conductive film, and the sensing layer and the transition film are desorbed by the corresponding sensing source to expose the surface of the first electrode. S12-5. Perform point measurements on each of the sub-semiconductor units through the exposed surfaces of the conductive film and the first electrode; S12-6. The semiconductor device is transferred from the conductive film to the blue film, and the blue film is heated and expanded to complete the sorting of each sub-semiconductor unit by increasing the spacing between each sub-semiconductor unit located on the surface of the blue film.

7. The method for fabricating a semiconductor device according to claim 6, characterized in that, The sensing layer includes any one of thermal sensing materials, ultraviolet light sensing materials, laser sensing materials, radiation sensing materials, plasma sensing materials, and microwave sensing materials; correspondingly, the sensing source includes a heat source, an ultraviolet light source, a laser source, a radiation source, a plasma source, or a microwave source.

8. A semiconductor device, characterized in that, It is manufactured by the manufacturing method according to any one of claims 1 to 7.

9. The semiconductor device according to claim 8, characterized in that, The semiconductor device includes a GaN-based LED chip.

10. The semiconductor device according to claim 8, characterized in that, The semiconductor device includes a solar cell.

11. The semiconductor device according to claim 8, characterized in that, The semiconductor device includes a semiconductor laser.

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