LED drive control circuit

Abstract

An LED driving control circuit is provided, configured to generate a demagnetization detection signal representing a demagnetization condition of a primary winding of a system transformer based on a gate drive signal for driving on and off of a power switch and a current sense signal representing a current flowing through the primary winding of the system transformer; control a proportional relationship between an entire switching cycle of the power switch and twice demagnetization time of the primary winding of the system transformer to remain unchanged and generate a cycle duration indication signal indicating a duration of the switching cycle of the power switch based on the demagnetization detection signal; adjust a switching frequency of the power switch and generate a frequency indication signal indicating an adjusted switching frequency of the power switch based on the cycle duration indication signal; generate a switching control signal for controlling on and off of the power switch based on the frequency indication signal; and generate the gate drive signal based on the switching control signal.

Description

Technical Field

[0001] This invention relates to the field of circuits, and more specifically to an LED driving control circuit. Background Technology

[0002] With the rapid development of Light Emitting Diode (LED) technology, LED lights have gradually replaced traditional incandescent and fluorescent lamps and are widely used. LED driver control circuits using AC-DC conversion are favored because they can be used directly on AC mains power. However, due to fluctuations in the AC power grid and different actual application environments, LED lights often experience flickering and low efficiency due to large current ripple flowing through them. This not only wastes energy but also poses certain health risks to humans if exposed to such lighting conditions for extended periods. Summary of the Invention

[0003] According to an embodiment of the present invention, an LED driving control circuit is configured to: generate a demagnetization detection signal characterizing the demagnetization of the primary winding of the system transformer based on a gate driving signal for driving the power switch to turn on and off and a current sensing signal characterizing the current flowing through the primary winding of the system transformer; based on the demagnetization detection signal, maintain the proportional relationship between the entire switching cycle of the power switch and twice the demagnetization time of the primary winding of the system transformer and generate a period duration indication signal indicating the switching cycle duration of the power switch; based on the period duration indication signal, adjust the switching frequency of the power switch and generate a frequency indication signal indicating the adjusted switching frequency of the power switch; based on the frequency indication signal, generate a switching control signal for controlling the power switch to turn on and off; and based on the switching control signal, generate a gate driving signal for driving the power switch to turn on and off. Attached Figure Description

[0004] The invention can be better understood from the following description of specific embodiments of the invention in conjunction with the accompanying drawings, wherein:

[0005] Figure 1 A schematic block diagram of a traditional LED driver control circuit is shown.

[0006] Figure 2 It shows Figure 1 The diagram shows the waveforms of several related signals in the LED driver control circuit.

[0007] Figure 3 A schematic block diagram of an LED driving control circuit according to an embodiment of the present invention is shown.

[0008] Figure 4 It shows Figure 3The diagram shows an example implementation circuit of the double demagnetization control module and the dynamic clamping frequency control module.

[0009] Figure 5 It shows Figure 4 The diagram shows the waveforms of several relevant signals from the double demagnetization control module. Detailed Implementation

[0010] The features and exemplary embodiments of various aspects of the present invention will now be described in detail. Numerous specific details are set forth in the following detailed description to provide a comprehensive understanding of the invention. However, it will be apparent to those skilled in the art that the invention may be practiced without requiring some of these specific details. The following description of embodiments is merely intended to provide a better understanding of the invention by illustrating examples of the invention. The invention is by no means limited to any specific configuration and algorithm presented below, but covers any modifications, substitutions, and improvements to elements, components, and algorithms without departing from the spirit of the invention. Well-known structures and techniques are not shown in the drawings and the following description in order to avoid unnecessarily obscuring the invention. Furthermore, it should be noted that the term "A connected to B" as used herein can mean "A and B are directly connected" or "A and B are indirectly connected via one or more other elements."

[0011] Figure 1 A schematic block diagram of a traditional LED driver control circuit is shown. (For example...) Figure 1 As shown, the LED driving control circuit 100 includes a demagnetization detection module 102, a double demagnetization control module 104, a logic control module 106, and a gate driving module 108. Specifically: the demagnetization detection module 102 generates a demagnetization detection signal DEM characterizing the demagnetization of the primary winding of the system transformer T1 based on the gate driving signal Gate used to drive the power switch M1 to turn on and off, and a current sensing signal CS characterizing the current flowing through the primary winding of the system transformer T1; the double demagnetization control module 104, based on the demagnetization detection signal DEM, maintains a constant ratio between the entire switching cycle of the power switch M1 and twice the demagnetization time of the primary winding of the system transformer T1, and generates a period duration indication signal indicating the switching cycle duration of the power switch M1; the logic control module 106 generates a logic control signal for controlling the turning on and off of the power switch M1 based on the period duration indication signal; and the gate driving circuit 108 generates a gate driving signal Gate based on the logic control signal.

[0012] In the LED driving system employing the LED driving control circuit 100, since the turns ratio Np / Ns of the primary winding to the secondary winding of the system transformer T1, the resistance value Rcs of the current sensing resistor Rcs, and the peak current sampling value Vcs,peak flowing through the primary winding of the system transformer T1 are all fixed quantities, the proportional relationship between the entire switching cycle of the power switch M1 and twice the demagnetization time of the primary winding of the system transformer T1 can be kept constant by controlling the double demagnetization control module 108, thus keeping the output current Iout of the LED driving system constant. Specifically, the output current Iout of the LED driving system can be expressed by the following equation:

[0013]

[0014] Figure 2 It shows Figure 1 The diagram shows the waveforms of several related signals in the LED driver control circuit. Gate represents the gate drive signal used to turn power switch M1 on and off; Drain represents the drain voltage of power switch T1. (Combined with...) Figure 1 and Figure 2 It can be seen that although the adaptive constant current control effect can be achieved by the double demagnetization control module 104, the system output efficiency is not high. This is because in some switching cycles, the power switch M1 may not be controlled to change from the off state to the on state when the drain voltage of the power switch M1 reaches the resonant valley. As a result, the power falling on the power switch M1 under the same input power is larger, the output power is reduced, and the system output efficiency is affected.

[0015] In view of the above, an LED driving control circuit according to an embodiment of the present invention is proposed. By keeping the ratio between the entire switching cycle of the control power switch M1 and twice the demagnetization time of the primary winding of the system transformer T1 constant, the switching frequency of the power switch M1 is kept within a predetermined frequency range. This ensures that the power switch M1 changes from the off state to the on state approximately when its drain voltage reaches the resonant valley in each switching cycle. Therefore, the switching loss of the power switch M1 can be reduced, the system efficiency can be improved, and the consistency of the system operating frequency can be guaranteed under different input voltages.

[0016] Figure 3 A schematic block diagram of an LED driving control circuit according to an embodiment of the present invention is shown. Figure 3As shown, the LED driving control circuit 300 according to an embodiment of the present invention includes a demagnetization detection module 302, a double demagnetization control module 304, a dynamic clamping frequency control module 306, a logic control module 308, and a gate driving module 310, wherein: the demagnetization detection module 302 is configured to generate a demagnetization detection signal DEM characterizing the demagnetization of the primary winding of the system transformer T1 based on the gate driving signal Gate used to drive the power switch M1 to turn on and off and the current sensing signal CS characterizing the current flowing through the primary winding of the system transformer T1; the double demagnetization control module 304 is configured to control the entire switching cycle of the power switch M1 and the primary winding of the system transformer T1 based on the demagnetization detection signal DEM. The proportional relationship between twice the demagnetization time of the winding remains unchanged and a period duration indication signal is generated to indicate the switching period duration of the power switch M1; the dynamic clamping frequency control module 306 is configured to adjust the switching frequency of the power switch M1 based on the period duration indication signal (i.e., to keep the switching frequency of the power switch M1 within a predetermined frequency range) and generate a frequency indication signal to indicate the adjusted switching frequency of the power switch M1; the logic control module 308 is configured to generate a switching control signal for controlling the on and off of the power switch M1 based on the frequency indication signal; and the gate drive module 310 is configured to generate a gate drive signal Gate for driving the power switch M1 to be on and off based on the switching control signal.

[0017] like Figure 3 As shown, in some embodiments, the dynamic clamping control module 306 includes a cycle duration judgment unit 3062 and a switching frequency locking unit 3064, wherein: the cycle duration judgment unit 3062 is configured to generate a duration range indication signal based on the cycle duration indication signal, which characterizes whether the switching cycle duration of the power switch M1 is within a predetermined duration range; the switching frequency locking unit 3064 is configured to adjust the switching frequency of the power switch M1 based on the duration range indication signal and generate a frequency indication signal indicating the adjusted switching frequency of the power switch M1.

[0018] Figure 4 It shows Figure 3 The diagram shows an example implementation circuit of the double demagnetization control module and the dynamic clamping frequency control module. Figure 4 As shown, in some embodiments, the double demagnetization control module 304 includes an operational amplifier buffer OP1, switches S1, S2, and S3, current sources I1 and I2, and a charging / discharging capacitor C1; the cycle duration determination unit 3062 includes comparators COMP1 and COMP2 and D flip-flops DFFclk1 and DFFclk2; the switching frequency locking unit 3064 includes an accumulator and a subtractor.

[0019] Figure 5 It shows Figure 4The diagram shows the waveforms of several related signals of the double demagnetization control module, where: Gate represents the gate drive signal used to turn power switch M1 on and off; DEM represents the demagnetization detection signal; S1 represents the short pulse signal used to control the turn-on and turn-off of switch S1; S2 represents the signal used to control the turn-on and turn-off of switch S2, which is implemented as the inverted signal of the demagnetization detection signal DEM; S3 represents the signal used to control the turn-on and turn-off of switch S3, which is implemented as the in-phase signal of the demagnetization detection signal DEM; and Vramp represents the voltage across the charging / discharging capacitor C1.

[0020] like Figure 4 and Figure 5 As shown, in some embodiments, the operation of the double demagnetization control module 304 includes: when the LED driver control circuit 300 is powered on, the gate drive signal Gate changes from low level to high level, the power switch M1 changes from off state to on state, switch S1 changes from off state to on state and quickly changes from on state to off state, switch S2 changes from off state to on state, switch S3 remains off state, the operational amplifier buffer OP1 sets the initial voltage on the charging / discharging capacitor C1 to a predetermined reference voltage Vref, and the current source I1 charges the charging / discharging capacitor C1, causing the voltage Vt on the charging / discharging capacitor C1 to gradually increase from the predetermined reference voltage Vref; when the gate drive signal Gate changes from high level to low level, the demagnetization detection signal DEM changes from low level to high level, and switch S1 remains off state. In the off state, switch S2 changes from the on state to the off state, and switch S3 changes from the off state to the on state. Current source I2 discharges the charging / discharging capacitor C1, causing the voltage Vt on the charging / discharging capacitor C1 to begin to decrease. When the demagnetization detection signal DEM changes from high level to low level, switch S1 remains in the off state, switch S2 changes from the off state to the on state, and switch S3 changes from the on state to the off state. Current source I1 continues to charge the charging / discharging capacitor C1. When the duration for which current source I1 continues to charge the charging / discharging capacitor C1 reaches the duration for which current source I2 discharges the charging / discharging capacitor C2, switch S1 changes from the off state to the on state, switch S2 remains in the on state, and switch S3 remains in the off state. The voltage on the charging / discharging capacitor C1 decreases back to the predetermined reference voltage Vref, and the next switching cycle begins.

[0021] Combination Figure 4 and Figure 5As can be seen, in some embodiments, the double demagnetization control module 304 can be further configured to: control current source I1 to charge the charging / discharging capacitor C1 and control current source I2 to discharge the charging / discharging capacitor C1 based on the demagnetization detection signal DEM, and use the voltage Vt on the charging / discharging capacitor C1 as a period duration indication signal, wherein the initial voltage of the charging / discharging capacitor C1 is a reference voltage Vref. For example, when the demagnetization detection signal DEM is low, the current source I1 is controlled to charge the charging / discharging capacitor C1; when the demagnetization detection signal DEM is high, the current source I2 is controlled to discharge the charging / discharging capacitor C1; and after the demagnetization detection signal DEM changes from high to low, when the duration for which the current source I1 continues to charge the charging / discharging capacitor C1 reaches the duration for which the current source I2 discharges the charging / discharging capacitor C1, the voltage on the charging / discharging capacitor C1 is reset to the predetermined reference voltage Vref. That is, the switching period duration of the power switch M1 can be timed by charging and discharging the charging / discharging capacitor C1.

[0022] like Figure 4 As shown, in some embodiments, the operation of the dynamic clamping control module 306 includes: comparator COMP1 compares the voltage Vt on the charging / discharging capacitor C1 with the voltage threshold VH. If the voltage Vt on the charging / discharging capacitor C1 is less than the voltage threshold VH, it outputs logic 0; otherwise, it outputs logic 1. Comparator COMP2 compares the voltage Vt on the charging / discharging capacitor C1 with the voltage threshold VL. If the voltage Vt on the charging / discharging capacitor C1 is greater than the voltage threshold VL, it outputs logic 0; otherwise, it outputs logic 1. D flip-flop DFFclk1 outputs a pulse width modulation signal PWM (i.e., Dw = PWM) representing the switching frequency of the power switch M1 when comparator COMP1 outputs logic 1, and outputs logic 0 (i.e., Dw = 0) when comparator COMP1 outputs logic 0. D flip-flop DFFclk2 outputs a pulse width modulation signal PWM (i.e., Dw = PWM) representing the switching frequency of the power switch M1 when comparator COMP1 outputs logic 1, and outputs logic 0 (i.e., Dw = 0) when comparator COMP2 outputs logic 0. When the output logic is 1, the output is a pulse width modulation signal PWM (i.e., Up = PWM) representing the switching frequency of power switch M1, and when the comparator COMP2 outputs logic 0, the output is logic 0 (i.e., Up = 0). When the D flip-flop DFFclk1 outputs the pulse width modulation signal PWM representing the switching frequency of power switch M1, the accumulator adjusts the switching frequency of power switch M1 by reducing the number of resonants in the pulse width modulation signal PWM and generates a frequency indication signal indicating the adjusted switching frequency of power switch M1. When the D flip-flop DFFclk2 outputs the pulse width modulation signal PWM representing the switching frequency of power switch M1, the accumulator adjusts the switching frequency of power switch M1 by increasing the number of resonants in the pulse width modulation signal PWM and generates a frequency indication signal indicating the adjusted switching frequency of power switch M1.

[0023] That is, in some embodiments, the period duration judging unit 3062 is further configured to generate a duration range indication signal by comparing the voltage Vt on the charging and discharging capacitor C1 with the voltage thresholds VH and VL. For example, the voltage Vt on the charging and discharging capacitor C1 is compared with the voltage threshold VH by the comparator COMP1, and the voltage Vt on the charging and discharging capacitor C1 is compared with the voltage threshold VL by the comparator COMP2; the duration range indication signal Dw is generated by the D flip-flop DFFclk1 based on the output signal of the comparator COMP1, and the duration range indication signal Up is generated by the D flip-flop DFFclk2 based on the output signal of the comparator COMP2.

[0024] As shown in Figure 4 , in some embodiments, when the voltage Vt on the charging and discharging capacitor C1 is within the range of the voltage thresholds VH and VL (i.e., VL≤Vt≤VH), both the duration range indication signals Up and Dw are logic 0; when the voltage Vt on the charging and discharging capacitor C1 is lower than the voltage threshold VL, the duration range indication signal Dw is logic 0; when the voltage Vt on the charging and discharging capacitor C1 is higher than the voltage threshold VH, the duration range indication signal Up is logic 0. When the voltage Vt on the charging and discharging capacitor C1 is greater than the voltage threshold VH or less than the voltage threshold VL, and the duration range indication signal Dw or Up is a pulse width modulation signal PWM characterizing the switching frequency of the power switch M1, the switching frequency of the power switch M1 is adjusted and a frequency indication signal is generated by subtracting or adding one resonance count in the pulse width modulation signal PWM characterizing the switching frequency of the power switch M1 through a decrementer or an accumulator. In this way, the power switch M1 can be controlled to switch from the off state to the on state when the drain voltage of the power switch M1 is at the same resonance valley as in the previous switching cycle, so as to avoid the phenomenon that the output current de-ripple effect is deteriorated caused by valley switching and the change of the system operating frequency.

[0025] That is, when the voltage Vt on the charging and discharging capacitor C1 is within the range of the voltage thresholds VH and VL (i.e., VL≤Vt≤VH), the switching frequency of the power switch M1 is not adjusted (i.e., the switching frequency of the power switch M1 remains unchanged); when the voltage Vt on the charging and discharging capacitor C1 is greater than the voltage threshold VH or less than the voltage threshold VL (i.e., Vt>VH or Vt<VL), the adjusted switching frequency of the power switch M1 is controlled to remain within a predetermined frequency range by subtracting or adding one resonance count in the pulse width modulation signal PWM characterizing the switching frequency of the power switch M1.

[0026] In summary, the LED driving control circuit 300 according to the embodiment of the present invention enables the power switch M1 to change from the off state to the on state within the same error range near the same resonant valley of its drain voltage in each switching cycle through dynamic clamping frequency control. This greatly improves the system efficiency and, combined with the double demagnetization adaptive constant current control technology, can achieve good dynamic constant current adjustment capability and chip processing technology compatibility.

[0027] This invention can be implemented in other specific forms without departing from its spirit and essential characteristics. For example, the algorithm described in a particular embodiment can be modified without departing from the basic spirit of the invention. Therefore, the present embodiments are to be regarded as exemplary rather than limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description, and all changes falling within the meaning and scope of the claims and their equivalents are thus included within the scope of the invention.

Claims

1. An LED driver control circuit, configured as follows: The demagnetization detection module is configured to generate a demagnetization detection signal characterizing the demagnetization status of the primary winding of the system transformer based on the gate drive signal used to drive the power switch to turn on and off and the current sensing signal characterizing the current flowing through the primary winding of the system transformer. The double demagnetization control module is configured to, based on the demagnetization detection signal, maintain the proportional relationship between the entire switching cycle of the power switch and twice the demagnetization time of the primary winding of the system transformer, and generate a cycle duration indication signal indicating the switching cycle duration of the power switch. The dynamic clamping control module is configured to adjust the switching frequency of the power switch based on the period duration indication signal, maintain the switching frequency of the power switch within a predetermined frequency range, and generate a frequency indication signal that indicates the adjusted switching frequency of the power switch. The logic control module is configured to generate a switching control signal for controlling the power switch to turn on and off based on the frequency indication signal; as well as The gate drive module is configured to generate the gate drive signal based on the switch control signal.

2. The LED driving control circuit according to claim 1, wherein, The dynamic clamping control module includes: The cycle duration determination unit is configured to generate a duration range indication signal based on the cycle duration indication signal, which characterizes whether the switching cycle duration of the power switch is within a predetermined duration range. The switching frequency locking unit is configured to adjust the switching frequency of the power switch and generate the frequency indication signal based on the duration range indication signal.

3. The LED driving control circuit according to claim 2, wherein, The double demagnetization control module is further configured to: Based on the demagnetization detection signal, the first current source is controlled to charge the charging and discharging capacitor, and the second current source is controlled to discharge the charging and discharging capacitor. The voltage on the charging and discharging capacitor is used as the period duration indication signal, wherein the initial voltage on the charging and discharging capacitor is a predetermined reference voltage.

4. The LED driving control circuit according to claim 3, wherein, The double demagnetization control module is further configured to: When the demagnetization detection signal is low, the first current source is controlled to charge the charging and discharging capacitor. When the demagnetization detection signal is high, the second current source is controlled to discharge the charging and discharging capacitor; and After the demagnetization detection signal changes from high level to low level, when the duration for which the first current source continues to charge the charging and discharging capacitor reaches the duration for which the second current source discharges the charging and discharging capacitor, the voltage on the charging and discharging capacitor is reset to the predetermined reference voltage.

5. The LED driving control circuit according to claim 3, wherein, The cycle duration determination unit is further configured as follows: The duration range indication signal is generated by comparing the voltage on the charging / discharging capacitor with a first voltage threshold and a second voltage threshold.

6. The LED driving control circuit according to claim 5, wherein, The cycle duration determination unit is further configured as follows: When the voltage on the charging / discharging capacitor is less than or equal to the first voltage threshold and greater than or equal to the second voltage threshold, the switching frequency of the power switch remains unchanged; When the voltage on the charging / discharging capacitor is greater than the first voltage threshold or less than the second voltage threshold, the switching frequency of the power switch is adjusted by decreasing or increasing the number of resonants in the pulse width modulation signal characterizing the switching frequency of the power switch, and the frequency indication signal is generated.

7. The LED driving control circuit according to claim 4, wherein, The double demagnetization control module is further configured to reset the voltage on the charge / discharge capacitor to the predetermined reference voltage via an operational amplifier buffer.

8. The LED driving control circuit according to claim 5, wherein, The cycle duration determination unit is further configured to compare the voltage on the charging / discharging capacitor with the first voltage threshold using a first comparator, and to compare the voltage on the charging / discharging capacitor with the second voltage threshold using a second comparator.

9. The LED driving control circuit according to claim 8, wherein, The cycle duration determination unit is further configured to generate a first duration range indication signal based on the output signal of the first comparator using a first D flip-flop, and to generate a second duration range indication signal based on the output signal of the second comparator using a second D flip-flop.

10. The LED driving control circuit according to claim 6, wherein, The cycle duration determination unit is further configured to adjust the switching frequency of the power switch and generate the frequency indication signal by adding a number of resonances to the pulse width modulation signal through an accumulator or subtracting a number of resonances from the pulse width modulation signal through an accumulator.

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