Micromechanical ultrasonic transducer structure with dual load bearing layers and method of manufacturing the same

Abstract

The present application relates to a kind of micromechanical ultrasonic transducer structure and its manufacturing method, the micromechanical ultrasonic transducer structure includes first PMUT and second PMUT, each PMUT includes top electrode layer, bottom electrode layer and piezoelectric layer, first PMUT is arranged in first bearing layer, second PMUT is arranged in second bearing layer, first bearing layer is independent of second bearing layer;Transistor unit includes transistor base, transistor, circuit protection layer covering transistor, wherein: first PMUT and second PMUT are arranged in the lateral direction and are spaced apart on the side of circuit protection layer;The piezoelectric coefficient of the piezoelectric layer of one PMUT in first PMUT and second PMUT is higher than the piezoelectric coefficient of the piezoelectric layer of another PMUT in first PMUT and second PMUT, and the dielectric constant of the piezoelectric layer of the one PMUT is lower than the dielectric constant of the piezoelectric layer of the another PMUT.The present application also relates to an electronic device comprising the above-mentioned micromechanical ultrasonic transducer structure.

Description

Technical Field

[0001] The embodiments of the present invention relate to the semiconductor field, and more particularly to a micromechanical ultrasonic transducer (PMUT) structure with dual carrier layers and its manufacturing method, and an electronic device having the micromechanical ultrasonic transducer structure. Background Technology

[0002] Ultrasonic transducers, as electroacoustic components, are widely used in production and daily life. They emit ultrasonic waves into the external environment and receive the reflected waves, converting them into electrical signals for sensing, imaging, and interaction with the environment. Typical applications of ultrasonic transducers include fingerprint recognition, ultrasonic imaging, ultrasonic radar and ranging, non-destructive testing, flow measurement, and force feedback. They are also used in human body imaging, automotive reversing radar, underwater sonar detection, robotic vacuum cleaners, and ultrasonic smoke detectors. All these applications involve the transmission and reception of ultrasonic signals by the transducer; therefore, the transmission and reception sensitivity of the ultrasonic transducer largely determine its quality and are key indicators for these applications.

[0003] Manufacturing ultrasonic transducers using traditional mechanical cutting methods is limited in terms of miniaturization of the vibration unit, production cost, efficiency, product consistency, and yield. It cannot meet the needs of further development of ultrasonic imaging instruments, especially in terms of low cost, portability, and high resolution.

[0004] MEMS manufacturing technology, based on the semiconductor industry, is a highly effective way to efficiently, cost-effectively, and mass-produce small-sized devices. Ultrasonic transducers developed using MEMS technology are mainly based on two principles: capacitive and piezoelectric, corresponding to Capacitive Micromachined Ultrasonic Transducers (CMUTs) and Piezoelectric Micromachined Ultrasonic Transducers (PMUTs), respectively. These can be integrated with Complementary Metal Oxide Semiconductor (CMOS) circuits to achieve low-cost, consistent, and large-scale manufacturing of highly integrated, computationally powerful miniature ultrasonic transducers. Of these two types of transducers, CMUTs require a large bias voltage to operate, resulting in higher power consumption and limiting their applications. In contrast, PMUTs are a promising solution. Effective integration of PMUTs with CMOS is a crucial factor in realizing these ultrasonic transducers.

[0005] The transmit sensitivity and receive sensitivity of the piezoelectric micromechanical ultrasonic transducer (PMUT) are key performance indicators that play a crucial role in the application of the PMUT in the above-mentioned scenarios. If the transmit sensitivity and receive sensitivity are too low, the signal-to-noise ratio will be affected, ultimately leading to the system failing to work or having poor performance.

[0006] PMUTs typically exhibit a bending vibration mode. When used as an ultrasonic transmitter, an alternating electric field is applied to the electrodes on both sides of the piezoelectric film. Due to the inverse piezoelectric effect, transverse stress is generated in the piezoelectric layer, which in turn generates a bending moment, forcing the film to deviate from the plane and emit acoustic pressure waves into the surrounding medium. As shown in Equation (1), the ultrasonic emission sensitivity S of the bending vibration PMUT is... T Proportional to the piezoelectric coefficient e of the piezoelectric thin film 31f :

[0007] S T ∝e 31f (1)

[0008] When the PMUT is used as an ultrasonic receiver, the incident ultrasonic wave deflects the piezoelectric film, generating transverse stress. Due to the positive piezoelectric effect, charges accumulate on the electrodes on both sides of the piezoelectric film, forming a voltage signal, as shown in formula (2). Its receiving sensitivity S R Proportional to the piezoelectric coefficient e 31f With dielectric constant ε 33 The ratio;

[0009] S R ∝e 31f / ε 33 (2)

[0010] In ultrasound imaging, the ultrasound transducer probe acts as both a transmitter to emit ultrasonic waves and a receiver to receive ultrasonic waves reflected back from the object being imaged. Its operating mode is typically pulse-echo mode, as shown in formula (3). The PMUT pulse-echo sensitivity S... T ·S R Proportional to the piezoelectric coefficient e 31 The square of the dielectric constant ε 33 The ratio of .

[0011]

[0012] Piezoelectric coefficient and dielectric constant are fundamental properties of piezoelectric materials. Table 1 lists the piezoelectric coefficient and dielectric constant characteristics of PZT and AlN, two common piezoelectric materials.

[0013] Table 1. Properties of PZT and AlN in common piezoelectric materials

[0014]

[0015] Comparing PZT and AlN, it can be seen that when used only as an ultrasonic transducer, PZT has a piezoelectric constant that is 10 times higher than that of AlN. Based on formula (1), the emission sensitivity of PZT-based PMUT will be 10 times that of AlN-based PMUT.

[0016] However, when used solely as a probe for receiving ultrasound waves, PZT's dielectric constant is approximately 110 times that of AlN. Therefore, the receiving sensitivity of a PZT-based PMUT will be approximately one-twelfth that of an AlN-based PMUT. When using a single piezoelectric material, PZT or AlN, as shown in Table 1, as an ultrasound probe operating in both transmit and receive modes, the pulse-echo (transmit-receive) signal sensitivities of the developed PMUTs are comparable.

[0017] Therefore, a single piezoelectric material cannot simultaneously possess both high piezoelectric coefficient and low dielectric constant. Devices based on a single piezoelectric material, such as PMUT-on-CMOS devices, cannot simultaneously meet the application requirements of ultra-high ultrasonic emission intensity and ultra-high ultrasonic receiving sensitivity.

[0018] Furthermore, the PMUT manufacturing process involves the deposition of various thin films (such as piezoelectric thin films and electrode thin films) at different temperatures and the etching of these films in different atmospheres and liquid environments. These processes can potentially damage CMOS circuits. Additionally, the thin-film formation and patterning processes for different piezoelectric materials, as well as the electrode materials deposited on both sides of the thin films, vary significantly. Therefore, fabricating PMUTs of two different materials on the same substrate presents process incompatibility issues. This makes the sequential fabrication of PMUTs with different piezoelectric thin film substrates on the same wafer a highly risky and challenging process. Therefore, it is necessary to develop a PMUT-on-CMOS integration solution with strong process compatibility and ease of use, incorporating different types of piezoelectric materials. Summary of the Invention

[0019] The present invention is proposed to alleviate or solve at least one of the above-mentioned problems in the prior art.

[0020] Embodiments of the present invention relate to a micromechanical ultrasonic transducer structure, comprising:

[0021] First PMUT and second PMUT, each PMUT includes a top electrode layer, a bottom electrode layer and a piezoelectric layer. First PMUT is disposed on first carrier layer and second PMUT is disposed on second carrier layer. First carrier layer is independent of second carrier layer.

[0022] A transistor unit includes a transistor substrate, a transistor, and a circuit protective layer covering the transistor.

[0023] in:

[0024] The first PMUT and the second PMUT are arranged at a distance from each other on one side of the circuit protection layer in the lateral direction;

[0025] The piezoelectric coefficient of the piezoelectric layer of one of the first PMUTs and the second PMUT is higher than that of the piezoelectric layer of the other PMUT, and the dielectric constant of the piezoelectric layer of the first PMUT is lower than that of the piezoelectric layer of the other PMUT.

[0026] Embodiments of the present invention also relate to a method for manufacturing a micromechanical ultrasonic transducer structure, comprising the following steps:

[0027] Provides a transistor unit, the transistor unit including a transistor substrate, a transistor, and a circuit protective layer covering the transistor; and

[0028] A first PMUT and a second PMUT are disposed on one side of the circuit protection layer, and the first PMUT and the second PMUT are arranged spaced apart in the lateral direction. The first PMUT is disposed on the first carrier layer, and the second PMUT is disposed on the second carrier layer. The first carrier layer and the second carrier layer are respectively bonded to the circuit protection layer.

[0029] in:

[0030] The piezoelectric coefficient of the piezoelectric layer of one of the first PMUTs and the second PMUT is higher than that of the piezoelectric layer of the other PMUT, and the dielectric constant of the piezoelectric layer of the first PMUT is lower than that of the piezoelectric layer of the other PMUT.

[0031] Embodiments of the present invention also relate to an electronic device, including the micromechanical ultrasonic transducer structure described above, or the micromechanical ultrasonic transducer structure manufactured by the manufacturing method described above. Attached Figure Description

[0032] The following description and accompanying drawings will better aid in understanding these and other features and advantages of the various embodiments disclosed herein, wherein the same reference numerals in the drawings always denote the same parts, wherein:

[0033] Figures 1-4 Schematic diagrams of micromechanical ultrasonic transducer structures according to different exemplary embodiments of the present invention;

[0034] Figures 5-11 An exemplary illustration of an exemplary embodiment of the present invention. Figure 1 A cross-sectional schematic diagram of the manufacturing method of the micromechanical ultrasonic transducer structure shown;

[0035] Figures 12-15A schematic diagram of a micromechanical ultrasonic transducer structure according to another exemplary embodiment of the present invention;

[0036] Figures 16-21 An exemplary illustration of an exemplary embodiment of the present invention. Figure 12 A cross-sectional schematic diagram of the manufacturing method of the micromechanical ultrasonic transducer structure shown;

[0037] Figure 22 This is a schematic diagram of a PMUT structure array according to an exemplary embodiment of the present invention. Detailed Implementation

[0038] The technical solution of the present invention will be further described in detail below through embodiments and in conjunction with the accompanying drawings. In this specification, the same or similar reference numerals indicate the same or similar components. The following description of the embodiments of the present invention with reference to the accompanying drawings is intended to explain the overall inventive concept of the present invention and should not be construed as a limitation thereof. These are only some embodiments of the invention, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention are within the scope of protection of the present invention.

[0039] The inventors discovered that if a PMUT based on a high-voltage material is used as an ultrasonic transmitter and a PMUT based on a low-dielectric-constant material is used as an ultrasonic receiver, for example, if a PZT-based PMUT and an AlN-based PMUT are integrated together on a single ultrasonic transducer as shown in Table 1, with the PZT-based PMUT as the ultrasonic transmitter and the AlN-based PMUT as the ultrasonic receiver, its pulse-echo sensitivity will be 100 times higher than that of a single material-based PMUT.

[0040] Based on the above, the present invention proposes to integrate, on the same CMOS wafer, components with high voltage coefficients (e.g., absolute values ​​higher than 1C / m). 2 Further higher than 5C / m 2 There are two types of ultrasonic transducers: piezoelectric PMUTs with high dielectric constants and piezoelectric PMUTs with low dielectric constants (e.g., below 1200, and further below 100). The piezoelectric PMUTs with high dielectric constants are specifically designed for emitting ultrasonic waves, while the piezoelectric PMUTs with low dielectric constants are used to receive reflected ultrasonic waves. The integration of these PMUTs with CMOS is key to developing MEMS ultrasonic transducers with excellent performance and low cost.

[0041] This invention also proposes a scheme for simultaneously integrating the above two types of piezoelectric material-based PMUTs onto the same CMOS wafer. This scheme is a PMUT-on-CMOS integration scheme with strong process compatibility and convenience, containing different types of piezoelectric materials.

[0042] In this invention, the two piezoelectric material-based PMUTs can be fabricated separately on their respective wafers without interfering with each other during the fabrication process, and then integrated onto a CMOS wafer.

[0043] If the fabrication process of one piezoelectric material-based PMUT does not damage the CMOS circuit, its fabrication process can be carried out directly on the CMOS circuit, while the fabrication of another piezoelectric material-based PMUT is performed on another substrate.

[0044] When both piezoelectric material-based PMUT fabrication processes pose a risk of damaging the CMOS circuit, the PMUTs are fabricated on two separate substrates, and then the two PMUTs are sequentially integrated onto the same CMOS circuit.

[0045] This invention also proposes a micromechanical ultrasonic transducer structure that simultaneously includes the above two types of piezoelectric material-based PMUTs.

[0046] The reference numerals in the accompanying drawings of this invention are explained as follows:

[0047] 100: CMOS substrate or transistor substrate, with optional materials including single-crystal silicon, gallium nitride, gallium arsenide, sapphire, quartz, silicon carbide, diamond, etc.

[0048] 101: The source and drain of a transistor.

[0049] 102: The gate of a transistor.

[0050] 110: Circuit protection layer, which is an insulating material layer, such as silicon dioxide or silicon nitride.

[0051] 113A: Electrical connection layer within the transistor unit layer, corresponding to the first electrical connection layer. The material can be molybdenum, ruthenium, gold, aluminum, magnesium, tungsten, copper, titanium, iridium, osmium, chromium, or a composite or alloy of the above metals. The above materials are also suitable for other electrical connection layers.

[0052] 113B: Electrical connection layer within the transistor unit layer, corresponding to the second electrical connection layer.

[0053] 113, 115: Electrical connection layers within other transistor unit layers.

[0054] 112 and 114: Electrical connection layers between transistor unit layers.

[0055] 200, 300: PMUT substrate, with optional materials including single-crystal silicon, gallium nitride, gallium arsenide, sapphire, quartz, silicon carbide, diamond, etc. PMUT substrate 200 and PMUT substrate 300 can be found in [reference needed]. Figure 12 .

[0056] 200': Substrate or substrate, see below Figure 6 .

[0057] 111, 201 and 301: Cavities used for PMUT.

[0058] 210: Oxide layer ( Figure 6 ).

[0059] 220, 310: Support layer, the material of which may be the same as or different from that of the electrode layer. The support layer can be placed between the PMUT and the PMUT substrate. In this case, the support layer is an insulating layer, and its material can be non-conductive materials such as silicon, silicon dioxide, or silicon nitride. The support layer can also be placed on top of the PMUT. It should be noted that a support layer may not be provided.

[0060] 230, 250; 320, 340: Electrode layers, materials can be molybdenum, ruthenium, gold, aluminum, magnesium, tungsten, copper, titanium, iridium, osmium, chromium, or composites or alloys of the above metals. The materials of the two electrode layers can be the same or different.

[0061] 240, 330: Piezoelectric layer. Materials can be selected from polycrystalline aluminum nitride (AlN), polycrystalline zinc oxide, polycrystalline lead zirconate titanate (PZT), polycrystalline lithium niobate (LiNbO3), polycrystalline lithium tantalate (LiTaO3), polycrystalline potassium niobate (KNbO3), etc., or monocrystalline aluminum nitride, monocrystalline gallium nitride, monocrystalline lithium niobate, monocrystalline lead zirconate titanate, monocrystalline potassium niobate, monocrystalline quartz film, or monocrystalline lithium tantalate, etc. The aforementioned monocrystalline or polycrystalline materials may also include rare earth element doping materials with a certain atomic ratio, all of which are piezoelectric layers that can be used in this invention, such as scandium-doped aluminum nitride (AlScN).

[0062] 260: Conductive layer or electrical connection channel, the material of which may be selected from the material used to form the electrode layer.

[0063] 270: Device protective layer, generally a dielectric material, such as silicon dioxide, aluminum nitride, silicon nitride, etc.

[0064] 400: Auxiliary substrate, with optional materials including single-crystal silicon, gallium nitride, gallium arsenide, sapphire, quartz, silicon carbide, diamond, etc.

[0065] 410A: First conductive hole.

[0066] 410B: Second conductive hole.

[0067] 500: Bonding material layer, see Figure 3 It can be a metal bonding layer, such as gold-gold bonding, aluminum-germanium bonding, etc., or other material layers that bond two layers together.

[0068] 3000: PMUT structure (see...) Figure 1 and Figure 22 ).

[0069] 4000: PMUT structure array (see...) Figure 22 ).

[0070] Figures 1-4 This is a schematic diagram of a micromechanical ultrasonic transducer structure according to different exemplary embodiments of the present invention.

[0071] In the illustrated embodiment, a single PMUT typically includes a support layer 220 / 310, a piezoelectric layer 240 / 330, and top electrode layers 250 / 340 and bottom electrode layers 230 / 320 on both sides of the piezoelectric layer. In this invention, two types of ultrasonic transducers, a piezoelectric material-based PMUT with a high voltage coefficient and a piezoelectric material-based PMUT with a low dielectric constant, are simultaneously integrated on a CMOS wafer or a transistor unit 1000 as shown in the figure.

[0072] like Figures 1-4 As shown, 240 and 330 represent high-dielectric-constant piezoelectric thin films and low-dielectric-constant piezoelectric thin films or piezoelectric layers, respectively. 111 and 301 are the cavity regions formed by the two types of piezoelectric thin films for effective bending vibration of the PMUT. 220 is the PMUT support layer, 100 is the substrate for building CMOS circuits or transistor substrates, and 110 is the circuit protection layer.

[0073] As previously mentioned, in a more specific embodiment, the absolute value of the piezoelectric coefficient of the piezoelectric layer 240 is greater than 1 C / m. 2 And / or the dielectric constant of piezoelectric layer 330 is less than 1200. Furthermore, the absolute value of the piezoelectric coefficient of piezoelectric layer 240 is greater than 5 C / m. 2 And / or the dielectric constant of the piezoelectric layer 330 is less than 100.

[0074] In a more specific embodiment, piezoelectric layer 240 is PZT or doped PZT, and piezoelectric layer 330 is ALN or AlScN.

[0075] exist Figure 1In this design, PMUTs with two piezoelectric layers 240 and 330 are integrated onto a CMOS circuit. The PMUT with piezoelectric layer 240 is fabricated on a CMOS wafer, and the micromechanical ultrasonic transducer structure includes a support layer 220. The CMOS contains a cavity 111 for PMUT vibration. The PMUT with piezoelectric layer 330 is built on another PMUT substrate 300 and subsequently bonded to the CMOS circuit. The cavity 301 for PMUT vibration is built on the substrate 300, and the micromechanical ultrasonic transducer structure includes a support layer 310. The thin films adjacent to the piezoelectric layers 240 and 330 are electrode layers 230, 250 and 320, 340, respectively. The electrodes on both sides of the piezoelectric layers are electrically connected to the CMOS circuit through an electrical connection channel 260. If necessary, a protective layer 270 is deposited on the device surface to protect the device. The two PMUTs, including piezoelectric layers 240 and 330, and the electrical connection channels 260 between the PMUT and the CMOS circuit, as well as the device protection layer 270, can be made of the same material, with each layer formed simultaneously. Alternatively, based on the characteristics of the PMUTs of corresponding materials, different electrical connection channel materials and device protection layers can be selected and implemented sequentially.

[0076] like Figure 1 As shown, the PMUT with piezoelectric layer 240 is fabricated on a CMOS wafer, and the fabrication process of this PMUT does not damage the CMOS circuit. The PMUT with piezoelectric layer 330 is fabricated on another substrate or PMUT substrate and integrated onto the CMOS wafer by bonding. The fabrication process of the PMUT with piezoelectric layer 330 may or may not damage the CMOS circuit.

[0077] like Figure 2 As shown, PMUTs with two piezoelectric layers 240 and 330 are integrated onto a CMOS circuit. The PMUT with piezoelectric layer 240 is fabricated on the CMOS circuit, and the micromechanical ultrasonic transducer structure includes a support layer 220. The CMOS circuit contains a cavity 111 required for PMUT vibration. The PMUT with piezoelectric layer 330 is fabricated on another substrate or a PMUT substrate 300 and subsequently bonded to the CMOS circuit. The cavity 301 required for PMUT vibration is constructed on the support layer 220 of the PMUT with piezoelectric layer 330. The micromechanical ultrasonic transducer structure with piezoelectric layer 330 contains a support layer 310. Figure 2 Other membrane layers in Figure 1 Consistent with what is shown. If this is understandable, Figure 2 Alternatively, a support layer 310 may not be required.

[0078] See Figure 3PMUTs, comprising two piezoelectric layers 240 and 330 respectively, are integrated onto a CMOS circuit. The PMUT with piezoelectric layer 240 is fabricated on the CMOS circuit, and the micromechanical ultrasonic transducer structure contains a support layer 220. The CMOS contains the cavity 111 required for PMUT vibration. The PMUT with piezoelectric layer 330 is constructed on another carrier layer (…). Figure 3 The support layer 310 is placed on the CMOS circuit and then bonded to it using a bonding material layer 500 (more specifically, a metal bonding layer). The cavity 301 required for PMUT vibration is formed by bonding additional materials. The micromechanical ultrasonic transducer structure with the piezoelectric layer 330 contains the support layer 310, which serves as the carrier layer of the PMUT. As can be understood, in Figure 3 In this case, the support layer 310 can also be replaced with the PMUT substrate 300. Figure 3 Other membrane layers in Figure 1 The results are consistent with those shown.

[0079] See Figure 4 PMUTs, comprising two piezoelectric layers 240 and 330 respectively, are integrated onto a CMOS circuit. The PMUT with piezoelectric layer 240 is fabricated on the CMOS circuit, and the micromechanical ultrasonic transducer structure contains a support layer 220. The CMOS contains the cavity 111 required for PMUT vibration. The PMUT with piezoelectric layer 330 is constructed on another carrier layer (…). Figure 4 The support layer 310 is placed on the PMUT and subsequently bonded to the CMOS circuit. The cavity 301 required for PMUT vibration is formed by bonding additional material. The micromechanical ultrasonic transducer structure with the piezoelectric layer 330 contains the support layer 310, which serves as the carrier layer of the PMUT. As can be understood, in Figure 4 In the middle, the support layer 310 can also be replaced with the PMUT substrate 300, and... Figure 3 compared to, Figure 4 The support layer 310 is located at the top, so that the PMUT with the piezoelectric layer 330 is disposed in the gap between the support layer 310 and the circuit protection layer 110. Figure 4 Other membrane layers in Figure 1 The results are consistent with those shown.

[0080] In embodiments of the present invention, the material of the carrier layer used in the PMUT can be the same as or different from the material of the electrode layer; or the material of the carrier layer used in the PMUT can be an insulating material or a semiconductor material, such as silicon, silicon dioxide, silicon nitride, aluminum nitride, etc.

[0081] Figures 5-11 An exemplary illustration of an exemplary embodiment of the present invention. Figure 1A cross-sectional schematic diagram of the manufacturing method of the micromechanical ultrasonic transducer structure is shown below. (Refer to the following...) Figures 5-11 An example is shown below: Two types of PMUTs are integrated on a CMOS circuit. One PMUT is fabricated directly on the CMOS circuit, and the other PMUT is built on a separate PMUT substrate and then bonded to the CMOS circuit.

[0082] First, provide the transistor unit. Figure 5 This is a schematic diagram of the CMOS structure. Figure 5 The figure above shows two transistors and a cavity 111 (mentioned later) is provided on the upper side of the circuit protection layer 110 for constructing a PMUT on which a piezoelectric layer 240 is disposed. Figure 5 The diagram below shows a single transistor. Figure 5 In this diagram, 100 represents the CMOS substrate, i.e., the transistor substrate (which can be silicon, etc.), and 110 represents the circuit protection layer (which can be silicon oxide, silicon nitride, etc.). 101 represents the source and drain terminals of the transistor, 102 represents the gate terminal of the transistor, 113A, 113B, 113, and 115 are intra-CMOS electrical connection layers, and 112 and 114 are inter-CMOS electrical connection layers. Figure 5 As shown, the transistor unit includes a transistor substrate 100 and a first transistor and a second transistor arranged spaced apart in the lateral direction. Figure 5 (As shown in the image above). It should be noted that, Figure 5 The structure shown is exemplary. For the present invention, the CMOS cell may include a CMOS transistor and a circuit protection layer 110, and may optionally include a first electrical connection layer 113A and a second electrical connection layer 113B.

[0083] See Figures 6-7 A support layer 220 is bonded onto the CMOS circuit with cavity 111. More specifically, this bonding can be achieved through various methods such as SiO2-SiO2 bonding, SiO2-Si bonding, and Si-Si bonding. Figure 6 As shown, taking a CMOS example with an SOI silicon wafer (200' is the substrate, 210 is the oxide layer, and 220 is the silicon film layer, forming an SOI wafer or SOI silicon wafer) and a SiO2 protective layer (i.e., circuit protection layer 110), Si-SiO2 bonding can be performed. Next, as... Figure 7 As shown, the substrate 200' and oxide layer 210 are removed to expose the silicon film layer, which corresponds to the support layer 220.

[0084] like Figure 8 As shown, a PMUT with a piezoelectric layer 240 is formed above the cavity 111, which also includes a top electrode layer 250 and a bottom electrode layer 230.

[0085] like Figure 9 As shown, the silicon film layer or support layer 220 of other PMUT layout areas on the CMOS circuit can be removed using a precise etching process. Alternatively, it can be left unremoved if understood.

[0086] like Figure 10 As shown, in Figure 9 The CMOS circuit shown depicts a region where the silicon film layer has been removed, and a PMUT with a piezoelectric layer 330 is bonded thereon. This bonding is achieved through a transfer method, such as Si-SiO2 bonding or bonding with auxiliary materials. Here, 300 is the substrate of the PMUT with the piezoelectric layer 330, 301 is the cavity formed on the substrate 330 for PMUT vibration, 310 is the PMUT support layer, and 320 and 340 are the electrode layers on both sides of the piezoelectric layer 330.

[0087] like Figure 11 As shown, the areas on the PMUT substrate and CMOS circuitry where electrode connections are implemented are removed. Conductive vias 410A and 410B are formed at the locations used for electrical connections between the PMUT electrodes and the CMOS circuitry, based on an etching process (see, for example, [reference needed]). Figure 1 Its thickness penetrates the entire PMUT, reaching into the circuit protection layer 110, until the conductive portion within the circuit protection layer is exposed, i.e., the electrical connection terminals on the CMOS circuit are exposed (see...). Figure 5 (e.g., 113A and 113B in the diagram). For each PMUT, conductive vias 400A and 400B are etched to expose the internal electrical connection layers 113A and 113B of the transistor cell layer, respectively. Optionally, the first electrical connection layer 113A is electrically connected to one of the electrodes of the CMOS transistor (e.g., the source), and the second electrical connection layer 113B is electrically connected to the other electrode of the CMOS transistor (e.g., the gate). However, if other electrical connection structures exist in the CMOS cell, the first electrical connection layer 113A and / or the second electrical connection layer 113B may also be electrically connected thereto, based on needs and requirements, which is also within the scope of protection of this invention.

[0088] Next, based on the deposition process, electrical connection channels 260 are deposited to achieve electrical interconnection between the PMUT electrodes and the CMOS circuit. Finally, if necessary, a device protection layer 270 is deposited on the entire device surface. The electrical connection layer 260 can be made of various conductive materials, such as the material used to form the electrode layer. Furthermore, the material used for the conductive channels connecting the PZT-based PMUT and the CMOS circuit can be the same material as the conductive channels realizing the electrical connection between the AlN-based PMUT and the CMOS, or it can be a different conductive material. As is understandable, the electrical connection layers 260 used for the two PMUTs are electrically insulated from each other. The electrical connection layers 260 are electrically connected to the transistor unit layer's internal electrical connection layer 113A and internal electrical connection layer 113B via conductive vias, respectively. The electrical connection channels 260 and the device protection layer 270 can be made of the same material, with each layer formed simultaneously, or different electrical connection channel materials and device protection layers can be selected based on the characteristics of the corresponding PMUT material and implemented sequentially.

[0089] Figures 12-15 This is a schematic diagram of a micromechanical ultrasonic transducer structure according to another exemplary embodiment of the present invention. Figures 16-21 An exemplary illustration of an exemplary embodiment of the present invention. Figure 12 A cross-sectional schematic diagram illustrating the manufacturing method of the micromechanical ultrasonic transducer structure shown. Figures 12-21 In this design, two PMUTs with two different piezoelectric layers, 240 and 330, are fabricated on two different substrates outside the CMOS circuit. These two types of piezoelectric thin-film PMUTs are then sequentially integrated onto the CMOS circuit via bonding. In this case, the integration order of the two types of piezoelectric thin-film PMUTs with the CMOS circuit is not strictly limited. Furthermore, the fabrication processes of the two types of piezoelectric thin-film PMUTs may or may not damage the CMOS circuit. See below for reference. Figures 12-21 Detailed explanation.

[0090] like Figure 12As shown, PMUTs comprising two piezoelectric layers 240 and 330 are integrated onto a CMOS circuit. Both piezoelectric thin-film PMUTs are constructed on their respective substrates 200 and 300, and subsequently bonded to the CMOS circuit. The cavities 201 and 301 required for PMUT vibration are formed on their respective substrates. The bonding method involves directly bonding 200 and 300 to the electrode protection layer 110 of the CMOS circuit, for example, via Si-SiO2 bonding. Both PMUTs contain support layers 220 and 310; however, these support layers may be omitted if understood. The thin films adjacent to the piezoelectric layers 240 and 330 are electrode layers 230, 250 and 320, 340, respectively. The electrodes on both sides of the piezoelectric layers are electrically connected to the CMOS circuit through electrical connection channels 260. A protective layer 270 may be deposited on the device surface to protect the device if necessary. The two PMUTs, including piezoelectric layers 240 and 330, and the electrical connection channels 260 between the PMUT and the CMOS circuit, as well as the device protection layer 270, can be made of the same material, with each layer formed simultaneously. Alternatively, based on the characteristics of the PMUTs of corresponding materials, different electrical connection channel materials and device protection layers can be selected and implemented sequentially.

[0091] like Figure 13 As shown, PMUTs comprising two piezoelectric layers, 240 and 330, are integrated onto a CMOS circuit. Figure 12 Compared to the previous method, the bonding between the PMUT with the piezoelectric layer 330 and the CMOS circuit is achieved using an intermediate bonding layer, such as metal bonding, gold-gold bonding, aluminum-germanium bonding, etc. Figure 13 As shown, this intermediate metal bonding layer serves as part of a channel for electrically connecting the PMUT, on which the piezoelectric layer 330 is disposed, to the CMOS circuit. As will be understood, in the method described above, the bonding between the PMUT and the circuit protection layer is achieved by providing a bonding material layer 500, which can be used to define the lateral boundary of the cavity.

[0092] See Figure 14 PMUTs, comprising two piezoelectric layers of 240 and 330 respectively, are integrated onto the CMOS circuit. Figure 13 Compared to the previous method, the bonding between the PMUT with the piezoelectric layer 330 and the CMOS circuit is achieved using an intermediate bonding layer, such as metal bonding: gold-gold bonding, aluminum-germanium bonding, etc. Additionally, in Figure 14 In this configuration, the PMUT with the piezoelectric layer 330 contains only the support layer 220 and no PMUT substrate. The presence of this intermediate bonding layer creates a cavity 301 between the support layer 220 and the circuit protection layer 110, which is necessary for the effective vibration of the PMUT.

[0093] See Figure 15PMUTs, comprising two piezoelectric layers of 240 and 330 respectively, are integrated onto the CMOS circuit. Figure 14 In contrast, the PMUT with piezoelectric layer 330 is piezoelectric layer oriented towards CMOS circuit, that is, it is disposed in cavity 301 formed between support layer 220 and circuit protection layer 110.

[0094] The following reference Figures 16-21 Exemplary Description Figure 12 Fabrication of the micromechanical ultrasonic transducer structure shown.

[0095] See Figure 16 A PMUT with a piezoelectric layer 240 is constructed on a substrate 200, 220 is the PMUT support layer, and 230 and 250 are the top and bottom electrodes on both sides of the piezoelectric layer 240.

[0096] See Figure 17 ,Will Figure 16 The structure shown is temporarily bonded to the transfer substrate 400 using an adhesive, then the substrate 200 is thinned, and the substrate 200 is etched to the support layer 220 in the PMUT vibration region.

[0097] like Figure 18 As shown, Figure 17 The structure shown is bonded to the CMOS circuit, and then the transfer substrate 400 and adhesive are removed.

[0098] like Figure 19 As shown, similar to Figures 16-17 A cavity can be formed on one side of the substrate 300, filled with a sacrificial layer, and then a support layer and a PMUT with a piezoelectric layer 330 disposed on the support layer can be placed on that side. Next, the resulting structure is temporarily bonded to the transfer substrate 400 using an adhesive, and then the substrate 300 is thinned. The sacrificial layer can be released to form the cavity 301.

[0099] like Figure 20 As shown, Figure 19 The structure shown is bonded to Figure 18 On the CMOS circuit shown, the transfer substrate 400 and adhesive are then removed.

[0100] See Figure 21 Remove the areas on the PMUT substrate and CMOS circuitry where electrode connections are implemented, and form conductive vias 410A and 410B (see, for example, [reference needed]). Figure 1 ), exposing the electrical connection terminals on the CMOS circuit (see Figure 5In the process described in sections 113A and 113B), electrical connection channels 260 are deposited to achieve electrical interconnection between the PMUT electrodes and the CMOS circuit. Finally, if necessary, a device protective layer 270 is deposited on the entire device surface. The two electrical connection channels 260 between the PMUT and the CMOS circuit, including piezoelectric layers 240 and 330 respectively, and the device protective layer 270 can be made of the same material, with each layer formed simultaneously. Alternatively, based on the characteristics of the PMUT material, different electrical connection channel materials and device protective layers can be selected and implemented sequentially.

[0101] based on Figures 1-21 The method shown allows for the integration of two types of ultrasonic transducers—piezoelectric material-based PMUTs with high voltage coefficients and piezoelectric material-based PMUTs with low dielectric constants—onto the same CMOS circuit. In some cases, the manufacturing processes of the two types of PMUTs can be made independent of each other, while also avoiding the influence of PMUT fabrication processes on the CMOS circuit. Even under harsh or incompatible process conditions, the different types of piezoelectric thin-film-based PMUTs do not come into contact during processing and will not affect each other's processing, resulting in good operability.

[0102] In the example of the present invention Figures 1-21 In the integrated scheme shown, during the fabrication of different types of piezoelectric thin-film-based PMUTs, even under harsh processing conditions on the upper PMUT, the CMOS wafer is not damaged, demonstrating good process compatibility. Furthermore, during the fabrication of two types of piezoelectric material-based PMUTs, when the fabrication process of one piezoelectric material-based PMUT has poor or even incompatible compatibility with CMOS, the piezoelectric material-based PMUT can be fabricated on the PMUT carrier layer that is not bonded to the CMOS circuit. Then, another part of the PMUT can be constructed on the surface of a portion of the PMUT-on-CMOS wafer, achieving the integration of piezoelectric material-based PMUTs with different performance indicators and CMOS, resulting in a MEMS ultrasonic transducer with excellent ultrasonic emission and reception sensitivity.

[0103] The PMUT carrier layer in this invention is used to form the PMUT thereon, for example, it can be Figure 1 The support layer 220 in the middle can also be Figure 1 The base 200 can also be other support structures used to generate the PMUT, all of which are within the scope of protection of this invention.

[0104] exist Figures 1-21In the illustrated embodiment, the micromechanical ultrasonic transducer structure includes two PMUTs, a first PMUT and a second PMUT, spaced laterally on a PMUT carrier layer. The piezoelectric coefficient of the piezoelectric layer 240 of the first PMUT is higher than that of the piezoelectric layer 330 of the second PMUT, and the dielectric constant of the piezoelectric layer 240 of the first PMUT is lower than that of the piezoelectric layer 330 of the second PMUT. In a further embodiment, the piezoelectric layer 240 of the first PMUT is PZT, and the piezoelectric layer 330 of the second PMUT is AlN. Correspondingly, in Figures 1-21 In the illustrated embodiment, the first PMUT of the PMUT unit is used to transmit ultrasonic waves, and the second PMUT is used to receive ultrasonic waves. This allows for the construction of a PMUT-on-CMOS ultrasonic transducer with ultra-high pulse-echo sensitivity.

[0105] Regarding how to set the first PMUT and the second PMUT on the CMOS circuit or transistor unit in this invention, it can be that the constructed first PMUT and the second PMUT are respectively bonded to the transistor unit, or the constructed first PMUT is bonded to the transistor unit and the second PMUT is directly constructed on the transistor unit, or the first PMUT and the second PMUT are directly constructed on the transistor unit respectively.

[0106] It should be noted that the bonding of the two components in this invention includes not only the direct bonding shown, but also the case where other bonding layers or films are disposed between them. Specifically, in the specific embodiments of this invention, the bonding of the PMUT substrate to the circuit protection layer is used as an example for illustrative purposes. However, the bonding of the PMUT substrate to the CMOS cell 1000 can be a circuit protection layer defining the surface of the CMOS cell, or other layers defining the surface of the CMOS cell, all of which are within the scope of protection of this invention.

[0107] It should also be specifically pointed out that in this invention, CMOS is used as an example of a transistor, and thus a CMOS unit is used as an example of a transistor unit. However, this invention is not limited to this. The transistor can also be a BiMOS unit or a BCD, and thus the transistor unit can also be a BiMOS unit or a BCD unit, etc.

[0108] Figure 22 This is a schematic diagram of a PMUT structure array according to an exemplary embodiment of the present invention. Figure 22 As shown, the PMUT structure 3000 described above can be just one element of the array 4000. Figure 22In the diagram, the hollow circle represents the PMUT vibration region of the PMUT structure 3000. Besides a circle, it can be any desired shape, such as an ellipse, polygon, or a combination thereof. The solid black circle represents the electrical connection between the PMUT unit and the CMOS unit, such as... Figure 5 The first electrical connection layer 113A and the second electrical connection layer 113B shown can also be any desired shape. The PMUT structures 3000 are combined to form the PMUT structure array 4000.

[0109] Each PMUT unit can be individually controlled by a matching CMOS circuit, forming a two-dimensional PMUT structure array 4000.

[0110] Multiple PMUT structures 3000 can also be connected together, such as interconnecting the electrodes of PMUT structures 3000 in the same column to form a one-dimensional linear array. In this case, the electrical connection points between the CMOS cell circuit and the PMUT cell are reduced, and a pair of electrical connection points between the CMOS cell and the PMUT cell can control multiple PMUT cells simultaneously.

[0111] An ultrasonic transducer can be formed based on a PMUT structure or an array of PMUT structures. This ultrasonic transducer can be used in an ultrasonic imaging instrument. The PMUT structure or PMUT array can also be used in other electronic devices, such as ultrasonic rangefinders, ultrasonic fingerprint sensors, and non-destructive testing instruments for industrial applications.

[0112] Based on the above, the present invention proposes the following technical solution:

[0113] 1. A micromechanical ultrasonic transducer structure, comprising:

[0114] First PMUT and second PMUT, each PMUT includes a top electrode layer, a bottom electrode layer and a piezoelectric layer. First PMUT is disposed on first carrier layer and second PMUT is disposed on second carrier layer. First carrier layer is independent of second carrier layer.

[0115] A transistor unit includes a transistor substrate, a transistor, and a circuit protective layer covering the transistor.

[0116] in:

[0117] The first PMUT and the second PMUT are arranged at a distance from each other on one side of the circuit protection layer in the lateral direction;

[0118] The piezoelectric coefficient of the piezoelectric layer of one of the first PMUTs and the second PMUT is higher than that of the piezoelectric layer of the other PMUT, and the dielectric constant of the piezoelectric layer of the first PMUT is lower than that of the piezoelectric layer of the other PMUT.

[0119] 2. According to the micromechanical ultrasonic transducer structure described in 1, wherein:

[0120] One PMUT has a piezoelectric layer of PZT or doped PZT, and the other PMUT has a piezoelectric layer of ALN or AlScN; and / or

[0121] One PMUT is used to transmit ultrasonic waves, and the other PMUT is used to receive ultrasonic waves.

[0122] 3. According to the micromechanical ultrasonic transducer structure described in 1, wherein:

[0123] The first carrier layer is a PMUT support layer, which is bonded to the circuit protection layer and has a cavity within the circuit protection layer for the first PMUT; or

[0124] The first carrier layer is a PMUT substrate, which is bonded to the circuit protection layer and the PMUT substrate is provided with a cavity for the first PMUT.

[0125] 4. According to the micromechanical ultrasonic transducer structure described in 3, wherein:

[0126] The second carrier layer is a PMUT support layer or a PMUT substrate. The second carrier layer is bonded to the circuit protection layer, and a cavity for the second PMUT is provided on the side of the second carrier layer facing the second PMUT.

[0127] 5. According to the micromechanical ultrasonic transducer structure described in 4, wherein:

[0128] An additional support layer is provided between the second PMUT and the second load-bearing layer.

[0129] 6. According to the micromechanical ultrasonic transducer structure described in 3, wherein:

[0130] The second carrier layer is a PMUT support layer. A bonding metal layer is disposed between the second carrier layer and the circuit protection layer, and the bonding metal layer and the circuit protection layer define a cavity for the second PMUT. The second PMUT is disposed on the side of the second carrier layer away from the cavity for the second PMUT, or the second PMUT is disposed between the second carrier layer and the circuit protection layer; or...

[0131] The second carrier layer is a PMUT substrate. A second bonding metal layer is disposed between the second carrier layer and the circuit protection layer, and the second carrier layer is provided with a cavity for the second PMUT.

[0132] 7. According to the micromechanical ultrasonic transducer structure described in 1, wherein:

[0133] The first carrier layer is a PMUT support layer. A first bonding metal layer is disposed between the first carrier layer and the circuit protection layer, and the first bonding metal layer and the circuit protection layer are used to define a cavity for the first PMUT. The first PMUT is disposed on the side of the first carrier layer away from the cavity for the first PMUT, or the first PMUT is disposed between the first carrier layer and the circuit protection layer.

[0134] The second carrier layer is a PMUT support layer. A second bonding metal layer is disposed between the second carrier layer and the circuit protection layer, and the second bonding metal layer and the circuit protection layer are used to define a cavity for the second PMUT. The second PMUT is disposed on the side of the second carrier layer away from the cavity for the second PMUT, or the second PMUT is disposed between the second carrier layer and the circuit protection layer.

[0135] 8. According to the micromechanical ultrasonic transducer structure described in 1, wherein:

[0136] The first carrier layer is a PMUT substrate, and a first bonding metal layer is disposed between the first carrier layer and the circuit protection layer, and the first carrier layer is provided with a cavity for the first PMUT; and

[0137] The second carrier layer is a PMUT substrate. A second bonding metal layer is disposed between the second carrier layer and the circuit protection layer, and the second carrier layer is provided with a cavity for the second PMUT.

[0138] 9. The micromechanical ultrasonic transducer structure according to any one of 1-8, wherein:

[0139] The transistor unit includes multiple electrical connection layers located within a circuit protection layer;

[0140] The micromechanical ultrasonic transducer structure also includes multiple conductive paths, which electrically connect the electrode layers of the first PMUT and the second PMUT to the corresponding electrical connection layers.

[0141] 10. According to the micromechanical ultrasonic transducer structure described in 9, wherein:

[0142] The first carrier layer and / or the second carrier layer are bonded to the circuit protection layer by a metal bonding layer; and

[0143] The metal bonding layer forms part of the corresponding conductive path.

[0144] 11. According to the micromechanical ultrasonic transducer structure described in 1, wherein:

[0145] The transistor unit includes one of CMOS unit, BiMOS unit, and BCD unit.

[0146] 12. According to the micromechanical ultrasonic transducer structure described in 1, wherein:

[0147] The material of the first carrier layer and / or the second carrier layer is the same as or different from the material of the first electrode layer or the second electrode layer; or the material of the first carrier layer and / or the second carrier layer is an insulating material or a semiconductor material, such as silicon, silicon dioxide, silicon nitride, aluminum nitride, etc.

[0148] 13. According to the micromechanical ultrasonic transducer structure described in 12, wherein:

[0149] The material of the first and / or second carrier layer is silicon, silicon dioxide, silicon nitride, or aluminum nitride.

[0150] 14. According to the micromechanical ultrasonic transducer structure described in 1, wherein:

[0151] The absolute value of the piezoelectric coefficient of the piezoelectric layer of the PMUT is greater than 1 C / m. 2 ; and / or

[0152] The dielectric constant of the piezoelectric layer of the other PMUT is less than 1200.

[0153] 15. According to the micromechanical ultrasonic transducer structure described in 14, wherein:

[0154] The absolute value of the piezoelectric coefficient of the piezoelectric layer of the PMUT is greater than 5C / m. 2 ; and / or

[0155] The dielectric constant of the piezoelectric layer of the other PMUT is less than 100.

[0156] 16. A method for manufacturing a micromechanical ultrasonic transducer structure, comprising the following steps:

[0157] Provides a transistor unit, the transistor unit including a transistor substrate, a transistor, and a circuit protective layer covering the transistor; and

[0158] A first PMUT and a second PMUT are disposed on one side of the circuit protection layer, and the first PMUT and the second PMUT are arranged spaced apart in the lateral direction. The first PMUT is disposed on the first carrier layer, and the second PMUT is disposed on the second carrier layer. The first carrier layer and the second carrier layer are respectively bonded to the circuit protection layer.

[0159] in:

[0160] The piezoelectric coefficient of the piezoelectric layer of one of the first PMUTs and the second PMUT is higher than that of the piezoelectric layer of the other PMUT, and the dielectric constant of the piezoelectric layer of the first PMUT is lower than that of the piezoelectric layer of the other PMUT.

[0161] 17. According to the method described in 16, wherein:

[0162] The steps for setting up the first PMUT and the second PMUT include:

[0163] The constructed first PMUT and second PMUT are respectively bonded to the transistor unit, that is, the first PMUT is set on the first carrier layer, the second PMUT is set on the second carrier layer, and the first carrier layer with the first PMUT is bonded to the circuit protection layer, and the second carrier layer with the second PMUT is bonded to the circuit protection layer; or

[0164] The first PMUT, after being constructed, is bonded to the transistor cell, and the second PMUT is directly constructed on the transistor cell. This involves setting the first PMUT on the first carrier layer, bonding the first carrier layer with the first PMUT to the circuit protection layer, bonding the second carrier layer to the circuit protection layer, and setting the second PMUT on the second carrier layer. Alternatively...

[0165] The first PMUT and the second PMUT are directly constructed on the transistor unit, respectively, that is, the first carrier layer is bonded to the circuit protection layer and the first PMUT is set on the first carrier layer, and the second carrier layer is bonded to the circuit protection layer and the second PMUT is set on the second carrier layer.

[0166] 18. According to the method described in 16, wherein:

[0167] The bonding of the carrier layer and the circuit protection layer includes surface bonding to form a bonding surface, or bonding with a metal bonding layer between the two.

[0168] 19. According to the method described in 18, wherein:

[0169] The transistor unit includes multiple electrical connection layers located within a circuit protection layer;

[0170] The method further includes the step of: setting up multiple conductive paths, wherein the conductive paths electrically connect the electrode layers of the first PMUT and the second PMUT to the corresponding electrical connection layers.

[0171] 20. According to the method described in 19, wherein:

[0172] The first carrier layer and / or the second carrier layer are bonded to the circuit protection layer by a metal bonding layer; and

[0173] The metal bonding layer forms part of the corresponding conductive path.

[0174] 21. According to the method described in 16, wherein:

[0175] One PMUT has a piezoelectric layer of PZT or doped PZT, and the other PMUT has a piezoelectric layer of AlN or AlScN; and / or

[0176] One PMUT is used to transmit ultrasonic waves, and the other PMUT is used to receive ultrasonic waves.

[0177] 22. According to the method described in 16, wherein:

[0178] The transistor unit includes one of CMOS unit, BiMOS unit, and BCD unit.

[0179] 23. According to the method described in 16, wherein:

[0180] The material of the first carrier layer and / or the second carrier layer is a metal that is the same as or different from the material of the first electrode layer or the second electrode layer; or the material of the first carrier layer and / or the second carrier layer is an insulating material or a semiconductor material.

[0181] 24. According to the method described in 23, wherein:

[0182] The material of the first and / or second carrier layer is silicon, silicon dioxide, silicon nitride, or aluminum nitride.

[0183] 25. According to the method described in 23, wherein:

[0184] The materials of the first and / or second support layers are silicon, silicon dioxide, silicon nitride, and aluminum nitride.

[0185] 26. According to the method described in 16, wherein:

[0186] The absolute value of the piezoelectric coefficient of the piezoelectric layer of the PMUT is greater than 1 C / m. 2 ; and / or

[0187] The dielectric constant of the piezoelectric layer of the other PMUT is less than 1200.

[0188] 27. According to the method described in 26, wherein:

[0189] The absolute value of the piezoelectric coefficient of the piezoelectric layer of the PMUT is greater than 5C / m. 2 ; and / or

[0190] The dielectric constant of the piezoelectric layer of the other PMUT is less than 100.

[0191] 28. An electronic device comprising a micromechanical ultrasonic transducer structure according to any one of 1-15, or a micromechanical ultrasonic transducer structure manufactured according to any one of 16-27.

[0192] 29. The electronic device according to 28, wherein:

[0193] The electronic device includes at least one of the following: an ultrasonic imager, an ultrasonic rangefinder, an ultrasonic fingerprint sensor, a non-destructive testing instrument, a flow meter, a force feedback device, and a smoke alarm.

[0194] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that variations may be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A micromechanical ultrasonic transducer structure, comprising: First PMUT and second PMUT, each PMUT includes a top electrode layer, a bottom electrode layer and a piezoelectric layer. First PMUT is disposed on first carrier layer and second PMUT is disposed on second carrier layer. First carrier layer is independent of second carrier layer. A transistor unit includes a transistor substrate, a transistor, and a circuit protective layer covering the transistor. in: The first PMUT and the second PMUT are arranged at a distance from each other on one side of the circuit protection layer in the lateral direction; The piezoelectric coefficient of the piezoelectric layer of one of the first PMUTs and the second PMUT is higher than that of the piezoelectric layer of the other PMUT, and the dielectric constant of the piezoelectric layer of the first PMUT is lower than that of the piezoelectric layer of the other PMUT.

2. The micromechanical ultrasonic transducer structure according to claim 1, wherein: One PMUT has a piezoelectric layer of PZT or doped PZT, and the other PMUT has a piezoelectric layer of ALN or AlScN; and / or One PMUT is used to transmit ultrasonic waves, and the other PMUT is used to receive ultrasonic waves.

3. The micromechanical ultrasonic transducer structure according to claim 1, wherein: The first carrier layer is a PMUT support layer, which is bonded to the circuit protection layer and has a cavity within the circuit protection layer for the first PMUT; or The first carrier layer is a PMUT substrate, which is bonded to the circuit protection layer and the PMUT substrate is provided with a cavity for the first PMUT.

4. The micromechanical ultrasonic transducer structure according to claim 3, wherein: The second carrier layer is a PMUT support layer or a PMUT substrate. The second carrier layer is bonded to the circuit protection layer, and a cavity for the second PMUT is provided on the side of the second carrier layer facing the second PMUT.

5. The micromechanical ultrasonic transducer structure according to claim 4, wherein: An additional support layer is provided between the second PMUT and the second load-bearing layer.

6. The micromechanical ultrasonic transducer structure according to claim 3, wherein: The second carrier layer is a PMUT support layer. A bonding metal layer is disposed between the second carrier layer and the circuit protection layer, and the bonding metal layer and the circuit protection layer define a cavity for the second PMUT. The second PMUT is disposed on the side of the second carrier layer away from the cavity for the second PMUT, or the second PMUT is disposed between the second carrier layer and the circuit protection layer; or... The second carrier layer is a PMUT substrate. A second bonding metal layer is disposed between the second carrier layer and the circuit protection layer, and the second carrier layer is provided with a cavity for the second PMUT.

7. The micromechanical ultrasonic transducer structure according to claim 1, wherein: The first carrier layer is a PMUT support layer. A first bonding metal layer is disposed between the first carrier layer and the circuit protection layer, and the first bonding metal layer and the circuit protection layer are used to define a cavity for the first PMUT. The first PMUT is disposed on the side of the first carrier layer away from the cavity for the first PMUT, or the first PMUT is disposed between the first carrier layer and the circuit protection layer. The second carrier layer is a PMUT support layer. A second bonding metal layer is disposed between the second carrier layer and the circuit protection layer, and the second bonding metal layer and the circuit protection layer are used to define a cavity for the second PMUT. The second PMUT is disposed on the side of the second carrier layer away from the cavity for the second PMUT, or the second PMUT is disposed between the second carrier layer and the circuit protection layer.

8. The micromechanical ultrasonic transducer structure according to claim 1, wherein: The first carrier layer is a PMUT substrate, and a first bonding metal layer is disposed between the first carrier layer and the circuit protection layer, and the first carrier layer is provided with a cavity for the first PMUT; and The second carrier layer is a PMUT substrate. A second bonding metal layer is disposed between the second carrier layer and the circuit protection layer, and the second carrier layer is provided with a cavity for the second PMUT.

9. The micromechanical ultrasonic transducer structure according to any one of claims 1-8, wherein: The transistor unit includes multiple electrical connection layers located within a circuit protection layer; The micromechanical ultrasonic transducer structure also includes multiple conductive paths, which electrically connect the electrode layers of the first PMUT and the second PMUT to the corresponding electrical connection layers.

10. The micromechanical ultrasonic transducer structure according to claim 9, wherein: The first carrier layer and / or the second carrier layer are bonded to the circuit protection layer by a metal bonding layer; and The metal bonding layer forms part of the corresponding conductive path.

11. The micromechanical ultrasonic transducer structure according to claim 1, wherein: The transistor unit includes one of CMOS unit, BiMOS unit, and BCD unit.

12. The micromechanical ultrasonic transducer structure according to claim 1, wherein: The material of the first carrier layer and / or the second carrier layer is a metal that is the same as or different from the material of the first electrode layer or the second electrode layer; or the material of the first carrier layer and / or the second carrier layer is an insulating material or a semiconductor material.

13. The micromechanical ultrasonic transducer structure according to claim 12, wherein: The material of the first and / or second carrier layer is silicon, silicon dioxide, silicon nitride, or aluminum nitride.

14. The micromechanical ultrasonic transducer structure according to claim 1, wherein: The absolute value of the piezoelectric coefficient of the piezoelectric layer of the PMUT is greater than 1 C / m. 2 ; and / or The dielectric constant of the piezoelectric layer of the other PMUT is less than 1200.

15. The micromechanical ultrasonic transducer structure according to claim 14, wherein: The absolute value of the piezoelectric coefficient of the piezoelectric layer of the PMUT is greater than 5C / m. 2 ; and / or The dielectric constant of the piezoelectric layer of the other PMUT is less than 100.

16. A method for manufacturing a micromechanical ultrasonic transducer structure, comprising the following steps: Provides a transistor unit, the transistor unit including a transistor substrate, a transistor, and a circuit protective layer covering the transistor; and A first PMUT and a second PMUT are disposed on one side of the circuit protection layer, and the first PMUT and the second PMUT are arranged spaced apart in the lateral direction. The first PMUT is disposed on the first carrier layer, and the second PMUT is disposed on the second carrier layer. The first carrier layer and the second carrier layer are respectively bonded to the circuit protection layer. in: The piezoelectric coefficient of the piezoelectric layer of one of the first PMUTs and the second PMUT is higher than that of the piezoelectric layer of the other PMUT, and the dielectric constant of the piezoelectric layer of the first PMUT is lower than that of the piezoelectric layer of the other PMUT.

17. The method of claim 16, wherein: The steps for setting up the first PMUT and the second PMUT include: The constructed first PMUT and second PMUT are respectively bonded to the transistor unit, that is, the first PMUT is set on the first carrier layer, the second PMUT is set on the second carrier layer, and the first carrier layer with the first PMUT is bonded to the circuit protection layer, and the second carrier layer with the second PMUT is bonded to the circuit protection layer; or The first PMUT, after being constructed, is bonded to the transistor cell, and the second PMUT is directly constructed on the transistor cell. This involves setting the first PMUT on the first carrier layer, bonding the first carrier layer with the first PMUT to the circuit protection layer, bonding the second carrier layer to the circuit protection layer, and setting the second PMUT on the second carrier layer. Alternatively... The first PMUT and the second PMUT are directly constructed on the transistor unit, respectively, that is, the first carrier layer is bonded to the circuit protection layer and the first PMUT is set on the first carrier layer, and the second carrier layer is bonded to the circuit protection layer and the second PMUT is set on the second carrier layer.

18. The method of claim 16, wherein: The bonding of the first and second carrier layers with the circuit protection layer includes a surface bonding to form a bonding surface.

19. The method of claim 18, wherein: The transistor unit includes multiple electrical connection layers located within a circuit protection layer; The method further includes the step of: setting up multiple conductive paths, wherein the conductive paths electrically connect the electrode layers of the first PMUT and the second PMUT to the corresponding electrical connection layers.

20. The method of claim 16, wherein: The first carrier layer and / or the second carrier layer are bonded to the circuit protection layer by a metal bonding layer; and The metal bonding layer forms part of the corresponding conductive path.

21. The method of claim 16, wherein: One PMUT has a piezoelectric layer of PZT or doped PZT, and the other PMUT has a piezoelectric layer of AlN or AlScN; and / or One PMUT is used to transmit ultrasonic waves, and the other PMUT is used to receive ultrasonic waves.

22. The method of claim 16, wherein: The transistor unit includes one of CMOS unit, BiMOS unit, and BCD unit.

23. The method of claim 16, wherein: The material of the first carrier layer and / or the second carrier layer is a metal that is the same as or different from the material of the first electrode layer or the second electrode layer; or the material of the first carrier layer and / or the second carrier layer is an insulating material or a semiconductor material.

24. The method according to claim 23, wherein: The material of the first and / or second carrier layer is silicon, silicon dioxide, silicon nitride, or aluminum nitride.

25. The method according to claim 16, wherein: The absolute value of the piezoelectric coefficient of the piezoelectric layer of the PMUT is greater than 1 C / m. 2 ; and / or The dielectric constant of the piezoelectric layer of the other PMUT is less than 1200.

26. The method of claim 25, wherein: The absolute value of the piezoelectric coefficient of the piezoelectric layer of the PMUT is greater than 5C / m. 2 ; and / or The dielectric constant of the piezoelectric layer of the other PMUT is less than 100.

27. An electronic device comprising a micromechanical ultrasonic transducer structure according to any one of claims 1-15, or a micromechanical ultrasonic transducer structure manufactured by the manufacturing method according to any one of claims 16-26.

28. The electronic device according to claim 27, wherein: The electronic device includes at least one of the following: an ultrasonic imager, an ultrasonic rangefinder, an ultrasonic fingerprint sensor, a non-destructive testing instrument, a flow meter, a force feedback device, and a smoke alarm.

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