A voltage detection circuit and a battery device

Abstract

The application provides a voltage detection circuit and a battery device. The voltage detection circuit comprises a battery management chip and a battery. The battery management chip has an electrode terminal and a detection terminal. The electrode terminal is connected with an electrode of the battery. The battery management chip comprises: a first measurement path connected between the electrode terminal and the detection terminal; and a mode controller configured to control the first measurement path to work so that the first measurement path transmits a voltage signal of the battery to the detection terminal for voltage detection when the voltage of the battery is less than a first voltage threshold. The technical solution of the application can effectively manage the battery when over-discharge occurs, and helps to improve the use performance of the battery.

Description

Technical Field

[0001] This application relates to the field of voltage detection technology, and in particular to a voltage detection circuit and battery device. Background Technology

[0002] Currently, there are two main methods for detecting battery voltage in related technologies. The first is to use the analog-to-digital converter (ADC) inside the battery management chip to acquire the battery voltage signal. The second is to use an external measuring instrument to measure the battery voltage from the battery's charge / discharge port. However, when the battery is over-discharged, its voltage is low and cannot supply power to the ADC, causing it to malfunction and thus preventing the acquisition of the battery voltage signal. Furthermore, the battery management chip will disconnect the battery from the charge / discharge port, preventing external measuring instruments from measuring the battery voltage from the port. Therefore, these technologies cannot effectively detect the battery voltage when it is over-discharged. Summary of the Invention

[0003] This application provides a voltage detection circuit and a battery device to solve the problem in related technologies that the battery voltage cannot be effectively detected when the battery is over-discharged.

[0004] The first aspect of this application provides a voltage detection circuit, including a battery management chip and a battery. The battery management chip has an electrode and a detection terminal, and the electrode is connected to the electrode of the battery. The battery management chip includes: a first measurement path connected between the electrode and the detection terminal; and a mode controller for controlling the first measurement path to operate when the battery voltage is less than a first voltage threshold, so that the first measurement path transmits the battery voltage signal to the detection terminal for voltage detection.

[0005] In one embodiment, the first measurement path includes a buffer having an input terminal, an output terminal, and an enable terminal. The input terminal is connected to a terminal electrode, the output terminal is connected to a detection terminal, and the enable terminal is connected to a mode controller. The mode controller is configured to send a first control signal to the enable terminal of the buffer to activate the buffer when the battery voltage is less than a first voltage threshold and greater than or equal to a second voltage threshold. The mode controller is also configured to send a second control signal to the enable terminal of the buffer to deactivate the buffer when the battery voltage is less than the second voltage threshold. The second voltage threshold is less than the first voltage threshold.

[0006] In one embodiment, the battery management chip includes a first voltage comparator and a digital logic circuit, and the mode controller includes a logic OR gate circuit; the first voltage comparator is used to input a high level to the logic OR gate circuit when the battery voltage is less than a first voltage threshold and greater than or equal to a second voltage threshold, so that the logic OR gate circuit outputs a first control signal; and both the first voltage comparator and the digital logic circuit are used to input a low level to the logic OR gate circuit when the battery voltage is less than the second voltage threshold, so that the logic OR gate circuit outputs a second control signal.

[0007] In one embodiment, the battery management chip further includes: a second measurement path connected between the electrode and the detection terminal;

[0008] The digital logic circuit is used to control the second measurement path to operate when the battery voltage is greater than or equal to a first voltage threshold, so that the second measurement path transmits the battery voltage signal to the detection end for voltage detection.

[0009] In one embodiment, the second measurement path is a low-resistance measurement path, which includes a low-resistance resistor and a switch. The first end of the low-resistance resistor is connected to the electrode terminal, and the second end of the low-resistance resistor is connected to the detection terminal through the switch. The digital logic circuit is used to control the switch to close when the battery voltage is greater than or equal to a first voltage threshold, so that the second measurement path can work.

[0010] In one embodiment, a digital logic circuit is connected to a mode controller; the digital logic circuit is configured to send a third control signal to the mode controller when the battery voltage is greater than or equal to a first voltage threshold and less than or equal to a third voltage threshold, causing the mode controller to control the first measurement path to stop working; and the digital logic circuit is further configured to send a fourth control signal to the mode controller when the battery voltage is greater than the third voltage threshold, causing the mode controller to control the first measurement path to work; wherein the third voltage threshold is greater than the first voltage threshold.

[0011] In one embodiment, the mode controller includes an enable signal generation circuit, a trigger circuit, and a logic OR gate circuit; the enable signal generation circuit is used to generate a first enable signal when the battery voltage is greater than or equal to a second voltage threshold, wherein the second voltage threshold is less than the first voltage threshold.

[0012] The trigger circuit is used to output a low level to the logic OR gate circuit when it receives the first enable signal and the third control signal, so that the logic OR gate circuit drives the first measurement path to stop working; and / or, the trigger circuit is also used to output a high level to the logic OR gate circuit when it receives the first enable signal and the fourth control signal, so that the logic OR gate circuit drives the first measurement path to work.

[0013] And / or, the enable signal generation circuit is also used to generate a second enable signal when the battery voltage is less than a second voltage threshold; the trigger circuit is used to output a low level to the logic OR gate circuit when the second enable signal is received, so that the logic OR gate circuit drives the first measurement path to stop working.

[0014] In one embodiment, the battery management chip further includes a high-resistance path connected between the electrode and the detection terminal.

[0015] In one embodiment, the voltage detection circuit includes a charge / discharge port, and the battery management chip further includes a second voltage comparator. The second voltage comparator is used to send short-circuit signals to the first measurement path and the second measurement path respectively when the voltage difference between the charge / discharge port and the detection port is less than a short-circuit voltage threshold, so as to stop the first measurement path and the second measurement path from working. The voltage detection circuit also includes a first switch and a second switch, and the voltage management chip further includes a driving circuit. The charge / discharge port is connected to the electrode of the battery through the first switch and the second switch. The driving circuit is used to drive the first switch and the second switch to turn off when a short-circuit signal is received, so as to disconnect the connection between the charge / discharge port and the electrode.

[0016] And / or, the battery management chip also includes a power supply terminal for connecting to an external power source, the power supply terminal being connected to the first measurement path and the mode controller respectively, so as to supply power to the first measurement path and the mode controller through the external power source.

[0017] A second aspect of this application provides a battery device including a voltage detection circuit according to any of the above embodiments.

[0018] The advantages or beneficial effects of the above technical solution include at least the following: by setting a first measurement path and a mode controller connected between the electrode and the detection end inside the battery management chip, the mode controller controls the first measurement path to work when the battery voltage is less than a first voltage threshold, so that the first measurement path can transmit the battery voltage signal to the detection end. Thus, even when the battery is over-discharged, the battery management chip can still provide the battery voltage signal from the detection end, so as to quickly, effectively and in real time detect the battery voltage. This is beneficial for effective battery management when the battery is over-discharged, thereby helping to improve the battery's performance. Attached Figure Description

[0019] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application. Furthermore, these drawings and textual descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concepts of this application to those skilled in the art through reference to specific embodiments.

[0020] Figure 1 The diagram shown is a schematic of a voltage detection circuit based on related technologies.

[0021] Figure 2 The diagram shown is a structural schematic of a voltage detection circuit according to an embodiment of this application.

[0022] Figure 3A As shown Figure 2 A schematic diagram of the structure of the first measurement path in the middle.

[0023] Figure 3B As shown Figure 2 A schematic diagram of the structure of the second measurement path.

[0024] Figure 3C As shown Figure 2 A schematic diagram of a medium-to-high resistance pathway.

[0025] Figure 4 As shown Figure 2 A schematic diagram of a medium-mode controller. Detailed Implementation

[0026] In the following description, only certain exemplary embodiments are briefly described. As those skilled in the art will recognize, the described embodiments can be modified in various ways without departing from the spirit or scope of this application. Therefore, the drawings and description are considered to be exemplary in nature and not restrictive.

[0027] Figure 1 The diagram shows a schematic of a voltage detection circuit based on related technologies.

[0028] like Figure 1 As shown, the voltage detection circuit 100 of the related technology includes a battery management chip 10, a battery 20, a processor 30, a first charge / discharge port 100A, and a second charge / discharge port 100B. The first terminal BAT of the battery management chip 10 is connected to the first electrode of the battery 20 through a first resistor R1, and the second terminal VSS of the battery management chip 10 is connected to the second electrode of the battery 20 and grounded. Figure 1 (The first and second electrodes are not labeled). The first charge / discharge port 100A is connected to the first electrode of the battery 20 through the first switch NM1 and the second switch NM2. The second charge / discharge port 100B is connected to the second electrode of the battery 20 through the second resistor R2. A third resistor R3 is connected between the first charge / discharge port 100A and the power supply terminal PACK of the battery management chip 10. A fourth resistor R4 is connected between the first charge / discharge port 100A and the gate of the first switch NM1. The processor 30 uses a serial cable to connect to the serial port of the battery management chip 10. Figure 1 (Unmarked in the text) connection.

[0029] like Figure 1 As shown, in related technologies, there are two main methods for detecting battery voltage: the first method is for the digital-to-analog converter 11 to collect the voltage signal of the battery 20 from the first electrode of the battery 20 through the first resistor R1, and transmit the voltage signal to the digital logic circuit 12, so that the filter inside the digital logic circuit 12 filters the voltage signal and outputs it to the processor 30 for processing through the serial interface; the second method is to use an external measuring instrument to measure the voltage of the battery 20 from the first charging and discharging port 100A and the second charging and discharging port 100B of the battery 20. However, when battery 20 is over-discharged, its low voltage prevents it from supplying power to analog-to-digital converter 11, causing 11 to malfunction and thus preventing the acquisition of battery 20's voltage signal. Furthermore, when battery 20 is over-discharged, voltage comparator 13 detects that the battery 20's voltage is below the over-discharge protection voltage and sends a drive signal to drive circuit 14, causing it to turn off the first switch NM1 and the second switch NM2. This prevents external measuring instruments from measuring battery 20's voltage from the first charge / discharge port 100A and the second charge / discharge port 100B. Therefore, the relevant technology cannot effectively detect battery 20's voltage when it is over-discharged.

[0030] In view of this, this application provides a voltage detection circuit. When the battery is over-discharged, the battery management chip provides the battery voltage signal to the outside world, so that the battery voltage can be effectively detected. This is beneficial for effective battery management in the event of over-discharge, thereby helping to improve the battery's performance.

[0031] The embodiments of this application will now be described in detail with reference to the accompanying drawings. Figure 2 The diagram shown is a structural schematic of a voltage detection voltage according to an embodiment of this application.

[0032] like Figure 2 As shown, the voltage detection circuit 100 includes a battery management chip 10 and a battery 20. The battery management chip 10 has a terminal 100C and a detection terminal 100D, with the terminal 100C connected to the electrode of the battery 20. The battery management chip 10 includes a first measurement path 151 and a mode controller 16. The first measurement path 151 is connected between the terminal 100C and the detection terminal 100D. The mode controller 16 is used to control the first measurement path 151 to operate when the voltage of the battery 20 is less than a first voltage threshold, so that the first measurement path 151 transmits the voltage signal of the battery 20 to the detection terminal 100D for voltage detection. The mode controller 16 is connected to the first measurement path 151.

[0033] For example, the first voltage threshold is the over-discharge protection voltage of battery 20, which is the over-discharge protection voltage of battery 20. Taking battery 20 as a lithium battery as an example, the over-discharge protection voltage of a lithium battery is 2.3V. In practical applications, such as... Figure 1 As shown, when the voltage of battery 20 is less than the first voltage threshold, battery 20 is in an over-discharge state. The analog-to-digital converter 11 inside the battery management chip 10 cannot work properly, and the drive circuit 14 inside the battery management chip 10 will drive the first switch NM1 and the second switch NM2 to turn off, thus failing to effectively detect the voltage of battery 20. As a result, the battery management chip 10 cannot effectively manage battery 20 when it is over-discharged.

[0034] The above solution, by setting a first measurement path 151 and a mode controller 16 inside the battery management chip 10, connecting the electrode 100C and the detection terminal 100D, allows the mode controller 16 to control the first measurement path 151 to work when the voltage of the battery 20 is less than a first voltage threshold. This enables the first measurement path 151 to transmit the voltage signal of the battery 20 to the detection terminal 100D. Thus, even when the battery 20 is over-discharged, the battery management chip 10 can still provide the voltage signal of the battery 20 from the detection terminal 100D, enabling fast, effective, and real-time detection of the battery 20's voltage. This facilitates effective management of the battery 20 in the event of over-discharge, thereby improving the performance of the battery 20.

[0035] For example, in related technologies, such as Figure 1 As shown, when the voltage of battery 20 is lower than the over-discharge protection voltage, neither the analog-to-digital converter 11 nor external measuring instruments can detect the voltage of battery 20, which is detrimental to the management of battery 20. In this situation, battery 20 is usually placed in a non-use state, reducing its performance. In this application, when the voltage of battery 20 is lower than the over-discharge protection voltage, the battery management chip 10 can provide the voltage signal of battery 20 to the outside through the detection terminal 100D for battery voltage detection, which is beneficial for the management of battery 20. It can put battery 20 into a usable state, which helps to extend the single-use time of battery 20 by maximizing the consumption of battery power, thereby improving the performance of battery 20.

[0036] In one example, such as Figure 2 As shown, battery 20 has a first electrode and a second electrode. Figure 2(Unmarked in the text), the electrode 100C includes a first electrode BAT and a second electrode VSS, and the detection terminal 100D includes a first detection terminal VSENSE_P and a second detection terminal VSENSE_N. The first electrode is connected to the first electrode BAT, and the second electrode is connected to the second electrode VSS. It should be noted that this application uses the example of the first electrode being the positive electrode of the battery 20 and the second electrode being the negative electrode of the battery 20 for illustration. The types of the first and second electrodes can also be adjusted according to actual needs. For example, the first electrode can be the negative electrode of the battery 20, and the second electrode can be the positive electrode of the battery 20. The embodiments of this application are not limited to this.

[0037] The first measurement path 151 connects the first electrode BAT to the first detection terminal VSENSE_P, so that when the voltage of battery 20 is less than a first voltage threshold, the voltage signal of the first electrode is transmitted to the first detection terminal VSENSE_P. The first measurement path 151 also connects the second electrode VSS to the second detection terminal VSENSE_N, so that when the voltage of battery 20 is less than the first voltage threshold, the voltage signal of the second electrode is transmitted to the second detection terminal VSENSE_N. Thus, in the event of over-discharge of battery 20, the voltage signal of the first electrode can be effectively detected from the first detection terminal VSENSE_P and the voltage signal of the second electrode can be effectively detected from the second detection terminal VSENSE_N, achieving differential detection of the battery voltage. This detection method can provide accurate battery voltage measurement and detection.

[0038] In one implementation, such as Figure 2 and Figure 3A As shown, the first measurement path 151 includes a buffer with an input terminal, an output terminal, and an enable terminal. The input terminal of the buffer is connected to the electrode 100C, the output terminal is connected to the detection terminal 100D, and the enable terminal is connected to the mode controller 16. The mode controller 16 is used to send a first control signal to the enable terminal of the buffer to activate the buffer when the voltage of the battery 20 is less than a first voltage threshold but greater than or equal to a second voltage threshold. At this time, the battery management chip 10 operates in buffer mode. The second voltage threshold is less than the first voltage threshold. Furthermore, the mode controller 16 is used to send a second control signal to the enable terminal of the buffer to deactivate the buffer when the voltage of the battery 20 is less than the second voltage threshold.

[0039] For example, continuing with a lithium battery, the first voltage threshold can be 2.3V, and the second voltage threshold can be 1V. When the voltage of battery 20 is greater than or equal to the second voltage threshold and less than the first voltage threshold, battery 20 is in a low-voltage state. The mode controller 16 sends a first control signal to the enable terminal of the buffer to activate the buffer, thereby providing a voltage signal of battery 20 through the detection terminal 100D when battery 20 is in a low-voltage state. When the voltage of battery 20 is less than the second voltage threshold, battery 20 is in an excessively low-voltage state. If battery 20 continues to be used, its performance will be severely degraded. The mode controller 16 sends a second control signal to the enable terminal of the buffer to deactivate the buffer and stop the detection terminal 100D from providing a voltage signal of battery 20, thus avoiding voltage detection of battery 20 when it is in an excessively low-voltage state and protecting battery 20.

[0040] For example, such as Figure 2 and Figure 3A As shown, the buffer includes a first buffer 151A and a second buffer 151B. The input terminal of the first buffer 151A is connected to the first terminal BAT, and the output terminal of the first buffer 151A is connected to the first detection terminal VSENSE_P. The input terminal of the second buffer 151B is connected to the second terminal VSS, and the output terminal of the second buffer 151B is connected to the second detection terminal VSENSE_N. The enable terminal P_EN of the first buffer 151A and the enable terminal N_EN of the second buffer 151B are both connected to the mode controller 16.

[0041] The mode controller 16 is configured to send a first control signal to the enable terminal P_EN of the first buffer 151A and the enable terminal N_EN of the second buffer 151B when the voltage of the battery 20 is less than a first voltage threshold and greater than or equal to a second voltage threshold, respectively, to enable the first buffer 151A and the second buffer 151B to operate. This allows the first buffer 151A to transmit the voltage signal of the first electrode to the first detection terminal VSENSE_P, and the second buffer 151B to transmit the voltage signal of the second electrode to the second detection terminal VSENSE_N. Furthermore, the mode controller 16 is also configured to send a second control signal to the enable terminal P_EN of the first buffer 151A and the enable terminal N_EN of the second buffer 151B when the voltage of the battery 20 is less than the second voltage threshold, respectively, to disable the operation of the first buffer 151A and the second buffer 151B.

[0042] For example, such as Figure 3A As shown, the buffer can be a voltage follower, that is, the first measurement path 151 can be a voltage follower. The non-inverting input of the voltage follower ( Figure 3AThe input terminals marked with "+" form the input terminals of the buffer, and the inverting input terminal of the voltage follower ( Figure 3A The input terminal marked with "-" is connected to the output terminal, and the output terminal of the voltage follower forms the output terminal of the buffer. Because the voltage follower has a very high internal input impedance, it consumes very little current, thus allowing the output of the battery 20 voltage signal without interfering with the original circuitry inside the battery management chip 10. Furthermore, the voltage follower, acting as a buffer, also provides isolation, which helps reduce interference to the battery 20.

[0043] It should be noted that, as Figure 1 As shown, in related technologies, the voltage signal of the battery 20 is acquired by an analog-to-digital converter 11 and filtered before being transmitted externally. This typically introduces detection errors and reduces detection accuracy. This application utilizes a voltage follower to directly transmit the voltage signal of the battery 20 to the detection terminal 100D, avoiding the introduction of detection errors and improving detection accuracy, thereby providing a more precise battery voltage.

[0044] In one implementation, such as Figure 2 , 3A and Figure 4 As shown, the battery management chip 10 includes a first voltage comparator 131 and a digital logic circuit 12, and the mode controller 16 includes a logic OR gate 161. The first voltage comparator 131 is used to input a high-level signal to the logic OR gate 161 when the voltage of the battery 20 is less than a first voltage threshold but greater than or equal to a second voltage threshold, causing the logic OR gate 161 to output a first control signal. Furthermore, both the first voltage comparator 131 and the digital logic circuit 12 are used to input a low-level signal to the logic OR gate 161 when the voltage of the battery 20 is less than the second voltage threshold, causing the logic OR gate 161 to output a second control signal.

[0045] For example, such as Figure 2 and Figure 4 As shown, the first voltage comparator 131 has an input terminal and an output terminal. The logic OR gate 161 has a first input terminal, a second input terminal, and an output terminal, and the logic OR gate 161 includes a first logic OR gate 161A and a second logic OR gate 161B.

[0046] The input terminal of the first voltage comparator 131 is used to input the voltage Vbat of the battery 20. The output terminal of the first voltage comparator 131 is connected to the first input terminal LVC_EN of the first logic OR gate 161A and the first input terminal LVC_EN of the second logic OR gate 161B. The second input terminals of the first logic OR gate 161A and the second logic OR gate 161B are... Figure 4(Unmarked) are all used to connect digital logic circuit 12. The output terminal of the first logic OR gate circuit 161A is connected to the enable terminal P_EN of the first buffer 151A, and the output terminal of the second logic OR gate circuit 161B is connected to the enable terminal N_EN of the second buffer 151B.

[0047] When the voltage Vbat of battery 20 is less than a first voltage threshold but greater than or equal to a second voltage threshold, the first voltage comparator 131 inputs a high level to both the first input terminal LVC_EN of the first OR gate 161A and the first input terminal LVC_EN of the second OR gate 161B. The output terminal of the first OR gate 161A outputs a high level to the enable terminal P_EN of the first buffer 151A, and the output terminal of the second OR gate 161B outputs a high level to the enable terminal N_EN of the second buffer 151B, thus enabling both the first buffer 151A and the second buffer 151B to operate. The high level serves as the first control signal sent by the mode controller 16 to the buffers.

[0048] When the voltage Vbat of battery 20 is less than the second voltage threshold, the first voltage comparator 131 inputs a low level to both the first input terminal LVC_EN of the first OR gate 161A and the first input terminal LVC_EN of the second OR gate 161B. At this time, battery 20 is in an excessively low voltage state, digital logic circuit 12 stops working, and the second input terminals of both the first OR gate 161A and the second OR gate 161B also input a low level. Thus, the output terminal of the first OR gate 161A outputs a low level to the enable terminal P_EN of the first buffer 151A, and the output terminal of the second OR gate 161B outputs a low level to the enable terminal N_EN of the second buffer 151B, causing both the first buffer 151A and the second buffer 151B to stop working. The low level serves as a second control signal sent by the mode controller 16 to the buffers.

[0049] In one implementation, such as Figure 2 As shown, the battery management chip 10 also includes a second measurement path 152 and a digital logic circuit 12. The second measurement path 152 is connected between the battery terminal 100C and the detection terminal 100D. The digital logic circuit 12 is used to control the second measurement path 152 to operate when the voltage of the battery 20 is greater than or equal to a first voltage threshold, so that the second measurement path 152 transmits the voltage signal of the battery 20 to the detection terminal 100D for battery voltage detection. Please refer to [further details omitted]. Figure 1The comparison result that the voltage of battery 20 is greater than or equal to the first voltage threshold can be obtained by inputting the voltage Vbat of battery 20 and the first voltage threshold to the existing voltage comparator 13 inside the battery management chip 10, so that the voltage comparator 13 compares the voltage Vbat of battery 20 with the first voltage threshold. The digital logic circuit 12 controls the second measurement path 152 according to the comparison result that the voltage of battery 20 is greater than or equal to the first voltage threshold.

[0050] When the voltage of battery 20 is greater than or equal to the first voltage threshold, the digital logic circuit 12 inside the battery management chip 10 can operate normally. By connecting a second measurement path 152 between the electrode 100C and the detection terminal 100D, and using the digital logic circuit 12 to control the operation of the second measurement path 152 when the voltage of battery 20 is greater than or equal to the first voltage threshold, the second measurement path 152 can directly transmit the voltage signal of battery 20 to the detection terminal 100D. In this way, it can serve as an auxiliary detection method for battery voltage when battery 20 has not experienced over-discharge protection.

[0051] In one implementation, such as Figure 2 and Figure 3B As shown, the second measurement path 152 is a low-resistance measurement path, which includes a low-resistance resistor and a switch. The first end of the low-resistance resistor is connected to the terminal 100C, and the second end of the low-resistance resistor is connected to the detection terminal 100D via the switch. The digital logic circuit 12 is used to control the switch to close, thereby activating the second measurement path 152, when the voltage of the battery 20 is greater than or equal to a first voltage threshold. For example, the resistance value of the low-resistance resistor can be on the order of kiloohms.

[0052] In one example, such as Figure 2 and Figure 3BAs shown, the second measurement path 152 includes a first low-resistance measurement path 152A and a second low-resistance measurement path 152B. The first low-resistance measurement path 152A includes a first low-resistance resistor LR1 and a first switch SW1. The first terminal of the first low-resistance resistor LR1 is connected to the first terminal BAT, and the second terminal of the first low-resistance resistor LR1 is connected to the first detection terminal VSENSE_P through the first switch SW1. The second low-resistance measurement path 152B includes a second low-resistance resistor LR2 and a second switch SW2. The first terminal of the second low-resistance resistor LR2 is connected to the second terminal VSS, and the second terminal of the second low-resistance resistor LR2 is connected to the second detection terminal VSENSE_N through the second switch SW2. The digital logic circuit 12 is connected to the control terminals of the first switch SW1 and the second switch SW2, respectively. Digital logic circuit 12 is used to control the first switch SW1 and the second switch SW2 to close when the voltage of battery 20 is greater than or equal to a first voltage threshold, thereby activating the first low-resistance measurement path 152A and the second low-resistance measurement path 152B. This allows the first low-resistance measurement path 152A to directly transmit the voltage signal of the first electrode of battery 20 to the first detection terminal VSENSE_P, and the second low-resistance measurement path 152B to transmit the voltage signal of battery 20...

[0053] The voltage signal from the second electrode is directly transmitted to the second detection terminal VSENSE_N to provide the voltage signals of the first and second electrodes of the battery 20 to the outside. At this time, the battery management chip 10 operates in low-impedance mode.

[0054] In the above example, because the resistance values ​​of the first low-resistance measurement path 152A and the second low-resistance measurement path 152B are very small, they consume only a small amount of current, reducing the impact on the accuracy of battery voltage detection. Furthermore, the first low-resistance measurement path 152A directly transmits the voltage signal of the first electrode of battery 20 to the first detection terminal VSENSE_P, and the second low-resistance measurement path 152B directly transmits the voltage signal of the second electrode of battery 20 to the second detection terminal VSENSE_N. Neither the first low-resistance measurement path 152A nor the second low-resistance measurement path 152B involves intermediate processing of the voltage signal, which can reduce the introduction of errors. Thus, when battery 20 has not been over-discharged, using the first low-resistance measurement path 152A and the second low-resistance measurement path 152B to directly transmit the voltage signals of the first and second electrodes of battery 20 for battery voltage detection is beneficial to improving detection accuracy.

[0055] In another example, such as Figure 3BAs shown, the switch in the low-resistance measurement path (i.e., the second measurement path 152) includes a switching transistor. The first terminal of the switching transistor is connected to the second terminal of the low-resistance resistor, the second terminal of the switching transistor is connected to the detection terminal 100D, and the gate of the switching transistor constitutes the control terminal of the switch for connection to the digital logic circuit 12. The digital logic circuit 12 is used to send a gate control signal to the gate of the switching transistor when the voltage of the battery 20 is greater than or equal to a first voltage threshold, thereby turning on the switching transistor. This allows the electrodes of the battery 20 to directly transmit voltage signals to the detection terminal 100D through the low-resistance resistor and the switching transistor. The switching transistor can be either a PMOS transistor or an NMOS transistor; correspondingly, the first terminal can be either the source or the drain, and the second terminal can be either the source or the drain.

[0056] In another example, the gate control signal can be input to the digital logic circuit 12 via an external input device, and the gate control signal can be generated by the external input device in response to a user's input operation. It is understood that the gate control signal can also be automatically generated by the digital logic circuit 12 when the voltage of the battery 20 is greater than or equal to a first voltage threshold. This application embodiment does not limit the method of generating the fifth control signal.

[0057] In one implementation, such as Figure 2 As shown, digital logic circuit 12 is connected to mode controller 16. Digital logic circuit 12 is also used to send a third control signal to mode controller 16 when the voltage of battery 20 is greater than or equal to a first voltage threshold and less than or equal to a third voltage threshold, causing mode controller 16 to control the first measurement path 151 to stop operating. Furthermore, digital logic circuit 12 is also used to send a fourth control signal to mode controller 16 when the voltage of battery 20 is greater than the third voltage threshold, causing mode controller 16 to control the first measurement path 151 to operate. The third voltage threshold is greater than the first voltage threshold. Additionally, please refer to... Figure 1 The comparison result of the voltage of battery 20 being greater than or equal to the first voltage threshold and less than or equal to the third voltage threshold can also be obtained by using the original voltage comparator 13 inside the battery management chip 10. The digital logic circuit 12 controls the mode controller 16 based on the comparison result of the voltage of battery 20 being greater than or equal to the first voltage threshold and less than or equal to the third voltage threshold.

[0058] For example, the first voltage threshold can be an over-discharge protection voltage, and the third voltage threshold can be an overcharge protection voltage. For instance, taking a lithium battery as an example, the over-discharge protection voltage of a lithium battery is 2.3V, and the overcharge protection voltage is 4.3V. When the voltage of battery 20 is greater than or equal to the first voltage threshold and less than or equal to the third voltage threshold, the voltage of battery 20 is within the normal operating voltage range, and battery 20 is in normal operating condition.

[0059] On the one hand, when the voltage of battery 20 is greater than or equal to the first voltage threshold, digital logic circuit 12 controls the second measurement path 152 to work.

[0060] On the other hand, when the voltage of battery 20 is greater than or equal to the first voltage threshold and less than or equal to the third voltage threshold, the digital logic circuit 12 sends a third control signal to the mode controller 16, causing the mode controller 16 to control the first measurement path 151 to stop working. At this time, the second measurement path 152 remains operational, and the battery management chip 10 is in low-impedance mode. Thus, when battery 20 is in normal working condition, not only can the voltage signal of battery 20 be acquired through the analog-to-digital converter 11 inside the battery management chip 10 and the voltage of battery 20 be detected using external measuring instruments, but the voltage signal of battery 20 can also be transmitted to the inspection terminal 100D through the second measurement path 152 for more accurate auxiliary detection of battery voltage.

[0061] On the other hand, when the voltage of battery 20 exceeds the third voltage threshold, digital logic circuit 12 sends a fourth control signal to mode controller 16, causing mode controller 16 to control the first measurement path 151 to operate. At this time, both the first measurement path 151 and the second measurement path 152 are in operation, and battery management chip 10 is simultaneously in low-impedance mode and buffer mode. In this mode, the second measurement path 152 is used to perform higher-precision auxiliary detection of the voltage of battery 20, while the first measurement path 151 serves as a discharge circuit for the second measurement path 152. In the event of overcharging of battery 20, it provides a discharge path for the first measurement path 151, thereby stabilizing the voltage at detection terminal 100D and improving the stability of battery voltage detection.

[0062] It should be noted that, as Figure 1 As shown, in related technologies, when the voltage comparator 13 detects that the voltage of the battery 20 is greater than the third voltage threshold, the voltage comparator 13 sends an overcharge protection signal to the drive circuit 14, causing the drive circuit 14 to drive the first switching transistor NM1 to turn off, thereby disconnecting the electrical connection between the first electrode of the battery 20 and the first charging port 100A, resulting in external measuring instruments being unable to perform voltage detection from the first charging port 100A and the second charging port 100B. In the above solution, when the voltage of the battery 20 is greater than the third voltage threshold, the digital logic circuit 12 controls both the first measurement path 151 and the second measurement path 152 to operate through the mode controller 16. This allows for battery voltage detection even when the battery 20 experiences overcharge protection.

[0063] In one implementation, such as Figure 2 and Figure 4As shown, the mode controller 16 includes an enable signal generation circuit 162, a trigger circuit 163, and a logic OR gate circuit 161. The enable signal generation circuit 162 generates a first enable signal when the voltage of the battery 20 is greater than or equal to a second voltage threshold, where the second voltage threshold is less than the first voltage threshold. The trigger circuit 163, upon receiving both the first enable signal and a third control signal, outputs a low-level signal to the logic OR gate circuit 161, causing the logic OR gate circuit 161 to stop driving the first measurement path 151 to stop operating.

[0064] And / or, the trigger circuit 163 is also used to output a high level to the logic OR gate circuit 161 upon receiving the first enable signal and the fourth control signal, so that the logic OR gate circuit 161 drives the first measurement path 151 to work.

[0065] For example, the enable signal generation circuit 162 includes a first flip-flop S1, a fifth resistor R5, a first capacitor C1, and a third switch NM3. The first flip-flop S1 has an input terminal, an output terminal, and a power supply terminal. The input terminal of the first flip-flop S1 is connected to the power supply terminal PACK through the fifth resistor R5. The power supply terminal of the first flip-flop S1 is connected to the power supply terminal PACK. The first capacitor C1 is connected in parallel with the fifth resistor R5. The first terminal of the third switch NM3 is connected to the input terminal of the first flip-flop S1, and the second terminal of the third switch NM3 is grounded. The gate of the third switch NM3 constitutes the input terminal of the enable signal generation circuit 162. The gate of the third switch NM3 is used to connect to the internal power supply voltage VREGPOR of the battery management chip 10, which characterizes the voltage value of the battery 20. The output terminal of the first flip-flop S1 constitutes the output terminal of the enable signal generation circuit 162. It is understood that the above example uses an NMOS transistor as the third switch NM3 for illustration; the third switch NM3 can also be replaced with a PMOS transistor according to actual needs.

[0066] The trigger circuit 163 includes a second flip-flop S2 and a third flip-flop S3. The second flip-flop S2 includes an input terminal DA_SENSEP, a reset terminal RESET, a reference voltage terminal REG, a power supply terminal, and an output terminal. The third flip-flop S3 also includes an input terminal DA_SENSEP, a reset terminal RESET, a reference voltage terminal REG, a power supply terminal, and an output terminal. The logic OR gate circuit 161 includes a first logic OR gate circuit 161A and a second logic OR gate circuit 161B. The reset terminals RESET of both the second and third flip-flops S2 and S3 are connected to the output terminal of the first flip-flop S1. The reference voltage terminals REG of both the second and third flip-flops S2 and S3 are connected to the internal reference voltage (not shown in the figure) of the battery management chip 10. The power supply terminals of both the second and third flip-flops S2 and S3 are connected to the power supply terminal PACK. The output terminal of the second flip-flop S2 is connected to the second input terminal of the first logic OR gate circuit 161A, and the output terminal of the third flip-flop S3 is connected to the second input terminal of the second logic OR gate circuit 161B. The first input terminal LVC_EN of the first OR gate 161A and the first input terminal LVC_EN of the second OR gate 161B are both connected to the output terminal of the first voltage comparator 131. The output terminal of the first OR gate 161A is connected to the enable terminal P_EN of the first buffer 151A, and the output terminal of the second OR gate 161B is connected to the enable terminal N_EN of the second buffer 151B.

[0067] In practical applications, when the voltage of battery 20 is greater than or equal to the second voltage threshold, the internal power supply voltage VREGPOR of battery management chip 10 is high. The third switch NM3 is turned on under the action of high level to ground the first capacitor C1, so that the level of the input terminal connected to the first flip-flop S1 is pulled low, the output terminal of the first flip-flop S1 outputs a high level, and the second flip-flop S2 and the third flip-flop S3 are in working state under the action of high level.

[0068] Furthermore, when the voltage of battery 20 is greater than or equal to the first voltage threshold and less than or equal to the third voltage threshold, on the one hand, the voltage of battery 20 is within the normal operating voltage range, and the first voltage comparator 131 outputs a low level to the first input terminal LVC_EN of the first logic OR gate circuit 161A and the first input terminal LVC_EN of the second logic OR gate circuit 161B; on the other hand, the digital logic circuit 12 sends a third control signal to the second input terminals of the second flip-flop S2 and the third flip-flop S3, causing the second flip-flop S2 to output a low level to the second input terminal of the first logic OR gate circuit 161A, and causing the third flip-flop S3 to output a low level to the second input terminal of the second logic OR gate circuit 161B. Thus, the first logic OR gate circuit 161A outputs a low level to the enable terminal P_EN of the first buffer 151A, and the second logic OR gate circuit 161B outputs a low level to the enable terminal N_EN of the second buffer 151B, causing the first buffer 151A and the second buffer 151B to stop working. In this way, when the battery 20 is in normal working condition, the first measurement path 151 can be cut off, while the second measurement path 152 is retained for battery voltage detection.

[0069] Furthermore, when the voltage of battery 20 exceeds the third voltage threshold, battery 20 is in an overcharged state. On one hand, the first voltage comparator 131 sends signals to the first input terminal LVC_EN of the first logic OR gate circuit 161A and the second logic OR gate circuit.

[0070] The first input terminal LVC_EN of 161B outputs a low level. On the other hand, digital logic circuit 12 sends a fourth control signal to the second input terminals of both the second flip-flop S2 and the third flip-flop S3, causing the second flip-flop S2 to output a high level to the second input terminal of the first logic OR gate 161A, and the third flip-flop S3 to output a high level to the second input terminal of the second logic OR gate 161B. Thus, the first logic OR gate 161A inputs a high level to the enable terminal P_EN of the first buffer 151A, and the second logic OR gate 161B inputs a high level to the enable terminal N_EN of the second buffer 151B, enabling both the first buffer 151A and the second buffer 151B to operate. In this way, when the battery 20 is in an overcharged state, the first measurement path 151 can be used as the discharge path for the second measurement path 152, ensuring the stability of battery voltage detection using the second measurement path 152.

[0071] In one implementation, such as Figure 4 As shown, the enable signal generation circuit 162 is also used to generate a second enable signal when the voltage of the battery 20 is less than a second voltage threshold. The trigger circuit 163 is used to output a low level to the logic OR gate circuit 161 when the second enable signal is received, so that the logic OR gate circuit 161 drives the first measurement path 151 to stop working.

[0072] For example, when the voltage of battery 20 is less than the second voltage threshold, battery 20 is in an excessively low voltage state. On the one hand, the first voltage comparator 131 outputs a low level to the first input terminal LVC_EN of the first logic OR gate circuit 161A and the first input terminal LVC_EN of the second logic OR gate circuit 161B. The internal power supply voltage VREGPOR of the battery management chip 10 is at a low level, and the third switch NM3 is cut off under the action of the low level, so that the output terminal of the first flip-flop S1 outputs a low level. This low level inputs the reset terminal RESET of the second flip-flop S2 and the third flip-flop S3, so that the signal input to the second flip-flop S1 via the input terminal DA_SENSEP of the second flip-flop S1 and the signal input to the third flip-flop S3 via the input terminal DA_SENSEN of the third flip-flop S3 are ineffective. At this time, the output terminals of the second flip-flop S2 and the third flip-flop S3 both output a low level, so that the second input terminal of the first logic OR gate circuit 161A and the second input terminal of the second logic OR gate circuit 161B are both connected to a low level. In this way, the first logic OR gate 161A outputs a low level to the enable terminal P_EN of the first buffer 151A, and the second logic OR gate 161B outputs a low level to the enable terminal N_EN of the second buffer 151B, causing both the first buffer 151A and the second buffer 151B to stop working. This avoids battery voltage detection when the battery 20 is in an excessively low voltage state, thus protecting the battery 20.

[0073] Furthermore, it should be noted that when the voltage of battery 20 is greater than or equal to the second voltage threshold and less than the first voltage threshold, battery 20 is in a low-voltage state. The first voltage comparator 131 outputs a high level to both the first input terminal LVC_EN of the first logic OR gate 161A and the first input terminal LVC_EN of the second logic OR gate 161B. The internal power supply voltage VREGPOR of the battery management chip 10 is low, and the third switch NM3 is cut off under the low-level effect, causing the output terminal of the first flip-flop S1 to output a low level. This renders the signal input to the second flip-flop S1 via the input terminal DA_SENSEP and the signal input to the third flip-flop S3 via the input terminal DA_SENSEN ineffective. Thus, the first logic OR gate 161A outputs a high level to the enable terminal P_EN of the first buffer 151A, and the second logic OR gate 161B outputs a high level to the enable terminal N_EN of the second buffer 151B, causing both the first buffer 151A and the second buffer 151B to operate.

[0074] In one implementation, such as Figure 2 and Figure 3CAs shown, the battery management chip 10 also includes a high-resistance path 153, which is connected between the electrode terminal 100C and the detection terminal 100D.

[0075] For example, such as Figure 3C As shown, the high-resistance path 153 includes a first high-resistance path 153A and a second high-resistance path 153B. The first high-resistance path 153A is connected between the first terminal BAT and the first detection terminal VSENSE_P, and the second high-resistance path 153B is connected between the second terminal VSS and the second detection terminal VSENSE_N. Further, the first high-resistance path 153A includes a first high-resistance resistor HR1, and the second high-resistance path 153B includes a second high-resistance resistor HR2. The resistance values ​​of the first high-resistance resistor HR1 and the second high-resistance resistor HR2 can be on the order of megaohms.

[0076] The above solution, by connecting a high-resistance path 153 between the electrode 100C and the detection terminal 100D, allows the battery management chip 10 to be in a high-resistance mode when the first measurement path 151 and the second measurement path 152 stop working.

[0077] It should be noted that, in practical applications, the first measurement path 151, the second measurement path 152, and the high-resistance path 153 of the above embodiments can be integrated into the measurement path 15 inside the battery management chip 10, or they can be three separate measurement paths inside the battery management chip 10. This application embodiment does not limit this.

[0078] In one implementation, such as Figure 2 As shown, the voltage detection circuit 100 includes a charge / discharge port, and the battery management chip 10 further includes a second voltage comparator 132. The second voltage comparator 132 is used to send short-circuit signals to the first measurement path 151 and the second measurement path 152 respectively when the voltage difference between the charge / discharge port and the detection terminal 100D is less than the short-circuit voltage threshold, so that the first measurement path 151 and the second measurement path 152 stop working.

[0079] For example, the charging / discharging ports include a first charging / discharging port 100A and a second charging / discharging port 100B. The first charging / discharging port 100A is connected to the first electrode of the battery 20, and the second charging / discharging port 100B is connected to the second electrode of the battery 20. The second voltage comparator 132 is used to send a short-circuit signal to the first measurement path 151 and the second measurement path 152 when the voltage difference between the first charging / discharging port 100A and the first detection terminal VSENSE_P is less than a short-circuit voltage threshold, or when the voltage difference between the second charging / discharging port 100B and the second detection terminal VSENSE_N is less than a short-circuit voltage threshold, so that both the first measurement path 151 and the second measurement path 152 stop working.

[0080] In one example, the input terminal of the second voltage comparator 132 can be used to input the voltage Vsensep of the first detection terminal VSENSE_P and the voltage Vpackp of the first charge / discharge port 100A. When the voltage difference between the voltage Vsensep of the first detection terminal VSENSE_P and the voltage Vpackp of the first charge / discharge port 100A is less than the short-circuit voltage threshold, the second voltage comparator 132 sends a short-circuit signal to the first measurement path 151 and the second measurement path 152.

[0081] In another example, the input of the second voltage comparator 132 can be used to input the voltage Vsensen of the second detection terminal VSENSE_N and the voltage Vpackn of the second charge / discharge port 100B. When the voltage difference between the voltage Vsensen of the second detection terminal VSENSE_N and the voltage Vpackn of the second charge / discharge port 100B is less than the short-circuit voltage threshold, the second voltage comparator 132 sends a short-circuit signal to the first measurement path 151 and the second measurement path 152.

[0082] Based on this, when the first detection terminal VSENSE_P is shorted to the first charge / discharge port 100A, or when the second detection terminal VSENSE_N is shorted to the second charge / discharge port 100B, the battery management chip 10 can be made to work in high-impedance mode.

[0083] In one implementation, such as Figure 2 As shown, the voltage detection circuit 100 further includes a first switch NM1 and a second switch NM2, and the voltage management chip further includes a drive circuit 14. The charge / discharge port is connected to the electrodes of the battery 20 through the first switch NM1 and the second switch NM2. The drive circuit 14 is used to drive the first switch NM1 and the second switch NM2 to turn off when a short-circuit signal is received, so as to disconnect the connection between the charge / discharge port and the electrodes of the battery 20.

[0084] For example, such as Figure 2 As shown, the first terminal of the first switching transistor NM1 is connected to the first charge / discharge port 100A, the second terminal of the first switching transistor NM1 is connected to the second terminal of the second switching transistor NM2, the first terminal of the second switching transistor NM2 is connected to the first electrode of the battery 20, and the gates of both the first switching transistor NM1 and the second switching transistor NM2 are connected to the driving circuit 14. When the driving circuit 14 receives a short-circuit signal, it sends a third control signal to the gates of the first switching transistor NM1 and the second switching transistor NM2, causing both the first switching transistor NM1 and the second switching transistor NM2 to turn off, thereby disconnecting the connection between the first charge / discharge port 100A and the first electrode of the battery 20, thus protecting the battery 20.

[0085] It is understood that the above embodiments are only illustrated by taking NMOS transistors as the first switch NM1 and the second switch NM2 as examples. The first switch NM1 and the second switch NM2 can also be replaced with PMOS transistors according to actual needs.

[0086] In one implementation, such as Figure 2 As shown, the battery management chip 10 also includes a power supply terminal PACK for connecting to an external power source. The power supply terminal PACK is connected to the first measurement path 151 and the mode controller 16 respectively, so as to supply power to the first measurement path 151 and the mode controller 16 through the external power source.

[0087] For example, such as Figure 2 As shown, the power supply PACK is connected to the first charge / discharge port 100A, which is used to connect to an external power source. Thus, the power supply PACK can be connected to an external power source through the first charge / discharge port 100A. In practical applications, when the battery 20 is in an over-discharged state, the battery 20 cannot supply power to the first measurement path 151 and the mode controller 16, causing both the first measurement path 151 and the mode controller 16 to malfunction. If an external power source is connected to the first charge / discharge port 100A at this time, the power supply PACK can supply power to the first measurement path 151 and the mode controller 16 through the external power source, enabling the first measurement path 151 and the mode controller 16 to operate.

[0088] Specifically, such as Figure 3A As shown, the power supply terminal PACK is connected to the power supply terminal of the first buffer 151A and the power supply terminal of the second buffer 151B, respectively. Figure 4 As shown, the power supply terminal PACK is connected to the power supply terminals of the first flip-flop S1, the second flip-flop S2, and the third flip-flop S3 in the mode controller 16, respectively. In this way, when the battery 20 is in a low-voltage state, an external power supply can be connected to power the first measurement path 151 and the mode controller 16, ensuring their operation.

[0089] This application also provides a battery 20 device, which includes a voltage detection circuit 100 according to any of the above embodiments. The specific structure of the voltage detection circuit 100 is as described in the above embodiments. Since the voltage detection circuit 100 adopts all the technical solutions of all the above embodiments, it has at least all the beneficial effects brought about by the technical solutions of the above embodiments, and will not be described in detail here.

[0090] Furthermore, in this application, unless otherwise expressly specified and limited, the terms "connected," "linked," "stacked," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two elements or the interaction between two elements. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0091] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Any modifications or equivalent substitutions made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A voltage detection circuit, characterized in that, The device includes a battery management chip and a battery. The battery management chip has an electrode and a detection terminal, and the electrode is connected to the electrode of the battery. The battery management chip includes a first measurement path and a mode controller. The first measurement path includes a buffer, which has an input terminal, an output terminal, and an enable terminal. The input terminal is connected to the electrode, the output terminal is connected to the detection terminal, and the enable terminal is connected to the mode controller. The mode controller is used to send a first control signal to the enable terminal of the buffer when the battery voltage is less than a first voltage threshold and greater than or equal to a second voltage threshold, so that the buffer can be activated and the first measurement path can transmit the battery voltage signal to the detection terminal for voltage detection. Furthermore, the mode controller is also configured to send a second control signal to the enable terminal of the buffer when the voltage of the battery is less than the second voltage threshold, so as to stop the buffer from working. Wherein, the second voltage threshold is less than the first voltage threshold; the first voltage threshold is the over-discharge protection voltage of the battery.

2. The voltage detection circuit according to claim 1, characterized in that, The battery management chip includes a first voltage comparator and digital logic circuits, and the mode controller includes a logic OR gate circuit. The first voltage comparator is used to input a high level to the logic OR gate circuit when the voltage of the battery is less than the first voltage threshold and greater than or equal to the second voltage threshold, so that the logic OR gate circuit outputs the first control signal. Furthermore, both the first voltage comparator and the digital logic circuit are configured to input a low level to the logic OR gate circuit when the voltage of the battery is less than the second voltage threshold, so that the logic OR gate circuit outputs the second control signal.

3. The voltage detection circuit according to claim 1, characterized in that, The battery management chip also includes: The second measurement path is connected between the electrode end and the detection end; A digital logic circuit is used to control the second measurement path to operate when the voltage of the battery is greater than or equal to the first voltage threshold, so that the second measurement path transmits the voltage signal of the battery to the detection terminal for voltage detection.

4. The voltage detection circuit according to claim 3, characterized in that, The second measurement path is a low-resistance measurement path, which includes a low-resistance resistor and a switch. The first end of the low-resistance resistor is connected to the terminal electrode, and the second end of the low-resistance resistor is connected to the detection terminal through the switch. The digital logic circuit is used to control the switch to close when the battery voltage is greater than or equal to the first voltage threshold, thereby enabling the second measurement path to operate.

5. The voltage detection circuit according to claim 3, characterized in that, The digital logic circuit is connected to the mode controller; The digital logic circuit is used to send a third control signal to the mode controller when the voltage of the battery is greater than or equal to the first voltage threshold and less than or equal to the third voltage threshold, so that the mode controller controls the first measurement path to stop working. Furthermore, the digital logic circuit is also used to send a fourth control signal to the mode controller when the voltage of the battery is greater than the third voltage threshold, so that the mode controller controls the first measurement path to work. The third voltage threshold is greater than the first voltage threshold.

6. The voltage detection circuit according to claim 5, characterized in that, The mode controller includes an enable signal generation circuit, a trigger circuit, and a logic OR gate circuit. The enable signal generation circuit is used to generate a first enable signal when the voltage of the battery is greater than or equal to a second voltage threshold, wherein the second voltage threshold is less than the first voltage threshold. The trigger circuit is used to output a low level to the logic OR gate circuit when it receives the first enable signal and the third control signal, so that the logic OR gate circuit drives the first measurement path to stop working. The trigger circuit is also used to output a high level to the logic OR gate circuit when the first enable signal and the fourth control signal are received, so that the logic OR gate circuit drives the first measurement path to work. The enable signal generation circuit is further configured to generate a second enable signal when the battery voltage is less than the second voltage threshold; the trigger circuit is configured to output a low level to the logic OR gate circuit upon receiving the second enable signal, thereby causing the logic OR gate circuit to drive the first measurement path to stop working.

7. The voltage detection circuit according to any one of claims 1 to 6, characterized in that, The battery management chip also includes: A high-resistance path is connected between the electrode and the detection terminal.

8. The voltage detection circuit according to claim 5, characterized in that, The voltage detection circuit includes a charging / discharging port, and the battery management chip further includes a second voltage comparator. The second voltage comparator is used to send short-circuit signals to the first measurement path and the second measurement path respectively when the voltage difference between the charging / discharging port and the detection port is less than the short-circuit voltage threshold, so that the first measurement path and the second measurement path stop working. Furthermore, the voltage detection circuit further includes a first switching transistor and a second switching transistor, and the battery management chip further includes a driving circuit; the charging / discharging port is connected to the electrode of the battery through the first switching transistor and the second switching transistor, and the driving circuit is used to drive the first switching transistor and the second switching transistor to turn off when the short-circuit signal is received, so as to disconnect the connection between the charging / discharging port and the electrode; The battery management chip also includes a power supply terminal for connecting to an external power source. The power supply terminal is connected to the first measurement path and the mode controller respectively, so as to supply power to the first measurement path and the mode controller through the external power source.

9. A battery device, characterized in that, Includes the voltage detection circuit according to any one of claims 1 to 8.

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