A functional safety processing method and device for memory data

Abstract

This disclosure relates to a functional safety processing method, apparatus, computer device, storage medium, and computer program product for memory data. The method includes: acquiring data to be stored and storage address data of the memory where the data to be stored will be stored; determining an auxiliary error correction code based on extended Hamming code error correction technology according to the data to be stored and the storage address data; combining the encoding of the data to be stored and the auxiliary error correction code to obtain first encoded data; and storing the first encoded data in the storage area corresponding to the storage address data. Using this method to store data enables external devices to obtain not only the target stored data but also the corresponding auxiliary error correction code when reading the first encoded data. The auxiliary error correction code can be used to verify the storage address corresponding to the target stored data, thereby enabling timely detection of whether data was read from an incorrect storage address.

Description

Technical Field

[0001] This disclosure relates to the field of integrated circuit technology, and in particular to a method, apparatus, computer device, storage medium, and computer program product for functionally safe processing of memory data. Background Technology

[0002] With the development of integrated circuit technology, techniques for error checking and correction of memory have emerged.

[0003] Currently, in automotive microcontrollers, Flash memory (non-volatile memory) serves as the primary data storage. As the chip ages, it is prone to various single-point failures. Conventional ECC (Error Correcting Code) circuits can only correct or report random hardware failures in the stored data bits. However, if the address decoding circuitry within the Flash memory malfunctions (address row / column decoding, selection circuits, etc., account for a large proportion of Flash memory, exceeding 50% for 256Kb Flash), it cannot be effectively detected. This is because the data read from the incorrect address, while having the correct ECC, is not actually at the expected address. This can lead to serious, unpredictable failures in the microcontroller (incorrect instruction or data fetching, resulting in incorrect calculations or branch jumps, leading to incorrect output). Summary of the Invention

[0004] Therefore, it is necessary to provide a functionally safe method, apparatus, computer device, computer-readable storage medium, and computer program product for processing memory data that can facilitate data error correction in memory, addressing the aforementioned technical problems.

[0005] In a first aspect, this disclosure provides a method for functionally safe processing of memory data. The method includes:

[0006] Obtain the data to be stored and the storage address data of the memory where the data to be stored will be stored;

[0007] Based on the data to be stored and the storage address data, determine the auxiliary error correction code based on extended Hamming code error correction technology;

[0008] The data to be stored and the auxiliary error correction code are combined to obtain the first encoded data;

[0009] The first encoded data is stored in the storage area corresponding to the storage address data.

[0010] In one embodiment, the memory is a non-volatile memory, and after obtaining the first encoded data, the method further includes:

[0011] Obtain the storage sector data corresponding to the storage address data;

[0012] Based on the storage sector data corresponding to the storage address data, redundant space coding is added to the first coded data to obtain the second coded data;

[0013] The second encoded data is stored in the storage area corresponding to the storage address data.

[0014] In one embodiment, the redundancy space encoding is an encoding based on extended Hamming code error correction technology.

[0015] In one embodiment, the method further includes:

[0016] Obtain the target access address data;

[0017] Based on the target access address data, read the target encoded data stored in the memory, wherein the target encoded data includes first encoded data or second encoded data;

[0018] Based on the target access address data, the target encoded data is corrected and decoded using extended Hamming code error correction technology to obtain the error correction result.

[0019] In one embodiment, the redundancy space coding includes at least one of the following coding methods: blank sector code, special sector code, and main memory space code.

[0020] In one embodiment, the method further includes:

[0021] When the error correction result includes data errors, the data reading is interrupted, a data error warning is issued, or data error feedback is provided. The information provided by the error data feedback includes at least one of the following: error address, error type, error sector, and error storage block. The error type includes at least one of the following: single-bit error, double-bit error, and redundancy space coding error.

[0022] In one embodiment, when the redundancy space coding includes blank sector codes, the method further includes:

[0023] Based on the blank sector code, determine whether the address to be accessed is in a post-erased state, and obtain the first determination result;

[0024] When the first judgment result includes that the address to be accessed is in a post-erased state, no error correction decoding is performed, and at least one of the following processes is performed: access address information feedback, interrupt data reading, issue a warning that a blank area is being read, or select whether to process based on a preset address range.

[0025] In one embodiment, after determining whether the address to be accessed is in a post-erased state based on the blank sector code and obtaining a first determination result, the method further includes:

[0026] The first judgment result is compared with the corresponding predicted storage state to obtain the comparison result;

[0027] When the comparison result, including the first judgment result, is inconsistent with the corresponding predicted storage state, at least one of the following processes shall be performed: data read error feedback, interrupt data read, or issue a data read error warning.

[0028] In one embodiment, when the redundant space is encoded as a special sector code, the method further includes, before storing the second encoded data in the storage area corresponding to the storage address data:

[0029] Based on the special sector code, determine whether the address to be accessed belongs to the special sector, and obtain the second determination result;

[0030] When the second determination result includes that the address to be accessed belongs to a special sector, the redundant space encoding in the second encoded data is updated to the specific special sector code.

[0031] In one embodiment, when the redundant space code is the primary storage space code, before storing the second encoded data in the storage area corresponding to the storage address data, the method further includes:

[0032] Based on the main storage space code, determine whether the address to be accessed is located in the main storage space, and obtain the third determination result;

[0033] When the third determination result includes that the address to be accessed is located in the main storage space, the redundant space code in the second encoded data is updated to the specific main storage space code.

[0034] Secondly, this disclosure also provides a functionally safe processing apparatus for memory data. The apparatus includes:

[0035] The first data acquisition module is used to acquire the data to be stored and the storage address data of the memory where the data to be stored will be stored;

[0036] The encoding determination module is used to determine an auxiliary error correction encoding based on extended Hamming code error correction technology based on the data to be stored and the storage address data.

[0037] The first encoding module is used to combine the encoded data to be stored and the auxiliary error correction code to obtain the first encoded data;

[0038] The first storage module is used to store the first encoded data into the storage area corresponding to the storage address data.

[0039] Thirdly, this disclosure also provides a computer device. The computer device includes a memory and a processor, the memory storing a computer program, and the processor executing the computer program to perform the following steps:

[0040] Obtain the data to be stored and the storage address data of the memory where the data to be stored will be stored;

[0041] Based on the data to be stored and the storage address data, determine the auxiliary error correction code based on extended Hamming code error correction technology;

[0042] The data to be stored and the auxiliary error correction code are combined to obtain the first encoded data;

[0043] The first encoded data is stored in the storage area corresponding to the storage address data.

[0044] Fourthly, this disclosure also provides a computer-readable storage medium. The computer-readable storage medium stores a computer program thereon, which, when executed by a processor, performs the following steps:

[0045] Obtain the data to be stored and the storage address data of the memory where the data to be stored will be stored;

[0046] Based on the data to be stored and the storage address data, determine the auxiliary error correction code based on extended Hamming code error correction technology;

[0047] The data to be stored and the auxiliary error correction code are combined to obtain the first encoded data;

[0048] The first encoded data is stored in the storage area corresponding to the storage address data.

[0049] Fifthly, this disclosure also provides a computer program product. The computer program product includes a computer program that, when executed by a processor, performs the following steps:

[0050] Obtain the data to be stored and the storage address data of the memory where the data to be stored will be stored;

[0051] Based on the data to be stored and the storage address data, determine the auxiliary error correction code based on extended Hamming code error correction technology;

[0052] The data to be stored and the auxiliary error correction code are combined to obtain the first encoded data;

[0053] The first encoded data is stored in the storage area corresponding to the storage address data.

[0054] The aforementioned functional safety processing method, apparatus, computer equipment, storage medium, and computer program product for memory data generates auxiliary error-correcting codes based on extended Hamming code error correction technology, establishing a correspondence between the data to be stored and its corresponding storage address. These auxiliary error-correcting codes and the data to be stored are then combined and encoded to obtain first coded data, which is stored in the corresponding location in the memory. This ensures that when an external device reads the first coded data, it not only obtains the required storage data (which can be referred to as the target storage data) but also the corresponding auxiliary error-correcting code. Using this auxiliary error-correcting code, the storage address corresponding to the target storage data can be verified. Furthermore, when the address decoding circuit in the memory malfunctions, i.e., when data is read from an incorrect storage address, the error can be detected promptly. Attached Figure Description

[0055] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure, and are not intended to unduly limit this disclosure.

[0056] Figure 1 This is an application environment diagram of a functional safety processing method for memory data in one embodiment;

[0057] Figure 2 This is a flowchart illustrating a functional safety processing method for memory data in one embodiment;

[0058] Figure 3 This is a schematic diagram of a sub-process of a functional safety processing method for memory data in one embodiment;

[0059] Figure 4 This is a schematic diagram of a sub-process of a functionally safe method for processing memory data in another embodiment;

[0060] Figure 5 This is a structural block diagram of a functional safety processing device for memory data in one embodiment;

[0061] Figure 6 This is a structural block diagram of the first submodule of a functionally safe processing device for memory data in one embodiment.

[0062] Figure 7 This is a block diagram of the second submodule of the functionally safe processing device for memory data in another embodiment;

[0063] Figure 8 This is an internal structural diagram of a computer device in one embodiment. Detailed Implementation

[0064] To make the objectives, technical solutions, and advantages of this disclosure clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this disclosure.

[0065] It should be noted that the terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this disclosure are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this disclosure described herein can be implemented in orders other than those illustrated or described herein. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this disclosure. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this disclosure as detailed in the appended claims.

[0066] The functional safety processing method for memory data provided in this disclosure can be applied to, for example... Figure 1 In the application environment shown, the memory 102 communicates with the server 104 via a network. The memory 102 can be located on various terminals. The data storage system can store the data that the server 104 needs to process. The data storage system can be integrated on the server 104 or placed on the cloud or other network servers. The data acquisition end of the server 104 can acquire the data to be stored and the storage address data in the memory used to store the data to be stored. The server 104 encodes the data to be stored and the storage address data to obtain first encoded data. The server 104 stores the first encoded data in the corresponding storage area of ​​the memory 102. The memory 102 can be, but is not limited to, various personal computers, laptops, smartphones, tablets, IoT devices, and portable wearable devices. IoT devices can be smart speakers, smart TVs, smart air conditioners, smart vehicle devices, etc. Portable wearable devices can be smartwatches, smart bracelets, head-mounted devices, etc. The server 104 can be implemented using a standalone server or a server cluster composed of multiple servers.

[0067] In one embodiment, such as Figure 2 As shown, a functional safety processing method for memory data is provided, which is applied to... Figure 1Taking the application environment in [the document] as an example, the following steps are included:

[0068] S202, Obtain the data to be stored and the storage address data of the memory where the data to be stored will be stored.

[0069] The data to be stored can refer to data that needs to be stored in the memory.

[0070] Specifically, when the data to be stored is stored in the memory, it becomes stored data. The storage address data contains the storage address information in the memory used to store the data to be stored. The process involves obtaining the data to be stored and the storage address in the memory that will be used to store it.

[0071] S204, determine the auxiliary error correction code based on the data to be stored and the storage address data.

[0072] Among them, extended Hamming code error correction technology can refer to the technology of realizing error checking and correction by correcting single errors and detecting double errors.

[0073] Specifically, the English name for Single Error Correction and Double Error Detection is SECDED. The English name for Error Correcting Code is ECC. In Extended Hamming Code (ECC) error correction technology, because the minimum Hamming distance achieved by ECC is 4, the decoder can distinguish when at most one error occurs and when two errors occur, thus achieving single error correction and double error detection. Using ECC error correction technology allows for quick and convenient data error correction. The auxiliary error correction code associates the correspondence between the data to be stored and the corresponding storage address, and can be used to perform parity checks on this correspondence. The auxiliary error correction code can also be used for parity checks of the stored data.

[0074] S206, combine the data to be stored and the auxiliary error correction code to obtain the first encoded data.

[0075] Specifically, the auxiliary error correction code and the data to be stored are encoded together to obtain the first encoded data. For example, the data to be stored can be encoded first, and then the encoding of the data to be stored and the auxiliary error correction code can be simply concatenated and combined to form a whole. The first encoded data contains the data to be stored and the correspondence between the data to be stored and the corresponding storage address. In this way, when an external device needs to access stored data at a target storage location in the memory, it will access the first encoded data, which also contains the auxiliary error correction code. The auxiliary error correction code can be used to verify whether the storage address of the stored data is the target storage address, thereby determining whether the accessed stored data comes from the correct storage address.

[0076] S208, the first encoded data is stored in the storage area corresponding to the storage address data.

[0077] The storage area corresponding to the storage address data can refer to the storage area of ​​the memory represented by the storage address data.

[0078] Specifically, the first encoded data is stored in the corresponding storage area of ​​the memory. There can be a one-to-one correspondence between the storage areas in the memory and the storage address data.

[0079] In the aforementioned functional safety processing method for memory data, an auxiliary error-correcting code is generated based on extended Hamming code error correction technology to establish a correspondence between the data to be stored and its corresponding storage address. This auxiliary error-correcting code and the data to be stored are then combined and encoded to obtain first coded data, which is stored in the corresponding location in the memory. This ensures that when an external device reads the first coded data, it not only obtains the required storage data (which can be referred to as the target storage data) but also the corresponding auxiliary error-correcting code. Using this auxiliary error-correcting code, the storage address corresponding to the target storage data can be verified. Furthermore, when the address decoding circuit in the memory malfunctions, i.e., when data is read from an incorrect storage address, the error can be detected promptly.

[0080] In one embodiment, such as Figure 3 As shown, the memory is a non-volatile memory. After obtaining the first encoded data, the method further includes:

[0081] S302, Obtain the storage sector data corresponding to the storage address data.

[0082] Here, a storage sector can refer to a storage sector in a memory. Storage sector data can refer to data containing storage sector information.

[0083] Specifically, the storage address data corresponds to a storage address in the memory, which is divided into numerous storage sectors. When storing data, the memory can store data in different storage sectors. Therefore, there can be storage sector data corresponding to the storage address data. The storage sector data may include the location information of the storage sector, and may also include the erase / write status information of the storage sector.

[0084] S304, based on the storage sector data corresponding to the storage address data, add redundant space encoding to the first encoded data to obtain the second encoded data.

[0085] Specifically, the English name for redundancy space coding is Space Coding. The redundancy space coding contains storage sector information, which can be used to verify the corresponding storage sector information. Based on the storage sector data corresponding to the storage address data, redundancy space coding is added to the first coded data to obtain second coded data. Since the second coded data contains the redundancy space coding, it contains the storage sector information of the stored data.

[0086] S306, the second encoded data is stored in the storage area corresponding to the storage address data.

[0087] Specifically, in step S206, the first encoded data is stored in the storage area corresponding to the storage address data. Unlike step S206, in this embodiment, the second encoded data is stored in the storage area corresponding to the storage address data.

[0088] When a server accesses specific sectors of certain memory (e.g., NVR, NVR_CFG, and ARRDN sectors of Flash memory, where Flash is the name of a non-volatile memory, and NVR, NVR_CFG, and ARRDN are internal sector names of Flash memory), it generates an access space jump. This causes the address error checking and correction functions in existing technologies to fail, making it impossible to perform corresponding error correction. To address this technical problem, this embodiment adds redundant space encoding containing storage sector information to the first encoded data to obtain second encoded data. This second encoded data is then stored in the corresponding storage area of ​​the memory. When the server reads the second encoded data, it can determine which specific sector space within the memory is currently being accessed, thereby detecting errors caused by access space jumps. The redundant space encoding can also be used to quickly identify whether the storage space to be accessed is a specific sector or a main storage sector. If not, an alarm can be triggered indicating an erroneous storage space access.

[0089] In one embodiment, the redundancy space encoding is an encoding based on extended Hamming code error correction technology.

[0090] Since the redundant space coding is based on extended Hamming code error correction technology, extended Hamming code error correction technology can be used to correct errors in the second coded data in order to verify the storage sector information corresponding to the read data.

[0091] In one embodiment, such as Figure 4 As shown, the method further includes:

[0092] S402, Obtain target access address data.

[0093] S404, based on the target access address data, read the target encoded data stored in the memory, the target encoded data including first encoded data or second encoded data.

[0094] S406, Based on the target access address data, use extended Hamming code error correction technology to perform error correction decoding on the target encoded data to obtain the error correction result.

[0095] The target access address data can refer to data containing information about the data storage address that the server needs to access.

[0096] Specifically, the server can obtain target access address data. Based on the target access address data, the server can find the corresponding data storage address and then read the stored target encoded data. When the memory stores first encoded data, the target encoded data includes the first encoded data. When the memory stores second encoded data, the target encoded data includes the second encoded data. Extended Hamming code error correction technology is used to process the auxiliary error correction codes in the target encoded data. Based on the auxiliary error correction codes, it is determined whether the storage address of the target encoded data is consistent with the target access address, thus obtaining an error correction result. The error correction result can include data correctness and data error. Data correctness indicates that the read data itself is error-free and the read address is correct. Data error indicates that the read data itself is incorrect and / or the read address is incorrect.

[0097] In this embodiment, by using extended Hamming code error correction technology and the auxiliary error correction code for error correction during data reading, it is possible to achieve the beneficial effect of simply and quickly obtaining error correction results using extended Hamming code error correction technology, and determining whether there is a data reading address error.

[0098] In one embodiment, the redundancy space coding includes at least one of the following coding methods: blank sector code, special sector code, and main memory space code.

[0099] The blank sector code is used to identify whether the currently read data is in a post-erased state in the memory (also known as an all-1 state, as the memory's parity bits are also all-1). The special sector code indicates that the currently read data comes from a specific sector within the memory, such as the NVR sector, NVR_CFG sector, or ARRDN sector in Flash memory. The main memory space code indicates that the currently read data comes from a contiguous area of ​​the main memory.

[0100] Specifically, the blank sector code can be in the form of encoding (7'b111_1111). The special sector code can be in the form of encoding (7'b010_1010). The main memory space code can be in the form of encoding (7'b101_0001).

[0101] In this embodiment, by further clarifying the content of the redundancy space coding, the beneficial effect of reasonably determining the redundancy space coding can be achieved.

[0102] In one embodiment, the bit width of the data to be stored in the first encoded data is 128 bits, the bit width of the storage address data in the first encoded data is 29 bits, the bit width of the auxiliary error correction code is 9 bits, and the bit width of the redundancy space code is 7 bits.

[0103] Here, bit width can refer to bit width (the English name for bit is bit).

[0104] Specifically, when the memory's data storage width is 144 bits, 128 bits can be used to store the target data, which is the bit width of the data to be stored in the first encoded data. In this case, the corresponding storage address has a bit width of 29 bits. Nine bits of the remaining 16 bits can be used to store the auxiliary error correction code, and seven bits of the remaining 16 bits can be used to store the redundancy space code.

[0105] In this embodiment, by specifying the bit width of each part of the data for a memory with a data storage bit width of 144 bits, the beneficial effect of making full use of the storage space can be achieved while meeting usage requirements.

[0106] In one embodiment, the method further includes:

[0107] When the error correction result includes data errors, the data reading is interrupted, a data error warning is issued, or data error feedback is provided. The information provided by the error data feedback includes at least one of the following: error address, error type, error sector, and error storage block. The error type includes at least one of the following: single-bit error, double-bit error, and redundancy space coding error.

[0108] Specifically, the handling method when the error correction result includes data errors can be pre-set, such as interrupting data reading, issuing a data error warning, or providing data error feedback. The information provided in the error data feedback may include one or more of the following: error address, error type, error sector, and error storage block. The error type may include one or more of the following: single-bit error, double-bit error, and redundancy space coding error.

[0109] In this embodiment, by interrupting data reading, issuing data error warnings, or providing data error feedback when the error correction result includes data errors, the beneficial effect of enabling relevant processing personnel to promptly detect errors can be achieved.

[0110] In one embodiment, the memory is a Flash memory. The redundancy space coding and the auxiliary error correction coding can be used to identify whether the Flash memory is empty. These same codings can also be used to identify different storage blocks, which are called Flash Blocks. Due to its inherent characteristics, a Flash memory is in a fully FF state after data is erased. A fully FF state means the memory is empty and no data is stored.

[0111] In one embodiment, when the redundancy space coding includes blank sector codes, the method further includes:

[0112] Based on the blank sector code, determine whether the address to be accessed is in a post-erased state, and obtain the first determination result;

[0113] When the first judgment result includes that the address to be accessed is in a post-erased state, no error correction decoding is performed, and at least one of the following processes is performed: access address information feedback, interrupt data reading, issue a warning that a blank area is being read, or select whether to process based on a preset address range.

[0114] Here, "post-erase / write state" can refer to the state of the memory after it has been erased or rewritten, i.e., the state without stored data. "Preset address range" can refer to a pre-defined range of memory addresses.

[0115] Specifically, during data reading, identifying the blank sector code can determine whether the address to be accessed is in a post-erased state (i.e., in the all-FF state for Flash memory). The determination result can include whether the address to be accessed is in a post-erased state or not. If the first determination result includes that the address to be accessed is in a post-erased state, then error correction code decoding is not required for the read encoded data, such as the first encoded data or the second encoded data. In this case, access address information feedback can be provided to inform that the storage location of the data to be read is original and in a post-erased state, data reading can be interrupted, and a warning can be issued. The warning can include pre-set warning content. Alternatively, processing can be selected based on a preset address range, i.e., only when the address to be accessed belongs to the preset address range will access address information feedback, data reading be interrupted, and a warning be issued; otherwise, no processing is performed. The preset address range can be a pre-set range of storage addresses of the memory, which can be set according to actual needs. Under normal circumstances, programs should not execute or read from areas that have not been written to. For Flash memory, content in the full FF state will cause decoding errors. However, blank sector codes using redundant space encoding can help identify and avoid this situation (i.e., when the address to be accessed is identified as being in the erased state, error correction decoding can be avoided).

[0116] In this embodiment, by determining that the address to be accessed is in a post-erased state based on the blank sector code, instead of performing error correction decoding, corresponding feedback and warning processing can be performed, which can achieve beneficial effects such as rapid identification, reduced decoding workload, and rapid corresponding processing. In one embodiment, after determining whether the address to be accessed is in a post-erased state based on the blank sector code and obtaining a first determination result, the method further includes:

[0117] The first judgment result is compared with the corresponding predicted storage state to obtain the comparison result;

[0118] When the comparison result, including the first judgment result, is inconsistent with the corresponding predicted storage state, at least one of the following processes shall be performed: data read error feedback, interrupt data read, or issue a data read error warning.

[0119] Specifically, the comparison result may include whether the first judgment result is consistent with the corresponding predicted storage state, or whether the first judgment result is inconsistent with the corresponding predicted storage state. The predicted storage state may refer to the storage state predicted based on past usage of the memory storage space. For example, the processor can record the usage of the memory storage space for prediction. For instance, for certain memory storage spaces that have never been used, the storage state of the corresponding storage area can be predicted. If, through comparison, the first judgment result is found to be inconsistent with the corresponding predicted storage state, it indicates a data read error has occurred. At this time, at least one of the following processes can be performed: data read error feedback, interrupting data read, or issuing a data read error warning.

[0120] In this embodiment, by comparing the predicted storage state with the storage state determined based on the blank sector code when the redundant space encoding includes blank sector codes, the beneficial effect of quickly detecting data reading errors and performing corresponding processing can be achieved.

[0121] In one embodiment, when the data to be stored is in a fully FF state, i.e., the data content is empty, it is possible to choose not to encode it and to keep the original blank state of the memory unchanged.

[0122] In one embodiment, when the redundant space is encoded as a special sector code, before storing the second encoded data in the storage area corresponding to the storage address data, the method further includes:

[0123] Based on the special sector code, determine whether the address to be accessed belongs to the special sector, and obtain the second determination result;

[0124] When the second determination result includes that the address to be accessed belongs to a special sector, the redundant space encoding in the second encoded data is updated to the specific special sector code.

[0125] Among them, the specific special sector code can refer to the encoding that contains specific special sector information.

[0126] Specifically, the special sector code can be used to determine whether the memory address to be accessed belongs to a special sector. When it is determined that the address to be accessed belongs to a special sector, the redundant space code in the second encoded data can be updated to the specific special sector code. The specific special sector code generally only contains the lower-level special sector address information and does not contain the upper-level special sector address information. Subsequently, when the adjusted second encoded data is stored and read, the corresponding special sector space can be identified through the redundant space code, thereby calculating the correct first code or second code. Using the method of this embodiment, it is possible to effectively determine whether the address space actually read is consistent with the address space to be read and belongs to the same contiguous address space, thereby correcting errors and decoding the correct result.

[0127] In one embodiment, when the redundancy space code is the primary storage space code, before storing the second encoded data in the storage area corresponding to the storage address data, the method further includes:

[0128] Based on the main storage space code, determine whether the address to be accessed is located in the main storage space, and obtain the third determination result;

[0129] When the third determination result includes that the address to be accessed is located in the main storage space, the main storage space code in the second encoded data is modified to the specific main storage space code.

[0130] The specific main storage space code can refer to an encoding that contains specific main storage space information.

[0131] The primary storage space code can be used to determine if the memory address to be accessed is in the primary storage space. When it is determined that the address to be accessed is in the primary storage space, the redundant space code in the second encoded data can be adjusted to the specific primary storage space code. Then, when the adjusted second encoded data is stored and read, the corresponding primary storage space can be identified through the redundant space code, thereby calculating the correct first or second code. Using the method of this embodiment, it is possible to effectively determine whether the address space actually read is consistent with the address space to be read and belongs to the same contiguous address space, thereby correcting errors and decoding the correct result.

[0132] In one embodiment, both the special sector code and the main memory space code can be used to identify different address spaces. This is because the encoding containing the auxiliary error correction code can only be correctly identified when the corresponding memory address is a contiguous space. If the space is non-contiguous and has jumps, the encoding containing the auxiliary error correction code cannot be identified and will lead to error correction and error feedback.

[0133] In one embodiment, a programming option is provided that encodes full FF data and provides auxiliary error correction coding. For storage of critical code or data, a programming option with both data and auxiliary error correction coding is provided. For storage of general data, a programming option without both data and auxiliary error correction coding is provided.

[0134] In one embodiment, during a read operation, the system can identify spaces in a fully FF (Full Failure) state and report a warning or corresponding interrupt if the read content is not actually FF when it should be. Simultaneously, an address range can be pre-defined. Within this range, when accessing spaces in a fully FF state, even without enabling Data + Address ECC (which corrects errors in stored data and their corresponding addresses), a warning or interrupt can still be generated indicating that the currently read content is fully FF (theoretically, programs should not execute in unprogrammed areas, especially code, as fully FF content can lead to code errors).

[0135] In one embodiment, each memory block provides some additional storage space (the English name for storage space is "bank") for different purposes (for example, in Flash memory, the additional storage space of the NVR can be used by users, the additional storage space of the NVR_CFG can be used by the factory, and the additional storage space of the ARRDN can be used for maintenance work). If the selection of the additional storage space is incorrect, it will cause multiple ECC errors (a single-bit space selection signal error, causing the code intended to read the main space code to mistakenly select these special additional storage spaces. Because the space of the additional storage space is generally very small, its high-order address is 0 by default. The data + address ECC calculated from this also includes the information that the high-order address is all 0. However, the main space to be read is very large, and the high-order address is fully involved in the data + address ECC calculation. At this time, the ECC output by the additional storage space can only identify a maximum of two different errors, but in reality, the errors caused by reading the main space with different high-order addresses have far exceeded two. According to the SECDED algorithm, this will produce false corrections or false alarms).

[0136] It should be understood that although the steps in the flowcharts of the embodiments described above are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the embodiments described above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages of other steps.

[0137] Based on the same inventive concept, this disclosure also provides a functional safety processing apparatus for memory data to implement the functional safety processing method for memory data described above. The solution provided by this apparatus is similar to the implementation described in the above method; therefore, the specific limitations in one or more embodiments of the functional safety processing apparatus for memory data provided below can be found in the limitations of the functional safety processing method for memory data described above, and will not be repeated here.

[0138] In one embodiment, such as Figure 5 As shown, a functional safety processing device 500 for memory data is provided, comprising: a first data acquisition module 502, an encoding determination module 504, a first encoding module 506, and a first storage module 508, wherein:

[0139] The first data acquisition module 502 is used to acquire the data to be stored and the storage address data of the memory where the data to be stored is to be stored;

[0140] The encoding determination module 504 is used to determine an auxiliary error correction code based on extended Hamming code error correction technology according to the data to be stored and the storage address data.

[0141] The first encoding module 506 is used to combine the encoded data to be stored and the auxiliary error correction code to obtain the first encoded data;

[0142] The first storage module 508 is used to store the first encoded data into the storage area corresponding to the storage address data.

[0143] In one embodiment, such as Figure 6 As shown, the memory is a non-volatile memory, and the device further includes a first submodule 600, which includes:

[0144] The second data acquisition module 602 is used to acquire storage sector data corresponding to the storage address data;

[0145] The second encoding module 604 is used to add redundant space encoding to the first encoding data according to the storage sector data corresponding to the storage address data to obtain the second encoding data;

[0146] The second storage module 606 is used to store the second encoded data in the storage area corresponding to the storage address data.

[0147] In one embodiment, the redundancy space encoding of the second encoding module 604 is an encoding based on extended Hamming code error correction technology.

[0148] In one embodiment, such as Figure 7 As shown, the device further includes a second submodule 700, which includes:

[0149] The third data acquisition module 702 is used to acquire target access address data;

[0150] Data reading module 704 is used to read target encoded data stored in memory according to the target access address data, wherein the target encoded data includes first encoded data or second encoded data;

[0151] The error correction module 706 is used to perform error correction and decoding on the target encoded data using extended Hamming code error correction technology based on the target access address data, so as to obtain the error correction result.

[0152] In one embodiment, the redundancy space encoding of the second encoding module 604 includes at least one of the following encodings: blank sector code, special sector code, and main storage space code.

[0153] In one embodiment, the bit width of the data to be stored in the first encoded data is 128 bits, the bit width of the auxiliary error correction code is 9 bits, and the bit width of the redundancy space code is 7 bits.

[0154] In one embodiment, the apparatus further includes:

[0155] The result processing module is used to interrupt data reading, issue a data error warning, or provide data error feedback when the error correction result includes data errors. The information provided by the error data feedback includes at least one of the following: error address, error type, error sector, and error storage block. The error type includes at least one of the following: single-bit error, double-bit error, and redundant space coding error.

[0156] In one embodiment, when the redundancy space coding includes blank sector codes, the method further includes:

[0157] The first judgment module is used to determine whether the address to be accessed is in a post-erased state based on the blank sector code, and to obtain the first judgment result;

[0158] The first post-processing module is used to perform at least one of the following processes when the first judgment result includes the address to be accessed being in a post-erased state: not performing error correction decoding, interrupting data reading, issuing a warning that a blank area is being read, and selecting whether to process based on a preset address range.

[0159] In one embodiment, after determining whether the address to be accessed is in a post-erased state based on the blank sector code and obtaining a first determination result, the method further includes:

[0160] The state comparison module is used to compare the first judgment result with the corresponding predicted stored state to obtain the comparison result;

[0161] The feedback module is used to perform at least one of the following processes when the comparison result, including the first judgment result, is inconsistent with the corresponding predicted storage state: data read error feedback, interrupting data reading, and issuing a warning of data read error.

[0162] In one embodiment, when the redundant space is encoded as a special sector code, the method further includes, before storing the second encoded data in the storage area corresponding to the storage address data:

[0163] The second judgment module is used to determine whether the address to be accessed belongs to a special sector based on the special sector code, and to obtain the second judgment result;

[0164] The second post-processing module is used to update the redundant space encoding in the second encoded data to the specific special sector code when the second judgment result includes the address to be accessed belonging to a special sector.

[0165] In one embodiment, when the redundant space code is the primary storage space code, before storing the second encoded data in the storage area corresponding to the storage address data, the method further includes:

[0166] The third judgment module is used to determine whether the address to be accessed is located in the main storage space based on the main storage space code, and to obtain the third judgment result;

[0167] The third post-processing module is used to update the redundant space code in the second encoded data to the specific main storage space code when the third judgment result includes the address to be accessed being located in the main storage space.

[0168] Each module in the aforementioned functional safety processing device for memory data can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in hardware within or independently of the processor in a computer device, or stored in software within the memory of the computer device, so that the processor can invoke and execute the operations corresponding to each module.

[0169] In one embodiment, a computer device is provided, which may be a terminal, and its internal structure diagram may be as follows: Figure 8 As shown, the computer device includes a processor, memory, communication interface, display screen, and input devices connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The communication interface is used for wired or wireless communication with external terminals; wireless communication can be achieved through Wi-Fi, mobile cellular networks, NFC (Near Field Communication), or other technologies. When the computer program is executed by the processor, it implements a functionally safe method for processing memory data. The display screen can be an LCD screen or an e-ink screen. The input devices can be a touch layer covering the display screen, buttons, a trackball, or a touchpad mounted on the computer device casing, or an external keyboard, touchpad, or mouse.

[0170] Those skilled in the art will understand that Figure 8 The structure shown is merely a block diagram of a portion of the structure related to the present disclosure and does not constitute a limitation on the computer device to which the present disclosure is applied. A specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0171] In one embodiment, a computer device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to perform the following steps:

[0172] Obtain the data to be stored and the storage address data of the memory where the data to be stored will be stored;

[0173] Based on the data to be stored and the storage address data, determine the auxiliary error correction code based on extended Hamming code error correction technology;

[0174] The data to be stored and the auxiliary error correction code are combined to obtain the first encoded data;

[0175] The first encoded data is stored in the storage area corresponding to the storage address data.

[0176] In one embodiment, the processor, when executing a computer program, also performs the following steps:

[0177] Obtain the storage sector data corresponding to the storage address data;

[0178] Based on the storage sector data corresponding to the storage address data, redundant space coding is added to the first coded data to obtain the second coded data;

[0179] The second encoded data is stored in the storage area corresponding to the storage address data.

[0180] In one embodiment, the processor, when executing a computer program, also performs the following steps:

[0181] The redundant space is encoded using an extended Hamming code error correction technique.

[0182] In one embodiment, the processor, when executing a computer program, also performs the following steps:

[0183] Obtain the target access address data;

[0184] Based on the target access address data, read the target encoded data stored in the memory, wherein the target encoded data includes first encoded data or second encoded data;

[0185] Based on the target access address data, the target encoded data is corrected and decoded using extended Hamming code error correction technology to obtain the error correction result.

[0186] In one embodiment, the processor, when executing a computer program, also performs the following steps:

[0187] The redundant space encoding shall include at least one of the following encodings: blank sector code, special sector code, and main memory space code.

[0188] In one embodiment, the processor, when executing a computer program, also performs the following steps:

[0189] The bit width of the data to be stored in the first encoded data is 128 bits, the bit width of the auxiliary error correction code is 9 bits, and the bit width of the redundancy space code is 7 bits.

[0190] In one embodiment, the processor, when executing a computer program, also performs the following steps:

[0191] When the error correction result includes data errors, the data reading is interrupted, a data error warning is issued, or data error feedback is provided. The information provided by the error data feedback includes at least one of the following: error address, error type, error sector, and error storage block. The error type includes at least one of the following: single-bit error, double-bit error, and redundancy space coding error.

[0192] In one embodiment, the processor, when executing a computer program, also performs the following steps:

[0193] When the redundant space encoding includes blank sector codes, the address to be accessed is determined based on the blank sector codes to obtain a first determination result.

[0194] When the first judgment result includes that the address to be accessed is in a post-erased state, no error correction decoding is performed, and at least one of the following processes is performed: access address information feedback, interrupt data reading, issue a warning that a blank area is being read, or select whether to process based on a preset address range.

[0195] In one embodiment, the processor, when executing a computer program, also performs the following steps:

[0196] After determining whether the address to be accessed is in a post-erased state based on the blank sector code and obtaining the first determination result, the first determination result is compared with the corresponding predicted storage state to obtain the comparison result.

[0197] When the comparison result, including the first judgment result, is inconsistent with the corresponding predicted storage state, at least one of the following processes shall be performed: data read error feedback, interrupt data read, or issue a data read error warning.

[0198] In one embodiment, the processor, when executing a computer program, also performs the following steps:

[0199] When the redundant space is encoded as a special sector code, before storing the second encoded data into the storage area corresponding to the storage address data, it is determined whether the address to be accessed belongs to a special sector based on the special sector code, and a second determination result is obtained.

[0200] When the second determination result includes that the address to be accessed belongs to a special sector, the redundant space encoding in the second encoded data is updated to the specific special sector code.

[0201] In one embodiment, the processor, when executing a computer program, also performs the following steps:

[0202] When the redundant space code is the primary storage space code, before storing the second encoded data in the storage area corresponding to the storage address data, the method further includes:

[0203] Based on the main storage space code, determine whether the address to be accessed is located in the main storage space, and obtain the third determination result;

[0204] When the third determination result includes that the address to be accessed is located in the main storage space, the redundant space code in the second encoded data is updated to the specific main storage space code.

[0205] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon, the computer program performing the following steps when executed by a processor:

[0206] Obtain the data to be stored and the storage address data of the memory where the data to be stored will be stored;

[0207] Based on the data to be stored and the storage address data, determine the auxiliary error correction code based on extended Hamming code error correction technology;

[0208] The data to be stored and the auxiliary error correction code are combined to obtain the first encoded data;

[0209] The first encoded data is stored in the storage area corresponding to the storage address data.

[0210] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0211] Obtain the storage sector data corresponding to the storage address data;

[0212] Based on the storage sector data corresponding to the storage address data, redundant space coding is added to the first coded data to obtain the second coded data;

[0213] The second encoded data is stored in the storage area corresponding to the storage address data.

[0214] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0215] The redundant space is encoded using an extended Hamming code error correction technique.

[0216] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0217] Obtain the target access address data;

[0218] Based on the target access address data, read the target encoded data stored in the memory, wherein the target encoded data includes first encoded data or second encoded data;

[0219] Based on the target access address data, the target encoded data is corrected and decoded using extended Hamming code error correction technology to obtain the error correction result.

[0220] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0221] The redundant space encoding shall include at least one of the following encodings: blank sector code, special sector code, and main memory space code.

[0222] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0223] The bit width of the data to be stored in the first encoded data is 128 bits, the bit width of the auxiliary error correction code is 9 bits, and the bit width of the redundancy space code is 7 bits.

[0224] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0225] When the error correction result includes data errors, the data reading is interrupted, a data error warning is issued, or data error feedback is provided. The information provided by the error data feedback includes at least one of the following: error address, error type, error sector, and error storage block. The error type includes at least one of the following: single-bit error, double-bit error, and redundancy space coding error.

[0226] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0227] Based on the blank sector code, determine whether the address to be accessed is in a post-erased state, and obtain the first determination result;

[0228] When the first judgment result includes that the address to be accessed is in a post-erased state, no error correction decoding is performed, and at least one of the following processes is performed: access address information feedback, interrupt data reading, issue a warning that a blank area is being read, or select whether to process based on a preset address range.

[0229] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0230] After determining whether the address to be accessed is in a post-erased state based on the blank sector code and obtaining the first determination result, the first determination result is compared with the corresponding predicted storage state to obtain the comparison result.

[0231] When the comparison result, including the first judgment result, is inconsistent with the corresponding predicted storage state, at least one of the following processes shall be performed: data read error feedback, interrupt data read, or issue a data read error warning.

[0232] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0233] When the redundant space is encoded as a special sector code, before storing the second encoded data into the storage area corresponding to the storage address data, it is determined whether the address to be accessed belongs to a special sector based on the special sector code, and a second determination result is obtained.

[0234] When the second determination result includes that the address to be accessed belongs to a special sector, the redundant space encoding in the second encoded data is updated to the specific special sector code.

[0235] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0236] When the redundant space code is the main storage space code, before storing the second encoded data into the storage area corresponding to the storage address data, it is determined whether the address to be accessed is located in the main storage space based on the main storage space code, and a third determination result is obtained.

[0237] When the third determination result includes that the address to be accessed is located in the main storage space, the redundant space code in the second encoded data is updated to the specific main storage space code.

[0238] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, performs the following steps:

[0239] Obtain the data to be stored and the storage address data of the memory where the data to be stored will be stored;

[0240] Based on the data to be stored and the storage address data, determine the auxiliary error correction code based on extended Hamming code error correction technology;

[0241] The data to be stored and the auxiliary error correction code are combined to obtain the first encoded data;

[0242] The first encoded data is stored in the storage area corresponding to the storage address data.

[0243] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0244] The memory is a non-volatile memory, and after obtaining the first encoded data, the method further includes:

[0245] Obtain the storage sector data corresponding to the storage address data;

[0246] Based on the storage sector data corresponding to the storage address data, redundant space coding is added to the first coded data to obtain the second coded data;

[0247] The second encoded data is stored in the storage area corresponding to the storage address data.

[0248] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0249] The redundant space is encoded using an extended Hamming code error correction technique.

[0250] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0251] Obtain the target access address data;

[0252] Based on the target access address data, read the target encoded data stored in the memory, wherein the target encoded data includes first encoded data or second encoded data;

[0253] Based on the target access address data, the target encoded data is corrected and decoded using extended Hamming code error correction technology to obtain the error correction result.

[0254] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0255] The redundant space encoding shall include at least one of the following encodings: blank sector code, special sector code, and main memory space code.

[0256] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0257] The bit width of the data to be stored in the first encoded data is 128 bits, the bit width of the auxiliary error correction code is 9 bits, and the bit width of the redundancy space code is 7 bits.

[0258] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0259] When the error correction result includes data errors, the data reading is interrupted, a data error warning is issued, or data error feedback is provided. The information provided by the error data feedback includes at least one of the following: error address, error type, error sector, and error storage block. The error type includes at least one of the following: single-bit error, double-bit error, and redundancy space coding error.

[0260] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0261] Based on the blank sector code, determine whether the address to be accessed is in a post-erased state, and obtain the first determination result;

[0262] When the first judgment result includes that the address to be accessed is in a post-erased state, no error correction decoding is performed, and at least one of the following processes is performed: access address information feedback, interrupt data reading, issue a warning that a blank area is being read, or select whether to process based on a preset address range.

[0263] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0264] After determining whether the address to be accessed is in a post-erased state based on the blank sector code and obtaining the first determination result, the first determination result is compared with the corresponding predicted storage state to obtain the comparison result.

[0265] When the comparison result, including the first judgment result, is inconsistent with the corresponding predicted storage state, at least one of the following processes shall be performed: data read error feedback, interrupt data read, or issue a data read error warning.

[0266] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0267] When the redundant space is encoded as a special sector code, before storing the second encoded data into the storage area corresponding to the storage address data, it is determined whether the address to be accessed belongs to a special sector based on the special sector code, and a second determination result is obtained.

[0268] When the second determination result includes that the address to be accessed belongs to a special sector, the redundant space encoding in the second encoded data is updated to the specific special sector code.

[0269] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0270] When the redundant space code is the main storage space code, before storing the second encoded data into the storage area corresponding to the storage address data, it is determined whether the address to be accessed is located in the main storage space based on the main storage space code, and a third determination result is obtained.

[0271] When the third determination result includes that the address to be accessed is located in the main storage space, the redundant space code in the second encoded data is updated to the specific main storage space code.

[0272] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this disclosure are all information and data authorized by the user or fully authorized by all parties.

[0273] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this disclosure can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this disclosure may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this disclosure may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, etc., and are not limited to these.

[0274] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0275] The embodiments described above are merely illustrative of several implementations of this disclosure, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent disclosure. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this disclosure, and these all fall within the protection scope of this disclosure. Therefore, the protection scope of this disclosure should be determined by the appended claims.

Claims

1. A method for functionally safe processing of memory data, characterized in that, The method includes: Obtain the data to be stored and the storage address data of the memory where the data to be stored will be stored; Based on the data to be stored and the storage address data, determine the auxiliary error correction code based on extended Hamming code error correction technology; The data to be stored and the auxiliary error correction code are combined to obtain the first encoded data; The first encoded data is stored in the storage area corresponding to the storage address data; Wherein, the memory is a non-volatile memory, and after obtaining the first encoded data, the method further includes: Obtain the storage sector data corresponding to the storage address data; Based on the storage sector data corresponding to the storage address data, a redundant space code is added to the first encoded data to obtain the second encoded data. The redundant space code is used to identify whether the storage space to be accessed is a special sector or a main storage sector when reading the second encoded data. In the event that the sector type corresponding to the storage space to be accessed is inconsistent with the sector type corresponding to the storage sector data, an erroneous storage space access caused by access space jump is detected and an alarm is triggered. The second encoded data is stored in the storage area corresponding to the storage address data; The redundant space coding includes at least blank sector codes, and the method further includes: Based on the blank sector code, determine whether the address to be accessed is in a post-erased state, and obtain the first determination result; When the first judgment result includes that the address to be accessed is in a post-erased state, no error correction decoding is performed, and at least one of the following processes is performed: access address information feedback, interrupt data reading, issue a warning that a blank area is being read, or select whether to process based on a preset address range.

2. The method according to claim 1, characterized in that, The redundancy space encoding is based on extended Hamming code error correction technology.

3. The method according to any one of claims 1-2, characterized in that, The method further includes: Obtain the target access address data; Based on the target access address data, read the target encoded data stored in the memory, wherein the target encoded data includes first encoded data or second encoded data; Based on the target access address data, the target encoded data is corrected and decoded using extended Hamming code error correction technology to obtain the error correction result.

4. The method according to claim 1, characterized in that, The redundancy space coding also includes at least one of the following coding methods: special sector code and main storage space code.

5. The method according to claim 3, characterized in that, The method further includes: When the error correction result includes data errors, the data reading is interrupted, a data error warning is issued, or data error feedback is provided. The information provided by the data error feedback includes at least one of the following: error address, error type, error sector, and error storage block. The error type includes at least one of the following: single-bit error, double-bit error, and redundancy space coding error.

6. The method according to claim 1, characterized in that, After determining whether the address to be accessed is in a post-erased state based on the blank sector code and obtaining the first determination result, the method further includes: The first judgment result is compared with the corresponding predicted storage state to obtain the comparison result; When the comparison result, including the first judgment result, is inconsistent with the corresponding predicted storage state, at least one of the following processes shall be performed: data read error feedback, interrupt data read, or issue a data read error warning.

7. The method according to claim 4, characterized in that, When the redundant space is encoded as a special sector code, before storing the second encoded data in the storage area corresponding to the storage address data, the method further includes: Based on the special sector code, determine whether the address to be accessed belongs to the special sector, and obtain the second determination result; When the second determination result includes that the address to be accessed belongs to a special sector, the redundant space encoding in the second encoded data is updated to the specific special sector code.

8. The method according to claim 4, characterized in that, When the redundant space code is the primary storage space code, before storing the second encoded data in the storage area corresponding to the storage address data, the method further includes: Based on the main storage space code, determine whether the address to be accessed is located in the main storage space, and obtain the third determination result; When the third determination result includes that the address to be accessed is located in the main storage space, the redundant space code in the second encoded data is updated to the specific main storage space code.

9. A functionally safe data processing device for memory, characterized in that, The device includes: The first data acquisition module acquires the data to be stored and the storage address data of the memory where the data to be stored will be stored. The encoding determination module is used to determine an auxiliary error correction encoding based on extended Hamming code error correction technology based on the data to be stored and the storage address data. The first encoding module is used to combine the encoded data to be stored and the auxiliary error correction code to obtain the first encoded data; The first storage module is used to store the first encoded data into the storage area corresponding to the storage address data; Wherein, the memory is a non-volatile memory, and the device further includes: The second data acquisition module is used to acquire storage sector data corresponding to the storage address data; The second encoding module is used to add redundant space encoding to the first encoding data according to the storage sector data corresponding to the storage address data to obtain the second encoding data. The redundant space encoding is used to identify whether the storage space to be accessed is a special sector or a main storage sector when reading the second encoding data. In the case that the sector type corresponding to the storage space to be accessed is inconsistent with the sector type corresponding to the storage sector data, the module will detect the erroneous storage space access caused by the access space jump and issue an alarm. The second storage module is used to store the second encoded data into the storage area corresponding to the storage address data; The redundant space coding includes at least blank sector codes, and the device further includes: The first judgment module is used to determine whether the address to be accessed is in a post-erased state based on the blank sector code, and to obtain the first judgment result; The first post-processing module is used to perform at least one of the following processes when the first judgment result includes the address to be accessed being in a post-erased state: not performing error correction decoding, interrupting data reading, issuing a warning that a blank area is being read, and selecting whether to process based on a preset address range.

10. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 8.

11. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 8.

12. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 8.

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