Display device

Abstract

A display device is disclosed. The display device includes a display panel including a pixel array having pixels formed of a plurality of inorganic light emitting elements arranged in a plurality of row lines, and a sub-pixel circuit corresponding to the inorganic light emitting elements of the pixel array, respectively, and a driving unit for driving the sub-pixel circuit based on an image data voltage corresponding to one image frame so that the inorganic light emitting elements of the pixel array emit light a plurality of times in the order of the plurality of row lines, wherein each of the sub-pixel circuits includes a discharge transistor for removing a potential difference between two terminals of the relevant inorganic light emitting element at a predetermined interval.

Description

Technical Field

[0001] This disclosure relates to a display device, and more specifically, to a display device comprising a pixel array composed of inorganic light-emitting elements. Background Technology

[0002] In display panels using technologies where inorganic light-emitting elements such as red light-emitting diodes (LEDs), green LEDs, and blue LEDs are driven as subpixels, the grayscale of the subpixels can be represented by a pulse amplitude modulation (PAM) driving method.

[0003] Depending on the amplitude of the driving current, the wavelength and grayscale of the emitted light can change, resulting in reduced color reproducibility of the image. Figure 1 The wavelength variation is shown based on the amplitude of the drive current flowing through the blue, green, and red LEDs.

[0004] Therefore, a method is needed to drive self-emissive display panels that can improve color reproduction. In this regard, various issues related to the performance of display devices, such as power consumption, brightness uniformity, horizontal crosstalk, and dynamic range, can be considered together. Summary of the Invention

[0005] Technical issues

[0006] A display device and its driving method are provided to provide improved color reproduction of input image signals.

[0007] A display device and its driving method are also provided that can prevent the wavelength of light emitted from an inorganic light-emitting element from changing according to grayscale.

[0008] A display device and its driving method are also provided, which can solve the problem of decreased brightness uniformity caused by threshold voltage difference between driving transistors.

[0009] A display device and its driving method that can reduce power consumption when driving a display panel are also provided.

[0010] A display device and its driving method are also provided, which can compensate for the effect of the driving voltage drop generated differently at each position of the display panel during the data voltage setting process.

[0011] A display device and its driving method are also provided in which the problems of brightness non-uniformity and horizontal crosstalk caused by scanning load have been improved.

[0012] A display device capable of accurately achieving black grayscale and its driving method are also provided.

[0013] Technical solution

[0014] According to one aspect of this disclosure, a display device includes: a display panel including a pixel array and sub-pixel circuits, wherein pixels composed of a plurality of inorganic light-emitting elements are arranged in a plurality of row lines in the pixel array, and the sub-pixel circuits are respectively corresponding to the inorganic light-emitting elements of the pixel array; and a driver configured to drive the sub-pixel circuits based on an image data voltage corresponding to an image frame, such that the inorganic light-emitting elements of the pixel array emit light multiple times in sequence along the plurality of row lines, wherein each sub-pixel circuit includes a discharge transistor configured to remove the potential difference between the two ends of the corresponding inorganic light-emitting element at a predetermined period.

[0015] Additionally, the driver can be configured to: set the image data voltage to the sub-pixel circuit in the order of the multiple row lines during a data setting segment performed in the order of the multiple row lines, and drive the sub-pixel circuit based on the set image data voltage in each of the multiple light emission segments performed in the order of the multiple row lines, so that the inorganic light-emitting elements of the pixel array emit light in the order of the multiple row lines.

[0016] In addition, the first light-emitting segment among the multiple light-emitting segments can be continuous in time with the data setting segment, and the multiple light-emitting segments can have a predetermined time interval relative to each other.

[0017] Furthermore, the discharge transistor can also be configured to turn on based on a predetermined period, and to short-circuit the two ends of the inorganic light-emitting element when the discharge transistor is turned on.

[0018] In addition, the discharge transistor can be configured to turn on at least once per image frame.

[0019] In addition, the discharge transistor can be configured to turn on once every multiple image frames.

[0020] Furthermore, since the image data voltage is a value corresponding to the black grayscale, a potential difference can be generated by the leakage current flowing in the inorganic light-emitting element and the junction capacitance of the inorganic light-emitting element.

[0021] In addition, after data setting segments are applied to all the multiple rows of the display panel, the discharge transistors included in the display panel can be turned on immediately.

[0022] Additionally, the image data voltage may include a constant current generator data voltage and a pulse width modulation (PWM) data voltage, and the sub-pixel circuit may respectively include: a constant current generator circuit, including a first driving transistor, and configured to provide a constant current to the corresponding inorganic light-emitting element based on the constant current generator data voltage; and a PWM circuit, including a second driving transistor, and configured to control the duration of providing a constant current to the corresponding inorganic light-emitting element based on a sweep voltage sweeping between two different voltages and the PWM data voltage.

[0023] Furthermore, the constant current generator circuit can also be configured to: in the data setting section, set the constant current generator data voltage and a first voltage based on the threshold voltage of the first driving transistor to the gate terminal of the first driving transistor, and the PWM circuit can also be configured to: in the data setting section, set the PWM data voltage and a second voltage based on the threshold voltage of the second driving transistor to the gate terminal of the second driving transistor.

[0024] In addition, the constant current generator circuit can be configured to provide a drive current with an amplitude based on a first voltage to the inorganic light-emitting element in each of the plurality of light-emitting segments, and the PWM circuit can be configured to control the duration of providing a constant current to the corresponding inorganic light-emitting element in each of the plurality of light-emitting segments based on the voltage of the gate terminal of the second drive transistor changing from a second voltage according to a sweep voltage.

[0025] Additionally, the display device may include: a sensing unit configured to sense current flowing in a first driving transistor and a second driving transistor based on a specific voltage and output sensing data corresponding to the sensed current; and a correction unit configured to correct a constant current generator data voltage and a PWM data voltage applied to a sub-pixel circuit based on the sensing data.

[0026] Furthermore, the sub-pixel circuit can be configured to be driven by a first driving voltage in each of the plurality of light-emitting segments, and can also be configured to be driven by a second driving voltage separate from the first driving voltage in the data setting segment.

[0027] Invention Effects

[0028] According to the various embodiments of this disclosure as described above, the phenomenon that the wavelength of light emitted from an inorganic light-emitting element varies with gray level can be prevented.

[0029] In addition, image blemishes that may appear on the screen due to threshold voltage differences between driving transistors can be easily compensated. Furthermore, color correction is facilitated.

[0030] In addition, it can reduce the power consumption when driving the display panel.

[0031] In addition, it can compensate for the impact of the drive voltage drop during the data voltage setting process.

[0032] In addition, it can improve the problems of uneven brightness and horizontal crosstalk caused by sweeping load.

[0033] In addition, the dynamic range can be fully guaranteed. Attached Figure Description

[0034] Figure 1 It is a graph showing the wavelength variation based on the amplitude of the driving current flowing in the blue, green, and red LEDs;

[0035] Figure 2 This is a diagram illustrating the pixel structure of a display panel according to an embodiment;

[0036] Figure 3a This is a conceptual diagram illustrating a driving method for a display panel according to an embodiment;

[0037] Figure 3b This is a conceptual diagram illustrating a driving method for a display panel according to an embodiment;

[0038] Figure 3c This is a conceptual diagram illustrating a driving method for a display panel according to an embodiment;

[0039] Figure 4 This is a block diagram illustrating the configuration of a display device according to an embodiment;

[0040] Figure 5a This is a cross-sectional view of the display panel according to an embodiment;

[0041] Figure 5b This is a cross-sectional view of the display panel according to an embodiment;

[0042] Figure 5c This is a plan view of the TFT layer according to an embodiment;

[0043] Figure 6 This is a diagram illustrating a progressive driving method for a display panel according to an embodiment;

[0044] Figure 7a This is a diagram illustrating a progressive driving method for a display panel according to an embodiment;

[0045] Figure 7b This is a diagram illustrating a progressive driving method for a display panel according to another embodiment;

[0046] Figure 7c This is a diagram illustrating a progressive driving method for a display panel according to yet another embodiment;

[0047] Figure 7d This is a diagram illustrating a progressive driving method for a display panel according to yet another embodiment;

[0048] Figure 8 This is a detailed block diagram illustrating the configuration of the apparatus according to an embodiment;

[0049] Figure 9a This is a configuration diagram of the sub-pixel circuit according to an embodiment;

[0050] Figure 9b This is a detailed circuit diagram of the sub-pixel circuit according to an embodiment;

[0051] Figure 9c It is for driving according to the embodiment. Figure 9b Timing diagram of the gate signal of the sub-pixel circuit;

[0052] Figure 9d According to the embodiments, it is used to drive during the image frame period and blanking interval, including Figure 9b Timing diagram of various signals of the display panel, including the sub-pixel circuits;

[0053] Figure 10a This is a diagram used to illustrate the phenomena of brightness non-uniformity and horizontal crosstalk that may be caused by the sweeping load according to the embodiment;

[0054] Figure 10b This is a diagram used to illustrate the phenomena of brightness non-uniformity and horizontal crosstalk that may be caused by the sweeping load according to the embodiment;

[0055] Figure 10c This is a diagram showing the high voltage (SW_VGH) of the scan signal according to an embodiment;

[0056] Figure 11a This is a diagram illustrating an embodiment of applying a low voltage (SW_VGL) to the X node according to an embodiment;

[0057] Figure 11b This is a diagram showing the low voltage (SW_VGL) of the scan signal according to an embodiment;

[0058] Figure 12a This is a detailed circuit diagram of the sub-pixel circuit according to an embodiment;

[0059] Figure 12b According to the embodiments, it is used to drive during the image frame period and blanking interval, including Figure 12a Timing diagram of various signals of the display panel, including the sub-pixel circuits;

[0060] Figure 13 This is a block diagram illustrating the configuration of a display device according to an embodiment;

[0061] Figure 14 This is a detailed block diagram of a display device according to an embodiment;

[0062] Figure 15a This is a diagram illustrating an implementation example of a sensing unit according to an embodiment;

[0063] Figure 15b This is a diagram illustrating an implementation example of a sensing unit according to another embodiment;

[0064] Figure 16a This is a detailed circuit diagram of the sub-pixel circuit and sensing unit according to an embodiment;

[0065] Figure 16b According to the embodiments, it is used to drive during the image frame period and blanking interval, including Figure 16a The timing diagram of various signals of the display panel, including the sub-pixel circuits and sensing units, is shown.

[0066] Figure 17a This is a diagram used to illustrate the phenomenon of brightness non-uniformity and horizontal crosstalk that may be caused by sweeping load in a sub-pixel circuit with an external compensation method applied according to an embodiment.

[0067] Figure 17b This is a diagram used to illustrate the phenomenon of brightness non-uniformity and horizontal crosstalk that may be caused by sweeping load in a sub-pixel circuit with an external compensation method applied according to an embodiment.

[0068] Figure 17c This is a diagram showing the high voltage (SW_VGH) of the scan signal according to an embodiment;

[0069] Figure 18a This is a detailed circuit diagram of the sub-pixel circuit and sensing unit according to another embodiment;

[0070] Figure 18b According to the embodiments, it is used to drive during the image frame period and blanking interval, including Figure 18a The timing diagram of various signals of the display panel, including the sub-pixel circuits and sensing units, is shown.

[0071] Figure 19a This is a detailed circuit diagram of the sub-pixel circuit and sensing unit according to yet another embodiment;

[0072] Figure 19b According to the embodiments, it is used to drive during the image frame period and blanking interval, including Figure 19a The timing diagram of various signals of the display panel, including the sub-pixel circuits and sensing units, is shown.

[0073] Figure 20aThis is a detailed circuit diagram of the sub-pixel circuit and sensing unit according to yet another embodiment;

[0074] Figure 20b According to the embodiments, it is used to drive during the image frame period and blanking interval, including Figure 20a The timing diagram of various signals of the display panel, including the sub-pixel circuits and sensing units, is shown.

[0075] Figure 21a This is a diagram illustrating an embodiment in which the low-voltage (SW_VGL) input of the scan signal is connected to the X node;

[0076] Figure 21b This is a diagram showing the low voltage (SW_VGL) of the scan signal according to an embodiment;

[0077] Figure 22a This is a detailed circuit diagram of the sub-pixel circuit and sensing unit according to an embodiment;

[0078] Figure 22b According to the embodiments, it is used to drive during the image frame period and blanking interval, including Figure 22a Timing diagram of various signals of the display panel, including the sub-pixel circuits and sensing units;

[0079] Figure 23a This is a detailed circuit diagram of the sub-pixel circuit and sensing unit according to another embodiment;

[0080] Figure 23b According to the embodiments, it is used to drive during the image frame period and blanking interval, including Figure 23a Timing diagram of various signals of the display panel, including the sub-pixel circuits and sensing units;

[0081] Figure 24a This is a detailed circuit diagram of the sub-pixel circuit and sensing unit according to yet another embodiment;

[0082] Figure 24b According to the embodiments, it is used to drive during the image frame period and blanking interval, including Figure 24a The timing diagram of various signals of the display panel, including the sub-pixel circuits and sensing units, is shown.

[0083] Figure 25a This is a detailed circuit diagram of the sub-pixel circuit and sensing unit according to yet another embodiment;

[0084] Figure 25b According to the embodiments, it is used to drive during the image frame period and blanking interval, including Figure 25a The timing diagram of various signals of the display panel, including the sub-pixel circuits and sensing units, is shown.

[0085] Figure 26a This is a detailed circuit diagram of the sub-pixel circuit and sensing unit according to an embodiment;

[0086] Figure 26b According to the embodiments, it is used to drive during the image frame period and blanking interval, including Figure 26a The timing diagram of various signals of the display panel, including the sub-pixel circuits and sensing units, is shown.

[0087] Figure 27a This is a detailed circuit diagram of the sub-pixel circuit and sensing unit according to another embodiment;

[0088] Figure 27b According to the embodiments, it is used to drive during the image frame period and blanking interval, including Figure 27a The timing diagram of various signals of the display panel, including the sub-pixel circuits and sensing units, is shown.

[0089] Figure 28a This is a detailed circuit diagram of the sub-pixel circuit and sensing unit according to yet another embodiment;

[0090] Figure 28b According to the embodiments, it is used to drive during the image frame period and blanking interval, including Figure 28a The timing diagram of various signals of the display panel, including the sub-pixel circuits and sensing units, is shown.

[0091] Figure 29a This is a detailed circuit diagram of the sub-pixel circuit and sensing unit according to yet another embodiment;

[0092] Figure 29b According to the embodiments, it is used to drive during the image frame period and blanking interval, including Figure 29a The timing diagram of various signals of the display panel, including the sub-pixel circuits and sensing units, is shown.

[0093] Figure 30a This is a detailed circuit diagram of the sub-pixel circuit and sensing unit according to an embodiment;

[0094] Figure 30b According to the embodiments, it is used to drive during the image frame period and blanking interval, including Figure 30a The timing diagram of various signals of the display panel, including the sub-pixel circuits and sensing units, is shown.

[0095] Figure 31a This is a detailed circuit diagram of the sub-pixel circuit and sensing unit according to another embodiment;

[0096] Figure 31b According to the embodiments, it is used to drive during the image frame period and blanking interval, including Figure 31aThe timing diagram of various signals of the display panel, including the sub-pixel circuits and sensing units, is shown.

[0097] Figure 32a This is a detailed circuit diagram of the sub-pixel circuit and sensing unit according to yet another embodiment;

[0098] Figure 32b According to the embodiments, it is used to drive during the image frame period and blanking interval, including Figure 32a The timing diagram of various signals of the display panel, including the sub-pixel circuits and sensing units, is shown.

[0099] Figure 33a This is a detailed circuit diagram of the sub-pixel circuit and sensing unit according to yet another embodiment;

[0100] Figure 33b According to the embodiments, it is used to drive during the image frame period and blanking interval, including Figure 33a The timing diagram of various signals of the display panel, including the sub-pixel circuits and sensing units, is shown.

[0101] Figure 34 This is a schematic block diagram of the sub-pixel circuit according to an embodiment;

[0102] Figure 35a This is a detailed circuit diagram of the sub-pixel circuit according to an embodiment;

[0103] Figure 35b According to the embodiments, it is used to drive during the image frame period and blanking interval, including Figure 35a Timing diagram of various signals of the display panel, including the sub-pixel circuits;

[0104] Figure 36a This is a detailed circuit diagram of a sub-pixel circuit according to another embodiment;

[0105] Figure 36b According to the embodiments, it is used to drive during the image frame period and blanking interval, including Figure 36a Timing diagram of various signals of the display panel, including the sub-pixel circuits;

[0106] Figure 37a This is a detailed circuit diagram of a sub-pixel circuit according to yet another embodiment;

[0107] Figure 37b According to the embodiments, it is used to drive during the image frame period and blanking interval, including Figure 37a Timing diagram of various signals of the display panel, including the sub-pixel circuits;

[0108] Figure 38 This is a schematic block diagram of the sub-pixel circuit according to an embodiment;

[0109] Figure 39a Detailed circuit diagrams of the sub-pixel circuit and sensing unit according to the embodiments; and

[0110] Figure 39b According to the embodiments, it is used to drive during the image frame period and blanking interval, including Figure 39a Timing diagram of various signals of the display panel, including the sub-pixel circuits and sensing units. Detailed Implementation

[0111] In describing this disclosure, detailed descriptions of relevant known technologies will be omitted where it is determined that such detailed descriptions might unnecessarily obscure the gist of the disclosure. Additionally, repeated descriptions of identical components will be omitted whenever possible.

[0112] The term "unit" used for components in the following description is added or used interchangeably only for the convenience of drafting the specification, and has no distinguishing meaning or function in itself.

[0113] As is common in the art, embodiments can be described and illustrated around blocks that perform desired functions. As shown in the accompanying drawings, these blocks, which may be referred to herein as units or modules, can be physically implemented by analog or digital circuits such as logic gates, integrated circuits, microprocessors, microcontrollers, memory circuits, passive electronic components, active electronic components, optical components, hardwired circuits, etc., and can be driven by firmware and software. For example, the circuitry can be specifically implemented in one or more semiconductor chips, or on a substrate support such as a printed circuit board. The circuitry included in a block can be implemented by dedicated hardware or by a processor (e.g., one or more programmed microprocessors and associated circuitry), or by a combination of dedicated hardware for performing some functions of the block and a processor for performing other functions of the block. Each block of an embodiment can be physically divided into two or more interactive and discrete blocks. Similarly, the blocks of an embodiment can be physically combined into more complex blocks.

[0114] The terminology used in this disclosure may be used to describe embodiments and is not intended to limit and / or constrain this disclosure. Furthermore, except where the context clearly implies otherwise, the singular representation of any component used in this disclosure includes the plural representation.

[0115] It should be understood that in this disclosure, terms such as “comprising” or “having” may be used to indicate the presence of the features, quantities, steps, operations, elements, components or combinations thereof described in this specification, without excluding the possibility of the presence or addition of one or more other features, quantities, steps, operations, elements, components or combinations thereof.

[0116] In this disclosure, expressions such as “first”, “second”, etc., may be used to describe various elements regardless of their order and / or importance, and to distinguish one element from other elements, but not to limit the elements.

[0117] In embodiments, if in this disclosure a certain element (e.g., a first element) is described as being “connected” to another element (e.g., a second element), it should be understood that the certain element (e.g., the first element) may be directly connected to the other element (e.g., the second element), or may be connected to the other element (e.g., the second element) through another element (e.g., a third element).

[0118] On the other hand, if it is described that an element (e.g., the first element) is "directly connected" to another element (e.g., the second element), it should be understood that there is no element (e.g., the third element) between the first element and the second element.

[0119] Unless otherwise defined, the terminology used in the embodiments of this disclosure may be interpreted in the sense that is known to those skilled in the art.

[0120] Various embodiments of this disclosure will be described in detail below with reference to the accompanying drawings.

[0121] Figure 2 This is a diagram illustrating the pixel structure of a display panel according to an embodiment of the present disclosure.

[0122] refer to Figure 2 The display panel 100 includes a plurality of pixels 10 arranged (or configured) in a matrix (i.e., pixel array).

[0123] A pixel array comprises multiple row lines or multiple column lines. In embodiments, row lines may also be referred to as horizontal lines, scan lines, or gate lines, and column lines may also be referred to as vertical lines or data lines.

[0124] In the embodiments, terms such as row lines, column lines, horizontal lines, and vertical lines can be used to refer to lines formed by pixels on a pixel array, and terms such as scan lines, gate lines, and data lines can be used to refer to the actual wiring on the display panel 100 to which data or signals are sent.

[0125] In an embodiment, each pixel 10 of the pixel array may include three types of sub-pixels, including red (R) sub-pixel 20-1, green (G) sub-pixel 20-2 and blue (B) sub-pixel 20-3.

[0126] In this case, each pixel 10 may include multiple inorganic light-emitting elements included in sub-pixels 20-1, 20-2 and 20-3.

[0127] For example, each pixel 10 may include three types of inorganic light-emitting elements, such as the red (R) inorganic light-emitting element included in R sub-pixel 20-1, the green (G) inorganic light-emitting element included in G sub-pixel 20-2, and the blue (B) inorganic light-emitting element included in B sub-pixel 20-3.

[0128] In this embodiment, each pixel 10 may include three blue inorganic light-emitting elements. In this example, a color filter for achieving R, G, or B colors may be provided on each inorganic light-emitting element. In this case, the color filter may be a quantum dot (QD) color filter, but is not limited thereto.

[0129] In an embodiment, the sub-pixel circuit for driving the inorganic light-emitting element can be set on the display panel 100 for each inorganic light-emitting element.

[0130] In this case, each sub-pixel circuit can provide a driving current to the corresponding inorganic light-emitting element based on the image data voltage applied from the outside.

[0131] Specifically, the image data voltage includes a constant current generator (CCG) data voltage and a pulse width modulation (PWM) data voltage. By providing a drive current corresponding to the amplitude of the CCG data voltage to the inorganic light-emitting element within the time corresponding to the PWM data voltage, each sub-pixel circuit can represent the grayscale of the image. An example of this is described in more detail below.

[0132] In an embodiment, the sub-pixel circuits included in each row line of the display panel 100 can be driven in the order of “setting (or programming) the image data voltage” and “providing drive current based on the set image data voltage”.

[0133] In this case, according to embodiments of the present disclosure, the sub-pixel circuits included in each row line of the display panel 100 can be driven sequentially in the order of the row lines.

[0134] For example, the image data voltage setting operation of the sub-pixel circuit included in one row line (e.g., the first row line) and the image data voltage setting operation of the sub-pixel circuit included in the next row line (e.g., the second row line) can be performed sequentially according to the row line order. Furthermore, the drive current supply operation of the sub-pixel circuit included in one row line (e.g., the first row line) and the drive current supply operation of the sub-pixel circuit included in the next row line (e.g., the second row line) can also be performed sequentially according to the row line order.

[0135] In the embodiments, in Figure 2 The example presented is that subpixels 20-1 to 20-3 are arranged in an L-shape with the left and right sides reversed within a pixel area. However, the embodiment is not limited to this, and the R, G, and B subpixels 20-1 to 20-3 can be arranged in rows within the pixel area and can be arranged in various shapes depending on the embodiment.

[0136] In addition, Figure 2 The example described herein is based on three types of subpixels forming a pixel. However, depending on the embodiment, four types of subpixels, such as R, G, B, and white (W), can form a pixel, and any other number of subpixels can form a pixel.

[0137] Figures 3a to 3c This is a conceptual diagram illustrating a driving method for a display panel according to an embodiment of the present disclosure.

[0138] Figures 3a to 3c This illustrates a method for driving a display panel within one image frame time. Figures 3a to 3c In the diagram, the vertical axis represents the row lines of the display panel 100, and the horizontal axis represents time. Furthermore, the data setting section represents the driving period of the display panel 100, where image data voltage is set for the sub-pixel circuits included in each row line, and the light-emitting section represents the driving period of the display panel 100, where the sub-pixel circuits included in each row line provide driving current to the inorganic light-emitting elements based on the image data voltage set in the data setting section. The inorganic light-emitting elements emit light according to the driving current in the light-emitting section.

[0139] In related technologies, for example, Figure 3a As shown, after setting the image data voltage for all lines of the display panel, the illuminated sections are immediately activated together.

[0140] In this example, all the row lines of the display panel emit light simultaneously during the light-emitting segment, thus requiring high peak current, and therefore, there is an issue of increased peak power consumption required by the product.

[0141] As peak power consumption increases, the capacity of power supply devices such as switch-mode power supplies (SMPS) installed in products increases, leading to increased cost and size, which imposes design limitations.

[0142] Conversely, according to embodiments of this disclosure, the data setting segments and light-emitting segments (specifically, multiple light-emitting segments) of each row line can be sequentially set in the order of the row lines.

[0143] Figure 3b and Figure 3c Two embodiments are shown, in which data setting sections and illumination sections are sequentially arranged according to the row order.

[0144] refer to Figure 3b As can be seen, the data setting segments for each row line are sequentially configured according to the row line order. Furthermore, it can be seen that the illumination segments for each row line are also sequentially configured according to the row line order.

[0145] In this case, according to the embodiments of the present disclosure, as shown in the accompanying drawings, it can be seen that the first light-emitting segment and the data setting segment of the plurality of light-emitting segments are continuous in time, and the plurality of light-emitting segments have a predetermined time interval between each other.

[0146] In the embodiments, in Figure 3b The example shown illustrates a scenario where all line lines undergo data setup segments and the number of illuminated segments is four within a single frame. However, this is merely an example, and the duration of the data setup segments or the number of illuminated segments are not limited to this.

[0147] For example, such as Figure 3c As shown, data setting segments can be applied to all line lines within a time period shorter than one frame, and the number of illuminated segments can be more than four.

[0148] The following describes the driving method for data setting segments and illumination segments sequentially according to the row order (examples are provided in...). Figure 3b or Figure 3c (As shown in the image) is called the "progressive-driven approach" to distinguish it from... Figure 3a Batch-driven methods.

[0149] In the case of the progressive driving method, since the number of row lines emitting light simultaneously is reduced compared to related technologies, the required peak current can be reduced, and thus the peak power consumption can be reduced.

[0150] As described above, according to embodiments of this disclosure, the display panel 100 can be driven using an active matrix (AM) method, and each sub-pixel can represent the grayscale of the image using a PWM scheme. Therefore, unlike related techniques that use a PAM method to represent grayscale, the phenomenon of the wavelength of light emitted from the inorganic light-emitting element changing according to grayscale can be prevented. Furthermore, by driving the display panel 100 so that the sub-pixels emit light sequentially in the order of the row lines, instantaneous peak power consumption can be reduced.

[0151] Figure 4 This is a block diagram illustrating the configuration of a display device according to an embodiment of the present disclosure. Figure 4 The display device 1000 includes a display panel 100 and a driver 500.

[0152] The display panel 100 may include, as described above, Figure 2The pixel array described herein can display an image corresponding to the applied image data voltage.

[0153] Each sub-pixel circuit included in the display panel 100 can provide a drive current with controlled amplitude and pulse width to the corresponding inorganic light-emitting element based on the image data voltage applied from the driver 500.

[0154] The inorganic light-emitting elements included in the pixel array can emit light according to the driving current provided from the corresponding sub-pixel circuit, thus enabling the display of images on the display panel 100.

[0155] Driver 500 drives display panel 100. Driver 500 can provide various control signals, data signals, drive voltages, etc. to display panel 100 to drive display panel 100.

[0156] Specifically, according to embodiments of this disclosure, the driver 500 can drive the display panel 100 using the progressive driving method described above.

[0157] Specifically, during the data setting segment performed in the order of the row lines, the driver 500 can set the image data voltage to the sub-pixel circuit of the display panel 100 in the order of the row lines. Furthermore, in multiple corresponding light-emitting segments performed in the order of the row lines, the driver 500 can drive the sub-pixel circuit based on the set image data voltage, causing the inorganic light-emitting elements of the pixel array to emit light in the order of the row lines.

[0158] For this purpose, driver 500 may include a gate driver for driving pixels on a pixel array on a row-line basis. The gate driver may provide various gate signals to display panel 100 for each row line in order to drive pixels on the pixel array on a row-line basis.

[0159] Additionally, driver 500 may include a source driver (or data driver) for providing image data voltage (e.g., constant current generator data voltage or PWM data voltage) to each pixel (or each sub-pixel) of display panel 100.

[0160] Additionally, the driver 500 may include a demultiplexer (DeMUX) circuit for selecting each of the plurality of sub-pixels 20-1 to 20-3 included in a pixel 10.

[0161] In addition, the driver 500 may include a power supply IC for providing various DC voltages (e.g., a first drive voltage (VDD_PAM), a second drive voltage (VDD_PWM), ground voltage (VSS), etc., as described below) to each sub-pixel circuit included in the display panel 100.

[0162] Additionally, driver 500 may include a level shifter for shifting the levels of various signals provided by the timing controller (TCON) to levels that can be used in the aforementioned driver (e.g., gate driver or data driver) or in the display panel 100.

[0163] In an embodiment, according to an embodiment of the present disclosure, at least some of the aforementioned various components that may be included in the driver 500 may be arranged on a printed circuit board (PCB) separate from the display panel 100 and may be connected to sub-pixel circuits formed on the TFT layer of the display panel 100 via glass overlay (FOG) wiring.

[0164] In the embodiments, at least some of the aforementioned components may be arranged on the film in the form of a chip on film (COF) and may be connected to sub-pixel circuits formed on the TFT layer of the display panel 100 via FOG wiring.

[0165] In the embodiments, at least some of the aforementioned components may be arranged as chip-on-glass (COG) on the rear surface of the glass substrate of the display panel 100 (the side opposite to the surface on which the TFT layer is formed relative to the glass substrate), and may be connected to the sub-pixel circuitry formed on the TFT layer of the display panel 100 via interconnect wiring. Examples of this situation are described in more detail below.

[0166] In an embodiment, at least some of the aforementioned components may be formed on the TFT layer together with the sub-pixel circuit formed on the TFT layer in the display panel 100, and may be connected to the sub-pixel circuit.

[0167] For example, among the aforementioned components, the gate driver and DeMUX circuit can be formed in the TFT layer of the display panel 100, the data driver can be arranged in the form of COG on the rear surface of the glass substrate of the display panel 100, the level shifter can be arranged in the form of COF on the film, and the power IC and TCON can be arranged on a separate external PCB, but this disclosure is not limited thereto.

[0168] In embodiments, according to embodiments of the present disclosure, the display device 1000 can be applied in a single unit to wearable devices, portable devices, handheld devices, and various electronic products or electronic components that require a display.

[0169] Additionally, according to embodiments of this disclosure, the display device 1000 can be a display module. In this case, a display panel can be configured by combining or assembling multiple display modules. As mentioned above, a display panel in which multiple display modules are combined can be referred to as a "modular display panel." However, the name is not limited thereto. In this example, each display module becomes a component included in the modular display panel. Modular display panels can be applied to small display products (e.g., monitors and televisions) or large display products (e.g., digital signage and electronic displays).

[0170] Figure 5a This is a cross-sectional view of a display panel 100 according to an embodiment of the present disclosure. Figure 5a For ease of explanation, only one pixel included in the display panel 100 is shown in the image.

[0171] according to Figure 5a The display panel 100 may include a glass substrate 80, a TFT layer 70, and inorganic light-emitting elements, such as inorganic light-emitting elements R 120-1, G 120-2, and B 120-3. In this example, the aforementioned sub-pixel circuit 110 may be implemented as a thin-film transistor (TFT) and may be included in the TFT layer 70 on the glass substrate 80.

[0172] Each of the inorganic light-emitting elements 120-1, 120-2 and 120-3 can be mounted on the TFT layer 70 so as to be electrically connected to the corresponding sub-pixel circuit 110 to form the aforementioned sub-pixel.

[0173] Although not shown in the accompanying drawings, a sub-pixel circuit 110 for providing driving current to each of the inorganic light-emitting elements 120-1, 120-2, and 120-3 may be present on the TFT layer 70 for each of the inorganic light-emitting elements 120-1, 120-2, and 120-3, and each of the inorganic light-emitting elements 120-1, 120-2, and 120-3 may be mounted or arranged on the TFT layer 70 for electrical connection to the corresponding sub-pixel circuit 110.

[0174] In the embodiments, in Figure 5a The present invention illustrates inorganic light-emitting elements 120-1, 120-2, and 120-3 as examples of flip-chip micro-LEDs. However, this disclosure is not limited thereto, and depending on the embodiment, inorganic light-emitting elements 120-1, 120-2, and 120-3 may be lateral or vertical micro-LEDs.

[0175] Figure 5b This is a cross-sectional view of a display panel 100 according to an embodiment of the present disclosure.

[0176] according to Figure 5bThe display panel 100 may include a TFT layer 70 formed on one surface of a glass substrate 80, inorganic light-emitting elements 120-1, 120-2 and 120-3 mounted on the TFT layer 70, a driver 500, and connection wiring 90 for electrically connecting the sub-pixel circuit 110 formed on the TFT layer 70 to the driver 500.

[0177] As described above, according to embodiments of the present disclosure, at least some of the aforementioned various components that may be included in the driver 500 may be disposed on the rear surface of the glass substrate 80 and may be connected to the sub-pixel circuit 110 formed on the TFT layer 70 via connection wiring 90.

[0178] refer to Figure 5b As can be seen, the sub-pixel circuit 110 included in the TFT layer 70 is electrically connected to the driver 500 (specifically, at least some of the aforementioned components) via connection wiring 90 formed at the edge (or side) of the TFT panel (hereinafter, the combination of the TFT layer 70 and the glass substrate 80 will be referred to as the TFT panel).

[0179] The reason why the sub-pixel circuit 110 and the driver 500 are connected by the connection wiring 90 formed in the edge region of the display panel 100 is that when the sub-pixel circuit 110 and the driver 500 are connected by forming a hole through the glass substrate 80, problems such as cracks may occur in the glass substrate 80 due to the temperature difference between the process of manufacturing the TFT panels 70 and 80 and the process of filling the hole with conductive material.

[0180] In an embodiment, as described above, according to another embodiment of this disclosure, at least some of the various components that may be included in the driver 500 may be formed on the TFT layer together with the sub-pixel circuit to connect to the sub-pixel circuit. Figure 5c This embodiment is shown.

[0181] Figure 5c This is a plan view of the TFT layer 70 according to an embodiment of the present disclosure. See also... Figure 5c The TFT layer 70 has a remaining area 20 other than the area occupied by a pixel 10 (which contains a sub-pixel circuit 110 corresponding to each of the R sub-pixels, G sub-pixels and B sub-pixels included in the pixel 10), and some of the aforementioned components in the driver 500 may be formed in this remaining area 20.

[0182] Figure 5cAn example of implementing the aforementioned gate driver in the remaining region 20 of the TFT layer 70 is shown. The structure in which the gate driver is thus formed in the TFT layer 70 can be referred to as a gate-in-panel (GIP) structure, but the name is not limited thereto. Furthermore, the location of the gate driver formed in the TFT layer 70 is not limited to... Figure 5c The location shown.

[0183] In an embodiment, Figure 5c This is merely an example, and components that may be included in the remaining area 20 of the TFT layer 70 are not limited to the gate driver. According to an embodiment, the TFT layer 70 may also include a DeMUX circuit for selecting each of the R sub-pixels, G sub-pixels, and B sub-pixels, and an electrostatic discharge (ESD) protection circuit for protecting the sub-pixel circuit 110 from electrostatic effects, etc.

[0184] In the above description, an example of a glass substrate 80 on which the TFT layer 70 is formed has been given, but the embodiments are not limited thereto. In an embodiment, the TFT layer 70 may be formed on a synthetic resin substrate. In this case, the sub-pixel circuit 110 and the driver 500 of the TFT layer 70 can be connected through holes penetrating the synthetic resin substrate.

[0185] In the embodiments described above, an example of implementing the sub-pixel circuit 110 on the TFT layer 70 is presented. However, the embodiments are not limited thereto. That is, according to another embodiment of this disclosure, when implementing the sub-pixel circuit 110, the sub-pixel circuit 110 can be implemented as a pixel circuit chip in the form of an ultra-small micro-IC on a sub-pixel or pixel-by-pixel basis, without using the TFT layer 70, and the pixel circuit chip can be mounted on a substrate. In this example, the location where the sub-pixel circuit chip is mounted can be, for example, the periphery of the corresponding inorganic light-emitting element 120, but is not limited thereto.

[0186] Furthermore, while the above description presents an example of forming a gate driver in the TFT layer 70, the embodiments are not limited thereto. That is, according to another embodiment of this disclosure, the gate driver can be implemented as a gate driver chip in the form of an ultra-small micro-IC and can be mounted on the TFT layer 70.

[0187] Furthermore, in the various embodiments described above, the TFTs included in the TFT layer (or TFT panel) are not limited to a specific structure or type. That is, the TFTs described in the various examples of this disclosure can be implemented as low-temperature polycrystalline silicon (LTPS) TFTs, oxide TFTs, polycrystalline silicon or amorphous silicon TFTs, organic TFTs, graphene TFTs, etc., and can be implemented using only P-type (or N-type) MOSFETs in Si wafer CMOS processes.

[0188] Figure 6This is a diagram used to illustrate in more detail the progressive driving method of the display panel 100 according to an embodiment of the present disclosure.

[0189] Figure 6 A driving method for a display panel 100 used for two consecutive image frames is conceptually illustrated. Figure 6 In the diagram, the vertical axis represents the row lines, and the horizontal axis represents time.

[0190] exist Figure 6 The example provided illustrates this: the display panel 100 consists of 270 row lines, and seven light-emitting segments 62-1 to 62-7 are performed based on the image data voltage set in the data setting segment 61. However, the number of row lines or the number of light-emitting segments are clearly not limited to this.

[0191] refer to Figure 6 It can be seen that for an image frame, a data setting segment 61 and multiple light-emitting segments 62-1 to 62-7 are set for each line.

[0192] During the data setting section 61, an image data voltage can be set in the sub-pixel circuit included in each row line. Additionally, in each of the plurality of light-emitting sections 62-1 to 62-7, the sub-pixel circuit included in each row line can provide a driving current to the corresponding inorganic light-emitting element based on the image data voltage set in the data setting section 61.

[0193] To this end, driver 500 may apply a control signal (which may be referred to as a scan signal) to the sub-pixel circuit of each row line during the data setting section 61 for setting the image data voltage. Additionally, driver 500 may apply a control signal (which may be referred to as a transmit signal) to the sub-pixel circuit of each row line during each light-emitting section 62-1 to 62-7 for controlling the operation of the drive current supply to the sub-pixel circuit.

[0194] In the embodiment, reference Figure 6 As can be seen, for all the rows of the display panel 100, the data setting section 61 and each light-emitting section 62-1 to 62-7 are sequentially set according to the order of the rows.

[0195] Therefore, the driver 500 can apply scan signals to the sub-pixel circuit from the first row line to the last row line of the display panel 100 in the row line sequence. Additionally, the driver 500 can apply transmit signals to the sub-pixel circuit from the first row line to the last row line of the display panel 100 in the row line sequence.

[0196] In the embodiment, reference Figure 6It can be seen that the first light-emitting segment 62-1 and the data setting segment 61 of each row are continuous in time, and the multiple light-emitting segments 62-1 to 62-7 have a predetermined time interval between each other.

[0197] In this case, the number of light-emitting segments and the predetermined time interval between the light-emitting segments can be set based on the size of the display panel 100 and / or the shutter speed of the camera, etc. However, this disclosure is not limited thereto.

[0198] Typically, the shutter speed of a camera is several times faster than the time of an image frame. Therefore, when the display panel 100 is driven to make the light-emitting segments move once in the order of the rows within an image frame, the image displayed on the display panel 100 captured by the camera may be distorted.

[0199] Therefore, according to embodiments of this disclosure, the display panel 100 can be driven to emit light segments multiple times within an image frame at predetermined time intervals, and the predetermined time intervals can be set based on the camera speed. Thus, regardless of when the display panel 100 is captured, the image displayed on the display panel 100 captured by the camera can be without distortion.

[0200] In an embodiment, according to an embodiment of the present disclosure, the blanking interval may exist between two consecutive image frames.

[0201] The blanking interval can be at least a portion of the time period between two consecutive image frames during which no image data voltage is applied. Figure 6 In the example provided, the entire time period during which no image data voltage is applied between two image frames 60 is the blanking interval 65, but the embodiments are not limited to this.

[0202] refer to Figure 6 As can be seen, during the blanking interval 65, the data setting segment 61 is not performed. Therefore, during the blanking interval 65, no image data voltage is applied to the display panel 100.

[0203] In addition to the fact that no image data voltage is applied during the blanking interval 65 as described above, the inorganic light-emitting element can emit light during the blanking interval 65 based on the image data voltage set in the data setting segment. (Reference: [link to reference]) Figure 6 The arrows included in the time period indicated by reference numeral 66 in the attached figure show that some line lines are illuminated within the blanking interval 65.

[0204] In an embodiment, according to an embodiment of this disclosure, a non-light-emitting segment 67 may exist within the blanking interval 65, where all inorganic light-emitting elements of the display panel 100 do not emit light, such as... Figure 6As shown. Since no current flows in the display panel 100 in the non-light-emitting section 67, fault detection of the display panel 100 or operation to discharge residual charge in the inorganic light-emitting elements can be performed.

[0205] Specifically, fault detection of the display panel 100 is an important operation for the safe use of the display device. For example, if the display device is driven while the display panel 100 is damaged (such as a damaged TFT substrate), problems such as fires may occur. Therefore, in the event of a fault in the display panel 100, measures such as stopping the drive or cutting off the power supply need to be taken.

[0206] According to embodiments of this disclosure, a fault in the display panel 100 can be determined based on whether current flows from the power supply IC to the display panel 100 during a non-light-emitting period.

[0207] Since no sub-pixels of the display panel 100 emit light in the non-light-emitting section, current does not flow from the power supply IC to the display panel 100. However, in the event of a fault in the display panel 100, such as a short circuit in the sub-pixel circuit, current can flow in the display panel 100 during the non-light-emitting section. Therefore, when current flows in the display panel 100 during the non-light-emitting section, the processor or timing controller included in the display device 1000 can determine that the display panel 100 is faulty.

[0208] In this embodiment, discharging the remaining charge in the inorganic light-emitting element is a crucial operation related to achieving correct black grayscale. Achieving correct black grayscale is a critical factor directly related to the display device's ability to reproduce images.

[0209] Ideally, when representing black grayscale, no current should be supplied from the sub-pixel circuitry to the inorganic light-emitting element. However, in practice, leakage current can be supplied from the sub-pixel circuitry to the inorganic light-emitting element when representing black grayscale.

[0210] When leakage current is supplied, if a voltage smaller than the forward voltage is applied across the inorganic light-emitting element, the leakage current will not flow within the element, thus posing no problem in achieving black grayscale. However, if a voltage larger than the forward voltage is applied, the leakage current can flow within the element, causing it to emit a slight light. This leads to problems in achieving black grayscale.

[0211] As described above, in various embodiments of this disclosure, multiple light-emitting segments are used to display an image frame, and this is also true when representing a black image. Therefore, when representing black grayscale, charge generated due to leakage current may accumulate in the junction capacitance assembly of the inorganic light-emitting element in each light-emitting segment, and as a result, a potential difference greater than or equal to the positive voltage may be generated across the inorganic light-emitting element.

[0212] This hinders the achievement of the correct black grayscale as described above. Therefore, according to embodiments of this disclosure, the potential difference across the inorganic light-emitting element is removed by discharging the remaining charge in the inorganic light-emitting element during the non-light-emitting segment, thus ensuring a more perfect black grayscale.

[0213] In the embodiments, in Figure 6 In the example, it is proposed that the entire time period between two image frames 60 during which no image data voltage is applied is the blanking interval 65, so the non-light-emitting segment 67 exists in the blanking interval 65.

[0214] However, a non-light-emitting segment does not necessarily have to exist within the blanking interval. That is, depending on the embodiment, the blanking interval may exist in some portions of the time period during which no image data voltage is applied, and in this case, depending on the need, a separate non-light-emitting segment may be implemented in the time period during which no image data voltage is applied that is not within the blanking interval.

[0215] In such a separately configured non-light-emitting section, it is obviously possible to perform fault detection of the display panel 100 or to discharge the remaining charge in the inorganic light-emitting elements.

[0216] In the following text, reference will be made to Figures 7a to 7d Various embodiments are described for performing operations to discharge residual charge in inorganic light-emitting elements.

[0217] Figures 7a to 7d A progressive driving method for a display panel 100 according to various embodiments of the present disclosure is illustrated. Figures 7a to 7d In the diagram, the vertical axis represents the row line, the horizontal axis represents time, and the time interval indicated by the arrows represents the time interval during which the operation for discharging the inorganic light-emitting element is performed.

[0218] In various embodiments of this disclosure, the operation of discharging residual charge in the inorganic light-emitting element can be performed at predetermined intervals. For example, the operation of discharging residual charge in the inorganic light-emitting element can be performed once per image frame, or multiple times for a single image frame, or once every multiple image frames.

[0219] In this case, the predetermined period can vary depending on the number of luminous segments for an image frame.

[0220] Specifically, as the number of light-emitting segments for an image frame increases, the number of times leakage current is supplied when representing black grayscale becomes greater, thus accumulating more charge in the junction capacitance components of the inorganic light-emitting element. With more accumulated charge, the voltage applied across the inorganic light-emitting element becomes higher, and therefore, the likelihood of a voltage greater than or equal to the positive voltage being applied across the inorganic light-emitting element becomes higher.

[0221] Therefore, the cycle for performing the operation to discharge the remaining charge in the inorganic light-emitting element (i.e., the cycle for performing the operation to remove the voltage across the inorganic light-emitting element) can vary depending on the number of light-emitting segments.

[0222] However, if there are no issues in achieving black grayscale, the predetermined cycle time does not necessarily have to become faster even if the number of light-emitting segments increases. That is, the predetermined cycle time can be determined by the product developer within a range where no voltage greater than or equal to the positive voltage is applied to the two ends of the inorganic light-emitting element when multiple light-emitting segments are being implemented.

[0223] Figure 7a The illustration shows a case where an image frame is driven at 120Hz according to an embodiment of the present disclosure. In this case, it can be seen that there are intervals between image frame periods as described above. Figure 6 The blanking intervals 65-1 and 65-2 are described herein. Although not shown for distinction, each blanking interval 65-1 and 65-2 contains a non-light-emitting segment. In this case, in each non-light-emitting segment, an operation for discharging the remaining charge in the inorganic light-emitting element can be performed.

[0224] Figure 7b This illustrates a scenario where an image frame is driven at 240Hz according to an embodiment of this disclosure. Figure 7b As can be seen, the blanking interval 65 exists in some portions of the time period when no image data voltage is applied. In this case, an operation to discharge the remaining charge in the inorganic light-emitting element can also be performed in the non-light-emitting segments included in the blanking interval 65.

[0225] In the embodiment, reference Figure 7a and Figure 7b It can be seen that even though the scanning rate and the number of luminescent segments differ between the attached figures, in Figure 7a and Figure 7b In this process, the operation to discharge the remaining charge in the inorganic light-emitting element is also typically performed once per image frame.

[0226] Figure 7c This illustrates another case where an image frame is driven at 240Hz. Figure 7cFrom this, it can be seen that, with Figure 7b Unlike the blanking interval 65, a separate non-light-emitting segment 67 is achieved during the time period when no image data voltage is applied. Therefore, according to Figure 7c The operation of discharging residual charge in the inorganic light-emitting element can be performed separately in the non-light-emitting segment included in the blanking interval 65 and the separate non-light-emitting segment 67. That is, it can be seen that, compared with... Figure 7a or Figure 7b Unlike other operations, the process of discharging the remaining charge in an inorganic light-emitting element can be performed multiple times for a single image frame. Figure 7c (The middle part is twice).

[0227] Figure 7d This illustrates another scenario where an image frame is driven at 120Hz. (Reference) Figure 7d The arrows in the image show that... Figure 7a Unlike the first blanking interval 65-1, the operation to discharge the remaining charge in the inorganic light-emitting element is not performed in the non-light-emitting section, but only in the second blanking interval 65-2.

[0228] As described above, according to embodiments of this disclosure, the operation for discharging residual charge in the inorganic light-emitting element can be performed once every plurality of image frames. In this case, the embodiments are not limited to... Figure 7d The content shown is not the same as the operation used to discharge the remaining charge in the inorganic light-emitting element, which can obviously be performed once every three or four image frames.

[0229] In this embodiment, the sub-pixel circuit that provides drive current to the inorganic light-emitting element includes a drive transistor. The drive transistor is a core component that determines the operation of the sub-pixel circuit, and theoretically, the electronic characteristics of the drive transistors, such as threshold voltage (Vth) or mobility (μ), should be the same in the sub-pixel circuit of the display panel 100.

[0230] However, in practice, due to various factors such as process variations or changes over time, the threshold voltage (Vth) and mobility (μ) of the driving transistors in individual sub-pixel circuits may deviate. These deviations can lead to a decrease in image quality, thus requiring compensation.

[0231] In the following sections, various embodiments of this disclosure will be described in detail by referring to a method for compensating for deviations in the electronic characteristics of a driving transistor based on the configuration of a sub-pixel circuit as an "internal compensation method," and by referring to a method for compensating for deviations in the electronic characteristics of a driving transistor based on correcting the image data voltage using the current flowing in the driving transistor as an "external compensation method."

[0232] First, refer to Figures 8 to 12b Some embodiments of a display device that employs an internal compensation method are described.

[0233] Figure 8 This is a detailed block diagram illustrating the configuration of a display device 1000 according to an embodiment of the present disclosure. In the description... Figure 8 In this case, descriptions of content that overlaps with the foregoing will be omitted.

[0234] according to Figure 8 The display device 1000 includes a display panel 100 and a driver 500. The display panel 100 includes sub-pixel circuitry 110 and inorganic light-emitting elements 120. Figure 8 For ease of explanation, only the structure associated with one sub-pixel included in the display panel 100 is shown, but it is obvious that sub-pixel circuit 110 and inorganic light-emitting element 120 can be provided for each sub-pixel.

[0235] The inorganic light-emitting element 120 can be mounted on the sub-pixel circuit 110 so as to be electrically connected to the sub-pixel circuit 110 and can emit light based on the driving current provided from the sub-pixel circuit 110.

[0236] The inorganic light-emitting element 120 may be included in the sub-pixels of the display panel 100 and may be of various types depending on the color of the emitted light. For example, the inorganic light-emitting element 120 may be one of a red (R) inorganic light-emitting element that emits red light, a green (G) inorganic light-emitting element that emits green light, and a blue (B) inorganic light-emitting element that emits blue light.

[0237] The type of sub-pixel can be determined based on the type of inorganic light-emitting element 120. Specifically, R inorganic light-emitting element can be included in R sub-pixel 20-1, G inorganic light-emitting element can be included in G sub-pixel 20-2, and B inorganic light-emitting element can be included in B sub-pixel 20-3.

[0238] Here, inorganic light-emitting element 120 refers to a light-emitting element made of inorganic materials, which is different from organic light-emitting diodes (OLEDs) made of organic materials.

[0239] Specifically, according to embodiments of this disclosure, the inorganic light-emitting element 120 may be a micro light-emitting diode (micro LED or μLED) with a size less than or equal to 100 micrometers (μm).

[0240] A display panel that uses micro-LEDs to realize each sub-pixel is called a micro-LED display panel. A micro-LED display panel is a type of flat panel display panel, and it consists of multiple inorganic LEDs, each less than or equal to 100 micrometers. Compared to liquid crystal display (LCD) panels that require backlighting, micro-LED display panels offer better contrast, response time, and energy efficiency. In this embodiment, both organic LEDs (OLEDs) and micro-LEDs have good energy efficiency, but micro-LEDs offer better performance than OLEDs in terms of brightness, luminous efficacy, and lifespan.

[0241] The inorganic light-emitting element 120 can represent various gray levels based on the amplitude or pulse width of the driving current provided by the sub-pixel circuit 110. Here, the pulse width of the driving current can also be referred to as the duty cycle or duration of the driving current.

[0242] For example, the greater the amplitude of the driving current, the brighter the grayscale value can be exhibited by the inorganic light-emitting element 120. In addition, the longer the pulse width of the driving current (e.g., the higher the duty cycle of the driving current or the longer the duration of the driving current), the brighter the grayscale value can be exhibited by the inorganic light-emitting element 120.

[0243] The sub-pixel circuit 110 provides driving current to the inorganic light-emitting element 120.

[0244] Specifically, the sub-pixel circuit 110 can provide the inorganic light-emitting element 120 with a drive current whose amplitude and duration are controlled based on the image data voltage (e.g., constant current generator data voltage, PWM data voltage), drive voltage (e.g., first drive voltage, second drive voltage, ground voltage) applied from the driver 500 and various control signals (e.g., scan signal, transmit signal).

[0245] That is, the sub-pixel circuit 110 can drive the inorganic light-emitting element 120 by pulse amplitude modulation (PAM) and / or pulse width modulation (PWM) methods.

[0246] Therefore, the sub-pixel circuit 110 may include: a constant current generator circuit 111 for providing a constant current with an amplitude based on the constant current generator data voltage to the inorganic light-emitting element 120; and a PWM circuit 112 for controlling the duration of providing the constant current to the inorganic light-emitting element 120 based on the PWM data voltage. Here, the constant current provided to the inorganic light-emitting element 120 becomes the aforementioned drive current.

[0247] According to embodiments of this disclosure, the same constant current generator data voltage can be applied to all constant current generator circuits 111 of the display panel 100. Therefore, a drive current (e.g., a constant current) of the same magnitude is provided to all inorganic light-emitting elements 120 of the display panel 100, and thus the problem of the LED wavelength varying according to the magnitude of the drive current can be solved.

[0248] The terms “constant current generator circuit” and “constant current generator data voltage” used in this document are only to emphasize that when the same PAM data voltage is applied to all PAM circuits of the display panel 100, the PAM circuit operates as a constant current generator, and the capabilities of the components are not limited by these terms.

[0249] In this case, a DC voltage of the same magnitude can be used as the constant current generator data voltage. Therefore, unlike the PWM data voltage applied from the data driver, the constant current generator data voltage can be provided from the power supply IC.

[0250] In this embodiment, depending on the specific implementation, the same constant current generator data voltage can be applied to the constant current generator circuit 111 of the display panel 100 for each type of sub-pixel. That is, the characteristics can vary depending on the type of inorganic light-emitting element 120, thus allowing different amplitudes of constant current generator data voltage to be applied to different types of sub-pixel circuits. In this case, the same constant current generator data voltage can be applied to sub-pixel circuits of the same type.

[0251] A PWM data voltage corresponding to the grayscale value of each sub-pixel can be applied to each PWM circuit 112 of the display panel 100. Therefore, the duration of the drive current (e.g., constant current) supplied to the inorganic light-emitting element 120 of each sub-pixel can be controlled by the PWM circuit 112. Thus, the grayscale of the image can be represented.

[0252] In this embodiment, in the case of a modular display panel, a separate constant current generator data voltage can be applied to each display module. Therefore, brightness or color deviations between display modules can be compensated for by adjusting the constant current generator data voltage.

[0253] Figure 9a This is a configuration diagram of the sub-pixel circuit 110 according to an embodiment of the present disclosure. Figure 9a The sub-pixel circuit 110 includes a constant current generator circuit 111, a PWM circuit 112, a first switching transistor T17, and a second switching transistor T18.

[0254] The constant current generator circuit 111 includes a first driving transistor T16, and it can provide a constant current with a regular amplitude to the inorganic light-emitting element 120 based on the voltage applied between the source terminal and the gate terminal of the first driving transistor T16.

[0255] Specifically, when a constant current generator data voltage is applied in the data setting section, the constant current generator circuit 111 can apply or set the constant current generator data voltage, which has already compensated for the threshold voltage of the first driving transistor T16, to the gate terminal (e.g., node B) of the first driving transistor T16. In this case, the internal compensation unit 11 can perform threshold voltage compensation. An example of the specific configuration and operation of the internal compensation unit 11 is described below.

[0256] Subsequently, when a first driving voltage is applied to the source terminal of the first driving transistor T16 in the light-emitting section, the constant current generator circuit 111 can provide a constant current to the inorganic light-emitting element 120 through the turned-on first driving transistor T16. The magnitude of the constant current is based on the difference between the voltage of the source terminal of the first driving transistor T16 (e.g., the first driving voltage) and the voltage of the gate terminal (e.g., the constant current generator data voltage that has been compensated for the threshold voltage).

[0257] Therefore, regardless of the deviation of the threshold voltage of the first driving transistor T16, the constant current generator circuit 111 can provide the inorganic light-emitting element 120 with a driving current of an amplitude corresponding to the applied constant current generator data voltage.

[0258] In the embodiments, according to Figure 9a As shown, when the first switching transistor T17 and the second switching transistor T18 are turned on, a constant current supplied from the constant current generator circuit 111 is provided to the inorganic light-emitting element 120.

[0259] The PWM circuit 112 includes a second driving transistor T6, and it can control the duration of constant current flow in the inorganic light-emitting element 120 by controlling the on / off operation of the first switching transistor T17.

[0260] Specifically, when a PWM data voltage is applied during the data setting segment, the PWM circuit 112 can apply or set a PWM data voltage that has already compensated for the threshold voltage of the second drive transistor T6 to the gate terminal (e.g., node A) of the second drive transistor T6. In this case, the internal compensation unit 12 can also perform threshold voltage compensation. An example of the specific configuration and operation of the internal compensation unit 12 is described below.

[0261] Subsequently, when the second driving transistor T6 is turned on based on the sweep signal applied during the light-emitting segment, the PWM circuit 112 can control the time for the constant current to flow in the inorganic light-emitting element 120 by applying a second driving voltage to the gate terminal of the first switching transistor T17 to turn off the first switching transistor T17.

[0262] In this case, when the voltage at the gate terminal changes according to the sweep signal, the second driving transistor T6 is turned on, and the voltage between the gate terminal and the source terminal of the second driving transistor T6 becomes the threshold voltage.

[0263] Here, the sweep signal is a signal applied from the driver 500 (e.g., a sweep driver) to the sub-pixel circuit 110 to change the voltage at the gate terminal of the second driving transistor T6 during the light-emitting segment, and it can be a voltage signal sweeping between two different voltages. For example, the sweep signal can be a signal that changes linearly between two voltages, such as a ramp wave, sawtooth wave, triangular wave, etc., but is not limited thereto.

[0264] As described above, regardless of the deviation of the threshold voltage of the second driving transistor T6, the PWM circuit 112 can make a constant current flow in the inorganic light-emitting element 120 during the time period corresponding to the PWM data voltage.

[0265] In this embodiment, the PWM circuit 112 includes a reset unit 13. The reset unit 13 is a component for forcibly turning on the first switching transistor T17. As described above, in order for a constant current to flow in the inorganic light-emitting element 120 and for the inorganic light-emitting element 120 to emit light, the first switching transistor T17 should be in a conducting state. For this purpose, the reset unit 13 can turn on the first switching transistor T17 at the beginning of each of the plurality of light-emitting segments. An example of the specific configuration and operation of the reset unit 13 is described below.

[0266] As described below, the second switching transistor T18 is turned on / off according to the emitted signal Emi_PAM(n). The on / off timing of the second switching transistor T18 is related to the implementation of black-grayscale, and an example of it is described in more detail below.

[0267] In this embodiment, a resistive component is present in the display panel 100. Therefore, when the drive current flows in the light-emitting section, an IR drop occurs, which causes a drop in the drive voltage. Since the drive voltage becomes the reference potential when the constant current generator data voltage is set, this drop in drive voltage interferes with the accurate setting of the constant current generator data voltage.

[0268] As described above, in various embodiments of this disclosure, the data setting section and the light-emitting section are performed in the order of the row lines. Therefore, when the sub-pixel circuits of some row lines of the display panel 100 are operating in the light-emitting section, the sub-pixel circuits of other row lines are operating in the data setting section.

[0269] Therefore, when the same driving voltage applied through a single wiring is applied to the constant current generator circuit 111 regardless of the driving period of the display panel 100, the decrease in driving voltage caused by the sub-pixel circuit operating in the light-emitting section affects the constant current generator data voltage setting operation of the sub-pixel circuit operating in the data setting section.

[0270] To overcome the above problems, in various embodiments of this disclosure, separate drive voltages applied via separate wiring are applied to the constant current generator circuit 111 in the data setting section and the light emission section, respectively.

[0271] exist Figure 9a In the example, a second driving voltage is applied to the constant current generator circuit 111 in the data setting section, and a first driving voltage is applied to the constant current generator circuit 111 in the light emission section.

[0272] Therefore, even if a voltage drop occurs in the first driving voltage due to the sub-pixel circuit operating in the light-emitting section, a separate second driving voltage independent of the driving current is applied to the sub-pixel circuit operating in the data setting section, thus making it possible to set a stable constant current generator data voltage.

[0273] In the embodiments, according to Figure 9a As shown, the second driving voltage is also applied to the PWM circuit 112 during the light-emitting segment and is used as the voltage to turn off the first switching transistor T17.

[0274] Figure 9b This is a detailed circuit diagram of the sub-pixel circuit 110 according to an embodiment of the present disclosure. (See reference...) Figure 9b The sub-pixel circuit 110 includes a constant current generator circuit 111, a PWM circuit 112, a first switching transistor T17, a second switching transistor T18, a transistor T9, a transistor T10, and a transistor T19. Here, it can be seen that the PWM circuit 112 includes an internal compensation unit 12 and a reset unit 13, and the constant current generator circuit 111 includes an internal compensation unit 11.

[0275] Transistors T9 and T10 are circuit components used to apply a second drive voltage (VDD_PWM) to the constant current generator circuit 111 during the data setting segment.

[0276] Transistor T19 is connected between the anode and cathode terminals of the inorganic light-emitting element 120. Transistor T19 can be used for different purposes before and after the inorganic light-emitting element 120 is mounted on the TFT layer and electrically connected to the sub-pixel circuit 110.

[0277] For example, before the inorganic light-emitting element 120 and the sub-pixel circuit 110 are connected to each other, the transistor T19 can be turned on according to a control signal (test) to check whether the sub-pixel circuit 110 is abnormal.

[0278] Furthermore, after the inorganic light-emitting element 120 and the sub-pixel circuit 110 are connected to each other, the transistor T19 can function as a discharge transistor. That is, the transistor T19 can be turned on according to a control signal (discharge) to discharge the remaining charge in the inorganic light-emitting element 120.

[0279] When transistor T19 is turned on, the anode and cathode terminals of inorganic light-emitting element 120 are short-circuited, thus discharging the remaining charge in inorganic light-emitting element 120 and removing the potential difference between the two ends of inorganic light-emitting element 120.

[0280] Here, the discharge signal is not applied to the gate signal of the display panel 100 in the order of the row lines, but is a global signal applied to all row lines of the display panel 100 simultaneously and equally.

[0281] In the embodiments, in Figure 9b In this context, VDD_PAM refers to the first drive voltage (e.g., +10V), VDD_PWM refers to the second drive voltage (e.g., +10V), VSS refers to ground voltage (e.g., +10V), and Vset refers to the low voltage (e.g., -3V) used to turn on the first switching transistor T17. VDD_PAM, VDD_PWM, VSS, and Vset can be provided from the aforementioned power supply IC, but this disclosure is not limited thereto.

[0282] VST(n) refers to the scan signal applied to the sub-pixel circuit 110 to initialize the voltages of node A (the gate terminal of the second driving transistor T6) and node B (the gate terminal of the first driving transistor T16).

[0283] SP(n) refers to the scan signal applied to the sub-pixel circuit 110 to set (or program) the image data voltage (e.g., PWM data voltage, constant current generator data voltage) to the sub-pixel circuit 110.

[0284] SET(n) refers to the transmit signal applied to the reset unit 13 of the PWM circuit 112 to turn on the first switching transistor T17.

[0285] Emi_PWM(n) refers to the transmit signal used to turn on transistor T5 and apply the second drive voltage (VDD_PWM) to PWM circuit 112, and to turn on transistors T15 and T12 and apply the first drive voltage (VDD_PAM) to constant current generator circuit 111.

[0286] Sweep (n) refers to a sweep signal. According to embodiments of this disclosure, the sweep signal can be a voltage signal that varies linearly between two different voltages, but is not limited thereto. In this embodiment, the sweep signal can be repeatedly applied in the same manner for each luminescent segment.

[0287] Emi_PAM(n) refers to the transmit signal used to turn on the second switching transistor T18.

[0288] In the signals above, (n) refers to the nth row line. As described above, the driver 500 drives the display panel 110 for each row line (or scan line or gate line), and therefore can be performed as described below. Figure 9c The aforementioned control signals (VST(n), SP(n), SET(n), Emi_PWM(n), Sweep(n) and Emi_PAM(n)) are applied to all sub-pixel circuits 110 included in the nth row in the same order shown.

[0289] The aforementioned control signals (scan signal, transmit signal, and sweep signal) can be applied from the gate driver and can be referred to as gate signals.

[0290] Vsig(m)_R / G / B refers to the PWM data voltage signal for each of the R, G, and B sub-pixels of the pixel included in the m-th column. Since the aforementioned gate signal is for the n-th row, therefore... Figure 9b The Vsig(m)_R / G / B shown refers to the PWM data voltage signal applied to the pixel located at the intersection of the nth row line and the mth column line (specifically, the PWM data voltage of each of the time-division multiplexed R, G, B sub-pixels).

[0291] A PWM data voltage can be applied from the data driver. Furthermore, in addition to the voltage corresponding to black grayscale, the PWM data voltage can have a higher voltage value than the second drive voltage (VDD_PWM). For example, a voltage between +10[V] (full black) and +15[V] (full white) can be used as the PWM data voltage, but this disclosure is not limited thereto.

[0292] In an embodiment, Figure 9bThe subpixel circuit 110 shown corresponds to any one of the R, G, and B subpixels (e.g., the R subpixel). Therefore, for the subpixel circuit 110, the PWM data voltage for the R subpixel can be selected and applied only by the DeMUX circuit.

[0293] VPAM_R / G / B refers to the constant current generator data voltage signal used for each of the R, G, and B sub-pixels included in the display panel 100. As described above, the same constant current generator data voltage can be applied to the display panel 100.

[0294] However, the characteristic of the same constant current generator data voltage in this case only means that the same constant current generator data voltage is applied to the same type of sub-pixels included in the display panel 100, and does not mean that the same constant current generator data voltage must be applied to all sub-pixels of different types (e.g., R, G, and B).

[0295] As mentioned above, the characteristics of R, G, and B subpixels can vary depending on the type of subpixel, therefore the constant current generator data voltage can be varied for each type of subpixel. In this case, the same constant current generator data voltage can be applied to subpixels of the same type, whether it is a column line or a row line.

[0296] In an embodiment, according to an embodiment of this disclosure, the constant current generator data voltage may not be applied from the data driver as in the case of a PWM data voltage, but may instead be applied directly from the power supply IC for each type of sub-pixel.

[0297] That is, regardless of whether it is a column line or a row line, the same constant current generator data voltage can be applied to the same type of sub-pixel, so DC voltage can be used as the constant current generator data voltage. Therefore, for example, three types of DC voltages (e.g., +5.1 [V], +4.8 [V], +5.0 [V]) corresponding to each of the R, G, and B sub-pixel circuits of the display panel 100 can be applied directly from the drive voltage circuit. In this case, a separate data driver for applying the constant current generator data voltage to the sub-pixel circuit 110 is not required.

[0298] In an embodiment, it is evident that the same constant current generator data voltage can be applied to different types of sub-pixels, given that the same constant current generator data voltage exhibits better characteristics when used on different types of sub-pixels.

[0299] Figure 9c It is above Figure 9bThe timing diagram of the gate signal described in the figure.

[0300] exist Figure 9c Of the gate signals shown, VST(n) and SP(n)(①) are scan signals related to the data setting operation of the sub-pixel circuit 110. Additionally, in Figure 9c Among the gate signals shown, Emi_PWM(n), SET(n), Emi_PAM(n), and Sweep(n)(②) are emission signals related to the light emission operation of the sub-pixel circuit 110.

[0301] As described above, according to embodiments of this disclosure, for a single image frame, a data setting segment can be performed once, and a light emission segment can be performed multiple times. Therefore, for a single image frame, the driver 500 can apply a scan signal (①) once to each line of the display panel 100, and apply a transmission signal (②) multiple times to each line of the display panel 100.

[0302] Figure 9d It is used to drive the image frame during the aforementioned image frame time period 60 and blanking interval 65, including Figure 9b The timing diagram for driving various signals of the display panel 100, including the sub-pixel circuit 110. Figure 9d As an example, the case where the display panel 100 includes 270 rows is presented.

[0303] As can be seen from the reference numerals ①_(n), ①_(n+1) to ①_(270) in the attached figure, a scan signal (VST(n), SP(n)) for data setting operation can be applied once to each row line in the order of the row lines during the image frame time period 60.

[0304] Furthermore, as can be seen from the reference numerals ②_(n), ②_(n+1) to ②_(270) in the attached figure, low-level transmit signals (Emi_PWM(n), SET(n), Emi_PAM(n) and Sweep(n)) for light emission operation can be applied to each row line multiple times in the order of the row lines.

[0305] Please refer to the following text. Figure 9b and Figure 9d This describes the specific operation of the sub-pixel circuit 110.

[0306] When a data setup segment begins in each row line, driver 500 first turns on the first drive transistor T16 included in constant current generator circuit 111 and the second drive transistor T6 included in PWM circuit 112. For this purpose, driver 500 applies a low voltage (e.g., -3V) to sub-pixel circuit 110 via VST(n) signal.

[0307] refer to Figure 9b When a low voltage is applied to the gate terminal (hereinafter referred to as node A) of the second driving transistor T6 through transistor T2, which is turned on according to the VST(n) signal, the second driving transistor T6 is turned on. Additionally, when a low voltage is applied to the gate terminal (hereinafter referred to as node B) of the first driving transistor T16 through transistor T11, which is turned on according to the VST(n) signal, the first driving transistor T16 is turned on.

[0308] In this embodiment, when a low voltage (e.g., -3 [V]) is applied to the sub-pixel circuit 110 via the VST(n) signal, transistor T10 is turned on, and here, a VDD_PWM voltage (hereinafter referred to as the second drive voltage (e.g., +10 [V])) is applied to the other node of capacitor C2, one end of which is connected to node B, via the turned-on transistor T10. Here, the second drive voltage becomes a reference potential used to set the constant current generator data voltage, which will then be determined according to the SP(n) signal.

[0309] In the data setting section, when the first driving transistor T16 and the second driving transistor T6 are turned on by the VST(n) signal, the driver 500 inputs data voltages to nodes A and B, respectively. For this purpose, the driver 500 applies a low voltage to the sub-pixel circuit 110 via the SP(n) signal.

[0310] When a low voltage is applied to the sub-pixel circuit 110 via the SP(n) signal, transistors T3 and T4 of the PWM circuit 112 are turned on. Therefore, through the turned-on transistors T3, T6, and T4, power can be transmitted from the data signal line Vsig.

[0311] (m)_R / G / B applies PWM data voltage to node A.

[0312] In this case, the PWM data voltage applied from the driver 500 (specifically, the data driver) is not set to node A as is, but instead the PWM data voltage is set to the threshold voltage of the second driving transistor T6, which has been compensated (e.g., the voltage as the sum of the PWM data voltage and the threshold voltage of the second driving transistor T6).

[0313] Specifically, when transistors T3 and T4 are turned on according to the SP(n) signal, the PWM data voltage applied to the source terminal of transistor T3 is input to the internal compensation unit 12. In this case, the second driving transistor T6 is fully turned on by the VST(n) signal, so the input PWM data voltage is started to be input to node A as it passes through transistor T3, the second driving transistor T6, and transistor T4 in sequence. That is, the voltage at node A starts to rise from a low voltage.

[0314] However, the voltage at node A cannot rise to the input PWM data voltage; instead, it only rises to the sum of the PWM data voltage and the threshold voltage of the second driving transistor T6. This is because the second driving transistor T6 is turned off when the voltage difference between its gate and source terminals reaches its threshold voltage.

[0315] That is, by applying the PWM data voltage to the source terminal of the second driving transistor T6 through the conducting transistor T3, the voltage at node A only rises to the sum of the PWM data voltage and the threshold voltage of the second driving transistor T6.

[0316] In this embodiment, when a low voltage is applied to the sub-pixel circuit 110 via the SP(n) signal line, transistors T13 and T14 of the constant current generator circuit 111 are also turned on. Therefore, a constant current generator data voltage can be applied to node B from the data signal line VPAM_R / G / B via the turned-on transistors T13, T16, and T14.

[0317] In this case, the constant current generator data voltage applied from the driver 500 (specifically, the power supply IC) is not set to node B as is, but instead the constant current generator data voltage is set to the threshold voltage of the first driving transistor T16, which has been compensated (e.g., as the sum of the constant current generator data voltage and the threshold voltage of the first driving transistor T16), for the reasons described above regarding node A.

[0318] In this embodiment, when a low voltage is applied to the sub-pixel circuit 110 via the SP(n) signal line, transistor T9 is turned on, and here, a second driving voltage (VDD_PWM) is applied to the other end of capacitor C2 via the turned-on transistor T9. Therefore, the reference potential of the constant current generator data voltage set to node B (specifically, the constant current generator data voltage whose threshold voltage of the first driving transistor T16 has been compensated) remains unchanged.

[0319] After setting each data voltage to the constant current generator circuit 111 and the PWM circuit 112, the driver 500 first turns on the first switching transistor T17 to make the inorganic light-emitting element 120 emit light. To do this, the driver 500 applies a low voltage to the reset unit 13 (specifically, the transistor T8 of the reset unit 13) via the SET(n) signal.

[0320] When a low voltage is applied to transistor T8 along the SET(n) signal line, the Vset voltage is charged into capacitor C3 through the conducting transistor T8. Since Vset is a low voltage (e.g., -3 [V]), when the Vset voltage is charged into capacitor C3, a low voltage is applied to the gate terminal of the first switching transistor T17 (hereinafter referred to as node C), and the first switching transistor T17 is turned on.

[0321] In this embodiment, the reset unit 13 operates independently of the remaining circuit components until a low voltage is applied through the Emi_PWM(n) signal line. Therefore, depending on the embodiment, if earlier than... Figure 9c or Figure 9d Applying a low voltage through the SET(n) signal line at the indicated time point will not cause any problems.

[0322] When the first switching transistor T17 is turned on, the driver 500 causes the inorganic light-emitting element 120 to emit light based on the voltages set to nodes A and B. To do this, the driver 500 applies a low voltage to the sub-pixel circuit 110 via the Emi_PWM(n) and Emi_PAM(n) signal lines, and applies a sweep voltage to the sub-pixel circuit 110 via the Sweep(n) signal line.

[0323] First, the operation of the constant current generator circuit 111 in the light-emitting section according to the signal applied from the driver 500 is described below. Here, it is assumed that the PWM data voltage corresponding to the black grayscale is not set to the PWM circuit 112.

[0324] The constant current generator circuit 111 can provide a constant current to the inorganic light-emitting element 120 based on the voltage set to node B.

[0325] Specifically, during the light-emitting segment, a low voltage is applied to the gate terminal through the Emi_PWM(n) and Emi_PAM(n) signal lines, thus turning on transistor T15 and the second switching transistor T18.

[0326] In the embodiment, as described above, the first switching transistor T17 is in the on state according to the SET(n) signal.

[0327] Furthermore, as described above, with a voltage applied to node B that is the sum of the constant current generator data voltage (e.g., +5 [V]) and the threshold voltage of the first drive transistor T16, VDD_PAM (hereinafter referred to as the first drive voltage (e.g., +10 [V])) is applied to the source terminal of the first drive transistor T16 via transistor T15, which is turned on according to the Emi_PWM(n) signal. Therefore, when a voltage smaller than the threshold voltage of the first drive transistor T16 is applied between the gate terminal and the source terminal, the first drive transistor T16 is also turned on. (For reference, in the case of a PMOSFET, the threshold voltage is negative, and the PMOSFET is turned on when a voltage smaller than the threshold voltage is applied between the gate terminal and the source terminal, and turned off when a voltage exceeding the threshold voltage is applied.)

[0328] Therefore, a first driving voltage is applied to the anode terminal of the inorganic light-emitting element 120 through the conducting transistor T15, the first driving transistor T16, the first switching transistor T17, and the second switching transistor T18, generating a potential difference exceeding the forward voltage (Vf) across the inorganic light-emitting element 120. Consequently, a driving current (e.g., a constant current) begins to flow in the inorganic light-emitting element 120, and the inorganic light-emitting element 120 begins to emit light. In this case, the amplitude of the driving current (e.g., a constant current) that causes the inorganic light-emitting element 120 to emit light is the amplitude corresponding to the constant current generator data voltage.

[0329] In this embodiment, a drive current needs to be provided to the inorganic light-emitting element 120 in the light-emitting section. Therefore, the drive voltage applied to the constant current generator circuit 111 is changed from the second drive voltage (VDD_PWM) to the first drive voltage (VDD_PAM). (See reference...) Figure 9b It can be seen that when a low voltage is applied to transistors T12 and T15 according to the Emi_PWM(n) signal, the first driving voltage (VDD_PAM) is applied to the other end of capacitor C2 through the conducting transistors T12 and T15.

[0330] As described above, a voltage drop may occur in the first driving voltage due to the IR drop generated when the driving current flows to the inorganic light-emitting element 120. However, even if a voltage drop occurs in the first driving voltage, the voltage between the gate terminal and the source terminal of the first driving transistor T16 remains the same as the voltage set in the data setting section, regardless of the amount of voltage drop in the first driving voltage (e.g., the amount of IR drop). This is because: regardless of the voltage applied to the other end of capacitor C2, the voltage at node B changes by the same amount as the voltage changes through coupling via capacitor C2.

[0331] Therefore, according to embodiments of this disclosure, a second drive voltage with no voltage drop is applied to the constant current generator circuit 111 in the data setting section. Thus, regardless of the voltage drop of the first drive voltage, the correct constant current generator data voltage can be set to the constant current generator circuit 111.

[0332] Furthermore, in the light-emitting section, the driving voltage is changed to a first driving voltage that allows for a voltage drop. However, as described above, the voltage between the gate terminal and the source terminal of the first driving transistor T16 remains the same as the voltage set in the data setting section. Therefore, the constant current generator circuit 111 can operate normally regardless of the voltage drop of the first driving voltage.

[0333] Next, the operation of the PWM circuit 112 in the light-emitting section according to the signal applied from the driver 500 is described below.

[0334] The PWM circuit 112 can control the light-emitting time of the inorganic light-emitting element 120 based on the voltage set to node A. Specifically, the PWM circuit 112 can control the cut-off operation of the first switching transistor T17 based on the voltage set to node A, thereby controlling the time for the constant current supplied from the constant current generator circuit 111 to flow in the inorganic light-emitting element 120.

[0335] As described above, when the constant current generator circuit 111 provides a constant current to the inorganic light-emitting element 120, the inorganic light-emitting element 120 begins to emit light.

[0336] In this situation, even though transistors T5 and T7 are turned on according to the Emi_PWM(n) signal, the second driving transistor T6 is in the off state, and therefore no second driving voltage (VDD_PWM) is applied to node C. Therefore, as described above, the first switching transistor T17 can be continuously turned on according to the SET(n) signal, and the constant current provided from the constant current generator circuit 111 can flow in the inorganic light-emitting element 120.

[0337] Specifically, when transistor T5 is turned on according to the Emi_PWM(n) signal, a second driving voltage (VDD_PWM) is applied to the source terminal of the second driving transistor T6 through the turned-on transistor T5.

[0338] For example, when using a voltage between +10[V] (black) and +15[V] (all white) as the PWM data voltage as described above, if the threshold voltage of the second drive transistor T6 is assumed to be -1[V], then the voltage between +9[V] (black) and +14[V] (all white) is set to node A at the beginning of the data setting segment.

[0339] Subsequently, when a second driving voltage (e.g., +10[V]) is applied to the source terminal of the second driving transistor T6 according to the Emi_PWM(n) signal, the voltage between the gate terminal and the source terminal of the second driving transistor T6 becomes greater than or equal to (-1[V] to +4[V]) the threshold voltage (-1[V]) of the second driving transistor T6.

[0340] Therefore, unless the PWM data voltage corresponding to the black grayscale is set to node A, the second driving transistor T6 remains off even when the second driving voltage (VDD_PWM) is applied to the source terminal. As long as the second driving transistor T6 remains off, the first switching transistor T17 remains on, thus the inorganic light-emitting element 120 continues to emit light. (When the PWM data voltage corresponding to the black grayscale is set to node A, the second driving transistor T6 immediately turns on when the second driving voltage is applied to the source terminal.)

[0341] However, if the voltage at node A changes according to the sweep signal Sweep(n), and the voltage between the gate and source terminals of the second driving transistor T6 becomes less than or equal to the threshold voltage (-1 [V]) of the second driving transistor T6, the second driving transistor T6 turns on and applies a second driving voltage (VDD_PWM, e.g., +10 [V]) to node C, and the first switching transistor T17 turns off. Therefore, the constant current no longer flows in the inorganic light-emitting element 120, and the inorganic light-emitting element 120 begins to stop emitting light.

[0342] Specifically, refer to Figure 9c or Figure 9d It can be seen that when a low voltage is applied to the sub-pixel circuit 110 according to the Emi_PWM(n) signal, a linearly varying sweep signal Sweep(n) is applied to the sub-pixel circuit 110 (i.e., a sweep voltage that decreases linearly from a high voltage (e.g., +15[V]) to a low voltage (e.g., +10[V])).

[0343] When the voltage change of the sweep signal is coupled to node A through capacitor C1, the voltage of node A also changes according to the sweep signal.

[0344] When the voltage at node A decreases according to the sweep signal and becomes the sum of the second driving voltage and the threshold voltage of the second driving transistor T6 (for example, when the voltage between the gate terminal and the source of the second driving transistor T6 becomes less than or equal to the threshold voltage of the second driving transistor T6), the second driving transistor T6 is turned on.

[0345] Therefore, a second driving voltage as a high voltage is applied to node C (i.e., the gate terminal of the first switching transistor T17) through the conducting transistor T5, the second driving transistor T6, and the transistor T7, and the first switching transistor T17 is turned off.

[0346] As can be seen from the above, the PWM circuit 112 can control the light emission time of the inorganic light-emitting element 120 based on the voltage set to node A.

[0347] In the embodiment, it can be seen that after the light-emitting segment ends, the voltage of the sweep signal is restored to the voltage before its linear change, such as... Figure 9c As shown in Figure 6.

[0348] As described above, the voltage change of the sweep signal is coupled to node A through capacitor C1. Therefore, when the voltage of the sweep signal is restored as described above, the voltage of node A is also restored. Thus, the voltage of node A, which varies linearly according to the sweep signal during the first light-emitting segment among multiple light-emitting segments, is restored according to the voltage recovery of the sweep signal before the start of the second light-emitting segment, which is the next light-emitting segment.

[0349] Specifically, during the data setting segment, the voltage of node A becomes the sum of the PWM data voltage and the threshold voltage of the second driving transistor T6, and during the light emission segment, it changes linearly according to the voltage change of the sweep signal. At the end of the light emission segment, it is restored to the sum of the PWM data voltage and the threshold voltage of the second driving transistor T6 according to the voltage recovery of the sweep signal. Therefore, in the next light emission segment, the same light emission operation as in the previous light emission segment becomes possible.

[0350] In this embodiment, as described above, in order for the inorganic light-emitting element 120 to emit light during the light-emitting segment, the first switching transistor T17 should initially be in the on state. However, when one of the multiple light-emitting segments is being performed, a second driving voltage is applied to node C, and the first switching transistor T17 enters the off state. Therefore, in order to proceed with the next light-emitting segment, the voltage at node C needs to be reset to a low voltage to bring the first switching transistor T17 into the on state.

[0351] Therefore, when the next light-emitting segment begins, the driver 500 first applies a low voltage to the gate terminal of transistor T8 again through the SET(n) signal, and accordingly applies a low voltage Vset to node C, and the first switching transistor T17 enters the conducting state again.

[0352] After the first switching transistor T17 is turned on according to the SET(n) signal, the driver 500 applies a low voltage to the sub-pixel circuit 110 through the Emi_PWM(n) and Emi_PAM(n) signals, and applies a sweep voltage to the sub-pixel circuit 110 through the Sweep(n) signal, thereby controlling the light emission operation of the inorganic light-emitting element 120 in the next light-emitting segment in the same manner as described above.

[0353] In the embodiment, reference Figure 9c and Figure 9d The timing diagram shows a difference between the timing when low voltage is applied to the Emi_PWM(n) signal and the timing when low voltage is applied to the Emi_PAM(n) signal. This is related to the implementation of black-to-grayscale.

[0354] Specifically, when the PWM data voltage corresponding to the black grayscale is set to node A, the first switching transistor T17 should be turned off once the light-emitting segment begins. That is, theoretically, the second driving voltage (VDD_PWM) should be applied to node C through the conducting transistors T5, T6, and T7 at the time when a low voltage is applied via the Emi_PWM(n) signal, and the first switching transistor T17 should be turned off immediately. (If the first switching transistor T17 is turned off immediately, the driving current may not flow in the inorganic light-emitting element 120 at all, and a black grayscale can be exhibited.)

[0355] However, in reality, there is a time required before the second drive voltage (VDD_PWM) is charged to node C, and the first switching transistor T17 does not immediately turn off. Specifically, after the second drive voltage (VDD_PWM) is applied to node C and charging of capacitor C3 begins, and until the voltage at which the first switching transistor T17 can be turned off is charged to node C, the first switching transistor T17 remains on, thus leakage current is supplied from the first switching transistor T17 to the inorganic light-emitting element 120.

[0356] Ultimately, with the first switching transistor T17 and the inorganic light-emitting element 120 directly connected without the second switching transistor T18, even if the PWM data voltage corresponding to the black grayscale is set to node A, the current leaking from the first switching transistor T17 flows in the inorganic light-emitting element 120 during a certain period of time, thus causing an interruption when the black grayscale is correctly achieved.

[0357] To eliminate this problem, according to embodiments of this disclosure, a second switching transistor T18 may be arranged between the first switching transistor T17 and the inorganic light-emitting element 120, and the driver 500 may apply an Emi_PAM(n) signal such that the second switching transistor T18 turns on after a specific time elapsed from the point at which a low voltage is applied to the Emi_PAM(n) signal. Here, the specific time may be greater than or equal to the time it takes for the voltage at node C to charge from the Vset voltage to a voltage that can turn off the first switching transistor T17.

[0358] Therefore, even if the PWM data voltage corresponding to black grayscale is set to node A, the leakage current generated because the first switching transistor T17 does not immediately turn off can be blocked by the second switching transistor T18. Thus, black grayscale can be achieved more accurately.

[0359] In the embodiment, in each light-emitting segment, even when the second switch is activated by adjusting the driving timing of the Emi_PWM(n) and Emi_PAM(n) signals as described above.

[0360] Transistor T18 is turned off before the first switching transistor T17 is turned off, and the leakage current (e.g., cutoff current) of the second switching transistor T18 can also be provided to the inorganic light-emitting element 120.

[0361] As described above, if a voltage greater than or equal to the positive voltage is applied to the two ends of the inorganic light-emitting element 120 due to this leakage current, the leakage current can flow in the inorganic light-emitting element 120, and problems may occur when achieving black grayscale.

[0362] Therefore, according to embodiments of this disclosure, the potential difference between the two ends of the inorganic light-emitting element can be removed by applying a discharge signal with a low level to the gate terminal of the transistor T19 within the non-light-emitting section 67, such as... Figure 9d As shown. Therefore, it can be ensured that black grayscale is implemented more accurately.

[0363] exist Figure 9d The example provided describes performing an operation to discharge residual charge in an inorganic light-emitting element (e.g., to remove the potential difference between the two ends of the inorganic light-emitting element) once per image frame within a non-light-emitting segment 67 existing within a blanking interval 65. However, the embodiments are not limited thereto, and as described above... Figures 7a to 7d As described above, depending on the product, this operation can obviously be performed in various ways and in various situations.

[0364] In the embodiment, reference Figure 9bAs can be seen, when a low voltage is applied through the SP(n) signal line, transistor T1 turns on and applies a high voltage (SW_VGH) to the X node for the sweep signal. This operation minimizes the brightness inhomogeneity and horizontal crosstalk that may be caused by the sweep load.

[0365] Figure 10a and Figure 10b It is a diagram used to illustrate the phenomenon of brightness inhomogeneity and horizontal crosstalk that may be caused by sweeping load.

[0366] As described above, in various embodiments of this disclosure, the light-emitting segments are sequentially arranged according to the row lines. Therefore, it is not possible to apply a transmit signal by using a global signal that is simultaneously and identically applied to all row lines, and a transmit driver circuit is required for each row line to provide a transmit signal corresponding to each row line.

[0367] Specifically, a sweep signal Sweep(n) for PWM driving is provided to the display panel 100 in the order of the row lines via transmitter driver circuits corresponding to the row lines respectively. (Hereinafter, the transmitter driver circuit for providing the sweep signal Sweep(n) will be referred to as the driver circuit.)

[0368] In this case, during the process of setting the PWM data voltage to the gate terminal (i.e., node A) of the second drive transistor T6, the voltage change at node A is coupled through capacitor C1, and the voltage of the Sweep(n) signal line changes.

[0369] Subsequently, the voltage change that occurred in the Sweep(n) signal line is recovered, and accordingly, the voltage change to node A is reversed. In this case, as described below, the amount of voltage change at node A varies depending on the sweeping load, and this becomes the cause of brightness inhomogeneity and horizontal crosstalk.

[0370] Specifically, Figure 10a The diagram shows a configuration where a sweep driver circuit 505 corresponding to a row line is connected to a sub-pixel circuit 110 via wiring. Here, Figure 10a It shows Figure 9b In the case where transistor T1 is not present in the sub-pixel circuit 110.

[0371] like Figure 10a As shown, the sweep signal Sweep(n) is sent to the sub-pixel circuit 110 through the sweep driver circuit 505. In this case, there is a sweep wiring resistance (i.e., an RC load) between the sweep driver circuit 505 and the sub-pixel circuit 110, and its magnitude decreases as it gets closer to the sweep driver circuit 505 and increases as it gets further away from the sweep driver circuit 505.

[0372] Figure 10b It shows Figure 10a The waveforms of the various signals are shown. Additionally, respectively, Figure 10b The label "Far" indicates voltage changes at nodes A and X of sub-pixel circuits 110 that are relatively far from the sweep driver circuit 505, while the label "Near" indicates voltage changes at nodes A and X of sub-pixel circuits 110 that are relatively close to the sweep driver circuit 505. In an embodiment, for example, nodes A and X of sub-pixel circuits 110 corresponding to the label "Far" may be farther from the sweep driver circuit 505 than nodes A and X of sub-pixel circuits 110 corresponding to the label "Near".

[0373] When a low-level scan signal SP(n) is applied to the sub-pixel circuit 110 in the data setting section, a PWM data voltage applied from the data driver is applied to node A through the Vsig wiring, transistor T3, the second drive transistor T6, and transistor T4. Here, the PWM data voltage is the PWM data voltage corresponding to any one of the R, G, and B sub-pixels selected by the DeMUX circuit.

[0374] In this process, such as Figure 10b As shown, when the voltage at node A changes, this change is coupled to node X through capacitor C1, and the voltage at node X (i.e., the voltage of the Sweep(n) signal line) changes.

[0375] Subsequently, the voltage of the Sweep(n) signal line (the voltage of node X) is restored to its original voltage level by the operation of the sweep driver circuit 505, and the voltage change of node X that occurs in this process is coupled through capacitor C1 and in turn causes the voltage change of node A.

[0376] Specifically, it can be seen that, due to the influence of the sweep load, the voltage change at node A is greater the farther the X node of the sub-pixel circuit 110 is from the sweep driver circuit 505. (See labels "far" and "near")

[0377] Therefore, even when the same PWM data voltage is applied, different voltages are set to the sub-pixel circuit 110 depending on the sweep load, which becomes the cause of brightness unevenness. Furthermore, from the perspective of the entire display panel 100, the brightness unevenness caused by the sweep load, as described above, becomes the cause of horizontal crosstalk.

[0378] The aforementioned issues of uneven brightness and horizontal crosstalk are caused by the voltage of node X changing along with the PWM data voltage applied to node A. Therefore, even if a PWM data voltage is applied to node A during the data setting period, the problem can be solved by preventing the voltage of node X from changing.

[0379] According to embodiments of this disclosure, when the PWM data voltage is set to node A, an application such as... can be applied to node X. Figure 10c The high voltage (SW_VGH) of the sweep signal is shown. In this case, the high voltage (SW_VGH) of the sweep signal can be a global signal that is applied equally from the power supply IC to all sub-pixel circuits 110 of the display panel 100.

[0380] More specifically, see reference Figure 9b The PWM circuit 112 includes a transistor T1, the source terminal of which is connected to the SW_VGH signal line, the gate terminal of which is connected to the SP(n) signal line, and the drain terminal of which is connected to the X node. In this case, the source terminal of the transistor T1 can be directly connected to the wiring through which a sweep signal (SW_VGH) is applied from the power supply IC.

[0381] Therefore, when a low voltage is applied through the SP(n) signal line and the PWM data voltage is set to node A, a high voltage (SW_VGH) of the sweep signal applied through the turned-on transistor T1 is forcibly applied to node X, and the voltage of node X can remain at the high voltage (SW_VGH) of the sweep signal regardless of the voltage change of node A.

[0382] Therefore, it can prevent or minimize the phenomenon of brightness inhomogeneity and horizontal crosstalk that may be caused by sweeping load.

[0383] In one embodiment, as another way to solve the aforementioned problems of uneven brightness and horizontal crosstalk, a method of connecting the low voltage (SW_VGL) input of the sweep signal to the X node can be considered. Figure 11a and Figure 11b This is a diagram illustrating an embodiment of connecting a low-voltage (SW_VGL) input of a sweep signal to an X node.

[0384] like Figure 11a As shown, a low voltage (SW_VGL) of the sweep signal can be applied to the X node. In this case, the low voltage (SW_VGL) of the sweep signal can be a global signal that is applied from the power supply IC to all sub-pixel circuits 110 of the display panel 100.

[0385] Specifically, node X can be directly connected to the power IC via wiring, through which a low voltage (SW_VGL) of the sweep signal is applied. Therefore, even if the voltage of node A changes by applying PWM data voltage, the voltage of node X can remain at the low voltage (SW_VGL) of the sweep signal, unaffected by the coupling through capacitor C1.

[0386] In the embodiments, according to Figure 11a A sweep signal Sweep(n) for PWM driving can be applied to the source terminal of the second driving transistor. In this case, as... Figure 11b As shown, the sweep signal Sweep(n) can be a voltage signal that increases linearly from a low voltage to a high voltage.

[0387] As described above, the PWM circuit controls the duration of the drive current flow in the inorganic light-emitting element 120 by switching the second drive transistor on / off, and this... Figure 11a The same applies to the embodiments.

[0388] Specifically, when the PWM data voltage is set to node A, the voltage difference between the gate terminal and the source terminal of the second driving transistor decreases as the voltage of the source terminal of the second driving transistor increases according to the sweep signal Sweep(n).

[0389] When the voltage difference between the gate and source terminals of the decreasing second driving transistor reaches the threshold voltage of the second driving transistor, the second driving transistor turns on and the first switching transistor turns off.

[0390] In this embodiment, the PWM driving mechanism described above can be the same as that described in the previous embodiment (the embodiment that applies a sweep signal to the X node).

[0391] Therefore, according to Figure 11a and Figure 11b The embodiments described herein can solve the aforementioned problems of brightness unevenness and horizontal crosstalk caused by sweeping load. Here, even if a sweeping signal is applied to the source terminal of the second driving transistor, this will not cause problems in the PWM driving of the display panel 100.

[0392] Figure 12a It is applied through Figure 11a and Figure 11b The described embodiment includes a detailed circuit diagram of the sub-pixel circuit 110 according to an embodiment of the present disclosure, and Figure 12b It is used to drive during image frame time period 60 and blanking interval 65, including Figure 12a Timing diagram of various signals of the display panel 100, including the sub-pixel circuit.

[0393] Figure 12a and Figure 12b The illustrated embodiment has the same characteristics as described above. Figures 9a to 9d The configurations and operating principles described are similar, so repeated descriptions will be omitted, and the descriptions will focus on the differences.

[0394] exist Figure 12a In the sub-pixel circuit 110, the SW_VGL signal line is directly connected to the X node, therefore a transistor T1 is not needed to apply the SW_VGH signal to the X node during the data setup segment. (Reference) Figure 12a It can be seen that, in relation to Figure 9b There is no transistor at the position corresponding to transistor T1. Therefore, in Figure 12a In the sub-pixel circuit 110, the transistor's reference numerals are described as being larger than... Figure 9b The corresponding figure in the attached diagram is labeled with the first digit.

[0395] In the embodiments, in Figure 9b In the sub-pixel circuit 110, if a low-level Emi_PWM(n) signal is applied to the light-emitting section, a second driving voltage (VDD_PWM) is applied to the source terminal of the second driving transistor T6 through the conducting transistor T5, and a sweep signal Sweep(n) is applied to the X node. However, it can be seen that in Figure 12a In the sub-pixel circuit 110, if a low-level Emi_PWM(n) signal is applied in the light-emitting section, a sweep signal Sweep(n) (specifically, a sweep voltage that linearly changes from low voltage to high voltage) is applied to the source terminal of the second driving transistor T5 through the turned-on transistor T4.

[0396] In this case, it can be seen that the application to Figure 9b The sweep signal Sweep(n) of the sub-pixel circuit 110 in the middle is as follows: Figure 9d The linearly decreasing form shown is applied to Figure 12a The sweep signal Sweep(n) of the sub-pixel circuit 110 in the middle is as follows: Figure 12b The linearly increasing form shown indicates that there are differences between them.

[0397] The following will be explained in detail using examples. Figure 12a In the embodiment, the PWM circuit 112 operates according to the sweep signal.

[0398] For example, during the data setting period, when a voltage of +13 [V] (specifically, the PWM data voltage (+14 [V]) + the threshold voltage of the second driving transistor T5 (-1 [V])) is set to node A, if a sweep signal (e.g., a voltage that linearly increases from +10 [V] to +15 [V]) is applied to the source terminal of the second driving transistor T5, the voltage difference between the gate terminal and the source terminal of the second driving transistor T5 decreases from +3 [V] to -2 [V].

[0399] In this configuration, when the voltage difference between the gate and source terminals of the second driving transistor T5 decreases from +3 [V] to reach the threshold voltage (-1 [V]) of the second driving transistor T5, the second driving transistor T5 is turned on. Additionally, +14 [V] is applied to the first switching transistor T16 (+14 [V] is the scan voltage when the second driving transistor T5 is on), and the first switching transistor T16 is turned off.

[0400] It can be seen that the above Figure 12a The operation mechanism of the PWM circuit 112 in the middle and Figures 9a to 9d The operation mechanism of the PWM circuit 112 described herein is the same, except that the only difference is the terminal for input sweep signal.

[0401] In the embodiment, due to about Figure 12a and Figure 12b The remaining details regarding the configuration and operation of the sub-pixel circuit 110 shown are the same as those described above. Figures 9a to 9d The content described in the previous section is repeated, so this part will be omitted below.

[0402] In the following text, the following is about Figures 13 to 33b This section describes some embodiments of a display device that utilizes an external compensation method. In the foregoing description of embodiments utilizing an internal compensation method, the consistent content can be applied verbatim to embodiments related to the external compensation method described below. Therefore, the same content can be described briefly, or this description can be omitted.

[0403] Figure 13 This is a block diagram illustrating the configuration of a display device according to an embodiment of the present disclosure. Figure 13 The display device 1000 includes a display panel 100, a sensing unit 200, a calibration unit 300, and a driver 500.

[0404] The driver 500 drives the display panel 100. Specifically, the driver 500 can provide various control signals, data signals, drive voltage signals, etc. to the display panel 100 to drive the display panel 100.

[0405] The driver 500 can drive the display panel 100 using a progressive driving method. For this purpose, the driver 500 may include a gate driver for driving pixels on a pixel array in rows.

[0406] Additionally, driver 500 may include a DeMUX circuit, a power supply IC, and a level shifter.

[0407] Additionally, driver 500 may include a data driver for providing image data voltages (e.g., constant current generator data voltages and PWM data voltages) and specific voltages as described below. In this case, as described below, the threshold voltage of the driving transistor is compensated by applying a corrected image data voltage to the sub-pixel circuit using an external compensation method. Therefore, unlike the internal compensation method, the constant current generator data voltage is provided from the data driver.

[0408] In the embodiments, since the various embodiments relating to the arrangement of the circuits of the various drivers or the aforementioned driver 500 and the connections to the sub-pixel circuits formed on the TFT layer are the same as those described above in the description of the internal compensation method, repeated descriptions will be omitted.

[0409] Specifically, the driver 500 can set the image data voltage to the sub-pixel circuit of the display panel 100 in the order of the row lines during the data setting segment 61, so as to drive the display panel 100 by a progressive driving method.

[0410] To this end, driver 500 can apply control signals (which may be referred to as scan signals, and which include, for example, the SP described below) to the sub-pixel circuit of each row line in sequence during data setting segment 61 to set the image data voltage to the sub-pixel circuit.

[0411] (n), SPWM(n), and SCCG(n)).

[0412] Additionally, the driver 500 can drive the sub-pixel circuit based on the sweep signal and the set image data voltage during the light-emitting sections 62-1 to 62-7, so that the pixels of the pixel array emit light in the order of the rows.

[0413] For this purpose, the driver 500 can apply control signals (which may be referred to as transmit signals, and which include SET(n), Emi_PWM(n), Emi_PAM(n) and Sweep(n) as described below) to the sub-pixel circuit of each row line in the order of the row lines during the light-emitting sections 62-1 to 62-7.

[0414] In an embodiment, in the external compensation method, the sensing unit 200 should sense the current flowing in the driving transistor based on a specific voltage. To this end, the driver 500 can apply a control signal (which may be referred to as a sensing signal, and includes PWM_Sen(n) and CCG_Sen(n) as described below) to the sub-pixel circuitry of at least one row line for each image frame. Examples of this in more detail are described below.

[0415] The sensing unit 200 is a component for sensing the current flowing in the driving transistor included in the sub-pixel circuit and outputting sensing data corresponding to the sensed current.

[0416] If a current based on a specific voltage flows in the driving transistor, the sensing unit 200 can sense the current flowing in the driving transistor and convert the current into sensing data, and output the converted sensing data to the correction unit 300.

[0417] Here, the specific voltage is applied separately from the image data voltage to the sub-pixel circuit for sensing the current flowing in the drive transistor, and as described below, the specific voltage may include: a first specific voltage for sensing the current flowing in the drive transistor of the constant current generator circuit; and a second specific voltage for sensing the current flowing in the drive transistor of the PWM circuit.

[0418] The correction unit 300 is a component used to correct the image data voltage to be applied to the sub-pixel circuit based on the sensing data output from the sensing unit 200.

[0419] The correction unit 300 can correct the image data voltage by obtaining a compensation value for correcting the image data based on reference data per voltage and sensing data output from the sensing unit 200, and correcting the image data based on the obtained compensation value.

[0420] Here, the reference data for each voltage is the data of the reference current value flowing in the driving transistor when a specific voltage is applied to the driving transistor, and theoretically or experimentally, it can be calculated in advance and stored in advance in the form of a lookup table, but this disclosure is not limited thereto.

[0421] As described below, the reference data for each voltage may include first reference data corresponding to a first specific voltage and second reference data corresponding to a second specific voltage.

[0422] Reference data for each voltage can be pre-stored in various memories inside or outside the correction unit 300, and the correction unit 300 can load the reference data for each voltage from the memory when needed and use the data.

[0423] The following describes a specific example of how the correction unit 300 obtains compensation values ​​and corrects image data voltages by using reference data and sensing data per voltage.

[0424] The driver 500 (specifically, the data driver) can apply the image data voltage corrected as described above to the display panel 100, thereby compensating for deviations in the threshold voltage (Vth) and mobility (μ) of the driving transistor.

[0425] Figure 14 This is a detailed block diagram of a display device according to an embodiment of the present disclosure.

[0426] according to Figure 14 The display device 1000 includes a display panel 100, a sensing unit 200, a calibration unit 300, a timing controller (TCON) 400, and a driver 500.

[0427] The TCON 400 controls the overall operation of the display device 1000. Specifically, the TCON 400 can perform the sensing drive of the display device 1000. In addition, the TCON 400 can perform the display drive of the display device 1000.

[0428] Here, the sensing drive is a drive that updates compensation values ​​to compensate for deviations in the threshold voltage (Vth) and mobility (μ) of the driving transistors included in the display panel 100, and the display drive is a drive that displays an image on the display panel 100 based on the image data voltage that reflects the compensation values.

[0429] When the display driver is executed, TCON 400 provides image data of the input image to driver 500. In this case, the image data provided to driver 500 may be image data that has been corrected by correction unit 300.

[0430] The correction unit 300 can correct the image data of the input image based on the compensation value. In this case, the correction unit 300 can obtain the compensation value through the sensing drive described below.

[0431] like Figure 14 As shown, the correction unit 300 can be implemented as a functional module mounted on the TCON 400. However, this disclosure is not limited thereto, and the correction unit 300 can be mounted on a separate processor different from the TCON 400, and it can also be implemented as a separate chip of the application-specific integrated circuit (ASIC) or field-programmable gate array (FPGA) type.

[0432] The driver 500 can generate an image data voltage based on the image data provided from the TCON 400, and provide or apply the generated image data voltage to the display panel 100. Therefore, the display panel 100 can display an image based on the image data voltage provided from the driver 500.

[0433] In one embodiment, the driver 500 can generate a specific voltage based on specific voltage data provided from the TCON 400 and provide the generated specific voltage to the display panel 100. Therefore, current based on the specific voltage can flow in the driving transistors included in the sub-pixel circuit 110 of the display panel 100.

[0434] The sensing unit 200 can sense the current flowing in the driving transistor and output the sensing data to the correction unit 300, and the correction unit 300 can acquire or update the compensation value for correcting the image data based on the sensing data output from the sensing unit 200.

[0435] The following describes it in more detail. Figure 14 Examples of each component are shown.

[0436] The sub-pixel circuit 110 can provide drive current to the inorganic light-emitting element 120 during display driving. Specifically, the sub-pixel circuit 110 can provide the inorganic light-emitting element 120 with a drive current whose amplitude and duration are controlled based on the image data voltage (e.g., constant current generator data voltage and PWM data voltage) applied from the driver 500.

[0437] In the embodiments, although not shown in the figures, the constant current generator circuit 111 and the PWM circuit 112 each include a driving transistor. Hereinafter, for ease of explanation, the driving transistor included in the constant current generator circuit 111 will be referred to as the first driving transistor, and the driving transistor included in the PWM circuit 112 will be referred to as the second driving transistor.

[0438] When the sensing drive is executed, if a first specific voltage is applied to the constant current generator circuit 111, a first current corresponding to the first specific voltage flows in the first drive transistor, and if a second specific voltage is applied to the PWM circuit 12, a second current corresponding to the second specific voltage flows in the second drive transistor.

[0439] Therefore, the sensing unit 200 can sense the first current and the second current respectively, and output the first sensing data corresponding to the first current and the second sensing data corresponding to the second current to the correction unit 300 respectively. For this purpose, the sensing unit 200 may include a current detector and an analog-to-digital converter (ADC). Here, the current detector can be implemented by using a current integrator including an operational amplifier (OP-AMP) and a capacitor, but this disclosure is not limited thereto.

[0440] The correction unit 300 can correct the image data voltage applied to the sub-pixel circuit 110 based on the sensing data.

[0441] Specifically, the correction unit 300 can identify a first reference data value corresponding to a first specific voltage in the reference data of each voltage, compare the identified first reference data value with a first sensing data value output from the sensing unit 200, and calculate or obtain a first compensation value for correcting the constant current generator data voltage.

[0442] In addition, the correction unit 300 can identify a second reference data value corresponding to a second specific voltage in the sensing data of each voltage, compare the identified second reference data value with the second sensing data value output from the sensing unit 200, and calculate or obtain a second compensation value for correcting the PWM data voltage.

[0443] As described above, the first compensation value and the second compensation value obtained as described above can be stored or updated in the memory inside or outside the correction unit 300, and can be used when correcting the image data voltage when the display driver is subsequently executed.

[0444] Specifically, the correction unit 300 can correct the image data voltage applied to the sub-pixel circuit 110 by using a compensation value to correct the image data to be provided to the driver 500 (specifically, the data driver). When the data driver provides the image data voltage to the sub-pixel circuit 110 based on the input image data, the correction unit 300 can correct the image data voltage applied to the sub-pixel circuit 110 by correcting the image data value.

[0445] That is, when the display driver is executed, the correction unit 300 can correct the constant current generator data value in the image data based on the first compensation value. Additionally, the correction unit 300 can correct the PWM data value in the image data based on the second compensation value. Therefore, the correction unit 300 can provide the driver 500 with corrected constant current generator data and PWM data, thereby correcting the constant current generator data voltage and PWM data voltage applied to the sub-pixel circuit 110, respectively.

[0446] In an embodiment, driver 500 may include gate drivers for driving pixels on a pixel array on a row-line basis, providing scan signals and transmit signals. Here, in various embodiments, for distinction from each other, the gate driver providing the scan signal may be referred to as a scan driver, and the gate driver providing the transmit signal may be referred to as a transmit driver.

[0447] Additionally, driver 500 may include a data driver for providing image data voltages (e.g., constant current generator data voltages and PWM data voltages) and specific voltages (e.g., a first specific voltage and a second specific voltage) to the sub-pixel circuit. In this case, the data driver may include a digital-to-analog converter (DAC) for converting the image data and specific voltage data provided from TCON 400 into image data voltages and specific voltages, respectively.

[0448] Figure 15a and Figure 15b This is a diagram illustrating an implementation example of the sensing unit 200. (Reference) Figure 15a and Figure 15b The display panel 100 includes a plurality of pixels arranged in each region where a plurality of data lines (DL) and a plurality of scan lines (SCL) intersect in a matrix.

[0449] In this configuration, each pixel may include three sub-pixels such as R, G, and B. Additionally, as described above, the display panel 100 may include inorganic light-emitting elements 120 of colors corresponding to the sub-pixels, and sub-pixel circuitry 110 provided for each inorganic light-emitting element.

[0450] Here, the data line (DL) is a wiring used to apply image data voltage (specifically, constant current generator data voltage and PWM data voltage) or specific voltage (specifically, first specific voltage and second specific voltage) from the data driver 510 to each sub-pixel circuit 110 of the display panel 100, and the scan line (SCL) is a wiring used to apply scan signal or transmit signal from the gate driver 520 to each sub-pixel circuit 110 of the display panel 100 and drive the pixel (or sub-pixel) on a row line basis.

[0451] Therefore, an image data voltage or a specific voltage applied from the data driver 510 via a data line (DL) can be applied to the sub-pixel circuit of the row line selected by the scan signal (e.g., SPWM(n), SCCG(n), and SP(n)) applied from the gate driver 520.

[0452] In this configuration, the voltages (image data voltages and specific voltages) to be applied to each of the R, G, and B sub-pixels can be time-division multiplexed and applied to each pixel of the display panel 100. In an embodiment, the time-division multiplexed voltages can be applied to the corresponding sub-pixel circuits separately via a DeMUX circuit.

[0453] Depending on the implementation, with Figure 15a and Figure 15b Unlike other methods, separate data lines can be provided for each of the R, G, and B sub-pixels. In this case, the voltage (image data voltage and specific voltage) to be applied to each of the R, G, and B sub-pixels can be applied simultaneously to the corresponding sub-pixel via the corresponding data lines. In this case, a DeMUX circuit is not required.

[0454] This is the same for sensing lines (SSL). That is, according to embodiments of this disclosure, such as Figure 15a and Figure 15b As shown, a sensing line (SSL) can be set for each column line of a pixel. In this case, the operation of the sensing unit 200 for each of the R, G, and B sub-pixels requires a DeMUX circuit.

[0455] In addition, with Figure 15a and Figure 15b Unlike the illustrated embodiment, where sensing lines (SSLs) are arranged in units of column lines of subpixels, the operation of the sensing unit 200 for each of the R, G, and B subpixels does not require a separate DeMUX circuit. However, compared to Figure 15a and Figure 15b Compared to the embodiment shown, the sensing unit 200 described below will require more than three times the number of unit components.

[0456] In the embodiments, in Figure 15a and Figure 15b For ease of illustration, only one scan line (SCL) is shown for each row line. However, the actual number of scan lines can vary in any way depending on the driving method or implementation example of the pixel circuitry 110 included in the display panel 100. For example, for each row line, separate settings can be provided for providing the aforementioned scan signals (SPWM(n), SCCG(n), and SP(n)) or transmit signals (SET(n), Emi_PWM).

[0457] The scan lines of (n), Emi_PAM(n) and Sweep(n)).

[0458] In this embodiment, the first current and the second current flowing in the first driving transistor and the second driving transistor based on the specific voltage described above can be transmitted to the sensing unit 200 via a sensing line (SSL). Therefore, the sensing unit 200 can sense each of the first current and the second current, and output the first sensing data corresponding to the first current and the second sensing data corresponding to the second current to the correction unit 300, respectively.

[0459] In this case, according to embodiments of this disclosure, such as Figure 15a As shown, the sensing unit 200 can be implemented as an integrated circuit (IC) separate from the data driver 510, or as... Figure 15b As shown, the sensing unit 200 can be implemented as a single IC together with the data driver 510.

[0460] As described above, the correction unit 300 can correct the constant current generator data voltage based on the first sensing data output from the sensing unit 200, and correct the PWM data voltage based on the second sensing data.

[0461] In the embodiments, in Figure 15a and Figure 15b The example presented is that the first current and the second current are transmitted to the sensing unit 200 via a sensing line (SSL) separate from the data line (DL). However, the embodiments are not limited to this. For example, in... Figure 15b In the case where the data driver 510 and the sensing unit 200 are implemented as a single IC, it is possible to transmit the first current and the second current to the sensing unit 200 via the data line (DL) without a sensing line (SSL).

[0462] Figure 16a This is a detailed circuit diagram of the sub-pixel circuit 110 and the sensing unit 200 according to embodiments of the present disclosure. Figure 16a Specifically, circuitry associated with a sub-pixel (i.e., an inorganic light-emitting element 120), a sub-pixel circuit 110 for driving the inorganic light-emitting element 120, and a unit assembly for sensing the current flowing in the driving transistors T3 and T9 included in the sub-pixel circuit 110 are shown.

[0463] according to Figure 16a The sub-pixel circuit 110 may include a constant current generator circuit 111, a PWM circuit 112, a drive voltage changing unit 113, a first switching transistor T10, a second switching transistor T11, a transistor T12, a transistor T13, and a transistor T14.

[0464] The constant current generator circuit 111 includes: a first driving transistor T9; a capacitor C2 connected between the source terminal and the gate terminal of the first driving transistor T9; and a transistor T7 controlled to be turned on / off according to the scan signal SP(n), and used to apply a constant current generator data voltage applied through the data signal line Vdata_ccg to the gate terminal of the first driving transistor T9 when it is turned on.

[0465] The drive voltage changing unit 113 can change the drive voltage applied to the first drive transistor T9. Specifically, according to the control of the driver 500, the drive voltage changing unit 113 can apply a second drive voltage (VDD_PWM) to the source terminal of the first drive transistor T9 during the data setting section, and apply a second drive voltage (VDD_PWM) to the source terminal of the first drive transistor T9 during the light emission section.

[0466] The first driving voltage (VDD_PAM) is applied to the source terminal.

[0467] Therefore, the drive voltage changing unit 113 may include transistors T6 and T8 connected as shown in the figure.

[0468] In this embodiment, a first driving voltage (VDD_PAM) and a second driving voltage (VDD_PWM) can be applied to the sub-pixel circuit 110 from the power supply IC via separate wiring. Therefore,

[0469] They will not affect each other. Furthermore, the first drive voltage (VDD_PAM) and the second drive voltage (VDD_PWM) can be voltages of the same amplitude, but this disclosure is not limited thereto.

[0470] The PWM circuit 112 includes: a second driving transistor T3; a capacitor C1 for coupling a sweep signal to the gate terminal of the second driving transistor T3, the sweep signal being a voltage signal sweeping between two different voltages (SW_VGH and SW_VGL); and a transistor T2, which is controlled to be turned on / off according to the sweep signal SP(n), and is used to apply a PWM data voltage applied through the data signal line Vdata_pwm to the gate terminal of the second driving transistor T3 when it is turned on.

[0471] In this embodiment, the PWM circuit 112 includes a reset unit 13. The reset unit 13 is a component for forcibly turning on the first switching transistor T10 before the start of each light-emitting segment. The configuration and operation of the reset unit 13 are the same as those described above in the description of embodiments related to the internal compensation method.

[0472] In this embodiment, the drain terminal of the second driving transistor T3 is connected to the gate terminal of the first switching transistor T10 via a transistor T4 that is turned on according to the emission signal Emi_PWM(n). The PWM circuit 112 can control the on / off operation of the first switching transistor T10 by the operation of the reset unit 13 and the on / off operation of the second driving transistor T3, thereby controlling the time for the driving current to flow in the inorganic light-emitting element 120 in the light-emitting section.

[0473] In this embodiment, the PWM circuit 112 includes a transistor T1. In this embodiment, when transistor T1 is turned on according to the SP(n) signal, a high voltage (SW_VGH) of the sweep signal is applied to node X. This operation minimizes the brightness inhomogeneity and horizontal crosstalk that may be caused by the sweep load. An example of this is described in more detail below.

[0474] The source terminal of the second switching transistor T11 is connected to the drain terminal of the first switching transistor T10, and the drain terminal of the second switching transistor T11 is connected to the anode terminal of the inorganic light-emitting element 120. The second switching transistor T11 can be turned on / off according to the control signal Emi_PAM(n), and electrically connects / disconnects the first switching transistor T10 and the inorganic light-emitting element 120. The on / off timing of the second switching transistor T11 is related to the implementation of black grayscale, and an example of it is described in more detail below.

[0475] Transistor T12 is connected between the anode and cathode terminals of the inorganic light-emitting element 120. Transistor T12 can be used for different purposes before and after the inorganic light-emitting element 120 is mounted on the TFT layer described below and electrically connected to the sub-pixel circuit 110.

[0476] For example, before the inorganic light-emitting element 120 and the sub-pixel circuit 110 are connected to each other, the transistor T12 can be turned on according to a control signal (test) to check whether the sub-pixel circuit 110 is abnormal.

[0477] Furthermore, after the inorganic light-emitting element 120 and the sub-pixel circuit 110 are connected to each other, the transistor T12 can function as a discharge transistor. That is, the transistor T12 can be turned on according to the control signal (discharge) to discharge the remaining charge in the inorganic light-emitting element 120.

[0478] When transistor T12 is turned on, the anode and cathode terminals of inorganic light-emitting element 120 are short-circuited, thus eliminating the potential difference between the two ends of inorganic light-emitting element 120.

[0479] Here, the discharge signal is not applied to the gate signal of the display panel 100 in the order of the row lines, but is a global signal applied to all row lines of the display panel 100 simultaneously and equally.

[0480] The source terminal of transistor T14 is connected to the drain terminal of the first driving transistor T9, and the drain terminal of transistor T14 is connected to the sensing unit 200. Transistor T14 can be turned on according to the control signal CCG_Sen(n) when performing sensing drive, and sends a first current flowing in the first driving transistor T9 to the sensing unit 200 through the sensing line (SSL).

[0481] The source terminal of transistor T13 is connected to the drain terminal of the second driving transistor T3, and the drain terminal of transistor T13 is connected to the sensing unit 200. Transistor T13 can be turned on according to the control signal PWM_Sen(n) during sensing drive, and sends a second current flowing in the second driving transistor T3 to the sensing unit 200 through the sensing line (SSL).

[0482] The cathode terminal of the inorganic light-emitting element 120 is connected to the ground voltage (VSS) terminal.

[0483] In the embodiments, according to Figure 16a The sensing unit 200 includes a current integrator 210 and an analog-to-digital converter (ADC) 220. The current integrator 210 may include an amplifier 211, an integrating capacitor 212, a first switch 213, and a second switch 214.

[0484] Amplifier 211 may include: an inverting input terminal (-) connected to the sensing line (SSL) and receiving inputs of a first current and a second current flowing in the first driving transistor T9 and the second driving transistor T3 of the sub-pixel circuit 110; a non-inverting input terminal (+) receiving inputs of a reference voltage (Vpre); and an output terminal (Vout).

[0485] An integrating capacitor 212 can be connected between the inverting input terminal (-) and the output terminal (Vout) of amplifier 211, and a first switch 213 can be connected to both ends of the integrating capacitor 212. In an embodiment, the two ends of a second switch 214 can be connected to the output terminal (Vout) of amplifier 211 and the input terminal of ADC 220, respectively, and the second switch 214 can be switched according to the control signal Sam.

[0486] In this embodiment, settings can be configured for each sensing line (SSL). Figure 16aThe sensing unit 200 shown is a unit component. Therefore, for example, if a sensing line is provided for each column line of pixels in the display panel 100, including 480 pixel column lines, the sensing unit 200 may include 480 of the aforementioned unit components. As another example, if a sensing line is provided for each column line of R, G, and B sub-pixels in the display panel 100, including 480 pixel column lines, the sensing unit 200 may include 1440 (=480*3) of the aforementioned unit components.

[0487] Figure 16b It is used to drive during image frame periods and blanking intervals, including Figure 16a The diagram shows the timing of various signals of the display panel, including the sub-pixel circuitry and sensing units. Specifically, Figure 16b Various control signals, drive voltage signals, and data signals applied to the subpixel circuit 110 during an image frame period and blanking interval are shown.

[0488] refer to Figure 16b The display panel 100 can be driven in the order of display driver and sensor driver.

[0489] like Figure 16b As shown, during the display driving period, control signals SP, SET, Emi_PWM, Emi_PAM, and Sweep are applied to the display panel 100. For example, as... Figure 16b As shown, during the display driving period, control signals SP(n), SET(n), Emi_PWM(n), and Emi_PAM can be applied to the sub-pixel circuit 110 included in the nth row line of the display panel.

[0490] (n) and Sweep(n).

[0491] As described above, the sub-pixel circuits included in each row line of the display panel 100 can be driven in the order of the data setting sections and multiple light-emitting sections. Alternatively, the entire sub-pixel circuit of the display panel 100 can be driven in the order of the row lines.

[0492] refer to Figure 16b As can be seen from the perspective of a row line (e.g., the nth row line), after applying the scan signal SP(n) related to the image data voltage setting operation, the transmit signals SET(n) and Emi_PWM(n) related to the drive current supply operation are applied multiple times.

[0493] Emi_PAM(n) and Sweep(n).

[0494] Furthermore, considering the relationship between the row lines, it can be seen that the scan signal SP(n) for the nth row line and the scan signal SP(n+1) for the (n+1)th row line are applied sequentially according to the row line order. Therefore, it can also be seen that the transmit signals SET(n), Emi_PWM(n), Emi_PAM(n), and Sweep(n) for the nth row line and the transmit signals SET(n+1), Emi_PWM(n+1), Emi_PAM(n+1), and Sweep(n+1) for the (n+1)th row line are applied sequentially according to the row line order.

[0495] In the following text, references and Figure 16b The control signals SP(n), SET(n), Emi_PWM(n), EMi_PAM(n), and Sweep(n) related to the nth row line, and Figure 16a The circuit in the diagram is used to illustrate the detailed operation of the sub-pixel circuit 110.

[0496] First, in the data setting section, if a scan signal SP(n) with a low level is applied to the sub-pixel circuit 110, the transistor T2 of the PWM circuit 112, the transistor T7 of the constant current generator circuit 111, and the transistor T6 of the drive voltage changing unit 113 are turned on.

[0497] When transistor T2 is turned on, a PWM data voltage (PWM data) applied from the second data driver is applied to the gate terminal (hereinafter referred to as node A) of the second driving transistor T3 through the data signal line Vdata_pwm.

[0498] When a second driving voltage (VDD_PWM) is applied to the source terminal of the second driving transistor T3, a voltage corresponding to the difference between the PWM data voltage and the second driving voltage (VDD_PWM) is set between the gate terminal and the source terminal of the second driving transistor T3.

[0499] In this scenario, assuming the threshold voltage of the second driving transistor T3 is 0 [V], the PWM data voltage can be higher than the second driving voltage (VDD_PWM). Therefore, when the PWM data voltage is set to node A, the second driving transistor T3 remains off. (This is because a PMOSFET turns on when a voltage less than the threshold voltage is applied between its gate and source terminals, and turns off when a voltage exceeding the threshold voltage is applied.)

[0500] In this embodiment, when transistor T7 is turned on, a constant current generator data voltage (CCG data) applied from the first data driver is applied to the gate terminal (hereinafter referred to as node B) of the first driving transistor T9 via the data signal line Vdata_ccg.

[0501] Since transistor T6 of drive voltage changing unit 113 is also turned on according to scan signal SP(n), a second drive voltage (VDD_PWM) is applied to the source terminal of first drive transistor T9 during the data setting segment. Therefore, a voltage corresponding to the difference between the constant current generator data voltage and the second drive voltage (VDD_PWM) is set between the gate terminal and the source terminal of first drive transistor T9.

[0502] In this scenario, assuming the threshold voltage of the first driving transistor T9 is 0 [V], the constant current generator data voltage can be lower than the second driving voltage (VDD_PWM). Therefore, with the constant current generator data voltage set to node B, the first driving transistor T9 remains on. (This is because a PMOSFET turns on when a voltage less than its threshold voltage is applied between its gate and source terminals, and turns off when a voltage exceeding the threshold voltage is applied.)

[0503] In this embodiment, when the first light-emitting segment of the nth row begins, a low-level emission signal SET(n) is applied to transistor T5. Therefore, Vset, as a low voltage, is charged in capacitor C3 through the conducting transistor T5, and a low voltage is applied to the gate terminal (hereinafter referred to as node C) of the first switching transistor T10, and the first switching transistor T10 is turned on.

[0504] Subsequently, as Figure 16b As shown, during the first light-emitting segment, emission signals Emi_PWM(n), Emi_PAM(n), and Sweep(n) are applied to the sub-pixel circuit 110.

[0505] Specifically, when a low-level transmit signal Emi_PWM(n) is applied to transistor T8 of drive voltage changing unit 113, transistor T8 is turned on, and a first drive voltage (VDD_PAM) is applied to the source terminal of the first drive transistor T9.

[0506] In this situation, even if the voltage applied to the source terminal of the first driving transistor T9 changes from the second driving voltage (VDD_PWM) to the first driving voltage (VDD_PAM), the voltage between the source terminal and the gate terminal of the first driving transistor T9 can be maintained as set in the data setting section by capacitor C2. Therefore, the first driving transistor T9 can still remain in the on state.

[0507] In an embodiment, the second switching transistor T11 is turned on when a low-level transmit signal Emi_PAM(n) is applied to the second switching transistor T11.

[0508] Finally, a first driving voltage (VDD_PAM) is applied to the anode terminal of the inorganic light-emitting element 120 through the transistor T8 which is turned on according to the Emi_PWM(n) signal, the first driving transistor T9 which remains on, the first switching transistor T10 which is turned on according to the SET(n) signal, and the second switching transistor T11 which is turned on according to the Emi_PAM(n) signal, and driving current flows in the inorganic light-emitting element 120.

[0509] In this case, the magnitude of the drive current is determined by the voltage difference between the gate terminal and the source terminal of the first drive transistor T9, specifically by the magnitude of the constant current generator data voltage applied to the gate terminal of the first drive transistor T9.

[0510] In an embodiment, if a transmit signal Sweep(n) is applied to capacitor C1 (for example, such as...), Figure 16b If the applied sweep voltage decreases linearly (as shown), then the applied sweep voltage is coupled to node A, and therefore the voltage at node A also decreases linearly.

[0511] Therefore, when the difference between the voltage at node A and the second driving voltage (VDD_PWM) reaches the threshold voltage of the second driving transistor T3, the second driving transistor T3 turns on, and a high-level second driving voltage (VDD_PWM) is applied to the gate terminal of the first switching transistor T10 through the turned-on second driving transistor T3. (In this case, according to the low-level transmit signal Emi_PWM(n), transistor T4 is obviously also in the turned-on state.)

[0512] Therefore, the first switching transistor T10 is turned off, and the drive current can no longer flow to the inorganic light-emitting element 120, and the inorganic light-emitting element 120 begins to stop emitting light. In this case, the time for the drive current to flow in the inorganic light-emitting element 120 is determined by the voltage difference between the gate terminal and the source terminal of the second driving transistor T3, specifically by the amplitude of the PWM data voltage set to the gate terminal of the second driving transistor T3.

[0513] In the embodiment, in the light-emitting segments following the second light-emitting segment for the nth row, the emission signals SET(n), Emi_PWM(n), Emi_PAM(n), and Sweep(n) are applied identically, respectively. Therefore, the inorganic light-emitting element 120 of the nth row begins to emit light identically based on the image data voltage set in the data setting segment.

[0514] The above description only covers the operations related to the nth row, but the operations for the remaining rows can be fully understood through the foregoing explanation.

[0515] In the embodiments, please refer to the detailed reference. Figure 16b As can be seen from the timing diagram, there is a difference between the timing when Emi_PWM(n) goes low and the timing when Emi_PAM(n) goes low. This is to achieve black grayscale in the internal compensation method, as described above.

[0516] Specifically, when the PWM data voltage corresponding to the black grayscale is set to node A, the first switching transistor T10 should be turned off once the light-emitting segment begins. That is, theoretically, at the point when the transmitted signal Emi_PWM(n) goes low, the second driving voltage (VDD_PWM) is applied to node C through the turned-on second driving transistor T3 and the turned-on transistor T4, and the first switching transistor T10 should be turned off immediately. (If the first switching transistor T10 is turned off immediately, the driving current may not flow in the inorganic light-emitting element 120 at all, and a black grayscale can be exhibited.)

[0517] However, in reality, there is a time required before the second drive voltage (VDD_PWM) is charged to node C, and the first switching transistor T10 does not immediately turn off. Specifically, after the second drive voltage (VDD_PWM) is applied to node C and charging of capacitor C3 begins, and until the voltage at which the first switching transistor T10 can be turned off is charged to node C, the first switching transistor T10 remains on, and therefore, leakage current is supplied from the first switching transistor T10 to the inorganic light-emitting element 120.

[0518] Ultimately, with the first switching transistor T10 and the inorganic light-emitting element 120 directly connected without the second switching transistor T11, even when the PWM data voltage corresponding to the black grayscale is set to node A, the current leaking from the first switching transistor T10 flows in the inorganic light-emitting element 120 during a certain period of time, thus causing a problem in correctly achieving the black grayscale.

[0519] To address this problem, according to embodiments of this disclosure, a second switching transistor T11 can be arranged between the first switching transistor T10 and the inorganic light-emitting element 120, and the driver 500 can apply a transmit signal Emi_PAM(n) such that the second switching transistor T11 turns on after a specific time elapsed from the point when the transmit signal Emi_PWM(n) becomes low. Here, the specific time can be greater than or equal to the time it takes for the voltage at node C to charge from the Vset voltage to a level that allows the first switching transistor T10 to turn off.

[0520] Therefore, even if the PWM data voltage corresponding to black grayscale is set to node A, the leakage current generated because the first switching transistor T10 does not immediately turn off can be blocked by the second switching transistor T11. Thus, black grayscale can be achieved more accurately.

[0521] In the embodiment, in each light-emitting segment, even if the second switching transistor T11 is turned off before the first switching transistor T10 is turned off by adjusting the driving timing of the Emi_PWM(n) signal and the Emi_PAM(n) signal as described above, the leakage current (e.g., the cutoff current) of the second switching transistor T11 can be provided to the inorganic light-emitting element 120.

[0522] If charge accumulates in the junction capacitance assembly of the inorganic light-emitting element 120 due to this leakage current, and a voltage greater than or equal to the positive voltage is applied to the two ends of the inorganic light-emitting element 120, the leakage current can flow in the inorganic light-emitting element 120 and cause problems when achieving black grayscale.

[0523] Therefore, according to embodiments of this disclosure, the potential difference between the two ends of the inorganic light-emitting element can be removed by applying a discharge signal with a low level to the gate terminal of the transistor T12 within the non-light-emitting section 67, such as... Figure 16b As shown. Therefore, it can be ensured that black grayscale is implemented more accurately.

[0524] exist Figure 16b The example provided describes performing an operation to discharge residual charge in an inorganic light-emitting element (e.g., to remove the potential difference between the two ends of the inorganic light-emitting element) once per image frame within a non-light-emitting segment 67 existing within a blanking interval 65. However, the embodiments are not limited thereto, and as described above... Figures 7a to 7d As described above, depending on the product, this operation can obviously be performed in various ways and in various situations.

[0525] In the embodiment, reference Figure 16a and Figure 16b It can be seen that in the source terminal of the first driving transistor T9 in the constant current generator circuit 111, different driving voltages are applied to the data setting section and the light emission section through the driving voltage changing unit 113.

[0526] This is to apply a second drive voltage (VDD_PWM) to the constant current generator circuit 111 during data setting, which will not result in a voltage drop due to the drive current, thereby setting the correct voltage between the gate terminal and the source terminal of the first drive transistor T9.

[0527] Specifically, as described above, a resistive component is present in the display panel 100. Therefore, when the drive current flows, an IR drop occurs, which causes a drop in the first drive voltage (VDD_PAM). Furthermore, in various embodiments of this disclosure, the display panel 100 is driven using a progressive driving method. Therefore, while some row line sub-pixel circuits operate in the light-emitting section, the sub-pixel circuits of other row lines operate in the data setting section.

[0528] Therefore, when the first driving voltage (VDD_PAM) is applied equally to the constant current generator circuit 111 in both the data setting section and the light-emitting section, the first driving voltage (VDD_PAM) applied to the constant current generator circuit 111 of the row line operating in the light-emitting section is affected by the decrease in the first driving voltage (VDD_PAM) caused by the constant current generator circuit 111 of the row line operating in the data setting section. This prevents the correct constant current generator data voltage from being set to the constant current generator circuit 111 of the row line operating in the data setting section.

[0529] Furthermore, the resistive components present in the actual display panel 100 have different values ​​for each area of ​​the display panel 100. Therefore, when the drive current flows, the IR drop value (i.e., the degree of drop in the first drive voltage (VDD_PAM) for each area of ​​the display panel 100) varies, and this also needs to be compensated for.

[0530] To address the IR drop problem described above, according to an embodiment of this disclosure, the driver 500 may control the drive voltage changing unit 113 such that a second drive voltage (VDD_PWM) without voltage drop according to the drive current is applied to the constant current generator circuit 111 during the data setting segment.

[0531] Therefore, during the data setting segment, the constant current generator data voltage can be set to the constant current generator circuit 111 based on the second drive voltage (VDD_PWM).

[0532] Subsequently, during the light-emitting section, the driving voltage applied to the constant current generator circuit 111 is changed to the first driving voltage (VDD_PAM). However, the voltage between the gate terminal and the source terminal of the first driving transistor T9 set in the data setting section is kept as is by capacitor C2. Therefore, the correct constant current generator data voltage can be set to the constant current generator circuit 111, regardless of whether there is a drop in the first driving voltage (VDD_PAM) or the degree of drop.

[0533] In this embodiment, the drive current does not flow in the second drive transistor T3 of the PWM circuit 112. Therefore, during the data setting segment and the light-emitting segment, there is no voltage drop in the second drive voltage (VDD_PWM), or even if there is a voltage drop, it is at a negligible level. Therefore, even if the second drive voltage (VDD_PWM) is applied equally in both the data setting segment and the light-emitting segment in the PWM circuit 112, this will not cause a problem.

[0534] In this embodiment, in the same manner as the aforementioned internal compensation method, the same constant current generator data voltage can be used for each type of sub-pixel or for all sub-pixels in the external compensation method. Therefore, the inorganic light-emitting element 120 can be supplied with a driving current (e.g., a constant current) of the same magnitude through the constant current generator circuit 111, and thus the problem of the LED's wavelength varying according to the magnitude of the driving current can be solved.

[0535] In the above description, for ease of explanation, the application of the same constant current generator data voltage to the constant current generator circuit 111 was described from the perspective of solving the problem of LED wavelength variation. However, in the external compensation method, the constant current generator data voltage is corrected to compensate for the deviation in threshold voltage and mobility between the first drive transistors T9. Therefore, a constant current generator data voltage with its corrected value is applied to the constant current generator circuit 111 by sensing the drive. Thus, unlike the internal compensation method which applies the constant current generator data voltage from the power supply IC that provides DC voltage, the constant current generator data voltage is applied from the data driver in the external compensation method.

[0536] Refer again Figure 16b The sensing drive period may include the sensing period of PWM circuit 112 (①) and the sensing period of constant current generator circuit 111 (②).

[0537] During the sensing period (①) of the PWM circuit 112, a second current flowing in the second driving transistor T3 based on the second specific voltage is sent to the sensing unit 200.

[0538] During the sensing period (②) of the constant current generator circuit 111, a first current flowing in the first driving transistor T9 based on a first specific voltage is sent to the sensing unit 200.

[0539] Therefore, the sensing unit 200 can output first sensing data and second sensing data respectively based on the first current and the second current.

[0540] In this case, according to embodiments of this disclosure, such as Figure 16b As shown, sensing can be performed within a blanking interval of 65.

[0541] Therefore, the sensing unit 200 can sense the current flowing in the driving transistors T9 and T3 based on a specific voltage applied within the blanking interval 65 of an image frame, and output sensing data corresponding to the sensed current.

[0542] However, the embodiments are not limited to this. For example, the sensing drive can be performed during the startup period, power-off period, or screen-off period of the display device 1000. Here, the startup period can refer to the period from when system power is applied until the screen is turned on, the power-off period can refer to the period from when the screen is turned off until the system power is released, and the screen-off period can refer to the period when system power is applied but the screen is turned off.

[0543] In the following text, see references Figure 16a and Figure 16b An example of the operation of the display device 1000 during the sensing drive period is described in more detail.

[0544] Specifically, during the sensing period (①) of the PWM circuit 112, a second specific voltage is applied from the second data driver to the data signal line Vdata_pwm. The second specific voltage can be any predetermined voltage used to turn on the second driving transistor T3. In this case, transistor T2 is turned on according to the scan signal SP(n), and the second specific voltage is input to node A through the turned-on transistor T2.

[0545] During the sensing period (①) of the PWM circuit 112, transistor T13 is turned on according to the control signal PWM_Sen(n), and a second current flowing in the second driving transistor T3 is sent to the sensing unit 200 through the turned-on transistor T13.

[0546] In this embodiment, during the sensing period (①) of the PWM circuit 112, the first switch 213 of the sensing unit 200 is turned on and off according to the control signal Spre. Hereinafter, the first initialization period will be referred to as the period during which the first switch 213 is turned on during the sensing period (①) of the PWM circuit 112, and the first sensing period will be referred to as the period during which the first switch 213 is turned off.

[0547] When the first switch 213 is in the on state during the first initialization period, the reference voltage (Vpre) input to the non-inverting input terminal (+) of the amplifier 211 is maintained in the output terminal (Vout) of the amplifier 211.

[0548] During the first sensing period, the first switch 213 is turned off, so the amplifier 211 operates as a current integrator and integrates the second current. In this case, the voltage difference across the integrating capacitor 212 increases as the sensing time progresses, i.e., as the amount of accumulated charge increases, due to the second current introduced into the inverting input terminal (-) of the amplifier 211 during the first sensing period.

[0549] However, due to the virtual grounding characteristic of amplifier 211, the voltage at the inverting input terminal (-) remains at the reference voltage (Vpre) regardless of the increase in the voltage difference across the integrating capacitor 212 during the first sensing period. Therefore, the voltage at the output terminal (Vout) of amplifier 211 becomes lower corresponding to the voltage difference across the integrating capacitor 212.

[0550] Based on this principle, during the first sensing period, the second current introduced into the sensing unit 200 is accumulated through the integrating capacitor 212 as an integral value Vpsen, which is a voltage value. Since the voltage drop gradient at the output terminal (Vout) of the amplifier 211 increases as the second current increases, the magnitude of the integral value Vpsen decreases as the second current increases.

[0551] When the second switch 214 remains on during the first sensing period, the integral value Vpsen is input into the ADC 220, and it is converted into second sensing data at the ADC 220 and then output to the correction unit 300.

[0552] In this embodiment, during the sensing period (②) of the constant current generator circuit 111, a first specific voltage is applied from the first data driver to the data signal line Vdata_ccg. The first specific voltage is any predetermined voltage used to turn on the first driving transistor T9. In this case, transistor T7 is turned on according to the scan signal SP(n), and the first specific voltage is input to node B through the turned-on transistor T7.

[0553] During the sensing period (②) of the constant current generator circuit 111, transistor T14 is turned on according to the control signal CCG_Sen(n), and the current is transmitted to the sensing circuit through the turned-on transistor T14.

[0554] Unit 200 sends a first current flowing in the first driving transistor T9.

[0555] In this embodiment, during the sensing period (②) of the constant current generator circuit 111, the first switch 213 of the sensing unit 200 is also turned on and off according to the control signal Spre. Hereinafter, the second initialization period will be described with reference to the period during which the first switch 213 is turned on during the sensing period (②) of the constant current generator circuit 111, and the second sensing period will be described with reference to the period during which the first switch 213 is turned off.

[0556] When the first switch 213 is in the on state during the second initialization period, the reference voltage (Vpre) input to the non-inverting input terminal (+) of the amplifier 211 is maintained in the output terminal (Vout) of the amplifier 211.

[0557] During the second sensing period, the first switch 213 is turned off, so the amplifier 211 operates as a current integrator and integrates the first current. In this case, the voltage difference across the integrating capacitor 212 increases as the sensing time progresses, i.e., as the amount of accumulated charge increases, due to the first current introduced into the inverting input terminal (-) of the amplifier 211 during the second sensing period.

[0558] However, due to the virtual grounding characteristic of amplifier 211, the voltage at the inverting input terminal (-) remains at the reference voltage (Vpre) regardless of the increase in the voltage difference across the integrating capacitor 212 during the second sensing period. Therefore, the voltage at the output terminal (Vout) of amplifier 211 becomes lower corresponding to the voltage difference across the integrating capacitor 212.

[0559] Based on this principle, during the second sensing period, the first current introduced into the sensing unit 200 is accumulated through the integrating capacitor 212 as an integral value Vcsen, which is a voltage value. Since the voltage drop gradient at the output terminal (Vout) of the amplifier 211 increases as the first current increases, the magnitude of the integral value Vcsen decreases as the first current increases.

[0560] When the second switch 214 remains on during the second sensing period, the integral value Vcsen is input to the ADC 220, and it is converted into the first sensing data at the ADC 220 and then output to the correction unit 300.

[0561] Therefore, as described above, the correction unit 300 can obtain a first compensation value and a second compensation value based on the reference data of each voltage stored in the memory and the first sensing data and the second sensing data output from the sensing unit 200, respectively, and store or update the obtained first compensation value and second compensation value in the memory. Subsequently, when the display drive is executed, the correction unit 300 can correct the constant current generator data voltage and PWM data voltage to be applied to the sub-pixel circuit 110 based on the first compensation value and the second compensation value, respectively.

[0562] In an embodiment, according to an embodiment of the present disclosure, a first specific voltage and a second specific voltage can be applied to the sub-pixel circuit of a row line in each image frame. That is, according to an embodiment of the present disclosure, the aforementioned sensing drive can be performed for a row line in each image frame.

[0563] In this case, the aforementioned sensing drive can be performed sequentially according to the row lines of the display panel 100. Therefore, for example, if the display panel 100 consists of 270 row lines, the sub-pixel circuits of the first row line can be sensed and driven after the first image frame is displayed, and the sub-pixel circuits included in the second row line can be sensed and driven after the second image frame is displayed. In this way, the sub-pixel circuits of the 270th row line can be sensed and driven after the 270th image frame is displayed, thus completing one sensing drive of the sub-pixel circuits included in all the row lines included in the display panel 100.

[0564] In this embodiment, the aforementioned sensing can be performed in a random order of the row lines. In this case, in the example above, all the row lines of the display panel 100 can be sensed and driven in a random order while displaying 270 consecutive image frames.

[0565] In one embodiment, according to another embodiment of this disclosure, a first specific voltage and a second specific voltage can be applied to the sub-pixel circuits of multiple row lines per image frame. That is, the aforementioned sensing drive can be performed for multiple row lines per image frame. In this case, the aforementioned sensing drive can also be performed sequentially or in a random order on a unit of multiple row lines.

[0566] In the above description, an example of sensing drive in the order of sensing period (①) of PWM circuit 112 and sensing period (②) of constant current generator circuit 111 is presented. However, this disclosure is not limited thereto, and it will be apparent that, depending on the embodiment, sensing period (②) of constant current generator circuit 111 may be performed first, followed by sensing period (①) of PWM circuit 112.

[0567] Furthermore, the above description presents an example of performing sensor driving after display driving. However, this disclosure is not limited thereto, and depending on the embodiment, sensor driving may be performed first, followed by display driving.

[0568] In the following text, regarding Figure 16a The transistor T1 in the diagram will describe the problems of brightness non-uniformity and horizontal crosstalk that may be caused by the sweep load, and will also describe the situation when a high voltage (SW_VGH) of the sweep signal is applied to node X through transistor T1 during the data setup segment.

[0569] This problem can be solved.

[0570] Figure 17a and Figure 17b This diagram illustrates the phenomenon of brightness inhomogeneity and horizontal crosstalk that may be caused by sweeping loads in a sub-pixel circuit that employs an external compensation method for deviations in the electronic characteristics of the driving transistor.

[0571] As described above, in various embodiments of this disclosure, the light-emitting segments are sequentially arranged according to the row lines of the display panel 100. Therefore, a transmission signal cannot be simultaneously applied to the display panel 100 via a global signal, and each row line requires a separate transmission driver circuit for providing a transmission signal corresponding to each row line.

[0572] Specifically, sweep signals Sweep(n) for PWM driving of the display panel 100 are sequentially provided to the display panel 100 by transmitter driver circuits corresponding to the row lines in the order of the row lines. (Hereinafter, the transmitter driver circuit for providing the sweep signals Sweep(n) will be referred to as the sweep driver circuit.)

[0573] In this case, during the process of setting the PWM data voltage to the gate terminal (i.e., node A) of the second driving transistor T3, the voltage change at node A is coupled through capacitor C1, and the voltage of the Sweep(n) signal line changes.

[0574] Subsequently, the voltage change that occurred in the Sweep(n) signal line is recovered, and accordingly, the voltage change to node A is reversed. In this case, as described below, the amount of voltage change at node A varies depending on the sweeping load, and this becomes the cause of brightness inhomogeneity and horizontal crosstalk.

[0575] Specifically, Figure 17a The diagram shows a configuration where a sweep driver circuit 505 corresponding to a row line is connected to a sub-pixel circuit 110 via wiring. Here, Figure 17a It shows Figure 16a In the case where transistor T1 is not present in the sub-pixel circuit 110.

[0576] like Figure 17a As shown, the sweep signal Sweep(n) is sent to the sub-pixel circuit 110 through the sweep driver circuit 505. In this case, there is a sweep wiring resistance (i.e., an RC load) between the sweep driver circuit 505 and the sub-pixel circuit 110, and its magnitude decreases as it gets closer to the sweep driver circuit 505 and increases as it gets further away from the sweep driver circuit 505.

[0577] Figure 17b It shows Figure 17a The waveforms of the various signals are shown. Additionally, respectively, Figure 17b The label "Far" indicates voltage changes at nodes A and X of sub-pixel circuits 110 that are relatively far from the sweep driver circuit 505, while the label "Near" indicates voltage changes at nodes A and X of sub-pixel circuits 110 that are relatively close to the sweep driver circuit 505. In an embodiment, for example, nodes A and X of sub-pixel circuits 110 corresponding to the label "Far" may be farther from the sweep driver circuit 505 than nodes A and X of sub-pixel circuits 110 corresponding to the label "Near".

[0578] When a low-level scan signal SP(n) is applied to the sub-pixel circuit 110 in the data setting section, a PWM data voltage applied from the data driver is applied to node A through the Vsig wiring and transistor T2. Here, the PWM data voltage is the PWM data voltage corresponding to any one of the R, G, and B sub-pixels selected by the DeMUX circuit.

[0579] In this process, such as Figure 17b As shown, when the voltage at node A changes, this change is coupled to node X through capacitor C1, and the voltage at node X (i.e., the voltage of the Sweep(n) signal line) changes.

[0580] Subsequently, the voltage of the Sweep(n) signal line (the voltage of node X) is restored to its original voltage level by the operation of the sweep driver circuit 505, and the voltage change of node X that occurs in this process is coupled through capacitor C1 and in turn causes the voltage change of node A.

[0581] Specifically, it can be seen that, due to the influence of the sweep load, the voltage change at node A is greater the farther the X node of the sub-pixel circuit 110 is from the sweep driver circuit 505. (See labels "far" and "near")

[0582] Therefore, even when the same PWM data voltage is applied, different voltages are set to the sub-pixel circuit 110 depending on the sweep load, which becomes the cause of brightness unevenness. Furthermore, from the perspective of the entire display panel 100, the brightness unevenness caused by the sweep load, as described above, becomes the cause of horizontal crosstalk.

[0583] The aforementioned issues of uneven brightness and horizontal crosstalk are caused by the voltage of node X changing along with the PWM data voltage applied to node A. Therefore, even if a PWM data voltage is applied to node A during the data setting period, the problem can be solved by preventing the voltage of node X from changing.

[0584] According to embodiments of this disclosure, when the PWM data voltage is set to node A, an application such as... can be applied to node X. Figure 17c The high voltage (SW_VGH) of the sweep signal is shown. In this case, the high voltage (SW_VGH) of the sweep signal can be a global signal that is applied equally from the power supply IC to all sub-pixel circuits 110 of the display panel 100.

[0585] More specifically, see reference Figure 16a The PWM circuit 112 includes a transistor T1, the source terminal of which is connected to the SW_VGH signal line, the gate terminal of which is connected to the SP(n) signal line, and the drain terminal of which is connected to the X node. In this case, the source terminal of the transistor T1 can be directly connected to the wiring through which a sweep signal (SW_VGH) is applied from the power supply IC.

[0586] Therefore, when a low voltage is applied through the SP(n) signal line and the PWM data voltage is set to node A, a high voltage (SW_VGH) of the sweep signal applied through the turned-on transistor T1 is forcibly applied to node X, and the voltage of node X can remain at the high voltage (SW_VGH) of the sweep signal regardless of the voltage change of node A.

[0587] Therefore, it can prevent or minimize the phenomenon of brightness inhomogeneity and horizontal crosstalk that may be caused by sweeping load.

[0588] In the following text, reference will be made to Figures 18a to 20b Other embodiments of a display device that apply an external compensation method are described. In this case, Figures 18a to 20b The illustrated embodiment has the same characteristics as described above. Figures 16a to 17c The configurations and operating principles described are similar, so repeated descriptions will be omitted, and the descriptions will focus on the differences.

[0589] Figure 18aThis is a detailed circuit diagram of the sub-pixel circuit 110 and the sensing unit 200 according to another embodiment of the present disclosure, and Figure 18b It is used to drive during image frame periods and blanking intervals, including Figure 18a The diagram shows the timing of various signals of the display panel, including the sub-pixel circuits and sensing units.

[0590] Figure 18a The sub-pixel circuit 110 shown is... Figure 16a The only difference in the sub-pixel circuit 110 shown is that it uses a scan signal SP(n) instead of a separate control signal. Figure 16a The PWM_Sen(n) and CCG_Sen(n) functions are used to control the on / off state of transistors T13 and T14, and Figure 18a The sub-pixel circuit 110 shown is similar to the one in other features. Figure 16a The sub-pixel circuit 110 shown is the same. Except for the absence of the control signals PWM_Sen(n) and CCG_Sen(n), Figure 18b The driving timing diagram shown is also consistent with Figure 16b The timing diagrams in the drive diagrams are the same.

[0591] refer to Figure 18a and Figure 18b When a scan signal SP(n) with a low level is applied during the data setting segment, not only transistors T1, T2, T6, and T7 are turned on, but transistors T13 and T14 are also turned on. However, in this case, current flow to the sensing unit 200 can be prevented by turning off the switch inside amplifier 211. Therefore, during the data setting segment, no sensing drive operation is performed; only the data setting operation is performed.

[0592] In this embodiment, during the sensing drive period, the aforementioned switch inside amplifier 211 can be turned on. Therefore, during the sensing drive period, the aforementioned first current and second current flow to sensing unit 200, thus enabling the aforementioned sensing drive to be performed.

[0593] In this configuration, during the sensing period (①) of the PWM circuit 112, a second specific voltage is applied to the gate terminal of the second driving transistor T3, and during the sensing period (②) of the constant current generator circuit 111, a first specific voltage is applied to the gate terminal of the first driving transistor T9, and the timing of applying the second specific voltage does not overlap with the timing of applying the first specific voltage. Therefore, in this embodiment, even without using separate control signals (PWM_Sen(n) and CCG_Sen(n)), the same operation can be performed.

[0594] Figure 14 a and Figure 14b describes the sensing-driven operation.

[0595] In addition to the above, the remaining details regarding the display driving and sensing driving of the sub-pixel circuit 110, as well as the prevention of brightness unevenness and horizontal crosstalk caused by sweeping loads, can be found above. Figures 16a to 17c To fully understand the content described herein, repeated explanations will be omitted.

[0596] Figure 19a This is a detailed circuit diagram of the sub-pixel circuit 110 and the sensing unit 200 according to another embodiment of the present disclosure, and Figure 19b It is used to drive during image frame periods and blanking intervals, including Figure 19a The diagram shows the timing of various signals of the display panel, including the sub-pixel circuits and sensing units.

[0597] In addition to the characteristics of applying image data voltage and specific voltages through a data signal line Vdata, Figure 19a The sub-pixel circuit 110 shown is... Figure 16a The sub-pixel circuit 110 shown is the same.

[0598] In this configuration, during the data setting phase, the PWM data voltage and the constant current generator data voltage are time-division multiplexed and applied to the sub-pixel circuit 110 from a data driver via the data signal line Vdata. Additionally, during the sensing drive phase, the second specific voltage and the first specific voltage are time-division multiplexed and applied to the sub-pixel circuit 110 from a data driver via the data signal line Vdata.

[0599] Therefore, two scan signals are needed to apply the PWM data voltage and the constant current generator data voltage, which are time-division multiplexed and applied to nodes A and B respectively during the data setting period, and to apply a first specific voltage and a second specific voltage, which are time-division multiplexed and applied to nodes A and B respectively during the sensing drive period. Figure 19a and Figure 19b The scan signals SPWM(n) and SCCG(n) in the figure illustrate the two scan signals as described above.

[0600] refer to Figure 19a and Figure 19b When a low-level scan signal SPWM(n) is applied to the sub-pixel circuit 110 in the data setting section, a PWM data voltage (PWM data) is applied to node A through the turned-on transistor T2. Additionally, when a low-level scan signal SCCG(n) is applied to the sub-pixel circuit 110, a constant current generator data voltage (CCG data) is applied to node B through the turned-on transistor T7.

[0601] In this embodiment, during the sensing period (①) of the PWM circuit 112 in the sensing drive period, when a scan signal SPWM(n) with a low level is applied to the sub-pixel circuit 110, a second specific voltage is input to node A through the turned-on transistor T2. Additionally, when a scan signal SCCG(n) with a low level is applied to the sub-pixel circuit 110, a first specific voltage is input to node B through the turned-on transistor T7.

[0602] In the embodiments, in Figure 19b The present invention provides an example of applying the scan signal in the order of SPWM(n) and SCCG(n), but this disclosure is not limited thereto, and it is apparent that, depending on the embodiment, the SCCG(n) signal may be applied first, followed by the SPWM signal.

[0603] (n) Signal.

[0604] In addition to the above, the remaining details regarding the display driving and sensing driving of the sub-pixel circuit 110, as well as the prevention of brightness unevenness and horizontal crosstalk caused by sweeping loads, can be found above. Figures 16a to 17c To fully understand the content described herein, repeated explanations will be omitted.

[0605] Figure 20a This is a detailed circuit diagram of the sub-pixel circuit 110 and the sensing unit 200 according to another embodiment of the present disclosure, and Figure 20b It is used to drive during image frame periods and blanking intervals, including Figure 20a The diagram shows the timing of various signals of the display panel, including the sub-pixel circuits and sensing units.

[0606] Figure 20a The sub-pixel circuit 110 shown is... Figure 19a The sub-pixel circuit 110 is similar in that it receives the application of image data voltage (PWM data voltage, constant current generator data voltage) and specific voltage (second specific voltage, first specific voltage) via a data signal line Vdata.

[0607] Therefore, refer to Figure 20a and Figure 20b As can be seen, by using two scan signals (or scan signal lines) such as SPWM(n) and SCCG(n), image data voltage and a specific voltage are applied to the sub-pixel circuit 110 during the data setting segment and the sensing drive period, respectively.

[0608] In an embodiment, Figure 20a The sub-pixel circuit 110 shown is... Figure 18a The similarity of the embodiments is that they use a scan signal instead of a separate control signal. Figure 16a or Figure 19a The PWM_Sen(n) and CCG_Sen(n) functions are used to control the on / off state of transistors T13 and T14.

[0609] exist Figure 20a In the case of the embodiment, two scan signals such as SPWM(n) and SCCG(n) are used, so as shown in the figure, the gate terminal of transistor T13 is connected to the scan signal SPWM(n), and the gate terminal of transistor T14 is connected to the scan signal SCCG(n).

[0610] In the embodiments, in Figure 20a and Figure 20b In the case of the embodiments described above, as in Figure 18a and Figure 18b As described above, by turning off the switch inside amplifier 211 during the data setting period and turning on the switch inside amplifier 211 during the sensing drive period, current can be made to flow to the sensing unit 200 only during the sensing drive period.

[0611] In addition to the above, the remaining details regarding the display driving and sensing driving of the sub-pixel circuit 110, as well as the prevention of brightness unevenness and horizontal crosstalk caused by sweeping loads, can be found above. Figures 16a to 17c To fully understand the content described herein, repeated explanations will be omitted.

[0612] In an embodiment, similar to the case of a display device that applies an internal compensation method, the problem of horizontal crosstalk in a display device that applies an external compensation method can be addressed by connecting the low voltage (SW_VGL) input of the sweep signal to the X node.

[0613] Figure 21a and Figure 21b This is a diagram illustrating an embodiment where the low-voltage (SW_VGL) input of the sweep signal is connected to the X node.

[0614] According to embodiments of this disclosure, a low voltage (SW_VGL) of a sweep signal can be applied to the X node, such as... Figure 21a As shown. In this case, the low voltage (SW_VGL) of the sweep signal can be a global signal that is applied equally from the power supply IC to all sub-pixel circuits 110 of the display panel 100.

[0615] Specifically, node X can be directly connected to the power IC via wiring, through which a low voltage (SW_VGL) of the sweep signal is applied. Therefore, even if the voltage of node A changes by applying PWM data voltage, the voltage of node X can remain at the low voltage (SW_VGL) of the sweep signal, unaffected by the coupling through capacitor C1.

[0616] In the embodiments, according to Figure 21a The content shown allows a sweep signal Sweep(n) for PWM driving to be applied to the source terminal of the second driving transistor. In this case, as... Figure 21b As shown, the sweep signal Sweep(n) can be a voltage signal that increases linearly from a low voltage to a high voltage.

[0617] As described above, the PWM circuit controls the on / off operation of the first switching transistor by controlling the on / off operation of the second driving transistor, thereby controlling the flow time of the driving current in the inorganic light-emitting element 120, and this in Figure 21a The same applies to the embodiments.

[0618] Specifically, when the PWM data voltage is set to node A, the voltage difference between the gate terminal and the source terminal of the second driving transistor decreases as the voltage of the source terminal of the second driving transistor increases according to the sweep signal Sweep(n).

[0619] When the voltage difference between the gate and source terminals of the decreasing second driving transistor reaches the threshold voltage of the second driving transistor, the second driving transistor turns on and the first switching transistor turns off.

[0620] In this embodiment, the PWM driving mechanism described above can be the same as the aforementioned embodiment (the embodiment of applying a sweep signal Sweep(n) to node X).

[0621] According to the above embodiments, the aforementioned problems of uneven brightness and horizontal crosstalk caused by the sweeping load can be solved. Furthermore, even if a sweeping signal is applied to the source terminal of the second driving transistor, this will not cause problems in the PWM driving of the display panel 100.

[0622] Figure 22a It is applied through Figure 21a and Figure 21b The described embodiments include detailed circuit diagrams of the sub-pixel circuit 110 and sensing unit 200 according to embodiments of the present disclosure, and Figure 22b It is used to drive during image frame periods and blanking intervals, including Figure 22a Timing diagram of various signals of the display panel, including the sub-pixel circuits and sensing units.

[0623] Figure 22a and Figure 22b The illustrated embodiment has the same characteristics as described above. Figures 16a to 16b The configurations and operating principles described are similar, so repeated descriptions will be omitted, and the descriptions will focus on the differences.

[0624] exist Figure 22a In the sub-pixel circuit 110, the SW_VGL signal line is directly connected to the X node. Therefore, compared with... Figure 16a Unlike the sub-pixel circuit 110, it does not require a transistor T1 for applying the SW_VGH signal to the X node during the data setting segment.

[0625] refer to Figure 22a It can be seen that, in relation to Figure 16a There is no transistor at the position corresponding to transistor T1 in the comparison. Figure 22a and Figure 16a As can be seen from the attached diagram labels, Figure 22a The reference numerals for transistors located in the same position are described as being more... Figure 16a The corresponding number in the attached icon is the one preceding it.

[0626] In the embodiments, in Figure 16a In the sub-pixel circuit 110, during the light-emitting segment, an application such as... is applied to the X node. Figure 16b The linearity of the high voltage (SW_VGH) from the sweep signal is shown.

[0627] Reduce the sweep voltage to a low voltage level for the sweep signal.

[0628] However, in Figure 22a In the sub-pixel circuit 110, it can be seen that during the light-emitting segment, an application such as... is applied to the source terminal of the second driving transistor T2. Figure 22b The sweep voltage is shown as a linear increase from the low voltage (SW_VGL) of the sweep signal to the high voltage of the sweep signal.

[0629] The following will be explained in detail based on examples. Figure 22a In the embodiment, the PWM circuit 112 operates according to the sweep signal Sweep(n).

[0630] For example, during the data setting period, when a voltage of +13 [V] (specifically, the PWM data voltage (+14 [V]) + the threshold voltage of the second driving transistor T2 (-1 [V])) is set to node A, if a sweep signal (e.g., a voltage that increases linearly from +10 [V] to +15 [V]) is applied to the source terminal of the second driving transistor T2, the voltage difference between the gate terminal and the source terminal of the second driving transistor T2 decreases from +3 [V] to -2 [V].

[0631] In this scenario, when the voltage difference between the gate and source terminals of the second driving transistor T2 decreases from +3 [V] to reach the threshold voltage (-1 [V]) of the second driving transistor T2, the second driving transistor T2 turns on. Additionally, +14 [V] is applied to the first switching transistor T9.

[0632] (When the second driving transistor T2 is turned on, +14[V] is the scanning voltage), and the first switching transistor T9 is turned off.

[0633] In the embodiments described above Figure 22a The operating mechanism of the PWM circuit 112 in the middle can be compared with Figure 16a and Figure 16b The operation mechanism of the PWM circuit 112 described herein is the same, except that the only difference is the form of the sweep signal and the terminal for inputting the sweep signal.

[0634] You can do it through the above Figure 16a and Figure 16b To fully understand the content described in the text. Figure 22a and Figure 22b The configuration and driving details of the sub-pixel circuit 110 shown will be omitted hereafter.

[0635] Figures 23a to 25b The application is shown through Figure 21a and Figure 21b Other embodiments of this disclosure described in the embodiments. Figures 23a to 25b The illustrated embodiment has the same characteristics as described above. Figure 22a and Figure 22b The configurations and operating principles described are similar, so repeated descriptions will be omitted.

[0636] Figure 23a This is a detailed circuit diagram of the sub-pixel circuit 110 and the sensing unit 200 according to another embodiment of the present disclosure, and Figure 23b It is used to drive during image frame periods and blanking intervals, including Figure 23a Timing diagram of various signals of the display panel, including the sub-pixel circuits and sensing units.

[0637] Figure 23a The sub-pixel circuit 110 shown is... Figure 22a The only difference in the sub-pixel circuit 110 shown is that it uses a scan signal SP(n) instead of a separate control signal. Figure 22a The PWM_Sen(n) and CCG_Sen(n) functions are used to control the on / off state of transistors T12 and T13, and Figure 23a The sub-pixel circuit 110 shown is similar to the one in other features. Figure 22a The sub-pixel circuit 110 shown is the same. Except for the absence of the control signals PWM_Sen(n) and CCG_Sen(n), Figure 23b The driving timing diagram shown is also consistent with Figure 22b The timing diagrams in the drive diagrams are the same.

[0638] refer to Figure 23a and Figure 23b When a scan signal SP(n) with a low level is applied during the data setting segment, not only transistors T1, T5, and T6 are turned on, but transistors T12 and T13 are also turned on. However, in this case, current flow to the sensing unit 200 can be prevented by turning off the switch inside amplifier 211. Therefore, during the data setting segment, no sensing drive operation is performed, but only the data setting operation is performed.

[0639] In this embodiment, during the sensing drive period, the switch inside amplifier 211 can be turned on. Therefore, during the sensing drive period, the aforementioned first current and second current flow to sensing unit 200, thus enabling the aforementioned sensing drive to be performed.

[0640] In this configuration, during the sensing period (①) of the PWM circuit 112, a second specific voltage is applied to the gate terminal of the second driving transistor T2, and during the sensing period (②) of the constant current generator circuit 111, a first specific voltage is applied to the gate terminal of the first driving transistor T8. The timing of applying the second specific voltage does not overlap with the timing of applying the first specific voltage. Therefore, sensing drive can be performed without problems even without using separate control signals (PWM_Sen(n) and CCG_Sen(n)).

[0641] Apart from the above, the remaining details regarding the display driving and sensing driving of the sub-pixel circuit 110 can be found above. Figure 16a and Figure 16b To fully understand the content described above, and regarding the prevention of brightness unevenness and horizontal crosstalk caused by sweeping loads, etc., can be found in the above description. Figures 21a to 22b To fully understand the content described herein, repeated explanations will be omitted.

[0642] Figure 24a This is a detailed circuit diagram of the sub-pixel circuit 110 and the sensing unit 200 according to another embodiment of the present disclosure, and Figure 24b It is used to drive during image frame periods and blanking intervals, including Figure 24a The diagram shows the timing of various signals of the display panel, including the sub-pixel circuits and sensing units.

[0643] In addition to the characteristics of applying image data voltage and specific voltages through a data signal line Vdata, Figure 24a The sub-pixel circuit 110 shown is... Figure 22a The sub-pixel circuit 110 shown is the same. In this case, as mentioned above regarding... Figure 19a and Figure 19b The description states that two scan signals are required, and Figure 24a and Figure 24bThe scan signals SPWM(n) and SCCG(n) in the figure illustrate the two scan signals mentioned above.

[0644] refer to Figure 24a and Figure 24b When a low-level scan signal SPWM(n) is applied to the sub-pixel circuit 110 in the data setting section, a PWM data voltage (PWM data) is applied to node A through the turned-on transistor T1. Additionally, when a low-level scan signal SCCG(n) is applied to the sub-pixel circuit 110, a constant current generator data voltage (CCG data) is applied to node B through the turned-on transistor T6.

[0645] In this embodiment, during the sensing period (①) of the PWM circuit 112 in the sensing drive period, when a scan signal SPWM(n) with a low level is applied to the sub-pixel circuit 110, a second specific voltage is input to node A through the turned-on transistor T1. Additionally, when a scan signal SCCG(n) with a low level is applied to the sub-pixel circuit 110, a first specific voltage is input to node B through the turned-on transistor T6.

[0646] In the embodiments, in Figure 24b The present invention provides an example of applying the scan signal in the order of SPWM(n) and SCCG(n), but this disclosure is not limited thereto, and it is apparent that, depending on the embodiment, the SCCG(n) signal may be applied first, followed by the SPWM signal.

[0647] (n) Signal.

[0648] Apart from the above, the remaining details regarding the display driving and sensing driving of the sub-pixel circuit 110 can be found above. Figure 16a and Figure 16b To fully understand the content described above, and regarding the prevention of brightness unevenness and horizontal crosstalk caused by sweeping loads, etc., can be found in the above description. Figures 21a to 22b To fully understand the content described herein, repeated explanations will be omitted.

[0649] Figure 25a This is a detailed circuit diagram of the sub-pixel circuit 110 and the sensing unit 200 according to another embodiment of the present disclosure, and Figure 25b It is used to drive during image frame periods and blanking intervals, including Figure 25a The diagram shows the timing of various signals of the display panel, including the sub-pixel circuits and sensing units.

[0650] Figure 25a The sub-pixel circuit 110 shown is... Figure 24aThe sub-pixel circuit 110 is similar in that it receives the application of image data voltage (PWM data voltage, constant current generator data voltage) and specific voltage (second specific voltage, first specific voltage) via a data signal line Vdata.

[0651] Therefore, refer to Figure 25a and Figure 25b As can be seen, by using two scan signals (or scan signal lines) such as SPWM(n) and SCCG(n), image data voltage and a specific voltage are applied to the sub-pixel circuit 110 during the data setting segment and the sensing drive period, respectively.

[0652] In an embodiment, Figure 25a The sub-pixel circuit 110 shown is... Figure 23a The similarity of the embodiments is that they use a scan signal instead of a separate control signal. Figure 24a The PWM_Sen(n) and CCG_Sen(n) functions are used to control transistors T12 and T13.

[0653] On / off.

[0654] exist Figure 25a In the case of the embodiment, two scan signals such as SPWM(n) and SCCG(n) are used, so as shown in the figure, the gate terminal of transistor T12 is connected to the scan signal SPWM(n), and the gate terminal of transistor T13 is connected to the scan signal SCCG(n).

[0655] In the embodiments, in Figure 25a and Figure 25b In the case of the embodiments described above, as in Figure 23a and Figure 23b As described above, by turning off the switch inside amplifier 211 during the data setting period and turning on the switch inside amplifier 211 during the sensing drive period, current can be made to flow to the sensing unit 200 only during the sensing drive period.

[0656] Apart from the above, the remaining details regarding the display driving and sensing driving of the sub-pixel circuit 110 can be found above. Figure 16a and Figure 16b To fully understand the content described above, and regarding the prevention of brightness unevenness and horizontal crosstalk caused by sweeping loads, etc., can be found in the above description. Figures 21a to 22b To fully understand the content described herein, repeated explanations will be omitted.

[0657] In the following text, reference will be made to Figures 26a to 33b Other embodiments of a display device that employ an external compensation method are described.

[0658] here, Figures 26a to 29b An embodiment of a method is shown that addresses the problem of brightness inhomogeneity and horizontal crosstalk caused by sweep load, by applying a high voltage (SW_VGH) of the sweep signal to the X node where the sweep signal is applied during the data setup segment. In the embodiment, Figures 30a to 33b An embodiment of a method is shown that addresses the problem of brightness inhomogeneity and horizontal crosstalk caused by a sweep load, by applying a low voltage (SW_VGL) of the sweep signal to the X node and the sweep signal to the source terminal of the second driving transistor.

[0659] In the foregoing, the statement that it can be applied in the same way... Figures 26a to 33b The contents of the embodiments shown will be omitted or will be briefly described, even if there are minor differences (e.g., only differences in the reference numerals of transistors).

[0660] Figure 26a This is a detailed circuit diagram of the sub-pixel circuit 110 and the sensing unit 200 according to embodiments of the present disclosure.

[0661] according to Figure 26a The sub-pixel circuit 110 includes a constant current generator circuit 111, a PWM circuit 112, a first switching transistor T8, a second switching transistor T9, a transistor T10, a transistor T11, and a transistor T12.

[0662] The constant current generator circuit 111 includes: a first driving transistor T7; a capacitor C2 connected between the source terminal and the gate terminal of the first driving transistor T7; and a transistor T6 controlled to be turned on / off according to the scan signal SP(n), and used to apply a constant current generator data voltage applied through the data signal line Vdata_ccg to the gate terminal of the first driving transistor T7 when it is turned on.

[0663] The PWM circuit 112 includes: a second driving transistor T3, the source terminal of which is connected to a second driving voltage (VDD_PWM) terminal; a capacitor C1 for coupling a sweep signal that sweeps between two different voltages to the gate terminal of the second driving transistor T3; and a transistor T2, which is controlled to be turned on / off according to the scan signal SP(n), and is used to apply a PWM data voltage applied through the data signal line Vdata_pwm to the gate terminal of the second driving transistor T3 when it is turned on.

[0664] Additionally, the PWM circuit 112 includes a reset unit 13. The reset unit 13 is a component used to force the first switching transistor T8 to turn on before the start of each light-emitting segment. Details regarding the reset unit 13 are as described above.

[0665] Furthermore, the PWM circuit 112 includes a transistor T1, the source terminal of which is connected to the SW_VGH signal line, the gate terminal of which is connected to the SP(n) signal line, and the drain terminal of which is connected to the X node. In this case, the source terminal of the transistor T1 can be directly connected to the wiring through which the sweep signal is applied from the power supply IC.

[0666] Therefore, when a low voltage is applied through the SP(n) signal line and the PWM data voltage is set to node A, a high voltage (SW_VGH) of the sweep signal applied through the turned-on transistor T1 is forcibly applied to node X, and the voltage of node X can remain at the high voltage (SW_VGH) of the sweep signal regardless of the voltage change of node A.

[0667] Therefore, as described above, the phenomena of brightness inhomogeneity and horizontal crosstalk that may be caused by sweeping load can be prevented or minimized.

[0668] In the embodiment, reference Figure 26a As can be seen, the drain terminal of the second driving transistor T3 is connected to the gate terminal of the first switching transistor T8 through the transistor T4, which is turned on according to the transmission signal Emi_PWM(n).

[0669] Therefore, by controlling the on / off operation of the first switching transistor T8 through the operation of the reset unit 13 and the on / off operation of the second driving transistor T3, the PWM circuit 112 can control the time for the driving current to flow in the inorganic light-emitting element 120 in the light-emitting section.

[0670] The source terminal of the second switching transistor T9 is connected to the drain terminal of the first switching transistor T8, and the drain terminal of the second switching transistor T9 is connected to the anode terminal of the inorganic light-emitting element 120. The second switching transistor T9 can be turned on / off according to the control signal Emi_PAM(n), and electrically connects / disconnects the first switching transistor T8 and the inorganic light-emitting element 120. The on / off timing of the second switching transistor T9 is related to the realization of black grayscale.

[0671] Transistor T10 is connected between the anode and cathode terminals of the inorganic light-emitting element 120. Transistor T10 and... Figure 16a The transistor T12 in the diagram operates in the same way and performs the same function, so repeated descriptions will be omitted.

[0672] The source terminal of transistor T12 is connected to the drain terminal of the first driving transistor T7, and the drain terminal of transistor T12 is connected to the sensing unit 200. Transistor T12 and... Figure 16aThe transistor T14 in the diagram operates in the same way and performs the same function, so repeated descriptions will be omitted.

[0673] The source terminal of transistor T11 is connected to the drain terminal of the second driving transistor T3, and the drain terminal of transistor T11 is connected to the sensing unit 200. Transistor T11 and... Figure 16a The transistor T13 in the diagram operates in the same way and performs the same function, so repeated descriptions will be omitted.

[0674] The cathode terminal of the inorganic light-emitting element 120 is connected to the ground voltage (VSS) terminal.

[0675] The unit components of sensing unit 200 and Figure 16a The sensing unit 200 in the middle has the same unit components, so repeated descriptions will be omitted.

[0676] Figure 26b It is used to drive during image frame periods and blanking intervals, including Figure 26a The diagram shows the timing of various signals of the display panel, including the sub-pixel circuitry and sensing units. Specifically, Figure 26b Various control signals, drive voltage signals, and data signals applied to the subpixel circuit 110 during an image frame period and blanking interval are shown.

[0677] refer to Figure 26b The display panel 100 can be driven in the order of display driver and sensor driver.

[0678] like Figure 26b As shown, during the display driving period, control signals SP, SET, Emi_PWM, Emi_PAM, and Sweep are applied to the display panel 100. For example, as... Figure 26b As shown, during the display driving period, control signals SP(n), SET(n), Emi_PWM(n), and Emi_PAM can be applied to the sub-pixel circuit 110 included in the nth row line of the display panel.

[0679] (n) and Sweep(n).

[0680] The sub-pixel circuits included in each row line of the display panel 100 can be driven in the order of data setting segments and multiple light-emitting segments. Alternatively, the sub-pixel circuits included in all row lines of the display panel 100 can be driven in the order of the row lines.

[0681] In the following text, references will be made to... Figure 26b The control signals related to the nth row (SP(n), SET(n), Emi_PWM(n), Emi_PAM(n), and Sweep(n)) and Figure 26aThe circuit in the diagram is used to describe the specific operation of the sub-pixel circuit 110.

[0682] First, in the data setting section, when a scan signal SP(n) with a low level is applied to the sub-pixel circuit 110, transistor T2 of PWM circuit 112 and transistor T6 of constant current generator circuit 111 are turned on.

[0683] When transistor T2 is turned on, a PWM data voltage (PWM data) applied from the second data driver is applied to the gate terminal (hereinafter referred to as node A) of the second driving transistor T3 through the data signal line Vdata_pwm.

[0684] In this case, the PWM data voltage can be higher than the second drive voltage (VDD_PWM). Therefore, when the PWM data voltage is set to node A, the second drive transistor T3 remains off.

[0685] In an embodiment, when transistor T6 is turned on, a constant current generator data voltage (CCG data) applied from the first data driver is applied to the gate terminal (hereinafter referred to as node B) of the first driving transistor T7 via the data signal line Vdata_ccg.

[0686] With the above Figures 16a to 25b The embodiments described herein differ from those in the original text. Figure 26a The sub-pixel circuit 110 does not include a drive voltage changing unit 113. Alternatively, it can be seen that the source terminal of the first drive transistor T7 is directly connected to the first drive voltage (VDD_PAM) terminal (or line). Therefore, a voltage corresponding to the difference between the first drive voltage (VDD_PAM) and the constant current generator data voltage is set between the source terminal and the gate terminal of the first drive transistor T7.

[0687] In this case, the constant current generator data voltage can be a voltage lower than the first drive voltage (VDD_PAM). Therefore, when the constant current generator data voltage is set to node B, the first drive transistor T7 remains on.

[0688] In this embodiment, when the first light-emitting segment of the nth row begins, a low-level emission signal SET(n) is applied to transistor T5. Therefore, Vset, as a low voltage, is charged in capacitor C3 through the conducting transistor T5, and a low voltage is applied to the gate terminal (hereinafter referred to as node C) of the first switching transistor T8, and the first switching transistor T8 is turned on.

[0689] Subsequently, as Figure 26bAs shown, during the first light-emitting segment, emission signals Emi(n) and Sweep(n) are applied to the sub-pixel circuit 110.

[0690] Specifically, when a low-level transmit signal Emi_PAM(n) is applied to the second switching transistor T9, the second switching transistor T9 is turned on.

[0691] Therefore, the drive current begins to flow to the inorganic light-emitting element 120 by the first drive transistor T7 which remains in the on state, the first switch transistor T8 which is turned on according to the SET(n) signal, and the second switch transistor T9 which is turned on according to the Emi_PAM(n) signal.

[0692] In this case, the magnitude of the drive current is determined by the voltage difference between the source terminal and the gate terminal of the first drive transistor T7, specifically by the magnitude of the constant current generator data voltage applied to the gate terminal of the first drive transistor T7.

[0693] In an embodiment, if a transmit signal Sweep(n) is applied to capacitor C1 (for example, such as...), Figure 26b If the applied sweep voltage decreases linearly (as shown), then the applied sweep voltage is coupled to node A, and therefore the voltage at node A also decreases linearly.

[0694] Therefore, when the difference between the voltage at node A and the second driving voltage (VDD_PWM) reaches the threshold voltage of the second driving transistor T3, the second driving transistor T3 turns on, and a high-level second driving voltage (VDD_PWM) is applied to the gate terminal of the first switching transistor T8 through the turned-on second driving transistor T3. (In this case, according to the low-level transmit signal Emi_PWM(n), transistor T4 is obviously also in the turned-on state.)

[0695] Therefore, the first switching transistor T8 is turned off, and the driving current can no longer flow to the inorganic light-emitting element 120, and the inorganic light-emitting element 120 begins to stop emitting light.

[0696] In this case, the time it takes for the drive current to be supplied to the inorganic light-emitting element 120 is determined by the voltage difference between the source terminal and the gate terminal of the second drive transistor T3, specifically by the amplitude of the PWM data voltage applied to the gate terminal of the second drive transistor T3. (For example, as the PWM data voltage increases, the time until the difference between the voltage at node A and the second drive voltage (VDD_PWM) reaches the threshold voltage value of the second drive transistor T3 becomes longer.)

[0697] In the embodiment, in the light-emitting segments following the second light-emitting segment for the nth row line, the emission signals SET(n), Emi_PWM(n), Emi_PAM(n), and Sweep(n) are applied identically, respectively. Therefore, the inorganic light-emitting element 120 of the nth row line begins to emit light identically in the light-emitting segments following the second light-emitting segment based on the image data voltage set in the data setting segment.

[0698] In the embodiments, according to Figure 26b As can be seen, after the display driving and sensing driving are completed, a discharge signal with a low level is applied to the sub-pixel circuit 110 in the non-light-emitting section 67. Therefore, as described above, the remaining charge in the inorganic light-emitting element 120 can be completely discharged by the conducting transistor T10.

[0699] The above description only covers the operations related to the nth row, but the operations for the remaining rows can be fully understood through the foregoing explanation.

[0700] In the embodiments, please refer to the detailed reference. Figure 26b The timing diagram shows a difference between the timing of the transmit signal Emi_PWM(n) going low and the timing of the transmit signal Emi_PAM(n) going low. This is to achieve black grayscale, as shown above. Figure 16b As stated above. As related content, the above can be applied verbatim. Figure 16b The description is identical to that in the figure, and the only difference is the reference numerals for the transistors; therefore, additional repetitive descriptions will be omitted.

[0701] In the embodiment, reference Figure 26b The sensing drive period may include the sensing period of PWM circuit 112 (①) and the sensing period of constant current generator circuit 111 (②).

[0702] In this case, according to embodiments of this disclosure, such as Figure 26b As shown, sensing can be performed within a blanking interval of 65.

[0703] Therefore, the sensing unit 200 can sense the current flowing in the driving transistors T7 and T3 based on a specific voltage applied within the blanking interval 65 of an image frame, and output sensing data corresponding to the sensed current.

[0704] However, according to the embodiments, the sensing drive can be performed during the startup period, power-off period, or screen-off period of the display device 1000.

[0705] Specifically, during the sensing period (①) of the PWM circuit 112, a second specific voltage applied through the data signal line Vdata_pwm is input to node A. Additionally, during the sensing period (①) of the PWM circuit 112, transistor T11 is turned on according to the control signal PWM_Sen(n), and a second current flowing in the second drive transistor T3 is sent to the sensing unit 200 through the turned-on transistor T11. Therefore, the sensing unit 200 can output second sensing data corresponding to the second current to the correction unit 300.

[0706] In this embodiment, during the sensing period (②) of the constant current generator circuit 111, a first specific voltage applied through the data signal line Vdata_ccg is input to node B. Additionally, during the sensing period (②) of the constant current generator circuit 111, transistor T12 is turned on according to the control signal CCG_Sen(n), and a first current flowing in the first driving transistor T7 is sent to the sensing unit 200 through the turned-on transistor T12. Therefore, the sensing unit 200 can output first sensing data corresponding to the first current to the correction unit 300.

[0707] The operation of sensing unit 200 in the first initialization period and the first sensing period of PWM circuit 112 sensing period (①), and the specific operation of sensing unit 200 in the second initialization period and the second sensing period of constant current generator circuit 111 sensing period (②) are as described above. Figure 16b As stated in the text, repeated descriptions will therefore be omitted.

[0708] The correction unit 300 can acquire a first compensation value and a second compensation value based on the first sensing data and the second sensing data output from the sensing unit 200, respectively, and store or update the acquired first compensation value and second compensation value in a memory. Subsequently, when the display driver is executed, the correction unit 300 can correct the constant current generator data voltage and PWM data voltage to be applied to the sub-pixel circuit 110 based on the first compensation value and the second compensation value, respectively.

[0709] In this embodiment, the aforementioned sensing drive can be performed for one row line per image frame, or for multiple row lines per image frame. In this case, as described above, the aforementioned sensing drive can be performed sequentially according to the order of the row lines or in a random order.

[0710] Furthermore, as shown in the accompanying drawings, the aforementioned sensing drive can be performed in the order of the sensing period (①) of the PWM circuit 112 and the sensing period (②) of the constant current generator circuit 111. However, this disclosure is not limited thereto, and according to an embodiment, the sensing period (②) of the constant current generator circuit 111 can be performed first, and then the sensing period (①) of the PWM circuit 112 can be performed.

[0711] Furthermore, the above description presents an example of performing sensor driving after display driving, but according to the embodiments, sensor driving can be performed first, and then display driving can be performed.

[0712] In an embodiment, Figure 26a The sub-pixel circuit 110 may not separately include the driving voltage changing unit 113, and may apply the first driving voltage (VDD_PAM) to the source terminal of the first driving transistor T7 during all time periods in the data setting section and each light-emitting section.

[0713] Therefore, in Figure 26a In the sub-pixel circuit 110, the first driving voltage (VDD_PAM) applied to the sub-pixel circuit operating in the data setting section is affected by the decrease in the first driving voltage (VDD_PAM) caused by the sub-pixel circuit operating in the light emission section.

[0714] As described above, this prevents the correct constant current generator data voltage from being set to the constant current generator circuit 111 that belongs to the row line operating in the data setting section.

[0715] To address the aforementioned issue of the first driving voltage (VDD_PAM) drop, in Figures 26a to 33b In some embodiments, a method for correcting the data voltage of a constant current generator can be used.

[0716] That is, in Figures 16a to 25b In one embodiment, the problem of IR drop in the first driving voltage (VDD_PAM) is solved by controlling the driving voltage applied to the source terminal of the first driving transistor (T9 or T8) through the driving voltage changing unit 113. However, in Figures 26a to 33b In one embodiment, the first drive voltage (VDD_PAM) is resolved by correcting the constant current generator data voltage applied to the gate terminal of the first drive transistor (T7 or T6).

[0717] The problem of declining IR.

[0718] Specifically, according to embodiments of this disclosure, data (or information) regarding the IR drop value of each area of ​​the display panel 100 based on the amplitude of the drive current can be stored in a storage unit (e.g., a memory).

[0719] Here, the magnitude of the drive current refers to the average current value provided by the drive voltage supply unit (e.g., power IC) to the display panel 100 for displaying image frames on the display panel 100, and this value can vary depending on the image displayed by the image frame.

[0720] Furthermore, the driving current and the IR drop value of each area based on the driving current can be sensed and calculated in advance during the manufacturing process of the display device 1000, and stored in the storage unit. Additionally, before displaying an image during the use of the display device 1000, the driving current and the IR drop value of each area based on the driving current can be sensed and calculated in advance, and updated accordingly.

[0721] Therefore, the correction unit 300 can correct the constant current generator data to be applied to the display panel 100 based on the IR drop value corresponding to the magnitude of the drive current required to display the current image frame in each region of the display panel 100.

[0722] Therefore, the data driver can generate a constant current generator data voltage based on the corrected constant current generator data and apply the voltage to the display panel 100 to compensate for the IR drop of the first drive voltage (VDD_PAM) caused by the drive current required to display the current image frame.

[0723] In the above description, the IR drop value of each area of ​​the display panel 100 can be the IR drop value of each row line of the display panel 100, but is not limited to this.

[0724] In the following text, reference will be made to Figures 27a to 29b Various embodiments of this disclosure are described herein. Here, Figures 27a to 29b The illustrated embodiment has the same characteristics as described above. Figure 26a and Figure 26b The configurations and operating principles described are similar, so repeated descriptions will be omitted, and the descriptions will focus on the differences.

[0725] Figure 27a This is a detailed circuit diagram of the sub-pixel circuit 110 and the sensing unit 200 according to another embodiment of the present disclosure, and Figure 27b It is used to drive during image frame periods and blanking intervals, including Figure 27a The diagram shows the timing of various signals of the display panel, including the sub-pixel circuits and sensing units.

[0726] Figure 27a The sub-pixel circuit 110 shown is... Figure 26a The only difference in the sub-pixel circuit 110 shown is that it uses a scan signal SP(n) instead of a separate control signal. Figure 26aThe PWM_Sen(n) and CCG_Sen(n) functions are used to control the on / off state of transistors T11 and T12, and Figure 27a The sub-pixel circuit 110 shown is similar to the one in other features. Figure 26a The sub-pixel circuit 110 shown is the same. Except for the absence of the control signals PWM_Sen(n) and CCG_Sen(n), Figure 27b The driving timing diagram shown is also consistent with Figure 26b The timing diagrams in the drive diagrams are the same.

[0727] refer to Figure 27a and Figure 27b When a scan signal SP(n) with a low level is applied during the data setting segment, not only transistors T1, T2, and T6 are turned on, but transistors T11 and T12 are also turned on. However, in this case, current flow to the sensing unit 200 can be prevented by turning off the switch inside amplifier 211. Therefore, during the data setting segment, no sensing drive operation is performed, but only the data setting operation is performed.

[0728] In this embodiment, during the sensing drive period, the aforementioned switch inside amplifier 211 can be turned on. Therefore, during the sensing drive period, the aforementioned first current and second current flow to sensing unit 200, thus enabling the aforementioned sensing drive to be performed.

[0729] In this scenario, during the sensing period (①) of the PWM circuit 112, a second specific voltage is applied to the gate terminal of the second driving transistor T3, and during the sensing period (②) of the constant current generator circuit 111, a first specific voltage is applied to the gate terminal of the first driving transistor T7, and the times for applying the second specific voltage do not overlap with the times for applying the first specific voltage. Therefore, even without using separate control signals (PWM_Sen(n) and CCG_Sen(n)), the same operation can be performed. Figure 26a and Figure 26b Describes the sensor-driven operation.

[0730] In addition to the above, the remaining details regarding the display driving and sensing driving of the sub-pixel circuit 110, as well as the prevention of brightness unevenness and horizontal crosstalk caused by sweeping loads, can be found above. Figure 26a and Figure 26b To fully understand the content described herein, repeated explanations will be omitted.

[0731] Figure 28a This is a detailed circuit diagram of the sub-pixel circuit 110 and the sensing unit 200 according to another embodiment of the present disclosure, and Figure 28b It is used to drive during image frame periods and blanking intervals, including Figure 28aThe diagram shows the timing of various signals of the display panel, including the sub-pixel circuits and sensing units.

[0732] In addition to the characteristics of applying image data voltage and specific voltages through a data signal line Vdata, Figure 28a The sub-pixel circuit 110 shown is... Figure 26a The sub-pixel circuit 110 shown is the same.

[0733] In this configuration, during the data setting phase, the PWM data voltage and the constant current generator data voltage are time-division multiplexed and applied to the sub-pixel circuit 110 from a data driver via the data signal line Vdata. Additionally, during the sensing drive phase, the second specific voltage and the first specific voltage are time-division multiplexed and applied to the sub-pixel circuit 110 from a data driver via the data signal line Vdata.

[0734] Therefore, two scan signals are needed to apply the PWM data voltage and the constant current generator data voltage, which are time-division multiplexed and applied to nodes A and B respectively during the data setting period, and to apply a first specific voltage and a second specific voltage, which are time-division multiplexed and applied to nodes A and B respectively during the sensing drive period. Figure 28a and Figure 28b The scan signals SPWM(n) and SCCG(n) in the figure illustrate the two scan signals as described above.

[0735] refer to Figure 28a and Figure 28b When a low-level scan signal SPWM(n) is applied to the sub-pixel circuit 110 in the data setting section, a PWM data voltage (PWM data) is applied to node A through the turned-on transistor T2. Additionally, when a low-level scan signal SCCG(n) is applied to the sub-pixel circuit 110, a constant current generator data voltage (CCG data) is applied to node B through the turned-on transistor T6.

[0736] In this embodiment, during the sensing period (①) of the PWM circuit 112 in the sensing drive period, when a scan signal SPWM(n) with a low level is applied to the sub-pixel circuit 110, a second specific voltage is input to node A through the turned-on transistor T2. Additionally, when a scan signal SCCG(n) with a low level is applied to the sub-pixel circuit 110, a first specific voltage is input to node B through the turned-on transistor T6.

[0737] In the embodiments, Figure 28bThe present invention provides an example of applying the scan signal in the order of SPWM(n) and SCCG(n), but this disclosure is not limited thereto, and it is apparent that, depending on the embodiment, the SCCG(n) signal may be applied first, followed by the SPWM signal.

[0738] (n) Signal.

[0739] In addition to the above, the remaining details regarding the display driving and sensing driving of the sub-pixel circuit 110, as well as the prevention of brightness unevenness and horizontal crosstalk caused by sweeping loads, can be found above. Figures 26a to 26b To fully understand the content described herein, repeated explanations will be omitted.

[0740] Figure 29a This is a detailed circuit diagram of the sub-pixel circuit 110 and the sensing unit 200 according to another embodiment of the present disclosure, and Figure 29b It is used to drive during image frame periods and blanking intervals, including Figure 29a The diagram shows the timing of various signals of the display panel, including the sub-pixel circuits and sensing units.

[0741] Figure 29a The sub-pixel circuit 110 shown is... Figure 26a The sub-pixel circuit 110 is similar in that it receives the application of image data voltage (PWM data voltage, constant current generator data voltage) and specific voltage (second specific voltage, first specific voltage) via a data signal line Vdata.

[0742] Therefore, refer to Figure 29a and Figure 29b As can be seen, by using two scan signals (or scan signal lines) such as SPWM(n) and SCCG(n), image data voltage and a specific voltage are applied to the sub-pixel circuit 110 during the data setting segment and the sensing drive period, respectively.

[0743] In an embodiment, Figure 29a The sub-pixel circuit 110 shown is... Figure 27a The similarity of the embodiments is that they use a scan signal instead of a separate control signal. Figure 28a The PWM_Sen(n) and CCG_Sen(n) functions are used to control transistors T11 and T12.

[0744] On / off.

[0745] exist Figure 29aIn the case of the embodiment, two scan signals such as SPWM(n) and SCCG(n) are used, so as shown in the figure, the gate terminal of transistor T11 is connected to the scan signal SPWM(n) line, and the gate terminal of transistor T12 is connected to the scan signal SCCG(n) line.

[0746] In the embodiments, in Figure 29a and Figure 29b In the case of the embodiments described above, as in Figure 27a and Figure 27b As described above, by turning off the switch inside amplifier 211 during the data setting period and turning on the switch inside amplifier 211 during the sensing drive period, current can be made to flow to the sensing unit 200 only during the sensing drive period.

[0747] In addition to the above, the remaining details regarding the display driving and sensing driving of the sub-pixel circuit 110, as well as the prevention of brightness unevenness and horizontal crosstalk caused by sweeping loads, can be found above. Figure 26a and Figure 26b To fully understand the content described herein, repeated explanations will be omitted.

[0748] In the following text, reference will be made to Figures 30a to 33b An embodiment of a method is described, which applies a low voltage (SW_VGL) of a sweep signal to the X node and applies the sweep signal to the source terminal of a second driving transistor.

[0749] Figure 30a This is a detailed circuit diagram of the sub-pixel circuit 110 and the sensing unit 200 according to embodiments of the present disclosure, and Figure 30b It is used to drive during image frame periods and blanking intervals, including Figure 30a The diagram shows the timing of various signals of the display panel, including the sub-pixel circuits and sensing units.

[0750] Figure 30a and Figure 30b The illustrated embodiment has the same characteristics as described above. Figure 26a and Figure 26b The configurations and operating principles described are similar, so repeated descriptions will be omitted, and the descriptions will focus on the differences.

[0751] exist Figure 30a In the sub-pixel circuit 110, the SW_VGL signal line is directly connected to the X node. Therefore, compared with... Figure 26a Unlike the sub-pixel circuit 110, it does not require a transistor T1 for applying the SW_VGH signal to the X node during the data setting segment.

[0752] refer to Figure 30aIt can be seen that, in relation to Figure 26a There is no transistor at the position corresponding to transistor T1 in the comparison. Figure 30a and Figure 26a As can be seen from the attached diagram labels, Figure 30a The reference numerals for transistors located in the same position are described as being more... Figure 26a The corresponding number in the attached icon is the one preceding it.

[0753] In the embodiments, in Figure 26a In the sub-pixel circuit 110, during the light-emitting segment, an application such as... is applied to the X node. Figure 26b The sweep voltage shown is the sweep voltage that decreases linearly from the high voltage (SW_VGH) of the sweep signal to the low voltage of the sweep signal.

[0754] However, in Figure 30a In the sub-pixel circuit 110, it can be seen that during the light-emitting segment, an application such as... is applied to the source terminal of the second driving transistor T2. Figure 30b The sweep voltage is shown as a linear increase from the low voltage (SW_VGL) of the sweep signal to the high voltage of the sweep signal.

[0755] The following will be explained in detail based on examples. Figure 30a In the embodiment, the PWM circuit 112 operates according to the sweep signal Sweep(n).

[0756] For example, during the data setting period, when a voltage of +13 [V] (specifically, the PWM data voltage (+14 [V]) + the threshold voltage of the second driving transistor T2 (-1 [V])) is set to node A, if a sweep signal (e.g., a voltage that increases linearly from +10 [V] to +15 [V]) is applied to the source terminal of the second driving transistor T2, the voltage difference between the gate terminal and the source terminal of the second driving transistor T2 decreases from +3 [V] to -2 [V].

[0757] In this configuration, when the voltage difference between the gate and source terminals of the second driving transistor T2 decreases from +3 [V] to reach the threshold voltage (-1 [V]) of the second driving transistor T2, the second driving transistor T2 is turned on. Additionally, +14 [V] (the scan voltage when the second driving transistor T2 is on) is applied to the first switching transistor T7, and the first switching transistor T7 is turned off.

[0758] In the embodiments described above Figure 30a The operating mechanism of the PWM circuit 112 in the middle can be compared with Figure 26a and Figure 26b The operation mechanism of the PWM circuit 112 described herein is the same, except that the only difference is the form of the sweep signal and the terminal for inputting the sweep signal.

[0759] The content described above and that shown in the accompanying drawings may sufficiently Figure 26a and Figure 26b understand the remaining contents related to the configuration and driving of the sub-pixel circuit 110 shown in Figure 30a and Figure 30b , and therefore repeated description will be omitted.

[0760] Figure 31a is a detailed circuit diagram of a sub-pixel circuit 110 and a sensing unit 200 according to another embodiment of the present disclosure, and Figure 31b is a timing diagram of various signals for driving a display panel including the Figure 31a sub-pixel circuit and the sensing unit shown therein during an image frame period and a blanking interval.

[0761] Figure 31a The sub-pixel circuit 110 shown in Figure 30a differs from the sub-pixel circuit 110 shown in only in that a scan signal SP(n) is used instead of separate control signals ( Figure 30a PWM_Sen(n) and CCG_Sen(n) in ) to control the turn-on / off of the transistor T10 and the transistor T11, and Figure 31a the sub-pixel circuit 110 shown in is the same as the sub-pixel circuit 110 shown in Figure 30a in terms of other remaining features. Except for the feature that there are no control signals PWM_Sen(n) and CCG_Sen(n), Figure 31b the driving timing diagram shown in is also the same as the driving timing diagram in Figure 30b .

[0762] Referring to Figure 31a and Figure 31b , when a low-level scan signal SP(n) is applied in a data setting section, not only the transistors T1 and T5 are turned on, but also the transistors T10 and T11 are turned on together. However, in this case, current flowing to the sensing unit 200 can be blocked by turning off the switch inside the amplifier 211. Therefore, during the data setting section, the sensing driving operation is not performed, and only the data setting operation is performed.

[0763] In an embodiment, during the sensing driving period, the switch inside the amplifier 211 can be turned on. Therefore, during the sensing driving period, the aforementioned first current and second current flow to the sensing unit 200, so that the aforementioned sensing driving can be performed.

[0764] In this scenario, during the sensing period (①) of the PWM circuit 112, a second specific voltage is applied to the gate terminal of the second driving transistor T2, and during the sensing period (②) of the constant current generator circuit 111, a first specific voltage is applied to the gate terminal of the first driving transistor T6, and the times for applying the second specific voltage do not overlap with the times for applying the first specific voltage. Therefore, even without using a separate control signal (PWM_Sen(n)...

[0765] With CCG_Sen(n), the sensing drive can also be executed without any problems.

[0766] The following information can be fully understood through the accompanying drawings and the above content. Figure 31a and Figure 31b The configuration and driving details of the sub-pixel circuit 110 shown will be omitted hereafter.

[0767] Figure 32a This is a detailed circuit diagram of the sub-pixel circuit 110 and the sensing unit 200 according to another embodiment of the present disclosure, and Figure 32b It is used to drive during image frame periods and blanking intervals, including Figure 32a The diagram shows the timing of various signals of the display panel, including the sub-pixel circuits and sensing units.

[0768] In addition to the characteristics of applying image data voltage and specific voltages through a data signal line Vdata, Figure 32a The sub-pixel circuit 110 shown is... Figure 30a The sub-pixel circuit 110 shown is the same. In this case, two scan signals are required as described above, and Figure 32a and Figure 32b The scan signals SPWM(n) and SCCG(n) in the figure illustrate the two scan signals mentioned above.

[0769] refer to Figure 32a and Figure 32b When a low-level scan signal SPWM(n) is applied to the sub-pixel circuit 110 in the data setting section, a PWM data voltage (PWM data) is applied to node A through the turned-on transistor T1. Additionally, when a low-level scan signal SCCG(n) is applied to the sub-pixel circuit 110, a constant current generator data voltage (CCG data) is applied to node B through the turned-on transistor T5.

[0770] In this embodiment, during the sensing period (①) of the PWM circuit 112 in the sensing drive period, when a scan signal SPWM(n) with a low level is applied to the sub-pixel circuit 110, a second specific voltage is input to node A through the turned-on transistor T1. Additionally, when a scan signal SCCG(n) with a low level is applied to the sub-pixel circuit 110, a first specific voltage is input to node B through the turned-on transistor T5.

[0771] In the embodiments, Figure 32b The present invention provides an example of applying the scan signal in the order of SPWM(n) and SCCG(n), but this disclosure is not limited thereto, and it is apparent that, depending on the embodiment, the SCCG(n) signal may be applied first, followed by the SPWM signal.

[0772] (n) Signal.

[0773] The following information can be fully understood through the accompanying drawings and the above content. Figure 32a and Figure 32b The configuration and driving details of the sub-pixel circuit 110 shown are omitted hereafter.

[0774] Figure 33a This is a detailed circuit diagram of the sub-pixel circuit 110 and the sensing unit 200 according to yet another embodiment of the present disclosure, and Figure 33b It is used to drive during image frame periods and blanking intervals, including Figure 33a The diagram shows the timing of various signals of the display panel, including the sub-pixel circuits and sensing units.

[0775] Figure 33a The sub-pixel circuit 110 shown is... Figure 32a The sub-pixel circuit 110 is similar in that it receives the application of image data voltage (PWM data voltage, constant current generator data voltage) and specific voltage (second specific voltage, first specific voltage) via a data signal line Vdata.

[0776] Therefore, refer to Figure 33a and Figure 33b As can be seen, by using two scan signals (or scan signal lines) such as SPWM(n) and SCCG(n), image data voltage and a specific voltage are applied to the sub-pixel circuit 110 during the data setting segment and the sensing drive period, respectively.

[0777] In an embodiment, Figure 33a The sub-pixel circuit 110 shown is... Figure 31a The similarity of the embodiments is that they use a scan signal instead of a separate control signal. Figure 32aThe PWM_Sen(n) and CCG_Sen(n) are used to control transistors T10 and T11.

[0778] On / off.

[0779] exist Figure 33a In the case of the embodiment, two scan signals such as SPWM(n) and SCCG(n) are used, so as shown in the figure, the gate terminal of transistor T10 is connected to the scan signal SPWM(n), and the gate terminal of transistor T11 is connected to the scan signal SCCG(n).

[0780] In the embodiments, Figure 33a and Figure 33b In the case of the embodiment described above, by turning off the switch inside amplifier 211 during the data setting period and turning on the switch inside amplifier 211 during the sensing drive period, current can be made to flow to the sensing unit 200 only during the sensing drive period.

[0781] In addition to the above, regarding Figure 33a and Figure 33b The configuration and driving of the sub-pixel circuit 110 shown can be fully understood from the contents shown in the accompanying drawings and the above description, and therefore repeated descriptions will be omitted.

[0782] In the above description, in the embodiment where the PWM data voltage and the constant current generator data voltage are applied separately via separate wiring such as Vdata_pwm and Vdata_ccg, two data drivers are used to provide the constant current generator data voltage and the PWM data voltage, thus the risk of heat generation from the data drivers is relatively low. Furthermore, since the scan signal SP(n) can be provided using a single scan driver, the configuration can become relatively simple. However, the use of two data drivers increases the cost relatively, and the design of the display panel can become relatively complex due to the need for two data signal lines.

[0783] In the embodiments described above, where the PWM data voltage and the constant current generator data voltage are applied separately via a single wiring such as Vdata, a single data driver is used, thus reducing costs, and the design can be relatively simple since only one data signal line, Vdata, is required.

[0784] However, since a relatively high PWM data voltage and a relatively low constant current generator data voltage are alternately applied to the display panel 100 by a single data driver, there is a risk of heat generation from the data driver, and the configuration can become relatively complex because two scan drivers are required to provide the scan signal SPWM(n) and the scan signal SCCG(n).

[0785] In the following text, it will be through Figures 34 to 37b Other embodiments of a display device that employ an internal compensation method are described. Figures 34 to 37b In this case, descriptions of content that is repeated in the foregoing embodiments related to the internal compensation method will be omitted.

[0786] Figure 34 This is a schematic block diagram of a sub-pixel circuit 110 according to an embodiment of the present disclosure. Figure 34 The sub-pixel circuit 110 includes a constant current generator circuit 111 and a PWM circuit 112.

[0787] The constant current generator circuit 111 includes a first driving transistor and can provide a constant current to the inorganic light-emitting element 120 based on a constant current generator data voltage applied from the driver 500.

[0788] As described above, according to embodiments of this disclosure, the same constant current generator data voltage can be applied to all constant current generator circuits 111 of the display panel 100. In this case, the constant current generator circuits 111 can provide a constant (or the same) amplitude constant current to all inorganic light-emitting elements 120 of the display panel 100.

[0789] In an embodiment, in order to compensate for the deviation of the threshold voltage between the first driving transistors, when a constant current generator data voltage is applied during the data setting segment, the constant current generator circuit 111 can apply a voltage to the gate terminal (C node) of the first driving transistor that is the sum of the constant current generator data voltage and the threshold voltage of the first driving transistor.

[0790] Subsequently, in the light-emitting section, the constant current generator circuit 111 can apply a constant current based on a value corresponding to the square of the voltage obtained by subtracting the threshold voltage of the first driving transistor from the voltage between the gate terminal and the source terminal of the first driving transistor, i.e., (|Vgs|-|Vth|). 2 .

[0791] In this case, during the data setting segment, a voltage (VCCG+Vth) is applied to the gate terminal of the first driving transistor as the sum of the constant current generator data voltage (e.g., VCCG) and the threshold voltage (e.g., Vth) of the first driving transistor. Therefore, if the threshold voltage of the first driving transistor is subtracted from the voltage between the gate terminal and the source terminal of the first driving transistor, the threshold voltage of the first driving transistor is erased.

[0792] More specifically, the first driving transistor is a PMOS TFT, therefore (|Vgs|-|Vth|). 2 =(Vsg+Vth) 2 In this case, it can be seen that Vsg = Vs - (VCCG + Vth), therefore Vsg + Vth = Vs - (VCCG + Vth) + Vth, and Vth is deleted.

[0793] Therefore, the amplitude of the constant current provided by the constant current generator circuit 111 becomes independent of the threshold voltage of the first driving transistor, thus compensating for the threshold voltage deviation between the first driving transistors.

[0794] PWM circuit 112 includes a second drive transistor and can control the timing of providing a constant current to inorganic light-emitting element 120 based on the PWM data voltage and sweep signal applied from driver 500.

[0795] Specifically, the PWM circuit 112 can control the time when a constant current flows to the inorganic light-emitting element 120 by applying a driving voltage to the constant current generator circuit 111 (specifically, the source terminal of the first driving transistor) only during the time period when the second driving transistor is turned on in the light-emitting segment.

[0796] refer to Figure 34 The constant current generator circuit 111 can provide a constant current to the inorganic light-emitting element 120 by applying the driving voltage applied by the second driving transistor of the PWM circuit 112 to the inorganic light-emitting element 120.

[0797] In this configuration, a drive voltage is supplied from the PWM circuit 112 to the constant current generator circuit 111 only when the second drive transistor is turned on in the light-emitting section. Furthermore, the duration of the second drive transistor's on-time in the light-emitting section is determined based on the PWM data voltage and the sweep voltage.

[0798] Therefore, the PWM circuit 112 can control the duration of the constant current supplied to the inorganic light-emitting element 120 based on the PWM data voltage and the sweep signal.

[0799] In an embodiment, in order to compensate for the deviation of the threshold voltage of the second driving transistor, according to an embodiment of the present disclosure, when the second driving transistor operates as a source follower in the data setting segment, the PWM circuit 112 can obtain the threshold voltage of the second driving transistor.

[0800] The threshold voltage of the second driving transistor, thus obtained, can be applied to the gate terminal of the second driving transistor, and the threshold voltage of the second driving transistor can be compensated by it.

[0801] More specifically, during the light-emitting segment, the voltage at the gate terminal of the second driving transistor changes according to the sweep voltage, starting from a voltage (-VPWM+Vth) that is the sum of the PWM data voltage component (e.g., -VPWM) and the threshold voltage component of the second driving transistor (e.g., +Vth). (Actually, there is also a reference voltage component +Vref, which will be described later, but it is omitted for simplicity.)

[0802] Here, the sweep voltage is a voltage signal that sweeps once between two different voltages. Alternatively, the sweep voltage can be a portion of a scan signal that is a continuously repeating voltage that linearly changes from a first voltage to a second voltage, selected based on the transmission signal Emi(n), which will be described later. Here, the sweep signal is a global signal applied equally to all sub-pixel circuits 110 of the display panel 100, and the rate of change of the sweep voltage over time is constant.

[0803] In an embodiment, the second driving transistor is turned on when the voltage at the gate terminal is lower than the voltage corresponding to the sum of the voltage at the source terminal and the threshold voltage. As will be described below, a driving voltage (e.g., VDD_PAM) is applied to the source terminal of the second driving transistor in the light-emitting section, so that the second driving transistor is turned on when the voltage at the gate terminal becomes lower than the sum of the driving voltage VDD_PAM and the threshold voltage Vth (VDD_PAM+Vth).

[0804] Therefore, in the light-emitting section, when the voltage at the gate terminal changes from -VPWM+Vth according to the sweep voltage and becomes VDD_PAM+Vth, the second driving transistor turns on. Thus, the threshold voltage value (e.g., Vth value) of the second driving transistor has absolutely no effect on the turn-on time of the second driving transistor. That is, the turn-on time of the second driving transistor in the light-emitting section can be determined regardless of the threshold voltage value (Vth value) of the second driving transistor.

[0805] Therefore, the deviation in threshold voltage between the second driving transistors can be compensated.

[0806] Figure 35a It is according to the embodiments of this disclosure having such Figure 34Detailed circuit diagram of the sub-pixel circuit 110 configured in [reference]. Figure 35a The sub-pixel circuit 110 includes a constant current generator circuit 111, a PWM circuit 112, and a transistor T16. In this case, as described above, the constant current generator circuit 111 includes a first driving transistor T14, and the PWM circuit 112 includes a second driving transistor T13.

[0807] Transistor T16 is connected between the anode and cathode terminals of the inorganic light-emitting element 120. Transistor T16 can be used for different purposes before and after the inorganic light-emitting element 120 is mounted on the TFT layer and electrically connected to the sub-pixel circuit 110.

[0808] For example, before the inorganic light-emitting element 120 and the sub-pixel circuit 110 are electrically connected to each other, the transistor T16 can be turned on according to a test signal to check whether the sub-pixel circuit 110 is abnormal.

[0809] In this embodiment, after the inorganic light-emitting element 120 and the sub-pixel circuit 110 are connected to each other, the transistor T16 can function as a discharge transistor. That is, the transistor T16 can be turned on according to a discharge signal to discharge the remaining charge in the junction capacitance assembly of the inorganic light-emitting element 120.

[0810] When transistor T16 is turned on, the anode and cathode terminals of inorganic light-emitting element 120 are short-circuited, thus eliminating the potential difference between the two ends of inorganic light-emitting element 120.

[0811] Here, the discharge signal is a control signal provided by TCON through a level shifter to control the on / off state of transistor T16, and is a global signal applied equally to all sub-pixel circuits 110 of the display panel 100.

[0812] In this embodiment, VDD_PAM refers to the first drive voltage (e.g., +12V), VDD_PWM refers to the second drive voltage (e.g., +12V), and VSS refers to ground voltage (e.g., 0V). Additionally, Vref refers to the reference voltage (e.g., +5V). As described later, Vref can be used to obtain the threshold voltage of the second drive transistor T13. VDD_PAM, VDD_PWM, VSS, and Vref can be provided from the aforementioned power supply IC, but not...

[0813] That's all.

[0814] Vini(n) refers to the scan signal applied to the sub-pixel circuit 110 in the data setting section, used to apply a reference voltage (Vref) to nodes B and D, and to apply a second driving voltage (VDD_PWM) to node F. The Vref applied to nodes B and D can be used to obtain the threshold voltage of the second driving transistor T13, and when the constant current generator data voltage is set, the second driving voltage VDD_PWM applied to node F can become the reference potential.

[0815] VST(n) refers to the scan signal applied to the sub-pixel circuit 110 in the data setting section to initialize the voltage of node C. When the voltage of node C is initialized according to the VST(n) signal, the first driving transistor T14 enters the conducting state.

[0816] SP(n) refers to the scan signal applied to the sub-pixel circuit 110 in the data setting section, which is used to apply a constant current generator data voltage (VCCG_R / G / B) to node C and to apply a PWM data voltage (VPWM_R / G / B) to node A.

[0817] Vcomp(n) refers to the scan signal applied to the sub-pixel circuit 110 in the data setting section, used to apply the threshold voltage of the second driving transistor to node B.

[0818] Emi(n) refers to the emission signal applied to the sub-pixel circuit 110 in the light-emitting section, which is used to apply the first driving voltage (VDD_PAM) to nodes E and F, apply a sweep voltage to node A, and turn on transistor T15.

[0819] In the gate signals (scan signal and transmit signal) above, n represents the nth row line. As described above, the driver 500 can drive the display panel 100 for each row line (or scan line or gate line), and therefore each of Vini(n), VST(n), SP(n), Vcomp(n) and Emi(n) can be applied to the sub-pixel circuits 110 included in the nth row line in the same way.

[0820] Sweep refers to the sweeping signal. Here, it is related to... Figures 9a to 33b Unlike the Sweep(n) shown in the embodiment, a sweep signal can be generated in TCON and applied equally to all sub-pixel circuits 110 of the display panel 100 via a level shifter. That is, the same sweep signal can be applied to all sub-pixel circuits 110 of the display panel 100. In this case, the sweep signal can be a global signal in the form of a voltage that continuously repeats linearly from a first voltage to a second voltage.

[0821] In this embodiment, when transistor T1 is turned on according to the transmit signal Emi(n), a portion of a sweep signal is applied to node A. Therefore, the selective application of a portion of the sweep signal to node A can be the aforementioned sweep voltage.

[0822] In this case, the transistor T1 of the display panel 100 is turned on according to the row line sequence based on the transmission signal. Therefore, apart from the fact that the sweep signal is a global signal that is applied to all row lines in the same way, the waveform of the sweep voltage applied to node A of the sub-pixel circuit 110 can vary according to the row line.

[0823] VPWM_R / G / B refers to the PWM data voltage applied to the sub-pixel circuit 110.

[0824] VCCG_R / G / B refers to the constant current generator data voltage applied to the sub-pixel circuit 110. As described above, according to embodiments of this disclosure, the same constant current generator data voltage of the same magnitude can be applied to the display panel 100 for each type of sub-pixel. Depending on the embodiment, the same constant current generator data voltage can be applied from the power supply IC to all sub-pixel circuits 110 of the display panel 100, regardless of the type of sub-pixel.

[0825] In an embodiment, to address the aforementioned IR drop problem, in Figure 35a In one embodiment, separate drive voltages (VDD_PAM and VDD_PWM) applied via separate wiring are also applied to the constant current generator circuit 111 in the data setting section and the light emission section, respectively.

[0826] That is, in Figure 35a In one embodiment, a second driving voltage (VDD_PWM) is applied to the constant current generator circuit 111 according to the Vini(n) signal in the data setting section, and a first driving voltage (VDD_PAM) is applied to the constant current generator circuit 111 according to the Emi(n) signal in the light emission section.

[0827] Therefore, even if a voltage drop occurs in the first driving voltage (VDD_PAM) due to the sub-pixel circuit operating in the light-emitting section, a separate second driving voltage (VDD_PWM) independent of the driving current is applied to the sub-pixel circuit operating in the data setting section, thus making it possible to set a stable constant current generator data voltage.

[0828] Figure 35b It is used to drive during image frame periods and blanking intervals, including Figure 35a Timing diagram of various signals of the display panel 100, including the sub-pixel circuit 110. Figure 35b The example presented is a display panel 100 comprising 312 rows.

[0829] As described above, according to embodiments of this disclosure, for an image frame, a data setting segment and multiple illumination segments can be defined for each line. Therefore, reference is made to... Figure 35b It can be seen that during the image frame period, a scan signal (VST, SP, Vcomp, Vini) for data setting operation is applied once for each line line, and an emission signal (Emi) for light emission operation is applied multiple times for each line line.

[0830] In embodiments, as described above, according to embodiments of this disclosure, data setting segments and light-emitting segments can be performed in the order of row lines. For this purpose, refer to... Figure 35b As can be seen, each of the gate signals (VST, SP, Vcomp, Vini, Emi) is applied sequentially in the order of the row lines.

[0831] That is, for example, applying a VST(n) signal with a low level and a VST(n+1) signal with a low level, with a time difference of up to 1 hour between them (in Figure 9b In the example, it is 1.4 μs). This is the same for the remaining gate signals (SP signals (SP(n) and SP(n+1)), Vcomp signals (Vcomp(n) and Vcomp(n+1)), Vini signals (Vini(n) and Vini(n+1)), and Emi signals (Emi(n) and Emi(n+1))).

[0832] In the embodiment, reference Figure 35b As can be seen, during the blanking interval, a discharge signal with a low level is applied to the non-light-emitting segment. Since the discharge signal is a global signal, it is applied equally to all sub-pixel circuits 110 of the display panel 100, thereby discharging the remaining charge in all inorganic light-emitting elements 120 of the display panel 100. That is, the potential difference between the two ends of all inorganic light-emitting elements 120 included in the display panel 100 can be removed.

[0833] Therefore, by removing the potential difference between the two ends of the inorganic light-emitting element 120 at a predetermined period, the correct black grayscale can be guaranteed as described above.

[0834] exist Figure 35b The example presented here involves performing an operation to discharge residual charge in an inorganic light-emitting element (e.g., to remove the potential difference between the two ends of the inorganic light-emitting element) once per image frame within a non-emitting segment existing during the blanking interval. However, the embodiments are not limited thereto, and as described above... Figures 7a to 7d As described above, depending on the product, this operation can be performed in various ways and in various situations.

[0835] In the embodiment, since it can be used Figure 35a The circuit diagram shown and Figure 35b The driving timing diagram shown is used to understand the detailed operation of the sub-pixel circuit 110 in the data setting section and the light emission section, so more detailed explanations of this aspect will be omitted below.

[0836] Figure 36a It is according to another embodiment of this disclosure having such Figure 34 Detailed circuit diagram of the sub-pixel circuit 110 configured in [reference]. Figure 36a The sub-pixel circuit 110 includes a constant current generator circuit 111, a PWM circuit 112, and a transistor T16. In this case, the constant current generator circuit 111 includes a first driving transistor T14, and the PWM circuit 112 includes a second driving transistor T13.

[0837] Transistor T16 has the same Figure 35a The connection structure and function of transistor T16 are the same, so repeated descriptions will be omitted. This is also true for test / discharge signals.

[0838] The information regarding VDD_PAM, VDD_PWM, VSS, and Vref is also the same as above. Figure 35a The content described in the previous section is the same, so repeated descriptions will be omitted.

[0839] Vini(n) refers to the scan signal applied to the sub-pixel circuit 110 in the data setting section, used to apply a reference voltage (Vref) to nodes B and D, and to apply a second driving voltage (VDD_PWM) to node F. The Vref applied to nodes B and D can be used to obtain the threshold voltage of the second driving transistor T13, and when the constant current generator data voltage is set, the second driving voltage VDD_PWM applied to node F can become the reference potential.

[0840] VST(n) refers to the scan signal applied to the sub-pixel circuit 110 in the data setting section to initialize the voltage of node C. When the voltage of node C is initialized according to the VST(n) signal, the first driving transistor T14 enters the conducting state.

[0841] Vini2(n) refers to the scan signal applied to the sub-pixel circuit 110 in the data setting section, used to apply a reference voltage Vref to node A. The Vref applied to node A can be used to apply the threshold voltage of the second driving transistor T13 to node B (e.g., the gate terminal of the second driving transistor T13), as described later.

[0842] SCCG(n) refers to the scan signal applied to the sub-pixel circuit 110 in the data setting section, which is used to apply the constant current generator data voltage (VCCG_R / G / B) to node C.

[0843] SPWM(n) refers to the scan signal applied to the sub-pixel circuit 110 in the data setting section, which is used to apply PWM data voltage (VPWM_R / G / B) to node A.

[0844] Vcomp(n) refers to the scan signal applied to the sub-pixel circuit 110 in the data setting section, used to apply the threshold voltage of the second driving transistor to node B.

[0845] Emi(n) refers to the emission signal applied to the sub-pixel circuit 110 in the light-emitting section, which is used to apply the first driving voltage (VDD_PAM) to nodes E and F, apply a sweep voltage to node A, and turn on transistor T15.

[0846] In the gate signals (scan signal and transmit signal) above, n represents the nth row line. As described above, the driver 500 can drive the display panel 100 for each row line (or scan line or gate line), and therefore each of Vini(n), Vini2(n), VST(n), SCCG(n), SPWM(n), Vcomp(n), and Emi(n) can be applied to the sub-pixel circuits 110 included in the nth row line in the same way.

[0847] Sweep refers to a sweep signal. The sweep signal is a global signal applied uniformly to all sub-pixel circuits 110 of the display panel 100, and it can have the form of a voltage that continuously and repeatedly changes linearly from a first voltage to a second voltage. When transistor T1 is turned on according to the emission signal Emi(n), a portion of the sweep signal is applied to node A, and the selective application of a portion of the sweep signal to node A can be the aforementioned sweep voltage. Since the content related to the sweep signal is the same as above... Figure 35a The content described herein is the same, so further repetition will be omitted.

[0848] VPWM_R / G / B refers to the PWM data voltage applied to the sub-pixel circuit 110.

[0849] VCCG_R / G / B refers to the constant current generator data voltage applied to the sub-pixel circuit 110.

[0850] In the embodiments, in Figure 36aIn this embodiment, a second driving voltage (VDD_PWM) is applied to the constant current generator circuit 111 according to the Vini(n) signal in the data setting section, and a first driving voltage (VDD_PAM) is applied to the constant current generator circuit 111 according to the Emi(n) signal in the light-emitting section. Therefore, even if a voltage drop occurs in the first driving voltage (VDD_PAM) due to the sub-pixel circuit operating in the light-emitting section, the constant current generator data voltage can be stably set to the sub-pixel circuit operating in the data setting section.

[0851] Figure 36b It is used to drive during image frame periods and blanking intervals, including Figure 36a Timing diagram of various signals of the display panel 100, including the sub-pixel circuit 110. Figure 36b The example presented is a display panel 100 comprising 312 rows.

[0852] As described above, according to embodiments of this disclosure, for an image frame, a data setting segment and multiple illumination segments can be defined for each line. Therefore, reference is made to... Figure 36b It can be seen that during the image frame period, a scan signal (VST, Vini, SCCG, Vini2, Vcomp, SPWM) for data setting operation is applied once to each line line, and an emission signal (Emi) for light emission operation is applied multiple times to each line line.

[0853] That is, the time period during which VST, Vini, SCCG, Vini2, Vcomp, and SPWM signals with low levels are applied becomes the data setting segment of the corresponding row line, and the time period during which Emi signals with low levels are applied becomes the light emission segment of the corresponding row line.

[0854] In embodiments, as described above, according to embodiments of this disclosure, data setting segments and light-emitting segments can be performed in the order of row lines. For this purpose, refer to... Figure 36b As can be seen, each of the gate signals (VST, Vini, SCCG, Vini2, Vcomp, SPWM, Emi) is applied sequentially according to the row line order. That is, for example, a VST(n) signal with a low level and a VST(n+1) signal with a low level are applied, with a time difference of up to 1H between them (in Figure 12b In the example, it is 1.4 μs). This applies to the remaining gate signals (Vini signals (Vini(n) and Vini(n+1)), SCCG signals (SCCG(n) and SCCG(n+1)), Vini2 signals (Vini2(n) and Vini2(n+1)), and Vcomp signals (Vcomp(n) and Vcomp(n)).

[0855] (n+1)), SPWM signals (SPWM(n) and SPWM(n+1)) and Emi signals (Emi(n) and Emi(n+1))) are the same.

[0856] In the embodiment, reference Figure 36b As can be seen, during the blanking interval, a discharge signal with a low level is applied to the non-light-emitting segment. Therefore, the potential difference between the two ends of the inorganic light-emitting element 120 is removed at a predetermined period, thus ensuring the achievement of correct black grayscale as described above.

[0857] exist Figure 36b The example presented above describes performing an operation to remove the potential difference between the two ends of an inorganic light-emitting element once within a non-light-emitting segment existing within the blanking interval for a single image frame. However, the embodiments are not limited to this, and as described above... Figures 7a to 7d As described above, depending on the product, this operation can be performed in various ways and in various situations.

[0858] In the embodiment, since it can be used Figure 36a The circuit diagram shown and Figure 36b The driving timing diagram shown is used to understand the detailed operation of the sub-pixel circuit 110 in the data setting section and the light emission section, so more detailed explanations of this aspect will be omitted below.

[0859] In this case, if we assume that the capacitance of C3 is sufficiently greater than the capacitance of C1, then C3 / (C1+C3) can have a value close to 1, and C1 / (C1+C3) can have a value close to 0. Here, if we assume C3 / (C1+C3) is 1, and C1 /

[0860] If (C1+C3) is 0, then it can be seen that... Figure 36a and Figure 36b The embodiments are in conjunction with Figure 35a and Figure 35b The implementation works in a similar manner to the previous examples.

[0861] In passing Figures 35a to 36b In the described embodiment, since the threshold voltage of the second driving transistor is acquired when the second driving transistor operates as a source follower, and the acquired threshold voltage is applied to the gate terminal of the second driving transistor, the deviation of the threshold voltage of the second driving transistor is compensated.

[0862] However, the method for compensating for deviations in the threshold voltage of the second driving transistor is not limited to this. Figure 37a and Figure 37b The following will describe an embodiment of compensating for the deviation of the threshold voltage of the second drive transistor by correcting the PWM data voltage.

[0863] In the process of passing Figure 37a and Figure 37b In the case of the described embodiments, as described above... Figures 35a to 36b Compared to the described embodiments, the number of transistors included in the sub-pixel circuit is reduced, thus offering the advantage that the embodiments can be applied to display panels with higher resolution.

[0864] In the embodiments, in Figure 37a and Figure 37b In one embodiment, it can be achieved by using with Figures 35a to 36b The method used in the embodiment is the same as that used to compensate for the deviation of the threshold voltage of the first driving transistor.

[0865] Figure 37a It is according to yet another embodiment of this disclosure having such Figure 34 Detailed circuit diagram of the sub-pixel circuit 110 configured in [reference]. Figure 37a The sub-pixel circuit 110 includes a constant current generator circuit 111, a PWM circuit 112, and a transistor T13. In this case, the constant current generator circuit 111 includes a first driving transistor T11, and the PWM circuit 112 includes a second driving transistor T10.

[0866] Transistor T13 has the same Figure 35a The connection structure and function of transistor T16 are the same, so repeated descriptions will be omitted. This is also true for test / discharge signals.

[0867] The content regarding VDD_PAM, VDD_PWM, and VSS is also the same as above. Figure 35a The content described in the text is the same.

[0868] In the embodiment, with Figure 35a The sub-pixel circuit 110 in the middle is different and does not... Figure 37a A reference voltage (Vref) is applied to the sub-pixel circuit 110. This is because: Figure 37a In one embodiment, it is not necessary to obtain the threshold voltage of the second driving transistor during the operation of the sub-pixel circuit 110.

[0869] Vini(n) refers to the scan signal applied to the sub-pixel circuit 110 during the data setting segment, used to apply the second driving voltage (VDD_PWM) to nodes B and D. The second driving voltage (VDD_PWM) applied to node B functions to keep the second driving transistor T10 in the off state during the data setting segment, and the second driving voltage (VDD_PWM) applied to node D becomes the reference potential when setting the constant current generator data voltage.

[0870] VST(n) refers to the scan signal applied to the sub-pixel circuit 110 in the data setting section to initialize the voltage of node C. When the voltage of node C is initialized according to the VST(n) signal, the first driving transistor T11 enters the conducting state.

[0871] SP(n) refers to the scan signal applied to the sub-pixel circuit 110 in the data setting section, used to apply a constant current generator data voltage (VCCG_R / G / B) to node C and a PWM data voltage (VPWM_R / G / B) to node A. In this case, the PWM data voltage (VPWM_R / G / B) may be a voltage reflecting a compensation value that reflects the deviation from the threshold voltage of the second driving transistor. The compensation value will be described later in the description of the VPWM_R / G / B signal.

[0872] In the embodiment, with Figure 35a The sub-pixel circuit 110 in the middle is different and does not... Figure 37a The sub-pixel circuit 110 in the middle applies the Vcomp(n) signal. This is because: in Figure 37a In one embodiment, it is not necessary to apply the threshold voltage of the second driving transistor to the B node during the operation of the sub-pixel circuit 110.

[0873] Emi(n) refers to the emission signal applied to the sub-pixel circuit 110 in the light-emitting segment, which is used to apply the first driving voltage (VDD_PAM) to the E node and the D node, apply the sweep voltage to the A node, and turn on the transistor T12.

[0874] In the gate signals (scan signal and transmit signal) above, n represents the nth row line. As described above, the driver 500 can drive the display panel 100 for each row line (or scan line or gate line), so each of Vini(n), VST(n), SP(n) and Emi(n) can be applied to the sub-pixel circuits 110 included in the nth row line in the same way.

[0875] Sweep refers to the sweep signal. The information about sweep signals is the same as above. Figure 35a The content described in the previous section is the same, so repeated descriptions will be omitted.

[0876] VPWM_R / G / B refers to the PWM data voltage applied to the sub-pixel circuit 110. Figure 35a and Figure 36b In this embodiment, the PWM data voltage is only the voltage corresponding to the grayscale value of the sub-pixel, but... Figure 37a and Figure 37b In one embodiment, the PWM data voltage can be a voltage corresponding to the value of the compensation value reflected in the grayscale value of the sub-pixel.

[0877] In this case, the compensation value is used to compensate for the brightness deviation of the sub-pixel based on the deviation of the threshold voltage of the second driving transistor, and can be calculated for each sub-pixel, for example, during the manufacturing process of the display panel 100, and stored in memory. Therefore, the TCON can read the compensation value stored in memory and reflect it in the image data, and send the image data reflected by the compensation value to the data driver, so that the PWM data voltage reflected by the compensation value can be applied to the sub-pixel circuit 110.

[0878] More specifically, for example, during the manufacturing process, a test image (e.g., an image where all pixels have the same grayscale value) can be displayed on the display panel 100, and an image capturing device can capture the display panel 100. When the test image is displayed, the compensation value has not yet been reflected, so each pixel in the captured image may have blemishes or brightness differences due to deviations in the threshold voltage of the second driving transistor. Therefore, in a subsequently captured image, the compensation value for each sub-pixel can be calculated by calculating the grayscale value to be reflected in each sub-pixel, so that there are no blemishes or brightness deviations.

[0879] VCCG_R / G / B refers to the constant current generator data voltage applied to the sub-pixel circuit 110. Since the content related to the constant current generator data voltage is the same as described above, repeated explanations will be omitted. Furthermore, since the content regarding the problem caused by the IR drop when the drive current flows in the light-emitting section and its solutions is the same as described above, repeated explanations will also be omitted.

[0880] Figure 37b It is used to drive during image frame periods and blanking intervals, including Figure 37a Timing diagram of various signals of the display panel 100, including the sub-pixel circuit 110. Figure 37b The example presented is a display panel 100 comprising 312 rows.

[0881] refer to Figure 37b As can be seen, during the image frame period, a scan signal (VST, SP, Vini) for data setting operation is applied once to each line line, and an emission signal (Emi) for emission operation is applied multiple times to each line line. That is, the time period during which VST, SP, and Vini signals with low levels are applied becomes the data setting segment of the corresponding line line, and the time period during which Emi signals with low levels are applied becomes the emission segment of the corresponding line line.

[0882] Additionally, refer to Figure 37bIt can be seen that each of the gate signals (VST, SP, Vini, Emi) is applied sequentially according to the row line order. That is, for example, a VST(n) signal with a low level and a VST(n+1) signal with a low level are applied, with a time difference of up to 1 hour between them (in Figure 12b In the example, it is 1.4 μs). This is the same for the remaining gate signals (SP signals (SP(n) and SP(n+1)), Vini signals (Vini(n) and Vini(n+1)), and Emi signals (Emi(n) and Emi(n+1))).

[0883] In the embodiment, reference Figure 37b As can be seen, during the blanking interval, a discharge signal with a low level is applied to the non-emitting section. This aspect is the same as described above.

[0884] Because it is possible Figure 37a The circuit diagram shown and Figure 37b The driving timing diagram shown is used to understand the detailed operation of the sub-pixel circuit 110 in the data setting section and the light emission section, so more detailed explanations of this aspect will be omitted below.

[0885] In the following text, it will be through Figures 38 to 39b Another embodiment of a display device that applies an external compensation method is described.

[0886] Figure 38 This is a schematic block diagram of a sub-pixel circuit 110 according to an embodiment of the present disclosure. Figure 38 The sub-pixel circuit 110 includes a constant current generator circuit 111, a PWM circuit 112, a transistor T10, and a transistor T12.

[0887] The constant current generator circuit 111 includes a first driving transistor, and it can provide a constant current to the inorganic light-emitting element 120 based on the constant current generator data voltage applied during the display driving period.

[0888] Specifically, when a driving voltage is applied to the second driving transistor T8 of the PWM circuit 112 in the light-emitting section, the constant current generator circuit 111 can apply a driving voltage to the inorganic light-emitting element 120 through the first driving transistor T9. Therefore, a constant current can flow in the inorganic light-emitting element 120.

[0889] In this case, the amplitude of the constant current can vary according to the amplitude of the constant current generator data voltage applied to the constant current generator circuit 111. That is, the constant current generator circuit 111 has the capability to perform PAM driving of the inorganic light-emitting element 120. Therefore, in the embodiment, the constant current generator data voltage can be referred to as the PAM data voltage, and the constant current generator circuit 111 can be referred to as the PAM circuit.

[0890] However, according to embodiments of this disclosure, the same constant current generator data voltage can be applied to all constant current generator circuits 111 of the display panel 100, and in this example, the constant current generator circuit 111 can provide a constant current of constant amplitude (or the same amplitude) to all inorganic light-emitting elements 120 of the display panel 100.

[0891] The names “constant current generator circuit” and “constant current generator data voltage” only emphasize that when th...

Claims

1. A display device, comprising: The display panel includes a pixel array and sub-pixel circuits. In the pixel array, pixels composed of multiple inorganic light-emitting elements are arranged in multiple rows, and the sub-pixel circuits correspond to the inorganic light-emitting elements of the pixel array. as well as The driver is configured to drive the sub-pixel circuit based on an image data voltage corresponding to an image frame, causing the inorganic light-emitting elements of the pixel array to emit light multiple times in sequence along the multiple row lines. The sub-pixel circuits each include a discharge transistor configured to remove the potential difference between the two ends of the corresponding inorganic light-emitting element at a predetermined period. The driver is further configured to simultaneously apply a global discharge control signal to the gate terminals of all the discharge transistors at the predetermined period to turn on all the discharge transistors during a non-light-emitting segment in the blanking interval between two consecutive image frames, wherein the global discharge control signal is not applied to the gate signals of the display panel in the order of the row lines.

2. The display device according to claim 1, wherein, The driver is also configured to: During the data setting segment performed in the order of the multiple row lines, the image data voltage is set to the sub-pixel circuit in the order of the multiple row lines, and In each of the multiple light-emitting segments arranged in the order of the multiple row lines, the sub-pixel circuit is driven based on the set image data voltage, so that the inorganic light-emitting elements of the pixel array emit light in the order of the multiple row lines.

3. The display device according to claim 2, wherein, The first luminescent segment of the plurality of luminescent segments is continuous in time with the data setting segment, and The plurality of light-emitting segments have a predetermined time interval relative to each other.

4. The display device according to claim 1, wherein, The discharge transistor is further configured to short-circuit the two ends of the inorganic light-emitting element when the discharge transistor is turned on.

5. The display device according to claim 4, wherein, The discharge transistor is also configured to be turned on at least once per image frame.

6. The display device according to claim 4, wherein, The discharge transistor is also configured to turn on once every multiple image frames.

7. The display device according to claim 1, wherein, Based on the image data voltage being a value corresponding to black grayscale, the potential difference is generated by the leakage current flowing in the inorganic light-emitting element and the junction capacitance of the inorganic light-emitting element.

8. The display device according to claim 2, wherein, After the data setting segment is performed on all the multiple rows of the display panel, the discharge transistors included in the display panel are immediately turned on.

9. The display device according to claim 2, in, The image data voltage includes constant current generator data voltage and pulse width modulation (PWM) data voltage, and The sub-pixel circuits respectively include: A constant current generator circuit includes a first driving transistor and is configured to provide a constant current to the corresponding inorganic light-emitting element based on the constant current generator data voltage; and The PWM circuit includes a second driving transistor and is configured to control the timing of supplying the constant current to the corresponding inorganic light-emitting element based on a sweep voltage that sweeps between two different voltages and the PWM data voltage.

10. The display device according to claim 9, wherein, The constant current generator circuit is further configured to: in the data setting section, set the constant current generator data voltage and a first voltage based on the threshold voltage of the first driving transistor to the gate terminal of the first driving transistor, and The PWM circuit is further configured to set the PWM data voltage and a second voltage based on the threshold voltage of the second driving transistor to the gate terminal of the second driving transistor in the data setting section.

11. The display device according to claim 10, wherein, The constant current generator circuit is further configured to: in each of the plurality of light-emitting segments, provide the inorganic light-emitting element with a drive current having an amplitude based on the first voltage, and The PWM circuit is further configured to control the duration of providing the constant current to the corresponding inorganic light-emitting element based on the voltage of the gate terminal of the second driving transistor changing from the second voltage according to the sweep voltage in each of the plurality of light-emitting segments.

12. The display device according to claim 9, further comprising: The sensing unit is configured to sense the current flowing in the first driving transistor and the second driving transistor based on a specific voltage, and to output sensing data corresponding to the sensed current. as well as The correction unit is configured to correct the constant current generator data voltage and the PWM data voltage applied to the sub-pixel circuit based on the sensing data.

13. The display device according to claim 2, wherein, The sub-pixel circuit is configured to be driven by a first driving voltage in each of the plurality of light-emitting segments, and is also configured to be driven by a second driving voltage separate from the first driving voltage in the data setting segment.

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