Zero-crossing sampling method and circuit for voltage

Abstract

The embodiment of the present application provides a zero-crossing point sampling method and circuit of voltage. In the embodiment of the present application, a to-be-tested voltage signal is acquired; the to-be-tested voltage signal is compared with a first reference voltage signal, so that the to-be-tested voltage signal acquires a second reference voltage signal with an indication in the case of no signal through the first reference voltage signal; through the comparison result of the first reference voltage signal, the to-be-tested voltage signal acquires the second reference voltage signal of zero in the case of signal under the condition of meeting a preset condition; and the voltage signal of zero-crossing point is determined according to the acquired second reference voltage signal and the to-be-tested voltage signal. So that the condition of false acquisition is reduced.

Description

Technical Field

[0001] This invention relates to the field of voltage sampling, specifically a method and circuit for sampling the zero-crossing point of voltage. Background Technology

[0002] Zero-crossing detection circuits are commonly used and widely applied in power electronics, electrical, and mechanical equipment. They output a signal at the moment the AC voltage is "zero," which can be used in many engineering applications. For example, in smart switches, zero-crossing detection technology is used to ensure conduction at zero voltage, thereby suppressing inrush current and protecting relay contacts and other components. In dimmer switches and motor speed controllers, zero-crossing detection technology can control the AC conduction angle from zero, adjusting the brightness of lighting fixtures and the speed of motors. However, the zero-crossing sampling circuits used in these devices can cause false sampling when there is no signal or the signal input remains near zero. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to overcome the shortcomings of the existing technology and provide a voltage zero-crossing sampling method and circuit that can reduce false sampling and improve sampling accuracy.

[0004] To achieve the above-mentioned technical objectives, the present invention provides a method for sampling the zero-crossing point of a voltage, comprising: acquiring a voltage signal to be measured; comparing the voltage signal to be measured with a first reference voltage signal, so as to acquire a second reference voltage signal with indication when there is no signal using the first reference voltage signal; and, based on the comparison result with the first reference voltage signal, acquiring a second reference voltage signal of zero when there is a signal using the second reference voltage signal when the comparison result with the first reference voltage signal meets a preset condition; and determining the voltage signal at the zero-crossing point based on the acquired second reference voltage signal and the voltage signal to be measured.

[0005] Specifically, acquiring the voltage signal to be measured includes: acquiring an input signal; and when the input signal is not a voltage signal within a preset range, converting the input signal into a voltage signal within the preset range as the voltage signal to be measured.

[0006] Specifically, converting the input signal into a voltage signal within a preset range includes: converting different types of input signals into voltage signals within a preset range using a matching circuit that matches different types of input signals.

[0007] Specifically, comparing the voltage signal to be measured with the first reference voltage signal includes: when the voltage signal to be measured is at a positive zero crossing, comparing the voltage signal to be measured with a preset negative voltage signal, so that the voltage signal to be measured can obtain a second reference voltage signal with indication when there is no signal through the preset negative voltage signal; When the voltage signal to be measured is at a negative zero-crossing point, the voltage signal to be measured is compared with a preset positive voltage signal, so that the voltage signal to be measured can obtain a second reference voltage signal with indication when there is no signal.

[0008] Specifically, comparing the voltage signal to be measured with a preset negative voltage signal to obtain a second reference voltage signal with indication when there is no signal includes: inputting the voltage signal to be measured into the positive input terminal of a first comparator, comparing it with a preset negative voltage signal in the negative input terminal of the first comparator, outputting a differential signal, wherein the voltage signal of the voltage signal to be measured is zero when there is no signal; outputting a result greater than zero based on the output results of the differential signals of the second comparator and the first comparator, and adjusting the output result greater than zero to a preset range greater than zero based on the adjustment resistor, thereby obtaining a high-level second reference voltage signal.

[0009] Specifically, the step of obtaining a second reference voltage signal that is zero when the voltage signal to be measured is present, based on the comparison result with the first reference voltage signal and under preset conditions, includes: when the voltage signal to be measured is at a positive zero-crossing point, inputting the voltage signal to be measured to the positive input terminal of the first comparator and comparing it with a preset negative voltage signal at the negative input terminal of the first comparator, and outputting a differential signal; when the voltage signal to be measured is less than the preset negative voltage signal, outputting a result less than zero based on the output results of the second comparator and the differential signal of the first comparator, and adjusting the output result less than zero to a second reference voltage signal of zero according to the adjustment resistor; when the voltage signal to be measured changes from low to high, and in During the change, if the voltage signal to be measured is greater than the preset negative value, the differential signal corresponding to the first comparator is delayed by a delay circuit connected to the first comparator. When the output result of the differential signal before the delay is less than zero, the output result of the second comparator connected to the delay circuit and the output result of the differential signal before the delay circuit are used to output a result less than zero until the delay ends. The output result less than zero is adjusted to a second reference voltage signal of zero by adjusting the resistor. When the delay ends, the corresponding output result is output by the second comparator connected to the delay circuit and the output result of the differential signal of the delay circuit. The corresponding output result is adjusted by adjusting the resistor to obtain the corresponding second reference voltage signal.

[0010] Specifically, the delay circuit includes two sets of sub-delay circuits, corresponding to the output results of the differential signal of the first comparator. Each sub-delay circuit includes a resistor, a capacitor, and a diode. The diode is connected in parallel with the resistor, thereby connecting to the capacitor. When the voltage signal to be measured is at a positive zero-crossing point, when the positive output terminal of the first comparator outputs a falling edge and the negative output terminal outputs a rising edge, the diode conducts, and the voltage on the capacitor changes with the differential signal. When the positive output terminal of the first comparator outputs a rising edge and the negative output terminal outputs a falling edge, the diode does not conduct, and the resistor and capacitor form an RC circuit, causing the voltage on the capacitor to gradually decrease, thus achieving a delay.

[0011] Specifically, determining the zero-crossing voltage signal based on the acquired second reference voltage signal and the voltage signal to be measured includes: when the voltage signal to be measured is at a positive zero-crossing point, inputting the voltage signal to be measured to the positive input terminal of the third comparator, inputting the acquired second reference voltage signal to the negative input terminal of the third comparator, and outputting a differential result through the third comparator; using the differential result output by the third comparator as the corresponding input of the fourth comparator, and outputting a high-level signal that can identify a single end through the fourth comparator, so as to sample the zero-crossing voltage signal.

[0012] Specifically, before the delay, when the voltage signal to be measured is greater than the preset negative value, the output result of the differential signal of the second comparator and the first comparator is positive to zero. The output result is adjusted to be positive to zero within the preset range according to the adjustment resistor, and a high-level second reference voltage signal is obtained.

[0013] On the other hand, the present invention provides a voltage zero-crossing sampling circuit, comprising: a first comparison circuit, a delay circuit, a first voltage adjustment circuit, a second comparison circuit, and a second voltage adjustment circuit connected in sequence; the first comparison circuit is used to acquire a voltage signal to be measured and compare the voltage signal to be measured with a first reference voltage signal; the delay circuit and the first voltage adjustment circuit are used to acquire a second reference voltage signal with indication when the voltage signal to be measured is absent, based on the first reference voltage signal, and to acquire a second reference voltage signal of zero when the voltage signal to be measured is present, based on the comparison result with the first reference voltage signal and under preset conditions; the second comparison circuit and the second voltage adjustment circuit are used to determine the voltage signal at the zero-crossing point based on the acquired second reference voltage signal and the voltage signal to be measured.

[0014] In this embodiment, a voltage signal to be measured is acquired; the voltage signal to be measured is compared with a first reference voltage signal, so that a second reference voltage signal with indication is acquired when there is no signal, based on the comparison result with the first reference voltage signal, and if a preset condition is met, the voltage signal to be measured is acquired as a second reference voltage signal of zero when there is a signal; and the voltage signal at the zero crossing point is determined based on the acquired second reference voltage signal and the voltage signal to be measured.

[0015] The first reference voltage signal enables the acquisition of a second reference voltage signal with indication when the voltage signal under test is absent. By comparing the result with the first reference voltage signal and meeting preset conditions, the second reference voltage signal, which is zero when the voltage signal under test is present, is acquired. This allows the second reference voltage signal to change with the voltage signal under test, thereby reducing the occurrence of false acquisitions. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1This is a flowchart illustrating the voltage zero-crossing sampling method according to an embodiment of this application. Figure 2 This is a schematic diagram of the structure of the voltage zero-crossing sampling circuit according to an embodiment of this application; Figure 3 This is a schematic diagram of the voltage signal according to an embodiment of this application; Figure 4 This is a schematic diagram of the voltage zero-crossing sampling circuit according to an embodiment of this application; Figure 5 This is a schematic diagram of the voltage signal according to an embodiment of this application; Figure 6 This is a schematic diagram of the voltage zero-crossing sampling circuit according to an embodiment of this application. Detailed Implementation

[0018] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0019] like Figure 1 As shown, this application provides a method for sampling the zero-crossing point of a voltage, the method 100 including: 101: Acquire the voltage signal to be measured.

[0020] 102: Compare the voltage signal to be measured with the first reference voltage signal so that the voltage signal to be measured can obtain a second reference voltage signal with indication when there is no signal, and obtain a second reference voltage signal with zero when there is a signal by comparing the result with the first reference voltage signal and meeting the preset conditions.

[0021] 103: Determine the zero-crossing voltage signal based on the acquired second reference voltage signal and the voltage signal to be measured.

[0022] It should be noted that the execution subject of this method 100 can be a laser or other sampling devices, such as sampling circuits, smart switch products, dimming switches, motor speed control products, etc., which require zero-point sampling.

[0023] Furthermore, commonly used zero-crossing sampling methods are only applicable to continuous oscillating signals similar to sine waves. When there is no signal input or the signal input remains near zero, a series of pulse signals will be output, causing false acquisition. This application's embodiment uses a servo-driven voltage signal as a reference signal to reduce the occurrence of false acquisition.

[0024] The following is a detailed explanation of the above steps: 101: Acquire the voltage signal to be measured.

[0025] The required sampling signal can be obtained directly, which is also the direct acquisition of the input signal.

[0026] Among them, the voltage signal to be measured is a measurable voltage signal, such as a measurable low-voltage voltage signal, such as ±15 volts.

[0027] When the input signal is not the voltage signal to be measured, the input signal needs to be converted.

[0028] Specifically, acquiring the voltage signal to be measured includes: acquiring the input signal; and when the input signal is not within the preset range of voltage signals, converting the input signal into a voltage signal within the preset range as the voltage signal to be measured.

[0029] When the input signal is a current signal, a differential signal, or a high-voltage signal, conversion is required.

[0030] For example, since the signals to be sampled are different, the input signals need to be adjusted first to facilitate subsequent processing. For instance, high-voltage signals need to be stepped down to the aforementioned low-voltage test voltage signals, current signals need to be converted to the aforementioned low-voltage test voltage signals, and differential signals need to be differentially acquired and converted into low-voltage test voltage signals, etc.

[0031] The conversion of input signals into voltage signals within a preset range includes: converting different types of input signals into voltage signals within a preset range using a matching circuit that matches different types of input signals.

[0032] The different types of input signals mentioned above are converted using matching circuits. For example, high-voltage signals can be converted using a voltage divider circuit as the matching circuit. Current signals can be converted using a current-to-voltage circuit as the matching circuit. Differential signals can be converted using a differential-to-voltage circuit as the matching circuit.

[0033] Among them, such as Figure 2 As shown, the input signal can first be matched by the matching circuit 201 to obtain the corresponding voltage signal to be measured. It should be understood that if the voltage signal to be measured already meets the above sampling requirements, then matching is not required.

[0034] For example, such as Figure 4As shown, when the input signal is a 50-ohm single-ended voltage signal, the matching circuit can be a voltage divider matching circuit. For example, resistor R5 is a 50-ohm resistor, with one end connected to the input terminal and the input signal, and the other end grounded. This achieves impedance matching. As mentioned earlier, impedance matching is not limited to 50-ohm resistors; different matching methods are used depending on the signal. For example, resistors can be combined with amplifiers, capacitors, inductors, etc., to form a matching circuit.

[0035] It should be noted that, by adding a matching circuit, the types of signals that can be adapted to in this application embodiment are greatly increased.

[0036] 102: Compare the voltage signal to be measured with the first reference voltage signal so that the voltage signal to be measured can obtain a second reference voltage signal with indication when there is no signal, and obtain a second reference voltage signal with zero when there is a signal by comparing the result with the first reference voltage signal and meeting the preset conditions.

[0037] In this process, a second reference voltage signal, such as a high or low level, is acquired when there is no signal present in the voltage signal under test. Conversely, when there is a signal present in the voltage signal under test, the second reference voltage signal is zero. The voltage signal under test is zero when there is no signal present.

[0038] like Figure 3 As shown, for the input signal, waveform segment A302 represents the case where there is no signal. Waveform segment B301 represents the case where there is a signal, but this signal segment includes cases where the signal is 0.

[0039] like Figure 5 As shown, for the input signal, waveform segment A302 represents the case of no signal. Waveform segment M502 represents the case of a signal, but this segment includes cases where the signal is 0. For example... Figure 2 As shown, the voltage signal to be measured can be compared with a first reference voltage signal using the "high-speed comparator circuit 1" 202. When there is no signal to be measured, the first reference voltage signal can be negative or positive; specifically, it can be a small negative value, such as -1V or -2V, or a small positive value, such as 1V or 2V. When compared with the voltage signal to be measured when there is no signal, it is less than or greater than the voltage signal to be measured. The first reference voltage signal can be provided by the "high-speed comparator circuit 1" 202. A comparison result is output, and based on this comparison result, a second reference voltage signal with an indication, such as a high level or a low level, can be obtained.

[0040] When the input signal is at a positive zero-crossing point and the voltage signal to be measured is present, the first reference voltage signal can be negative. This results in a comparison output by the "high-speed comparison circuit 1" 202. If this comparison result meets a preset condition, a second reference voltage signal of 0 can be obtained. When a signal is present, the input signal changes from low to high (i.e., at a positive zero-crossing point). During this change, if the input signal exceeds a preset negative voltage signal (e.g., -1V), the delay circuit begins to delay the corresponding input signal, extending the comparison result before the delay.

[0041] Among them, such as Figure 3 As shown, when waveform segment A302 in the input signal is empty, according to the above discussion, waveform segment D304 in the corresponding second reference voltage signal is high. For the waveform segment B301 in the input signal that changes from small to large, the corresponding waveform segment C303 in the second reference voltage signal is 0.

[0042] Specifically, comparing the voltage signal to be measured with the first reference voltage signal includes: when the voltage signal to be measured is at a positive zero crossing, comparing the voltage signal to be measured with a preset negative voltage signal, so that the voltage signal to be measured can acquire a second reference voltage signal with indication when there is no signal through the preset negative voltage signal.

[0043] As mentioned earlier, under the condition of a positive zero-crossing, the measured voltage signal can yield the corresponding second reference voltage signal even without a signal. This will not be elaborated upon further here. It should be noted that, as... Figure 2 As shown, in addition to the aforementioned "high-speed comparison circuit 1" 202, there can also be a delay circuit 203 and a "voltage adjustment circuit 1" 204. The delay circuit 203 delays the signal from high to low, while the "voltage adjustment circuit 1" 204 prevents output errors when the signal is always zero (i.e., there is no signal). This ensures that the final output second reference voltage can be compared with the voltage signal to be measured.

[0044] When the voltage signal to be measured is at a negative zero-crossing point, the voltage signal to be measured is compared with a preset positive voltage signal, so that the voltage signal to be measured can obtain a second reference voltage signal with indication when there is no signal.

[0045] In the case of a negative zero-crossing, the first reference voltage signal can be positive. This results in a comparison output by the "high-speed comparison circuit 1" 202. If this comparison result meets a preset condition, a second reference voltage signal of 0 can be obtained. When a signal is present, the input signal changing from high to low represents a negative zero-crossing. If, during this change, the input signal is less than a preset positive voltage signal (e.g., 1V), the delay circuit begins to delay, extending the comparison result before the delay.

[0046] like Figure 2 As shown, in addition to the aforementioned "high-speed comparison circuit 1" 202, there can also be a delay circuit 203 and a "voltage adjustment circuit 1" 204. The delay circuit 203 delays the signal from low to high, while the "voltage adjustment circuit 1" 204 prevents output errors when the signal is always zero (i.e., there is no signal). This ensures that the final output second reference voltage can be compared with the voltage signal to be measured.

[0047] Specifically, the method involves comparing the voltage signal to be measured with a preset negative voltage signal to obtain a second reference voltage signal with indication when there is no signal. This includes: inputting the voltage signal to be measured into the positive input terminal of a first comparator and comparing it with a preset negative voltage signal in the negative input terminal of the first comparator to output a differential signal; when there is no signal, the voltage signal of the voltage signal to be measured is zero; outputting a result greater than zero based on the output results of the second comparator and the differential signal of the first comparator; adjusting the output result greater than zero to a preset range based on the adjustment resistor to obtain a high-level second reference voltage signal.

[0048] The first comparator is a high-speed comparator.

[0049] For example, such as Figure 4 As shown, the first comparator U2 forms the "high-speed comparator circuit 1" 202. The first comparator U2 is a dual-input dual-output high-speed comparator. The first comparator U2 compares the voltage signal to be measured with the negative small-value voltage signal to generate a preliminary reference voltage signal.

[0050] The negative small-value voltage signal can be provided by resistors R6 and R7. The voltage signal to be measured is input to the positive input terminal of the first comparator U2, and the first reference voltage signal is input to the negative input terminal of the first comparator U2. Resistors R6 and R7 are connected in series, and power supply voltages are applied across their ends. One end of resistor R7 is connected to the common ground voltage VSS, and one end of resistor R6 is connected to the input voltage VCC. The negative input terminal of the first comparator U2 is connected between resistors R6 and R7 to perform voltage division and obtain the first reference voltage signal. The first comparator U2 is also supplied with a power supply voltage, with the positive and negative power supply terminals respectively connected to the input voltage VCC and the common ground voltage VSS. The differential signal comparison result is output through the first comparator U2.

[0051] As mentioned above, when signal conversion is required via a matching circuit, such as... Figure 4 As shown, the non-grounded terminal of resistor R5, i.e., the input terminal, can be connected to the positive input terminal of the first comparator U2.

[0052] When the voltage signal to be measured is zero in the absence of a signal, and the first reference voltage signal can be -1V. For example... Figure 3 As shown, the output of the first comparator U2 can be a high-level signal at the positive output terminal Q and a negative output terminal Q. (Right now Figure 3 In the differential signal ( / Q), a low-level signal indicates that the voltage signal under test is greater than the first reference voltage signal, and this differential signal is also greater than zero. Thus, a high-level second reference voltage signal can be obtained.

[0053] In addition, such as Figure 4 As shown, the delay circuit 203 does not delay the signal when there is no signal, so that the "voltage adjustment circuit 1" 204 obtains a voltage signal with an output greater than 0 by comparing the differential signal input to the second comparator U3. For example, Figure 3 As shown, the differential signal input to the second comparator U3 (i.e., the input signal of the second comparator U3) can be a high-level signal at the positive input terminal and a low-level signal at the negative input terminal. The voltage signal greater than 0 is adjusted according to the adjusting resistors R3 and R4 in "Voltage Adjustment Circuit 1" 204 to obtain a voltage signal greater than 0 within the preset output range, i.e., a high-level signal. The adjusting resistors R3 and R4 are connected in series, and the middle of the two resistors is connected to the subsequent processing circuit to form a voltage divider. Both resistors are supplied with power supply voltages. One end of the adjusting resistor R4 is connected to the input voltage VCC, and one end of the adjusting resistor R3 is connected to the output terminal of the second comparator U3. The second comparator U3 is also supplied with power supply voltages. The positive and negative power supply terminals of the second comparator U3 are respectively connected to the input voltage VCC and the common ground voltage VSS.

[0054] Specifically, the method involves comparing the voltage signal to be measured with a preset positive voltage signal to obtain a second reference voltage signal with indication when there is no signal. This includes: inputting the voltage signal to be measured into the positive input terminal of a first comparator and comparing it with a preset positive voltage signal in the negative input terminal of the first comparator to output a differential signal; when there is no signal, the voltage signal of the voltage signal to be measured is zero; outputting a result less than zero based on the output results of the second comparator and the differential signal of the first comparator; adjusting the output result less than zero to a preset range based on the adjustment resistor to obtain a low-level second reference voltage signal.

[0055] For example, such as Figure 6 As shown, the first comparator U2 forms the "high-speed comparator circuit 1" 202. The first comparator U2 is a dual-input dual-output high-speed comparator. The first comparator U2 compares the voltage signal to be measured with a positive small voltage signal to generate a preliminary reference voltage signal.

[0056] The positive small-value voltage signal can be provided by resistors R6 and R7. The voltage signal to be measured is input to the positive input terminal of the first comparator U2, and the first reference voltage signal is input to the negative input terminal of the first comparator U2. Resistors R6 and R7 are connected in series, and power supply voltages are applied across their ends. One end of resistor R7 is connected to the common ground voltage VSS, and one end of resistor R6 is connected to the input voltage VCC. The negative input terminal of the first comparator U2 is connected between resistors R6 and R7 to perform voltage division and obtain the first reference voltage signal. The first comparator U2 is also supplied with a power supply voltage, with the positive and negative power supply terminals respectively connected to the input voltage VCC and the common ground voltage VSS. The differential signal comparison result is output through the first comparator U2.

[0057] As mentioned above, when signal conversion is required via a matching circuit, such as... Figure 6 As shown, the non-grounded terminal of resistor R5, i.e., the input terminal, can be connected to the positive input terminal of the first comparator U2.

[0058] When the voltage signal to be measured is zero in the absence of a signal, and the first reference voltage signal can be 1V. For example... Figure 5 As shown, the output of the first comparator U2 can be a low-level signal at the positive output terminal Q and a low-level signal at the negative output terminal. (Right now Figure 3 In the above, / Q) is a high-level signal, indicating that the voltage signal under test is less than the first reference voltage signal, and this differential signal is also less than zero. Thus, a low-level second reference voltage signal can be obtained.

[0059] In addition, such as Figure 6 As shown, the delay circuit 203 does not delay the signal when there is no signal, so that the voltage adjustment circuit 1 204 obtains a voltage signal with an output less than 0 by comparing the differential signal input to the second comparator U3. For example, Figure 5 As shown, the differential signal input to the second comparator U3 (i.e., the input signal of the second comparator U3) can be a low-level signal at the positive input terminal and a high-level signal at the negative input terminal. The voltage signal less than 0 is adjusted according to the adjusting resistors R3 and R4 in "Voltage Adjustment Circuit 1" 204 to obtain a voltage signal less than 0 within the preset output range, i.e., a low-level signal. The adjusting resistors R3 and R4 are connected in series, and the middle of the two resistors is connected to the subsequent processing circuit to form a voltage divider. Both resistors are supplied with power supply voltages. One end of the adjusting resistor R4 is connected to an input voltage VSS, and one end of the adjusting resistor R3 is connected to the output terminal of the second comparator U3. The second comparator U3 is also supplied with power supply voltages. The positive power supply terminal and the negative power supply terminal of the second comparator U3 are respectively connected to an input voltage VCC and a common ground voltage VSS.

[0060] It should be noted that, by selecting a high-speed comparator, the processing signal frequency can reach up to several hundred MHz megahertz, thus avoiding the influence of amplifiers on high-speed signals.

[0061] Since existing zero-crossing sampling is usually applicable at low frequencies, power electronics operate at 50Hz, and circuits used in electrical and mechanical equipment are usually below a few kHz or kilohertz.

[0062] In some fields, such as wireless communication, radar, and laser, high-speed applications require sampling frequencies between tens of kHz and hundreds of MHz, which existing sampling methods cannot cover. However, the embodiments of this application are applicable to signal frequencies up to hundreds of MHz megahertz, making them suitable. Furthermore, the high accuracy of time-to-digital converters (TDC) based on FPGA (Field Programmable Gate Array) designs, widely used in laser ranging and image scanning, depends not only on the internal design of the FPGA itself but also on the modulation of the input signal. The embodiments of this application can also be used for input in FPGA-based TDC technology.

[0063] Specifically, based on the comparison result with the first reference voltage signal, under preset conditions, a second reference voltage signal that is zero is obtained when the voltage signal to be measured is present. This includes: when the voltage signal to be measured is at a positive zero-crossing point, the voltage signal to be measured is input to the positive input terminal of the first comparator and compared with a preset negative voltage signal at the negative input terminal of the first comparator, and a differential signal is output; when the voltage signal to be measured is less than the preset negative voltage signal, based on the output results of the second comparator and the differential signal of the first comparator, a less than zero output result is output, and the less than zero output result is adjusted to a zero second reference voltage signal according to the adjustment resistor; when the voltage signal to be measured changes from low to high, and during the change... During the process, if the voltage signal to be measured is greater than a preset negative value, the differential signal corresponding to the first comparator is delayed by a delay circuit connected to the first comparator. When the output result of the differential signal before the delay is less than zero, the output result of the second comparator connected to the delay circuit and the output result of the differential signal before the delay circuit are used to output a result less than zero until the delay ends. The output result less than zero is adjusted to a second reference voltage signal of zero according to the adjustment resistor. When the delay ends, the corresponding output result is output by the second comparator connected to the delay circuit and the output result of the differential signal of the delay circuit. The corresponding output result is adjusted according to the adjustment resistor to obtain the corresponding second reference voltage signal.

[0064] Before the delay, when the voltage signal to be measured is greater than the preset negative value, the output result of the differential signal of the second comparator and the first comparator is positive to zero. The output result is adjusted to a positive value within the preset range by the adjustment resistor, and a high-level second reference voltage signal is obtained, that is, a second reference voltage signal with indication.

[0065] For example, as mentioned above, such as Figure 3 As shown, when the voltage signal to be measured is present, the input signal is waveform segment A301, and the first reference voltage signal can be -1V. When the voltage signal to be measured is in the waveform segment A301 that changes from large to small and is negative, and is greater than -1V, i.e., waveform segment F306 in waveform segment A301, the output of the first comparator U2 can be a high-level signal at the positive output terminal and a low-level signal at the negative output terminal, as shown. Figure 3 As shown, the output of the first comparator U2 can be a high-level signal at the positive output terminal Q and a negative output terminal Q. (Right now Figure 3 In this context, / Q) represents a low-level signal to indicate that the voltage signal under test is greater than the first reference voltage signal. As described above, a high-level output is performed, such as... Figure 3The waveform segment D304 of the second reference voltage signal shown is on the far left of the second reference voltage signal.

[0066] Correspondingly, such as Figure 3 As shown, the differential signal input to the second comparator U3 (i.e., the input signal of the second comparator U3) can be a high-level signal at the positive input terminal and a low-level signal at the negative input terminal.

[0067] When the voltage signal under test is within the waveform segment A301 that changes from large to small, and is negative, when it is less than -1V, the output of the first comparator U2 can be a low-level signal at the positive output terminal and a high-level signal at the negative output terminal, meaning the differential signal is less than zero. For example... Figure 3 As shown, the output of the first comparator U2 can be a low-level signal at the positive output terminal Q and a low-level signal at the negative output terminal. (Right now Figure 3 The / Q signal in the diagram starts as a high-level signal to indicate that the voltage signal under test is less than (or equal to) the first reference voltage signal, as described above. Figure 4 As shown, the delay circuit 203 does not delay the signal that changes from large to small and is negative, so that the voltage adjustment circuit 1 204 obtains a voltage signal with an output less than 0 by comparing the differential signal input to the second comparator U3. Figure 3 As shown, the differential signal input to the second comparator U3 (i.e., the input signal of the second comparator U3) can start as a low-level signal at the positive input terminal and a high-level signal at the negative input terminal. The voltage signal less than 0 is adjusted according to the adjusting resistors R3 and R4 in "Voltage Adjustment Circuit 1" 204 to obtain a voltage signal with an output of 0, as shown. Figure 3 The waveform segment shown is C303.

[0068] When waveform segment A301 reaches its lowest point (minimum value) and begins to change upwards (from low to high), the first reference voltage signal can be -1V. Since the signal changes from low to high, and during this change the signal is greater than -1V, the delay circuit activates to delay the transmission of the previous comparison result. As mentioned earlier, the result before the delay is still output, i.e., 0 is output as previously stated. Figure 3 The waveform segment C303 of the second reference voltage signal is shown. This continues until the delay ends.

[0069] It should be understood that although there is a delay, since the first comparator U2 is before the delay circuit, the delay has no effect on the first comparator U2. Therefore, its output still changes as described above, i.e., as... Figure 3As shown, in waveform segment A301, the signal reaches its lowest point (minimum value) and begins to change upwards, meaning it starts changing from low to high. The first reference voltage signal can be -1V. As mentioned earlier, when the input signal is less than -1V, the output of the first comparator U2 can be a low-level signal at the positive output terminal Q and a low-level signal at the negative output terminal Q. (Right now Figure 3 In the above, / Q) is a high-level signal. Until the input signal changes to a value greater than -1V, the output of the first comparator U2 changes, with the positive output terminal Q becoming a high-level signal via a rising edge, and the negative output terminal... (Right now Figure 3 The / Q signal in the signal becomes a low-level signal via a falling edge.

[0070] Correspondingly, since the delay circuit affects the second comparator U3, as mentioned earlier, the differential signal input to the second comparator U3 (i.e., the input signal of the second comparator U3) can remain at a falling edge at the negative input and a rising edge at the positive input until the delay ends. After the delay ends, as mentioned earlier, the differential signal input to the second comparator U3 (i.e., the input signal of the second comparator U3) can be a high-level signal at the positive input and a low-level signal at the negative input.

[0071] During the delay process, it is necessary to consider the waveform changes of the input signal corresponding to the delay, such as... Figure 3 As shown, if the input signal is still changing from low to high, and the input signal is already greater than -1V, that is, the waveform segment from the point where the signal changes from low to high and is greater than -1V to the input signal point corresponding to the end point of waveform segment C303, this waveform segment. As mentioned above, if... Figure 3 As shown, the output of the first comparator U2 can still be a high-level signal at the positive output terminal and a low-level signal at the negative output terminal. In this case, the output is high, and the corresponding second reference voltage signal is as follows: Figure 3 The waveform segment C303 is shown. Therefore, after the delay ends, the change in the waveform segment follows the change in the waveform segment during the delay process. It should be understood that, due to the effect of the delay, for Figure 3 In this case, the second reference voltage signal is delayed, so the waveform segment G307 on its right side also ends after the delay, thus corresponding to the waveform segment of the input signal mentioned above. It should be noted that the delay ends after waveform segment C303, and the delay begins during the signal's transition from low to high voltage, specifically when the voltage is greater than -1V.

[0072] Subsequently, when the voltage signal to be measured is as follows Figure 3As shown, the voltage continues to change from high to low, and remains positive. Therefore, according to the previous explanation, since the voltage is greater than -1V, the output of the first comparator U2 can be a positive output (high level) and a negative output (low level), resulting in a high-level output. Figure 3 The waveform segment G307 on the right is shown. It should be understood that due to the time delay, therefore... Figure 3 The change in the second reference voltage signal is delayed by a certain amount of time.

[0073] Specifically, based on the comparison result with the first reference voltage signal, under preset conditions, a second reference voltage signal that is zero is obtained when the voltage signal to be measured is present. This includes: when the voltage signal to be measured is at a negative zero-crossing point, the voltage signal to be measured is input to the positive input terminal of the first comparator and compared with a preset positive voltage signal at the negative input terminal of the first comparator, and a differential signal is output; when the voltage signal to be measured is greater than the preset positive voltage signal, a positive output result is output based on the output result of the second comparator and the differential signal of the first comparator, and the positive output result is adjusted to a zero second reference voltage signal according to the adjustment resistor; when the voltage signal to be measured changes from high to low, and during the change... During the process, if the voltage signal to be measured is less than a preset positive value, the differential signal corresponding to the first comparator is delayed by a delay circuit connected to the first comparator. When the output result of the differential signal before the delay is greater than zero, a greater than zero output result is output by the second comparator connected to the delay circuit and the output result of the differential signal before the delay circuit until the delay ends. The output result greater than zero is then adjusted to a second reference voltage signal of zero by adjusting the adjusting resistor. When the delay ends, the corresponding output result is output by the second comparator connected to the delay circuit and the output result of the differential signal after the delay circuit. The corresponding output result is then adjusted by adjusting the adjusting resistor to obtain the corresponding second reference voltage signal.

[0074] Before the delay, when the voltage signal to be measured is less than the preset positive voltage signal, the output result of the differential signal of the second comparator and the first comparator is less than zero. The output result less than zero is adjusted to a less than zero output result within the preset range according to the adjustment resistor, and a low-level second reference voltage signal is obtained, that is, a second reference voltage signal with indication.

[0075] For example, as mentioned above, such as Figure 5As shown, when the voltage signal to be measured is present, the input signal is waveform segment M502, and the first reference voltage signal can be 1V. When the voltage signal to be measured is in the waveform segment M502 that changes from small to large and is positive, and is greater than 1V, i.e., waveform segment N501 in waveform segment M502, the output of the first comparator U2 can be a low-level signal at the positive output terminal and a high-level signal at the negative output terminal, as shown. Figure 5 As shown, the output of the first comparator U2 can be a low-level signal at the positive output terminal Q and a low-level signal at the negative output terminal. (Right now Figure 5 In this context, / Q) represents a high-level signal, indicating that the voltage signal under test is greater than the first reference voltage signal. As described above, a low-level output is used, such as... Figure 5 The waveform segment Q503 of the second reference voltage signal shown is on the far left of the second reference voltage signal.

[0076] Correspondingly, such as Figure 5 As shown, the differential signal input to the second comparator U3 (i.e., the input signal of the second comparator U3) can be a low-level signal at the positive input terminal and a high-level signal at the negative input terminal.

[0077] When the voltage signal under test is within the waveform segment M502 that changes from small to large, and is positive, when it is greater than 1V, the output of the first comparator U2 can be a high-level signal at the positive output terminal and a low-level signal at the negative output terminal, that is, the differential signal is greater than zero. For example... Figure 5 As shown, the output of the first comparator U2 can be a high-level signal at the positive output terminal Q and a low-level signal at the negative output terminal Q. (Right now Figure 5 The / Q signal in the signal starts as a low-level signal to indicate that the voltage signal under test is less than (or equal to) the first reference voltage signal, as described above. Figure 6 As shown, the delay circuit 203 does not delay the positive signal that changes from small to large, so that the voltage adjustment circuit 1 204 obtains a voltage signal with a value greater than 0 by comparing the differential signal input to the second comparator U3. Figure 5 As shown, the differential signal input to the second comparator U3 (i.e., the input signal of the second comparator U3) can start as a high-level signal at the positive input terminal and a low-level signal at the negative input terminal. The voltage signal greater than 0 is adjusted according to the adjusting resistors R3 and R4 in "Voltage Adjustment Circuit 1" 204 to obtain a voltage signal with an output of 0, as shown. Figure 5 The waveform segment shown is C303.

[0078] When waveform segment M502 reaches its maximum value and begins to change downwards (from high to low), the first reference voltage signal can be 1V. Since the signal changes from high to low, and during this change the signal value is less than 1V, the delay circuit activates to delay the transmission of the previous comparison result. As mentioned earlier, the result before the delay is still output, i.e., 0 is output as previously stated. Figure 5 The waveform segment C303 of the second reference voltage signal is shown. This continues until the delay ends.

[0079] It should be understood that although there is a delay, since the first comparator U2 is before the delay circuit, the delay has no effect on the first comparator U2. Therefore, its output still changes as described above, i.e., as... Figure 5 As shown, when waveform segment M502 reaches its maximum value, it begins to change downwards, meaning it starts changing from high to low. The first reference voltage signal can be 1V. As mentioned earlier, when the input signal is greater than 1V, the output of the first comparator U2 can be a high-level signal at the positive output terminal Q and a negative output terminal... (Right now Figure 5 In the input signal, / Q is a low-level signal. Once the input signal changes to less than 1V, the output of the first comparator U2 changes, with the positive output Q becoming a low-level signal via a falling edge, and the negative output... (Right now Figure 5 The / Q signal in the signal becomes a high-level signal via the rising edge.

[0080] Correspondingly, since the delay circuit affects the second comparator U3, as mentioned earlier, the differential signal input to the second comparator U3 (i.e., the input signal of the second comparator U3) can remain at a falling edge at the negative input and a rising edge at the positive input until the delay ends. After the delay ends, as mentioned earlier, the differential signal input to the second comparator U3 (i.e., the input signal of the second comparator U3) can be a low-level signal at the positive input and a high-level signal at the negative input.

[0081] During the delay process, it is necessary to consider the waveform changes of the input signal corresponding to the delay, such as... Figure 5 As shown, if the input signal is still changing from high to low, and the input signal is already less than 1V, that is, during the signal's change from high to low, the waveform segment less than 1V ends at the input signal point corresponding to the end of waveform segment C303. As mentioned earlier, if... Figure 5 As shown, the output of the first comparator U2 can still be a low-level signal at the positive output terminal and a high-level signal at the negative output terminal, resulting in a low-level output. The corresponding second reference voltage signal is as follows: Figure 5The waveform segment C303 is shown. Therefore, after the delay ends, the change in the waveform segment follows the change in the waveform segment during the delay process. It should be understood that, due to the effect of the delay, for Figure 5 In this case, the second reference voltage signal is delayed, so the waveform segment S504 on its right side also ends after the delay, thus corresponding to the waveform segment of the input signal mentioned above. It should be noted that the delay ends after waveform segment C303, and the delay begins when the signal changes from high to low, specifically when the voltage is less than 1V.

[0082] Subsequently, when the voltage signal to be measured is as follows Figure 5 As shown, the voltage continues to change from low to high, and is negative. Therefore, according to the previous explanation, since the voltage is less than 1V, the output of the first comparator U2 can be a low-level signal at the positive output and a high-level signal at the negative output, resulting in a low-level output, as shown above. Figure 5 The right-hand waveform segment S504 is shown. It should be understood that due to the existence of a delay time, therefore... Figure 5 The change in the second reference voltage signal is delayed by a certain amount of time.

[0083] The delay circuit includes two sub-delay circuits, corresponding to the output results of the differential signal of the first comparator. Each sub-delay circuit includes a resistor, a capacitor, and a diode. The diode is connected in parallel with the resistor, thus connecting to the capacitor. When the voltage signal to be measured is at a positive zero-crossing point, when the positive output terminal of the first comparator outputs a falling edge and the negative output terminal outputs a rising edge, the diode conducts, and the voltage on the capacitor changes with the differential signal. When the positive output terminal of the first comparator outputs a rising edge and the negative output terminal outputs a falling edge, the diode does not conduct, and the resistor and capacitor form an RC circuit, causing the voltage on the capacitor to gradually decrease, thus achieving a delay.

[0084] For example, such as Figure 4 As shown, the delay circuit 203 includes two sets of sub-delay circuits, each of which includes a capacitor, a resistor, and a diode. For example, one set might include a diode D1, a capacitor C1, and a resistor R1; another set might include a diode D2, a capacitor C2, and a resistor R2. Diodes D1 and D2 are high-speed diodes. Resistor R1 and diode D1 are connected in parallel, with one end of the parallel connection connected in series with capacitor C1. The other end of capacitor C1 is grounded, and the anode of diode D1 faces capacitor C1, while its cathode faces the output of the first comparator U2 (i.e., the positive output Q of the first comparator U2 is connected to the capacitor C1). The other end of the parallel connection between resistor R1 and diode D1 is also connected. Similarly, resistor R2 and diode D2 are connected in parallel, with one end of the parallel connection connected in series with capacitor C2. The other end of capacitor C2 is grounded, and the cathode of diode D2 faces capacitor C2, while its anode faces the output of the first comparator U2 (i.e., the negative output of the first comparator U2). Connect the other end of the parallel connection between resistor R2 and diode D2. And because the first comparator U2 has a differential output, taking the positive output of the first comparator U2 as an example, when the positive output terminal Q of the first comparator U2 outputs a falling edge, that is, when the negative output terminal... When the output is a rising edge, the diode conducts, and the voltage across capacitors C1 and C2 changes with the input signal. When the positive output terminal Q of the first comparator U2 is a rising edge, i.e., the negative output terminal... The output is a falling edge, the diode is not conducting, resistor R1 and capacitor C1 form an RC circuit, and resistor R2 and capacitor C2 form an RC circuit. The voltage across capacitors C1 and C2 decreases slowly, creating a delay effect. In addition, resistor R1 and diode D1 are connected in parallel to the positive input terminal of the second comparator U3, and resistor R2 and diode D2 are connected in parallel to the negative input terminal of the second comparator U3.

[0085] When the voltage signal to be measured is at a negative zero-crossing point, when the positive output terminal of the first comparator outputs a rising edge and the negative output terminal outputs a falling edge, the diode is turned on, and the voltage on the capacitor changes with the differential signal. When the positive output terminal of the first comparator outputs a falling edge and the negative output terminal outputs a rising edge, the diode is not turned on, and the resistor and capacitor form an RC circuit, and the voltage on the capacitor gradually decreases, thus achieving a delay.

[0086] For example, such as Figure 6 As shown, the delay circuit 203 includes two sets of sub-delay circuits, each of which includes a capacitor, a resistor, and a diode. For example, one set might include a diode D1, a capacitor C1, and a resistor R1; another set might include a diode D2, a capacitor C2, and a resistor R2. Diodes D1 and D2 are high-speed diodes. Resistor R1 and diode D1 are connected in parallel, with one end of the parallel connection connected in series with capacitor C1. The other end of capacitor C1 is grounded, and the cathode of diode D1 faces capacitor C1, while its anode faces the output of the first comparator U2. That is, the positive output Q of the first comparator U2 is connected to the capacitor C2. The other end of the parallel connection between resistor R1 and diode D1 is also connected. Similarly, resistor R2 and diode D2 are connected in parallel, with one end of the parallel connection connected in series with capacitor C2. The other end of capacitor C2 is grounded, and the anode of diode D2 faces capacitor C2, while its cathode faces the output of the first comparator U2. That is, the negative output of the first comparator U2 is connected to the capacitor C2. Connect the other end of the parallel connection between resistor R2 and diode D2. And because the first comparator U2 has a differential output, taking the positive output of the first comparator U2 as an example, when the positive output terminal Q of the first comparator U2 has a rising edge, that is, when the negative output terminal... When the output is a falling edge, the diode conducts, and the voltage across capacitors C1 and C2 changes with the input signal. When the positive output terminal Q of the first comparator U2 is a falling edge, i.e., the negative output terminal... The output is a rising edge, the diode is not conducting, resistor R1 and capacitor C1 form an RC circuit, resistor R2 and capacitor C2 form an RC circuit, and the voltage across capacitors C1 and C2 decreases slowly, creating a delay effect. Furthermore, resistor R1 and diode D1, connected in parallel, are also connected to the positive input terminal of the second comparator U3, and resistor R2 and diode D2, connected in parallel, are also connected to the negative input terminal of the second comparator U3.

[0087] The delay time of the delay circuit is determined based on the frequency of the input signal. As mentioned earlier, common zero-crossing signals have low frequencies, while this application is applicable to signals with higher frequencies, and the delay time can be determined based on the input signal frequency; the higher the frequency of the input signal, the shorter the delay time. The two are positively correlated.

[0088] The embodiments of this application, through the aforementioned "high-speed comparison circuit 1" 202, "delay circuit" 203 and "voltage adjustment circuit 1" 204, ensure that false acquisition will not occur when the input signal is zero or near zero.

[0089] 103: Determine the zero-crossing voltage signal based on the acquired second reference voltage signal and the voltage signal to be measured.

[0090] For example, such as Figure 2 As shown, the "high-speed comparison circuit 2" 205 compares the voltage signal to be measured with the second reference voltage signal VM output after passing through the "voltage adjustment circuit 1" 204, thereby outputting a zero-crossing signal.

[0091] Among them, the "voltage adjustment circuit 2" 206 outputs the zero-crossing signal as the required single-ended zero-crossing sampling signal based on the output result of the "high-speed comparison circuit 2" 205.

[0092] Specifically, based on the acquired second reference voltage signal and the voltage signal to be measured, the zero-crossing voltage signal is determined, including: when the voltage signal to be measured is at a positive zero-crossing, the voltage signal to be measured is input to the positive input terminal of the third comparator, the acquired second reference voltage signal is input to the negative input terminal of the third comparator, and the differential result is output through the third comparator; the differential result output by the third comparator is used as the corresponding input of the fourth comparator, and the fourth comparator outputs a high-level signal that can identify a single end, so that the zero-crossing voltage signal is sampled.

[0093] Among them, such as Figure 4 As shown, "high-speed comparator circuit 2" 205 may include a third comparator U1. "voltage adjustment circuit 2" 206 may include a fourth comparator U4.

[0094] The third comparator U1 is a high-speed comparator. As mentioned earlier, since the third comparator U1 and the first comparator U2 have a higher processing speed than the second comparator U3 and the fourth comparator U4, they can also be ultra-high-speed comparators. These comparators have fast response speeds and output differential signals. To obtain single-ended signals, two more high-speed comparators, the second comparator U3 and the fourth comparator U4, are added to convert the differential signals into single-ended signals, facilitating acquisition by the subsequent processor. The fourth comparator U4 can convert the differential signal output by the third comparator U1 into a single-ended signal that the microcontroller can recognize.

[0095] For example, such as Figure 4 As shown, according to the preceding text, the second reference voltage signal is obtained through the second comparator U3 and input to the negative input terminal of the third comparator U1, while the voltage signal to be measured is input to the positive input terminal. The negative input terminal of the third comparator U1 is connected to the connection point of the adjusting resistors R3 and R4. The positive input terminal of the third comparator U1 is connected to the input signal, and in the case of a matching circuit, it is also connected to the non-grounded terminal of resistor R5. The third comparator U1 is also provided with a power supply voltage; the positive and negative power supply terminals of the third comparator U1 are respectively provided with the input voltage VCC and the common ground voltage VSS. The third comparator U1 is a dual-input dual-output high-speed comparator. The non-inverting input terminal (i.e., the positive input terminal) receives a signal that is in phase with the voltage signal to be measured, and the inverting input terminal (i.e., the negative input terminal), due to the presence of the follower voltage reference, receives a signal that is in phase with the voltage signal to be measured, but whose zero potential duration is slightly later than the zero-crossing time. The third comparator U1 outputs a pair of differential signals.

[0096] The fourth comparator U4 takes the output of the third comparator U1 and inputs it to the corresponding input terminal for comparison, obtaining the zero-crossing signal, which is the output sampling result. The positive input terminal of the fourth comparator U4 is connected to the positive output terminal Q of the third comparator U1, and the negative input terminal of the fourth comparator U4 is connected to the negative output terminal of the third comparator U1. Connection. The positive and negative power supply terminals of the fourth comparator U4 are respectively equipped with the input voltage VCC and the common ground voltage VSS. The sampling result is output through the output terminal of the fourth comparator U4.

[0097] like Figure 3 As shown, based on the preceding text and the waveform segments of the input signal and the second reference voltage signal, waveform segment E305 in the output sampling result can be obtained as a high level. Thus, the zero-crossing voltage signal is sampled through its rising edge.

[0098] As mentioned earlier, when the voltage signal to be measured is 0V, the second reference voltage signal VM can be high, and the fourth comparator U4 outputs a low level. When the voltage signal to be measured is less than 0V, the second reference voltage signal VM is 0V, and the fourth comparator U4 outputs a low level. When the voltage signal to be measured changes from below 0V to above 0V, due to the delay, the second reference voltage signal VM still outputs 0V, and the fourth comparator U4 jumps to a high level at the instant the voltage signal to be measured crosses zero. When the delay ends and the second reference voltage signal VM can become high, the fourth comparator U4 outputs a low level.

[0099] Specifically, based on the acquired second reference voltage signal and the voltage signal to be measured, the zero-crossing voltage signal is determined, including: when the voltage signal to be measured is a negative zero-crossing, the voltage signal to be measured is input to the negative input terminal of the third comparator, the acquired second reference voltage signal is input to the positive input terminal of the third comparator, and the differential result is output through the third comparator; the differential result output by the third comparator is used as the corresponding input of the fourth comparator, and the fourth comparator outputs a high-level signal that can identify a single end, so that the zero-crossing voltage signal is sampled.

[0100] Among them, such as Figure 6 As shown, "high-speed comparator circuit 2" 205 may include a third comparator U1. "voltage adjustment circuit 2" 206 may include a fourth comparator U4.

[0101] The third comparator U1 is a high-speed comparator. As mentioned earlier, since the third comparator U1 and the first comparator U2 have a higher processing speed than the second comparator U3 and the fourth comparator U4, they can also be ultra-high-speed comparators. These comparators have fast response speeds and output differential signals. To obtain single-ended signals, two more high-speed comparators, the second comparator U3 and the fourth comparator U4, are added to convert the differential signals into single-ended signals, facilitating acquisition by the subsequent processor. The fourth comparator U4 can convert the differential signal output by the third comparator U1 into a single-ended signal that the microcontroller can recognize.

[0102] For example, such as Figure 6As shown, according to the preceding text, the second reference voltage signal is obtained through the second comparator U3 and input to the positive input terminal of the third comparator U1, while the voltage signal to be measured is input to the negative input terminal. The positive input terminal of the third comparator U1 is connected to the connection point of the adjusting resistors R3 and R4. The negative input terminal of the third comparator U1 is connected to the input signal, and in the case of a matching circuit, it is also connected to the non-grounded terminal of resistor R5. The third comparator U1 is also provided with a power supply voltage; the positive and negative power supply terminals of the third comparator U1 are respectively provided with the input voltage VCC and the common ground voltage VSS. The third comparator U1 is a dual-input dual-output high-speed comparator. The inverting input terminal (i.e., the negative input terminal) receives a signal that is in phase with the voltage signal to be measured, and the non-inverting input terminal (i.e., the positive input terminal), due to the presence of the follower voltage reference, receives a signal that is in phase with the voltage signal to be measured, but whose zero potential duration is slightly later than the zero-crossing time. The third comparator U1 outputs a pair of differential signals.

[0103] The fourth comparator U4 takes the output of the third comparator U1 and inputs it to the corresponding input terminal for comparison, obtaining the zero-crossing signal, which is the output sampling result. The positive input terminal of the fourth comparator U4 is connected to the positive output terminal Q of the third comparator U1, and the negative input terminal of the fourth comparator U4 is connected to the negative output terminal of the third comparator U1. Connection. The positive and negative power supply terminals of the fourth comparator U4 are respectively equipped with the input voltage VCC and the common ground voltage VSS. The sampling result is output through the output terminal of the fourth comparator U4.

[0104] like Figure 5 As shown, based on the preceding text and the waveform segments of the input signal and the second reference voltage signal, waveform segment E305 in the output sampling result can be obtained as a high level. Thus, the zero-crossing voltage signal is sampled through its rising edge.

[0105] As mentioned earlier, when the voltage signal to be measured is 0V, the second reference voltage signal VM can be low, and the fourth comparator U4 outputs a low level. When the voltage signal to be measured is greater than 0V, the second reference voltage signal VM is 0V, and the fourth comparator U4 outputs a low level. When the voltage signal to be measured changes from above 0V to below 0V, due to the delay, the second reference voltage signal VM still outputs 0V, and the fourth comparator U4 jumps to a high level at the instant the voltage signal to be measured crosses zero negatively. When the delay ends and the second reference voltage signal VM can go low, the fourth comparator U4 outputs a low level.

[0106] Since no amplifier is used in this embodiment, the delay jitter caused by the amplifier is avoided. In the main signal path composed of the "high-speed comparator circuit 2" 205 and the "voltage adjustment circuit 2" 206, there are no energy storage components such as capacitors or inductors that interfere with the signal, resulting in a delay jitter of <1ns and achieving high precision. In contrast, the delay jitter of commonly used zero-crossing sampling is in the microsecond (µs) range.

[0107] This application embodiment also provides a voltage zero-crossing sampling circuit, including: a first comparison circuit, a delay circuit, a first voltage adjustment circuit, a second comparison circuit, and a second voltage adjustment circuit connected in sequence; the first comparison circuit is used to acquire a voltage signal to be measured and compare the voltage signal to be measured with a first reference voltage signal; the delay circuit and the first voltage adjustment circuit are used to acquire a second reference voltage signal with indication when the voltage signal to be measured has no signal, based on the first reference voltage signal, and to acquire a second reference voltage signal of zero when the voltage signal to be measured has a signal, based on the comparison result with the first reference voltage signal and under preset conditions; the second comparison circuit and the second voltage adjustment circuit are used to determine the zero-crossing voltage signal based on the acquired second reference voltage signal and the voltage signal to be measured.

[0108] The circuit may also include a matching circuit.

[0109] The matching circuit converts different forms of the measured signal into a measurable low-voltage signal. Since the signals to be sampled vary, the zero-crossing sampling circuit needs to adjust the input signal before processing by subsequent circuits. For example, high-voltage signals need to be stepped down, current signals need to be converted into voltage signals, and differential signals need to be differentially sampled.

[0110] The high-speed comparator circuit 1 (i.e., the first comparator circuit, also called the first high-speed comparator circuit), the delay circuit, and the voltage adjustment circuit 1 (i.e., the first voltage adjustment circuit) are used to generate the second reference voltage signal VM for the high-speed comparator circuit 2 (i.e., the second comparator circuit, also called the second high-speed comparator circuit). The high-speed comparator circuit 1 generates a preliminary reference voltage, i.e., the first reference voltage signal, which is then delayed by the delay circuit, allowing the output second reference voltage signal to be compared with the voltage signal to be measured. The voltage adjustment circuit 1 prevents errors when the signal is consistently zero. Its output is a high-level or low-level signal when the voltage signal to be measured is consistently zero, and a zero-level signal when the voltage signal to be measured is present. The high-speed comparator circuit 1 (i.e., the first comparator circuit, also called the first high-speed comparator circuit), the delay circuit, and the voltage adjustment circuit 1 (i.e., the first voltage adjustment circuit) are composed of a high-speed comparator, resistors, capacitors, and high-speed diodes.

[0111] The high-speed comparator circuit 2 (i.e., the second comparator circuit, or the second high-speed comparator circuit) compares the voltage signal to be measured with the second reference voltage signal VM output after passing through the high-speed comparator circuit 1, the delay circuit, and the voltage adjustment circuit, and outputs a zero-crossing signal.

[0112] Voltage adjustment circuit 2 (i.e., the second voltage adjustment circuit) outputs the zero-crossing signal as the required single-ended zero-crossing sampling signal.

[0113] This will not be elaborated upon further here; please refer to the preceding text for any details that have not been covered. This device is the conversion device mentioned earlier.

[0114] It should be understood that the specific order or hierarchy of steps in the disclosed process is an example of an exemplary method. Based on design preferences, it should be understood that the specific order or hierarchy of steps in the process may be rearranged without departing from the scope of this disclosure. The appended method claims provide elements of various steps in an exemplary order and are not intended to limit the scope to the specific order or hierarchy described.

[0115] To make the description of this disclosure more detailed and complete, illustrative descriptions of the embodiments and specific examples of the present invention have been provided above; however, this is not the only form of implementing or utilizing the specific examples of the present invention. The embodiments cover the features of multiple specific examples and the method steps and their order for constructing and operating these specific examples. However, other specific examples may also be used to achieve the same or equivalent functions and order of steps.

[0116] In the detailed description above, various features are combined together in a single embodiment to simplify this disclosure. This approach to disclosure should not be construed as reflecting an intention that embodiments of the claimed subject matter require more features than are explicitly stated in each claim. Rather, as reflected in the appended claims, the invention is presented with fewer features than all of the features in a single disclosed embodiment. Therefore, the appended claims are hereby explicitly incorporated into the detailed description, with each claim representing a separate preferred embodiment of the invention.

[0117] The disclosed embodiments have been described above to enable any person skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be applied to other embodiments without departing from the spirit and scope of this disclosure. Therefore, this disclosure is not limited to the embodiments given herein, but is consistent with the broadest scope of the principles and novel features disclosed in this application.

[0118] The foregoing description includes examples of one or more embodiments. It is certainly impossible to describe all possible combinations of components or methods in order to describe the above embodiments, but those skilled in the art will recognize that further combinations and arrangements of the various embodiments are possible. Therefore, the embodiments described herein are intended to cover all such changes, modifications, and variations that fall within the scope of the appended claims. Furthermore, the term "comprising" as used in the specification or claims is interpreted in a manner similar to the term "including," as interpreted when used as a conjunction in the claims. Additionally, the use of any term "or" in the specification of the claims is intended to mean "non-exclusive or."

[0119] Those skilled in the art will also understand that the various illustrative logical blocks, units, and steps listed in the embodiments of the present invention can be implemented by electronic hardware, computer software, or a combination of both. To clearly demonstrate the interchangeability of hardware and software, the functions of the various illustrative components, units, and steps described above have been generally described. Whether such functionality is implemented through hardware or software depends on the specific application and the overall system design requirements. Those skilled in the art can implement the described functions using various methods for each specific application, but such implementation should not be construed as exceeding the scope of protection of the embodiments of the present invention.

[0120] The various illustrative logic blocks or units described in the embodiments of this invention can be implemented or operate the described functions using a general-purpose processor, digital signal processor, application-specific integrated circuit (ASIC), field-programmable gate array or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof. The general-purpose processor can be a microprocessor; alternatively, it can be any conventional processor, controller, microcontroller, or state machine. The processor can also be implemented using a combination of computing devices, such as a digital signal processor and a microprocessor, multiple microprocessors, one or more microprocessors combined with a digital signal processor core, or any other similar configuration.

[0121] The steps of the methods or algorithms described in the embodiments of this invention can be directly embedded in hardware, a software module executed by a processor, or a combination of both. The software module can be stored in RAM, flash memory, ROM, EPROM, EEPROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium in the art. Exemplarily, the storage medium can be connected to the processor so that the processor can read information from and write information to the storage medium. Optionally, the storage medium can also be integrated into the processor. The processor and storage medium can be housed in an ASIC, which can be housed in a user terminal. Optionally, the processor and storage medium can also be housed in different components of the user terminal.

[0122] In one or more exemplary designs, the functions described in the embodiments of the present invention can be implemented in hardware, software, firmware, or any combination of these three. If implemented in software, these functions can be stored on a computer-readable medium or transmitted on a computer-readable medium in the form of one or more instructions or code. Computer-readable media include computer storage media and communication media that facilitate the transfer of computer programs from one place to another. Storage media can be any available media that can be accessed by a general-purpose or special-purpose computer. For example, such computer-readable media can include, but is not limited to, RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store program code in the form of instructions or data structures and other forms that can be read by a general-purpose or special-purpose computer, or a general-purpose or special-purpose processor. Furthermore, any connection can be suitably defined as a computer-readable medium, for example, if the software is transmitted from a website, server, or other remote resource via a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wirelessly, such as infrared, wireless, and microwave, it is also included in the defined computer-readable medium. The disks and discs mentioned include compressed disks, laser discs, optical discs, DVDs, floppy disks, and Blu-ray discs. Disks typically copy data magnetically, while discs typically copy data optically using lasers. Combinations of the above can also be contained in computer-readable media.

[0123] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above description is only a specific embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for sampling the zero-crossing point of voltage, characterized in that, include: Acquire the voltage signal to be measured; The voltage signal to be measured is compared with a first reference voltage signal. The first reference voltage signal is used to obtain a second reference voltage signal with indication when there is no signal. The comparison result with the first reference voltage signal is used to obtain a second reference voltage signal with zero when there is a signal, provided that the preset conditions are met. When the voltage signal to be measured changes from low to high, and the voltage signal to be measured is greater than a preset negative value during the change, the signal transmission time of the differential signal corresponding to the first comparator is delayed by a delay circuit connected to the first comparator. Based on the acquired second reference voltage signal and the voltage signal to be measured, the zero-crossing voltage signal is determined, wherein the second reference voltage signal includes a level signal; The delay circuit includes two sets of sub-delay circuits, which correspond to the output results of the differential signal of the first comparator: The sub-delay circuit includes a resistor, a capacitor, and a diode, wherein the diode is connected in parallel with the resistor and thus connected to the capacitor; When the voltage signal to be measured is at a positive zero-crossing point, when the positive output terminal of the first comparator outputs a falling edge and the negative output terminal outputs a rising edge, the diode is turned on, and the voltage on the capacitor changes with the differential signal; when the positive output terminal of the first comparator outputs a rising edge and the negative output terminal outputs a falling edge, the diode is not turned on, the resistor and capacitor form an RC circuit, and the voltage on the capacitor gradually decreases, thus achieving a delay.

2. The method according to claim 1, characterized in that, The acquisition of the voltage signal to be measured includes: The input signal is acquired. If the input signal is not a voltage signal within a preset range, the input signal is converted into a voltage signal within the preset range and used as the voltage signal to be measured.

3. The method according to claim 2, characterized in that, The conversion of the input signal into a voltage signal within a preset range includes: Different types of input signals are converted into voltage signals within a preset range by a matching circuit that matches different types of input signals.

4. The method according to claim 1, characterized in that, The step of comparing the voltage signal to be measured with the first reference voltage signal includes: When the voltage signal to be measured is at a positive zero crossing, the voltage signal to be measured is compared with a preset negative voltage signal, so that the voltage signal to be measured can obtain a second reference voltage signal with indication when there is no signal. When the voltage signal to be measured is at a negative zero-crossing point, the voltage signal to be measured is compared with a preset positive voltage signal, so that the voltage signal to be measured can obtain a second reference voltage signal with indication when there is no signal.

5. The method according to claim 4, characterized in that, The step of comparing the voltage signal to be measured with a preset negative voltage signal, so as to obtain a second reference voltage signal with indication in the absence of a signal using the preset negative voltage signal, includes: By inputting the voltage signal to be measured to the positive input terminal of the first comparator, and comparing it with the voltage signal with a preset negative value in the negative input terminal of the first comparator, a differential signal is output. When there is no signal, the voltage signal of the voltage signal to be measured is zero. The output of the differential signal from the second comparator and the first comparator is used to generate an output result greater than zero. The output result greater than zero is then adjusted to a preset range based on the adjustment resistor, resulting in a high-level second reference voltage signal.

6. The method according to claim 1, characterized in that, The method of obtaining a second reference voltage signal that is zero when the voltage signal to be measured is present, based on the comparison result with the first reference voltage signal and under preset conditions, further includes: When the voltage signal to be measured is at a positive zero crossing point, the voltage signal to be measured is input to the positive input terminal of the first comparator and compared with the voltage signal with a preset negative value in the negative input terminal of the first comparator to output a differential signal. When the voltage signal to be measured is less than the preset negative voltage signal, the output result of the differential signal of the second comparator and the first comparator is less than zero, and the output result less than zero is adjusted to the second reference voltage signal of zero according to the adjustment resistor. When the output result of the differential signal before the delay is less than zero, the output result of the differential signal before the delay is output through the second comparator connected to the delay circuit and the output result of the differential signal before the delay is output until the delay ends, and the output result less than zero is adjusted to the second reference voltage signal of zero according to the adjustment resistor. After the delay ends, the output result is obtained by using the output result of the second comparator connected to the delay circuit and the differential signal output by the delay circuit. The output result is then adjusted according to the adjustment resistor to obtain the corresponding second reference voltage signal.

7. The method according to claim 1, characterized in that, The step of determining the zero-crossing voltage signal based on the acquired second reference voltage signal and the voltage signal to be measured includes: When the voltage signal to be measured is at a positive zero crossing, the voltage signal to be measured is input to the positive input terminal of the third comparator, the obtained second reference voltage signal is input to the negative input terminal of the third comparator, and the differential result is output through the third comparator. The differential result output by the third comparator is used as the corresponding input of the fourth comparator, and the output of the fourth comparator is a high-level signal that can identify a single end, so that the zero-crossing voltage signal can be sampled.

8. The method according to claim 6, characterized in that, Before the delay, when the voltage signal to be measured is greater than the preset negative value, the output result of the differential signal of the second comparator and the first comparator is positive to zero. The output result is adjusted to be positive to zero within the preset range according to the adjustment resistor, and a high-level second reference voltage signal is obtained.

9. A voltage zero-crossing sampling circuit, characterized in that, include: The first comparator circuit, the delay circuit, the first voltage adjustment circuit, the second comparator circuit, and the second voltage adjustment circuit are connected in sequence. The first comparison circuit is used to acquire the voltage signal to be measured and compare the voltage signal to be measured with the first reference voltage signal. The delay circuit and the first voltage adjustment circuit are used to enable the voltage signal under test to acquire a second reference voltage signal with indication when there is no signal by using a first reference voltage signal, and to enable the voltage signal under test to acquire a second reference voltage signal with zero when there is a signal by comparing the result with the first reference voltage signal and satisfying a preset condition. The second comparison circuit and the second voltage adjustment circuit are used to determine the zero-crossing voltage signal based on the acquired second reference voltage signal and the voltage signal to be measured. The second reference voltage signal includes a level signal. When the voltage signal to be measured changes from low to high, and during the change the voltage signal to be measured is greater than the preset negative value voltage signal, the signal transmission time of the differential signal corresponding to the first comparator is delayed by the delay circuit connected to the first comparator. The delay circuit includes two sets of sub-delay circuits, which correspond to the output results of the differential signal of the first comparator: The sub-delay circuit includes a resistor, a capacitor, and a diode, wherein the diode is connected in parallel with the resistor and thus connected to the capacitor; When the voltage signal to be measured is at a positive zero-crossing point, when the positive output terminal of the first comparator outputs a falling edge and the negative output terminal outputs a rising edge, the diode is turned on, and the voltage on the capacitor changes with the differential signal; when the positive output terminal of the first comparator outputs a rising edge and the negative output terminal outputs a falling edge, the diode is not turned on, the resistor and capacitor form an RC circuit, and the voltage on the capacitor gradually decreases, thus achieving a delay.

Images