oscillator

Abstract

The present application provides an oscillator capable of reducing micro jumps in frequency caused by fluctuations in temperature measurement results and the like, achieving high accuracy in clock frequency and the like. The oscillator includes a vibrator, a first circuit device electrically connected to the vibrator, and a second circuit device. The first circuit device generates a first clock signal by causing the vibrator to oscillate, and performs first temperature compensation processing for temperature-compensating the frequency of the first clock signal. The second circuit device is inputted with the first clock signal from the first circuit device, generates a second clock signal based on the first clock signal, and performs second temperature compensation processing for temperature-compensating the frequency of the second clock signal.

Description

[0001] This application is a divisional application of the invention patent application entitled "Oscillator, Electronic Device and Mobile Body", filed on February 19, 2020, with application number 202010101294.2. Technical Field

[0002] This invention relates to oscillators, etc. Background Technology

[0003] Conventionally, temperature-compensated oscillators that compensate for temperature based on temperature detection results are known. For example, the prior art disclosed in Patent Document 1 is known as such a temperature-compensated oscillator. In this prior art oscillator, a fractional-N type PLL circuit that multiplies the frequency of the oscillation signal of the oscillator is used to generate a clock signal. Furthermore, this oscillator includes a temperature measurement unit and a storage unit storing a temperature calibration table. Digital temperature compensation processing is achieved by setting the division ratio of the fractional-N type PLL circuit based on the temperature measurement value from the temperature measurement unit and the temperature calibration table. Specifically, the temperature calibration table stores the temperature measurement value, which is digital temperature detection data, in correspondence with the division ratio, and the division ratio of the fractional-N type PLL circuit is set based on the division ratio data read from the temperature calibration table according to the temperature measurement value. Thus, a clock signal multiplied by the frequency of the oscillation signal of the oscillator is output from the oscillator.

[0004] Patent Document 1: Japanese Patent Application Publication No. 2017-220770

[0005] In the digital temperature compensation process described in Patent Document 1, frequency fluctuations are caused by factors such as temperature measurement results. In this case, if the temperature compensation gain increases, the frequency fluctuations also increase. If such a problem occurs, it becomes difficult to achieve high precision in the oscillator's clock frequency. Summary of the Invention

[0006] One aspect of this disclosure relates to an oscillator comprising: an oscillator; a first circuit device electrically connected to the oscillator; and a second circuit device, the first circuit device generating a first clock signal by oscillating the oscillator and performing a first temperature compensation process to temperature compensate the frequency of the first clock signal, the second circuit device being input from the first clock signal of the first circuit device and generating a second clock signal based on the first clock signal, and performing a second temperature compensation process to temperature compensate the frequency of the second clock signal. Attached Figure Description

[0007] Figure 1 This is a basic structural example of the oscillator in this embodiment.

[0008] Figure 2 This is the first structural example of the oscillator in this embodiment.

[0009] Figure 3 This is the second structural example of the oscillator in this embodiment.

[0010] Figure 4 This is the third structural example of the oscillator in this embodiment.

[0011] Figure 5 This is an example illustrating the frequency-temperature characteristics that explain the problems of frequency hopping and hysteresis error.

[0012] Figure 6 This is an example of frequency-temperature characteristics under conditions where frequency micro-jumps occur.

[0013] Figure 7 This is an example of frequency-temperature characteristics when frequency micro-jumps are suppressed.

[0014] Figure 8 This is an explanatory diagram of the temperature compensation method in this embodiment.

[0015] Figure 9 This is an explanatory diagram illustrating how the temperature compensation method of this embodiment improves frequency deviation.

[0016] Figure 10 This is an explanatory diagram illustrating how the temperature compensation method of this embodiment improves hysteresis characteristics.

[0017] Figure 11 This is the first structural example of the first circuit device.

[0018] Figure 12 This is the second structural example of the first circuit device.

[0019] Figure 13 This is the first structural example of the second circuit device.

[0020] Figure 14 This is the second structural example of the second circuit device.

[0021] Figure 15 This is the third structural example of the second circuit device.

[0022] Figure 16 This is the first construction example of an oscillator.

[0023] Figure 17 This is the second construction example of an oscillator.

[0024] Figure 18 This is the third construction example of an oscillator.

[0025] Figure 19This is a construction example of an oscillator that houses an oscillator and circuitry.

[0026] Figure 20 This is an example of the structure of an electronic device.

[0027] Figure 21 This is a structural example of a moving object.

[0028] Label Explanation

[0029] CK1, CK2: Clock signals; VC, VC2: Control voltages; FSD: Frequency setting signal; ST: Temperature detection signal; DT: Temperature detection data; SDIV: Division ratio setting signal; VDIV: Division ratio setting value; VFSD: Frequency setting value; FBCK: Feedback clock signal; CKQ: Clock signal; L1, L2: Distance; BW: Bonding wire; BMP: Bump; ANT: Antenna; 4: Oscillator; 5: Package; 6: Base; 7: Cover; 8, 9: External terminals; 10: Vibrator; 12: Circuit components; 14: Oscillator; 15: Package; 16: Base; 17: Cover; 18, 19: External terminals; 20: Circuit device; 22: Oscillator circuit; 24: Processing circuit; 26: Temperature sensor; 27: External temperature sensor; 28: Temperature compensation circuit; 29: Control circuit; 30: Circuit device; 32: Clock signal generation 33: Output circuit; 34: Processing circuit; 35: Storage unit; 36: Δ-∑ modulation circuit; 38: Arithmetic circuit; 39: Neural network arithmetic circuit; 40: PLL circuit; 42: Phase comparison circuit; 44: Control voltage generation circuit; 46: Voltage controlled oscillation circuit; 48: Frequency divider circuit; 50: Storage unit; 52: Function generation circuit; 54: D / A conversion circuit; 56: Digital signal processing circuit; 57: Storage unit; 58: A / D conversion circuit; 60: A / D conversion circuit; 62: Register; 64: Arithmetic circuit; 66: Adder; 68: Direct digital synthesizer; 206: Automobile; 207: Vehicle body; 208: Control device; 209: Wheel; 220: Processing device; 500: Electronic device; 510: Communication interface; 520: Processing device; 530: User interface; 540: Display unit; 550: Memory. Detailed Implementation

[0030] The following describes this embodiment. Furthermore, the embodiment described below is not intended to unduly limit the scope of the claims. Also, not all structures described in this embodiment are necessarily essential structural elements.

[0031] 1. Oscillator

[0032] Figure 1This diagram illustrates a basic structural example of the oscillator 4 according to this embodiment. The oscillator 4 is a temperature-compensated oscillator, comprising an oscillator 10, a circuit device 20, and a circuit device 30. The oscillator 4 can be a temperature-compensated quartz oscillator (TCXO) without a thermostat or a thermostat-type quartz oscillator (OCXO) with a thermostat. The circuit device 20 is a first circuit device, and the circuit device 30 is a second circuit device. The circuit device 20 is electrically connected to the oscillator 10. For example, the oscillator 10 is electrically connected to the circuit device 20 via bonding wires, metal bumps, or internal wiring of the package. Furthermore, in... Figure 1 In this circuit, circuit device 30 is electrically connected to circuit device 20. For example, circuit device 20 and circuit device 30 are electrically connected via bonding wires, metal bumps, or internal wiring of the package.

[0033] The oscillator 10 is a component that generates mechanical vibration through an electrical signal. The oscillator 10 can be implemented, for example, using a quartz resonator or similar vibrating plate. For instance, the oscillator 10 can be implemented using a quartz resonator that performs thickness shear vibration with a cut angle of AT or SC. Furthermore, the oscillator 10 of this embodiment can be implemented using various vibrating plates, such as those other than those for thickness shear vibration or piezoelectric resonators made of materials other than quartz. For example, the oscillator 10 can also be a SAW (Surface Acoustic Wave) resonator or a MEMS (Micro Electro Mechanical Systems) oscillator using a silicon oscillator formed on a silicon substrate.

[0034] Circuit devices 20 and 30 are integrated circuit devices known as ICs (Integrated Circuits).

[0035] For example, circuit devices 20 and 30 are ICs manufactured by semiconductor processes, which are semiconductor chips on a semiconductor substrate with circuit elements formed on them.

[0036] The circuit device 20, as the first circuit device, generates a clock signal CK1 by oscillating the oscillator 10, and performs a first temperature compensation process to temperature-compensate the frequency of the clock signal CK1. Then, the circuit device 20 outputs the clock signal CK1 after the first temperature compensation process. The clock signal CK1 is the first clock signal. The first temperature compensation process is a process that suppresses and compensates for frequency variations in the clock signal CK1 caused by temperature changes.

[0037] The circuit device 30, acting as a second circuit device, receives a clock signal CK1 from the circuit device 20, generates a clock signal CK2 based on CK1, and performs a second temperature compensation process to compensate for the frequency of the clock signal CK2. Then, the circuit device 30 outputs the clock signal CK2 after the second temperature compensation process. The clock signal CK2 is the second clock signal. The second temperature compensation process is a process that suppresses and compensates for frequency variations in the clock signal CK2 caused by temperature changes. Hereinafter, the first temperature compensation process and the second temperature compensation process will sometimes be appropriately referred to collectively and abbreviated as temperature compensation process.

[0038] Specifically, such as Figure 1 As shown, the circuit device 20 includes an oscillation circuit 22 and a processing circuit 24. The oscillation circuit 22 generates a clock signal CK1 by oscillating the oscillator 10. The processing circuit 24 performs a first temperature compensation process to compensate the frequency of the clock signal CK1. The processing circuit 24 is a first processing circuit.

[0039] For example, the circuit device 20 includes a first oscillator terminal and a second oscillator terminal. The first terminal electrode, located at one end of the oscillator 10 which is external to the circuit device 20, is electrically connected to the first oscillator terminal. The second terminal electrode, located at the other end of the oscillator 10, is electrically connected to the second oscillator terminal. Furthermore, a clock signal CK1 generated by the oscillation of the oscillator 10 implemented by the oscillation circuit 22 is output to the outside via the clock output terminal of the circuit device 20. For example, the oscillation signal from the oscillation circuit 22 is buffered by an output circuit (not shown) and output as the clock signal CK1 from the clock output terminal. The first oscillator terminal, the second oscillator terminal, and the clock output terminal are, for example, pads of the circuit device 20. In this embodiment, the connection is an electrical connection. An electrical connection is a connection capable of transmitting electrical signals and information via electrical signals. Electrical connections can be connections via active components, etc.

[0040] The oscillation circuit 22 includes an oscillation drive circuit disposed between the terminals of the first and second oscillators. For example, the oscillation circuit 22 can be implemented using transistors such as bipolar transistors and active components such as capacitors and resistors to implement the drive circuit. Various types of oscillation circuits, such as Pierce-type, Colpitts-type, frequency-converting type, or Hattley-type, can be used as the oscillation circuit 22. Furthermore, a variable capacitor circuit is provided in the oscillation circuit 22, and the oscillation frequency can be adjusted by adjusting the capacitance value of this variable capacitor circuit. The variable capacitor circuit can be implemented using a voltage-variable capacitor element such as a varactor diode. The variable capacitor circuit is electrically connected to one end of the oscillator 10. Alternatively, a first variable capacitor circuit connected to one end of the oscillator 10 and a second variable capacitor circuit electrically connected to the other end of the oscillator 10 can be provided.

[0041] The processing circuit 24 performs a first temperature compensation process and outputs a control voltage VC to control the oscillation of the oscillator 10. For example, as the first temperature compensation process, the processing circuit 24 generates a temperature compensation control voltage VC to compensate for the frequency-temperature characteristics of the oscillator 10 and outputs the control voltage VC to the oscillation circuit 22. Based on this control voltage VC, the capacitance value of the variable capacitor element such as the varactor diode in the variable capacitor circuit of the oscillation circuit 22 is adjusted, thereby controlling the oscillation frequency of the oscillation circuit 22, thereby controlling the frequency of the clock signal CK1, and realizing the first temperature compensation process for the clock signal CK1. For example, it realizes the first temperature compensation process that keeps the frequency change of the clock signal CK1 constant relative to temperature changes. The processing circuit 24 can be implemented, for example, by an ASIC (Application Specific Integrated Circuit) circuit based on automatic configuration routing such as a gate array. Alternatively, it can be implemented by a processor such as a DSP (Digital Signal Processor) or a CPU (Central Processing Unit).

[0042] The circuit device 30 includes a clock signal generation circuit 32 and a processing circuit 34. The clock signal generation circuit 32 generates a clock signal CK2 with a frequency set according to the frequency setting signal FSD, based on the clock signal CK1 from the circuit device 20. For example, the clock signal generation circuit 32 uses the clock signal CK1, which has undergone first temperature compensation processing, as a reference clock signal to generate a clock signal CK2 with a frequency that is doubled from the frequency of the clock signal CK1. The clock signal generation circuit 32, as described later, can be implemented, for example, using a fractional-N type PLL circuit or a direct digital synthesizer called DDS. The clock signal CK1 is input to the circuit device 30 via the clock input terminal. The clock signal CK2 generated by the clock signal generation circuit 32 is output to the outside via the clock output terminal of the circuit device 30. For example, the clock signal CK2 generated by the clock signal generation circuit 32 is output from the clock output terminal via an output circuit not shown, and then output to the outside via an external terminal for external connection of the oscillator 4. The clock input terminal and clock output terminal are, for example, pads of the circuit device 30.

[0043] The processing circuit 34 outputs a frequency setting signal FSD. By using this frequency setting signal FSD to control the frequency of the clock signal CK2, the second temperature compensation process is achieved. For example, this second temperature compensation process ensures that the frequency change of the clock signal CK2 relative to temperature variations remains constant. The processing circuit 34 can be implemented, for example, using an ASIC based on an auto-configuration and routing ASIC such as a gate array. Alternatively, it can be implemented using a processor such as a DSP or CPU.

[0044] For example, as described later Figure 8 As explained, regarding frequency-temperature characteristics, the frequency of oscillator 10 varies significantly with temperature, i.e., the frequency variation is large. Therefore, if a clock signal based on the oscillation of oscillator 10 is directly used for temperature compensation processing, such as digital processing, the frequency fluctuations caused by temperature measurement results become large, making it difficult to achieve high precision in the clock frequency of oscillator 4. For example, the frequency fluctuations caused by quantization errors in temperature detection data make it difficult to achieve high precision in the clock frequency. Furthermore, in this embodiment, a frequency fluctuation refers to a small and rapid frequency change relative to temperature variation, which occurs throughout the temperature compensation range. (This will be discussed later.) Figure 5 Specific examples are shown below.

[0045] In this respect, in this embodiment, a first temperature compensation process, which is a coarse adjustment, is performed in the circuit device 20 that oscillates the oscillator 10. As a result, the frequency variation under the frequency-temperature characteristic of the clock signal CK1 output from the circuit device 20 is reduced. Then, when the circuit device 30 generates a clock signal CK2 based on the clock signal CK1 from the circuit device 20, a second temperature compensation process, which is a fine adjustment, is performed. After the first temperature compensation process, which is a coarse adjustment, is performed by the circuit device 20, and then the second temperature compensation process, which is a fine adjustment, is performed by the circuit device 30, the frequency fluctuations caused by temperature measurement results can be reduced, and the clock frequency of the oscillator 4 can be made more accurate. For example, in this embodiment, the absolute value of the frequency deviation of the clock signal CK2 caused by temperature variation is smaller than the absolute value of the frequency deviation of the clock signal CK1 caused by temperature variation, and the frequency variation under the frequency-temperature characteristic of the clock signal CK2 can be made very small. For example, as will be described later. Figure 8As explained, by performing the first temperature compensation process through the circuit device 20, the absolute value of the frequency deviation of the clock signal CK1 caused by temperature variations can be kept, for example, below 1 ppm within a temperature range of -40°C to 105°C. Furthermore, in this embodiment, the clock signal CK1, which has undergone the first temperature compensation process to coarsely adjust the absolute value of the frequency deviation to, for example, below 1 ppm, is input to the circuit device 30, where a second temperature compensation process is performed to generate the clock signal CK2. This allows the absolute value of the frequency deviation of the clock signal CK2 to be, for example, below 100 ppb, and more preferably below 10 ppb, achieving high precision in the clock frequency. Additionally, the frequency deviation referred to here is the value obtained by dividing the difference between the nominal frequency and the actual frequency by the nominal frequency.

[0046] In this embodiment, the circuit device 20 includes an oscillation circuit 22 that generates a clock signal CK1 by oscillating the oscillator 10, and a processing circuit 24 that performs a first temperature compensation process. Furthermore, the circuit device 30 includes a clock signal generation circuit 32 that generates a clock signal CK2 with a frequency set according to a frequency setting signal FSD based on the clock signal CK1 from the circuit device 20, and a processing circuit 34 that performs a second temperature compensation process and outputs the frequency setting signal FSD. Thus, by providing the oscillation circuit 22 and the processing circuit 24 in the circuit device 20, the circuit device 20 can perform the process of generating the clock signal CK1 by oscillating the oscillator 10 and the first temperature compensation process of temperature compensation for the frequency of the clock signal CK1. Additionally, by providing the clock signal generation circuit 32 and the processing circuit 34 in the circuit device 30, the circuit device 30 can perform the process of generating the clock signal CK2 based on the clock signal CK1 and the second temperature compensation process of temperature compensation for the frequency of the clock signal CK2.

[0047] In this embodiment, as a first temperature compensation process, the processing circuit 24 of the circuit device 20 generates a temperature compensation control voltage VC to compensate for the frequency-temperature characteristics of the oscillator 10, and outputs the control voltage VC to the oscillation circuit 22. On the other hand, the processing circuit 34 of the circuit device 30 performs a second temperature compensation process based on temperature detection data, and outputs a frequency setting signal FSD, which is a digital signal, to the clock signal generation circuit 32.

[0048] Thus, the oscillation frequency of the oscillation circuit 22 is controlled by the control voltage VC generated through the first temperature compensation process, thereby generating a clock signal CK1 that has undergone the first temperature compensation process, in which the frequency-temperature characteristics of the oscillator 10 are compensated. Then, by inputting the clock signal CK1 and the frequency setting signal FSD generated through the second temperature compensation process into the clock signal generation circuit 32, a clock signal CK2 that has undergone the second temperature compensation process can be generated. Thus, after the first temperature compensation process, which performs coarse adjustment, the second temperature compensation process, which performs fine adjustment, can achieve high precision in the clock frequency of the oscillator 4.

[0049] Figure 2 The first structural example of the oscillator 4 in this embodiment is shown. Figure 2 In this circuit, the circuit device 20 includes a temperature sensor 26 and performs a first temperature compensation process based on a temperature detection signal ST from the temperature sensor 26. The temperature detection signal ST is, for example, a temperature detection voltage. For example, the temperature sensor 26 outputs the temperature detection signal ST to the processing circuit 24. The processing circuit 24 performs the first temperature compensation process based on the temperature detection signal ST from the temperature sensor 26. For example, the processing circuit 24 performs the first temperature compensation process based on temperature detection data obtained by A / D conversion of the temperature detection signal ST from the temperature sensor 26 via an A / D conversion circuit (not shown). This A / D conversion circuit can be located externally to the processing circuit 24 or internally.

[0050] Temperature sensor 26 outputs a temperature-dependent voltage, which varies according to the ambient temperature, as a temperature detection signal ST. The ambient temperature is, for example, the temperature surrounding the oscillator 10 or the circuit device 20. For example, temperature sensor 26 generates a temperature-dependent voltage using temperature-dependent circuit elements and outputs the temperature-dependent voltage based on a voltage that is not dependent on temperature. For example, temperature sensor 26 outputs the forward voltage of a PN junction as the temperature-dependent voltage. For example, it outputs the base-emitter voltage of a bipolar transistor as the temperature-dependent voltage. The temperature-independent voltage is, for example, a bandgap reference voltage.

[0051] The processing circuit 24 measures the ambient temperature based on the temperature detection signal ST from the temperature sensor 26, suppresses the frequency variation of the oscillation of the oscillator 10 caused by temperature changes, performs a first temperature compensation process to compensate for the frequency-temperature characteristics of the oscillator 10, and outputs a control voltage VC. By controlling the capacitance value of the variable capacitor circuit in the oscillation circuit 22 according to this control voltage VC, the first temperature compensation process is realized to suppress the frequency variation of the oscillation of the oscillator 10 caused by temperature changes and keep it constant. For example, the first temperature compensation process is realized to make the absolute value of the frequency deviation of the clock signal CK1, for example, less than 1 ppm.

[0052] Thus, by performing the first temperature compensation process using the temperature sensor 26 built into the circuit device 20, appropriate temperature compensation for the frequency-temperature characteristics of the oscillator 10 can be achieved. For example, by using the temperature sensor 26 built into the circuit device 20, the temperature of a location not too far from the oscillator 10 can be measured. This reduces the difference between the actual temperature of the oscillator 10 and the temperature measured by the temperature sensor 26, thereby enabling a more appropriate first temperature compensation process. For example, it can reduce the hysteresis error of the temperature characteristics.

[0053] In addition, Figure 2 In this circuit, circuit device 30 receives a temperature detection signal ST from temperature sensor 26 based on circuit device 20, and performs a second temperature compensation process based on the temperature detection signal ST. For example, the temperature detection signal ST is output via the signal output terminal of circuit device 20 and input to circuit device 30 via the signal input terminal of circuit device 30. The signal output terminal is, for example, a pad of circuit device 20, and the signal input terminal is, for example, a pad of circuit device 30. For example, the temperature detection signal ST from circuit device 20 is input to processing circuit 34 of circuit device 30. Then, processing circuit 34 performs the second temperature compensation process based on the temperature detection signal ST and outputs a frequency setting signal FSD to clock signal generation circuit 32. Clock signal generation circuit 32 generates a clock signal CK2 with a frequency set according to the frequency setting signal FSD based on the clock signal CK1 from circuit device 20. For example, clock signal generation circuit 32 uses clock signal CK1 as a reference clock signal to generate a clock signal CK2 with a frequency set according to the frequency setting signal FSD. Then, the generated clock signal CK2 is output from oscillator 4.

[0054] Thus, in Figure 2In this circuit, circuit device 30 performs a second temperature compensation process based on the temperature detection signal ST from temperature sensor 26 of circuit device 20. Thus, by performing both the first and second temperature compensation processes in circuit device 20 based on the temperature detection signal ST from the same temperature sensor 26, more appropriate temperature compensation can be achieved. Furthermore, by using the temperature sensor 26 built into circuit device 20, the distance between temperature sensor 26 and circuit device 30 can be increased. For example, the distance between temperature sensor 26 and oscillator 10 can be closer than the distance between temperature sensor 26 and circuit device 30. For example, since circuit device 30 performs digital temperature compensation processing, the heat generated by digital processing is higher. By making the distance between circuit device 30, which is a heat source, and temperature sensor 26 greater than the distance between oscillator 10 and temperature sensor 26, the adverse effects caused by the heat generated by circuit device 30 can be reduced. Specifically, the hysteresis error of the temperature characteristics described later can be significantly reduced, enabling high precision of the clock frequency of oscillator 4.

[0055] Figure 3 A second structural example of the oscillator 4 in this embodiment is shown. Figure 3 In this circuit, circuit device 30 receives a temperature detection signal ST from an external temperature sensor 27 located outside circuit devices 20 and 30, and performs a second temperature compensation process based on the temperature detection signal ST. For example, the temperature detection signal ST from the external temperature sensor 27 is input to circuit device 30 via a signal input terminal. For example, the temperature detection signal ST from the external temperature sensor 27 is input to the processing circuit 34 of circuit device 30. Then, processing circuit 34 performs the second temperature compensation process based on the temperature detection signal ST and outputs a frequency setting signal FSD to clock signal generation circuit 32. For example, processing circuit 34 performs the second temperature compensation process based on temperature detection data obtained by A / D conversion of the temperature detection signal from external temperature sensor 27 through an A / D conversion circuit (not shown). Clock signal generation circuit 32 generates a clock signal CK2 with a frequency set according to the frequency setting signal FSD based on the clock signal CK1 from circuit device 20.

[0056] An external temperature sensor 27 is installed, for example, inside the package of the oscillator 4. As the external temperature sensor 27, various temperature sensing elements implemented using circuit components such as thermistors can be used. Furthermore, the circuit device 20 can perform a first temperature compensation process based on the temperature detection signal ST from the external temperature sensor 27, or it can perform a first temperature compensation process based on the temperature detection signal ST from the temperature sensor 26 built into the circuit device 20. Alternatively, the circuit device 20 can perform the first temperature compensation process using both the built-in temperature sensor 26 and the external temperature sensor 27. The circuit device 30 can also perform a second temperature compensation process using both the temperature sensor 26 built into the circuit device 20 and the external temperature sensor 27.

[0057] Alternatively, the circuit device 30 can use a temperature sensor built into the circuit device 30 to perform the second temperature compensation process. Alternatively, multiple temperature sensors can be provided as external temperature sensors 27, and these multiple temperature sensors can be used to perform the first and second temperature compensation processes. Alternatively, multiple temperature sensors can be provided in the circuit device 20 and the circuit device 30, and these multiple temperature sensors can be used to perform the first and second temperature compensation processes.

[0058] Thus, in Figure 3 In this process, a second temperature compensation process, such as temperature compensation processing, is performed based on the temperature detection signal ST from the external temperature sensor 27. This allows for more appropriate measurement of the temperature surrounding the oscillator 10, for example, by placing the external temperature sensor 27 near the oscillator 10. Consequently, more appropriate and accurate temperature compensation processing can be achieved. For example, even higher accuracy temperature compensation processing can be achieved by using multiple temperature sensors within the oscillator 4 package as external temperature sensors 27.

[0059] Figure 4 The third structural example of the oscillator 4 in this embodiment is shown. Figure 4In this circuit, the circuit device 30 includes a storage unit 35 that stores information about the learned model. Then, the processing circuit 34 performs a second temperature compensation process based on the information about the learned model. For example, the processing circuit 34 performs the second temperature compensation process based on a temperature detection signal ST and the information about the learned model stored in the storage unit 35. Then, a frequency setting signal FSD that has undergone temperature compensation processing is output. The storage unit 35 can be implemented, for example, using a semiconductor memory such as a non-volatile memory. As a non-volatile memory, examples include electrically erasable programmable read-only memory (EEPROM) or OTP (One-Time Programmable) memory using FAMOS (Floating Gate Avalanche Injection MOS).

[0060] The temperature detection signal ST can be a temperature detection signal from the temperature sensor 26 built into the circuit device 20, or a temperature detection signal from the external temperature sensor 27. Alternatively, the temperature detection signal ST can also be a temperature detection signal from a temperature sensor (not shown) built into the circuit device 30. Alternatively, the processing circuit 34 can perform a second temperature compensation process based on the temperature detection signals ST from multiple temperature sensors such as the temperature sensor 26 and the external temperature sensor 27, and information from the learned model stored in the storage unit 35. For example, the storage unit 35 stores information about a learned model obtained through machine learning in a manner that yields corresponding temperature compensation values ​​relative to temperature measurement results. The processing circuit 34 performs a second temperature compensation process to calculate the temperature compensation value corresponding to each temperature based on the temperature detection signal ST and the information from the learned model in the storage unit 35. When the processing circuit 34 performs neural network operations, the storage unit 35 stores information about the weighting coefficients of the neural network operations as information about the learned model. The processing circuit 34 performs, for example, the second temperature compensation process as follows: based on the temperature detection data corresponding to the temperature detection signal ST, it reads the information of the weighting coefficients from the storage unit 35, and calculates the temperature compensation value corresponding to each temperature by performing neural network operations.

[0061] In this way, by using the information from the learned model for the second temperature compensation process, a more accurate and appropriate second temperature compensation process can be achieved. For example, during the manufacturing or shipping of the oscillator 4, the information of the learned model obtained by measuring the frequency-temperature characteristics of the oscillator 4 is written into and stored in a storage unit 35 implemented by a non-volatile memory or the like. For example, during the manufacturing or shipping of the oscillator 4, while changing the ambient temperature using a constant temperature bath or the like, the frequency characteristics of the clock signal at each temperature are measured. Then, the information of the learned model obtained based on the measurement results is written into and stored in the storage unit 35. For example, by monitoring the clock frequency and temperature detection signal at each temperature, the information of the learned model obtained by machine learning to obtain an appropriate temperature compensation value corresponding to the value of the temperature detection signal at each temperature is written into and stored in the storage unit 35. In this way, when the oscillator 4 is actually operating, the processing circuit 34 can perform the second temperature compensation process as follows: calculate the temperature compensation data corresponding to the temperature detection signal from the temperature sensor. As a result, a second temperature compensation process that suppresses and eliminates the effects of manufacturing process variations or circuit characteristic variations can be achieved. Furthermore, the oscillator 4 in this embodiment is not limited to... Figures 1-4 The structure described herein can be implemented in various variations. For example, it can be implemented using a single semiconductor chip to realize circuit devices 20 and 30. Furthermore, multiple temperature sensors can be provided on circuit device 20, or one or more temperature sensors can be provided on circuit device 30, and multiple external temperature sensors implemented by discrete components can be provided on oscillator 4. Additionally, the information of the learned model can be updated after oscillator 4 leaves the factory. Furthermore, the second temperature compensation processing based on the learned model information can be performed as long as oscillator 4 is installed. The structure for performing the second temperature compensation processing does not necessarily need to be housed in the same package as other circuit elements; it can also be located outside the package of oscillator 4.

[0062] 2. Temperature compensation processing

[0063] Next, the temperature compensation process of this embodiment will be described in detail. For example, in Figure 5 In the frequency-temperature characteristic, the horizontal axis represents temperature, such as temperature variations within a range of -40°C to 80°C, -40°C to 105°C, or -40°C to 125°C. The vertical axis represents frequency deviation expressed in units such as ppb. The same applies to the subsequent figures.

[0064] Figure 5 A1 represents the frequency-temperature characteristic of a conventional oscillator as the temperature rises from a lower to a higher temperature, while A2 represents the frequency-temperature characteristic as the temperature falls from a higher to a lower temperature. For example... Figure 5As in A1, the frequency variation caused by temperature change is relatively small when the temperature is increased. However, as in A2, a hysteresis error (HYS) occurs when the temperature is decreased after an increase. That is, if the temperature of the IC in the circuit device rises due to the temperature increase, the temperature of the circuit device will not drop immediately even if the temperature is subsequently decreased, but will remain high. Therefore, when temperature compensation is performed using a temperature sensor built into the circuit device, a hysteresis error (HYS) occurs because the temperature compensation is performed based on a temperature detection signal that differs from the actual temperature of the oscillator or the ambient temperature. Figure 5 The hysteresis error HYS is shown. Additionally, in Figure 5 Furthermore, minor frequency fluctuations (FJP) caused by variations in temperature measurement results can occur. If such minor FJP fluctuations or hysteresis errors (HYS) occur, it becomes difficult to bring the frequency deviation caused by temperature changes within the allowable frequency error specified for the oscillator.

[0065] Figure 6 This is an example of the frequency-temperature characteristics under conditions where micro-jumps in frequency are generated. For example... Figure 6 As shown, when large micro-jumps occur, the slope of the frequency-temperature characteristic deteriorates, and the oscillator performance worsens. On the other hand, as... Figure 7 As shown, by suppressing micro-jumps, the clock frequency of the oscillator can be made more precise.

[0066] Figure 8 B1 represents the frequency-temperature characteristic of the oscillator 10, such as a quartz oscillator. In the temperature compensation process, compensation is performed to eliminate the frequency-temperature characteristic of the oscillator 10 shown in B1. Therefore, as shown in B2, temperature compensation is required within a relatively large correction range, for example, 20 ppm to 40 ppm. On the other hand, temperature measurement results using a temperature sensor exhibit fluctuations.

[0067] For example Figure 8 TT represents the true temperature, and fluctuations as shown in TL to TH exist in the temperature measurement results. These fluctuations are caused by variations in external air temperature, detection bias of the temperature sensor, deviations in the time difference of heat transfer to oscillator 10, and deviations in the A / D conversion of the temperature detection signal. Furthermore, if fluctuations in the temperature detection results as shown in TL to TH occur, the correction error ΔE1 caused by these fluctuations increases. For example, when attempting to compensate for the frequency-temperature characteristics of oscillator 10 as shown in B1 within a large correction range as shown in B2 using a single temperature compensation process, the correction error ΔE1 results in... Figure 5 , Figure 6The frequency of the micro-jump FJP is shown. For example, the second temperature compensation process, as a digital temperature compensation process, is performed based on digital temperature detection data obtained by A / D conversion of the temperature detection signal. Therefore, there is a quantization error in the A / D conversion of the temperature detection signal. Figure 8 If the frequency-temperature characteristic of B1 is directly subjected to the second temperature compensation process, then the correction error caused by this quantization error is as follows: Figure 8 It increases in the same way as ΔE1.

[0068] In this embodiment, a first temperature compensation process with coarse adjustment is performed via the circuit device 20. By performing this first temperature compensation process, such as... Figure 8 As shown in B3, the absolute value of the frequency deviation of the clock signal CK1 caused by temperature variation can be made, for example, less than 1 ppm within a temperature range of -40°C to 105°C. Therefore, even in the case of fluctuations in temperature measurement results as shown in TL to TH, the correction error ΔE2 can be made very small. That is, in this embodiment, the clock signal CK1 after the first temperature compensation process of coarse adjustment is input to the circuit device 30, and the second temperature compensation process of fine adjustment is performed in the circuit device 30 to generate the clock signal CK2. Therefore, since the clock signal CK1 is input to the circuit device 30, the absolute value of the frequency deviation of the clock signal CK1 caused by temperature variation is made less than 1 ppm within a temperature range of -40°C to 105°C. Figure 8 Since the clock signal CK1 has a frequency-temperature characteristic as shown in B3, the circuit device 30 does not need to perform temperature compensation processing within a large correction range as shown in B2; it only needs to perform temperature compensation processing within a smaller correction range. Therefore, even if the temperature measurement result fluctuates, the correction error ΔE2 can be reduced.

[0069] For example, because it is possible to Figure 8 By reducing the correction error caused by the quantization error in the A / D conversion of the temperature detection signal, as in ΔE2, high precision of the clock frequency can be achieved. For example, the absolute value of the frequency deviation of the clock signal CK2 caused by temperature variation can be made sufficiently smaller than the absolute value of the frequency deviation of the clock signal CK1 caused by temperature variation. Thus, the absolute value of the frequency deviation of the clock signal CK2 can be, for example, below 100 ppb. Specifically, as... Figure 9 As shown, the absolute value of the frequency deviation of the clock signal CK2 can be made less than 10ppb, thus achieving high precision in clock frequency.

[0070] In addition, in this embodiment, such as Figure 2As shown, the circuit device 30 performs a second temperature compensation process based on the temperature detection signal ST from the temperature sensor 26 of the circuit device 20. Thus, by performing, for example, a digital second temperature compensation process, even when the circuit device 30 generates heat, the adverse effects of this heat on the temperature detection result of the temperature sensor 26 can be suppressed. For example, the distance between the temperature sensor 26 and the oscillator 10 can be made closer than the distance between the temperature sensor 26 and the circuit device 30, allowing the temperature sensor 26 to measure the temperature of the oscillator 10 more appropriately. For example, since the distance between the temperature sensor 26 and the circuit device 30 can be increased, the adverse effects of the heat generated by the circuit device 30 on the temperature detection result of the temperature sensor 26 can be suppressed. As a result, the temperature loss in... Figure 5 The hysteresis error HYS is described in the text. For example... Figure 10 C1 represents the frequency-temperature characteristic of the oscillator 4 in this embodiment as it rises from a lower temperature to a higher temperature, and C2 represents the frequency-temperature characteristic as it falls from a higher temperature to a lower temperature. For example... Figure 10 As shown, the oscillator 4 according to this embodiment, and Figure 5 In comparison, it can significantly reduce hysteresis error and achieve high precision in the clock frequency of oscillator 4.

[0071] 3. Circuit device

[0072] Figure 11 An example of the first structure of the circuit device 20, which is the first circuit device, is shown. For example... Figure 11 As shown, the circuit device 20 includes: an oscillation circuit 22 that generates a clock signal CK1 by oscillating the oscillator 10; and a processing circuit 24 that performs a first temperature compensation process. Additionally, in Figure 11 In this circuit, the circuit device 20 includes a temperature sensor 26 and a storage unit 50. The storage unit 50 can be implemented, for example, using a memory such as a non-volatile memory.

[0073] Then, in Figure 11 In the first temperature compensation process, the processing circuit 24 generates a temperature compensation control voltage VC to compensate for the frequency-temperature characteristics of the oscillator 10, and outputs the control voltage VC to the oscillation circuit. For example, the first temperature compensation process involves generating a function to compensate for the frequency-temperature characteristics of the oscillator 10 through polynomial approximation, and the temperature compensation control voltage VC is output to the oscillation circuit 22. Furthermore, the oscillation circuit 22 includes, for example, a variable capacitor circuit electrically connected to one end of the oscillator 10, the capacitance value of which is controlled according to the control voltage VC. Thus, a clock signal CK1, which has undergone the first temperature compensation process, is output from the circuit device 20. That is, as... Figure 8As shown in B3, the absolute value of the frequency deviation caused by temperature variation within the temperature range of -40℃ to 105℃ is output as a clock signal CK1 with a value of less than 1ppm.

[0074] Specifically, the processing circuit 24 includes a temperature compensation circuit 28 and a control circuit 29. The temperature compensation circuit 28 includes a function generation circuit 52. The control circuit 29 performs readout control of data from the storage unit 50 and control of the temperature compensation circuit 28. The function generation circuit 52 performs the processing of generating a function for compensating the frequency-temperature characteristics of the oscillator 10 through polynomial approximation. The storage unit 50 stores the coefficient data of the polynomial in the polynomial approximation. For example, the function generation circuit 52 includes a 0th-order component generation circuit, a 1st-order component generation circuit, and a 3rd-order component generation circuit. In addition, the function generation circuit 52 may include a higher-order component generation circuit. Higher-order components are components of order 4 or higher. The 0th-order component generation circuit outputs a 0th-order component signal that approximates the 0th-order component of the frequency-temperature characteristics of the oscillator 10 based on the coefficient data for the 0th-order component read from the storage unit 50. The primary component generation circuit, the tertiary component generation circuit, and the higher-order component generation circuit, based on the coefficient data for primary, tertiary, and higher-order components read from the storage unit 50, output primary component signals that approximate the primary component of the frequency-temperature characteristics of the oscillator 10, tertiary component signals that approximate the tertiary component, and higher-order component signals, respectively. Then, the temperature compensation circuit 28 generates a control voltage VC for compensating the frequency-temperature characteristics of the oscillator 10 by adding these primary, tertiary, and higher-order component signals. Based on this structure... Figure 11 The circuit device 20 is capable of performing the first temperature compensation process using a polynomial approximation simulation method.

[0075] Figure 12 A second structural example of the circuit device 20 is shown. For example... Figure 12 As shown, the circuit device 20 includes: an oscillation circuit 22 that generates a clock signal CK1 by oscillating the oscillator 10; and a processing circuit 24 that performs a first temperature compensation process. Additionally, in Figure 12In this circuit, the circuit device 20 includes a temperature sensor 26, a storage unit 57, and an A / D conversion circuit 58. The storage unit 57 can be implemented, for example, using a memory such as a non-volatile memory. The A / D conversion circuit 58 performs A / D conversion on the temperature detection signal ST (temperature detection voltage) from the temperature sensor 26 and outputs the temperature detection data DT to the processing circuit 24. Then, as a first temperature compensation process, the processing circuit 24 generates a temperature compensation control voltage VC to compensate for the frequency-temperature characteristics of the oscillator 10 and outputs the control voltage VC to the oscillation circuit. Furthermore, the capacitance value of the variable capacitor circuit of the oscillation circuit 22 is controlled according to the control voltage VC, thereby outputting a clock signal CK1 that has undergone the first temperature compensation process from the circuit device 20.

[0076] Specifically, the processing circuit 24 includes a digital signal processing circuit 56 and a D / A conversion circuit 54. The digital signal processing circuit 56 performs a first temperature compensation process based on the coefficient data for temperature compensation processing read from the storage unit 57. For example, the digital signal processing circuit 56 performs the first temperature compensation process based on the temperature detection data DT, which varies according to temperature, and the coefficient data of the polynomial in the polynomial approximation, generating frequency control data. This first temperature compensation process is used to keep the oscillation frequency of the oscillator 10 constant even in the presence of temperature changes. Then, the D / A conversion circuit 54 performs D / A conversion on the frequency control data from the digital signal processing circuit 56 and outputs the temperature compensation control voltage VC to the oscillation circuit 22. Thus, a clock signal CK1 that has undergone the first temperature compensation process is output from the circuit device 20.

[0077] Figure 13 A first structural example of the circuit device 30, which serves as the second circuit device, is shown. Figure 13 In the circuit 30, a clock signal generation circuit 32, a processing circuit 34, an A / D conversion circuit 60, and a register 62 are included. The A / D conversion circuit 60 performs A / D conversion on the temperature detection signal ST, outputting digital temperature detection data DT. The register 62 stores the frequency division ratio setting value VDIV. The register 62 can be implemented, for example, using a flip-flop circuit, or alternatively, using a memory such as RAM. The processing circuit 34 performs a second temperature compensation process based on the temperature detection data DT, and uses the frequency division ratio setting signal SDIV as the... Figures 1-4 The frequency setting signal FSD of the digital signal described herein is output to the clock signal generation circuit 32. For example, the processing circuit 34 outputs the frequency division ratio setting signal SDIV, which is used to generate the clock signal CK2 after the second temperature compensation processing, to the clock signal generation circuit 32 based on the temperature detection data DT from the A / D conversion circuit 60 and the frequency division ratio setting value VDIV from the register 62.

[0078] The clock signal generation circuit 32 includes a PLL circuit 40 that inputs the clock signal CK1 as a reference clock signal. The PLL circuit 40 is, for example, a fractional-N type PLL circuit. Furthermore, in Figures 1-4 The frequency setting signal FSD described herein is the division ratio setting signal SDIV of the frequency divider circuit 48 included in the PLL circuit 40. The frequency divider circuit 48 performs frequency division processing according to the division ratio set according to the division ratio setting signal SDIV.

[0079] Thus, in Figure 13 In this circuit, the clock signal generation circuit 32 includes a fractional-N type PLL circuit 40 that receives the clock signal CK1 as a reference clock signal, and a frequency divider circuit 48 that receives the division ratio setting signal SDIV as a frequency setting signal FSD from the PLL circuit 40. Thus, by inputting the division ratio setting signal SDIV, which performs the second temperature compensation processing, into the frequency divider circuit 48 of the PLL circuit 40, a PLL operation that multiplies the frequency of the clock signal CK1 is achieved, generating a clock signal CK2 based on the multiplied frequency of the clock signal CK1. Therefore, a clock signal CK2 after the second temperature compensation processing can be generated from the clock signal CK1. Furthermore, by using the fractional-N type PLL circuit 40, not only integers but also fractions can be set as the division ratio of the PLL circuit 40, enabling the generation of a clock signal CK2 of arbitrary frequency.

[0080] Next, regarding Figure 13 The structure of the circuit device 30 will be described in more detail. Figure 13 In the clock signal generation circuit 32, there are PLL circuit 40 and output circuit 33.

[0081] Output circuit 33 outputs clock signal CK2 based on clock signal CKQ output by PLL circuit 40. For example, output circuit 33 includes a frequency divider circuit (not shown), which divides clock signal CKQ to variably set the frequency of clock signal CK2. Thus, the frequency of clock signal CK2 can be set to the frequency desired by the user. Furthermore, output circuit 33 outputs clock signal CK2 to the outside in signal form such as LVDS (Low Voltage Differential Signaling), PECL (Positive Emitter Coupled Logic), HCSL (High Speed ​​Current Steering Logic), or differential CMOS (Complementary MOS). For example, output circuit 33 may be a circuit capable of outputting clock signal CK2 in at least two of the following signal forms: LVDS, PECL, HCSL, and differential CMOS. In this case, output circuit 33 outputs clock signal CK2 in the signal form set by processing circuit 34.

[0082] PLL circuit 40 takes clock signal CK1 as a reference clock signal as input and performs PLL (Phase Locked Loop) operation. For example, PLL circuit 40 generates a clock signal CKQ that doubles the frequency of clock signal CK1. That is, it generates a high-precision clock signal CKQ that is phase-synchronized with clock signal CK1. PLL circuit 40 includes phase comparator circuit 42, control voltage generation circuit 44, voltage-controlled oscillation circuit 46, and frequency divider circuit 48.

[0083] Phase comparison circuit 42 performs a phase comparison between the clock signal CK1, which serves as the reference clock signal, and the feedback clock signal FBCK. For example, phase comparison circuit 42 compares the phases of the clock signal CK1 and the feedback clock signal FBCK, and outputs a signal CQ corresponding to the phase difference between the clock signal CK1 and the feedback clock signal FBCK as the phase comparison result. The signal CQ corresponding to the phase difference is, for example, a pulse signal with a pulse width proportional to the phase difference.

[0084] The control voltage generation circuit 44 generates a control voltage VC2 based on the phase comparison result in the phase comparison circuit 42. For example, the control voltage generation circuit 44 performs charge pumping or filtering based on the signal CQ from the phase comparison result of the phase comparison circuit 42 to generate a control voltage VC2 that controls the oscillation of the voltage-controlled oscillation circuit 46.

[0085] The voltage-controlled oscillator circuit 46, acting as a VCO (Voltage Controlled Oscillator), generates a clock signal CKQ with a frequency corresponding to the control voltage VC2. For example, it oscillates according to the control voltage VC2 from the control voltage generation circuit 44 to generate the clock signal CKQ. For example, the voltage-controlled oscillator circuit 46 generates a clock signal CKQ with a frequency that varies according to the control voltage VC2 through oscillation. As an example, the voltage-controlled oscillator circuit 46 includes a variable capacitor element such as a varactor diode, the capacitance of which changes according to the control voltage VC2, thereby changing the frequency of the clock signal CKQ, which is the oscillation signal generated by the oscillation operation of the voltage-controlled oscillator circuit 46. Alternatively, the voltage-controlled oscillator circuit 46 can be, for example, an LC oscillator circuit using an inductor.

[0086] Frequency divider circuit 48 divides the clock signal CKQ and outputs a feedback clock signal FBCK. For example, frequency divider circuit 48 outputs the frequency of the clock signal CKQ divided according to the division ratio set according to the division ratio setting signal SDIV as the feedback clock signal FBCK. For example, when the oscillation frequency of voltage controlled oscillator circuit 46 is set to fvco and the division ratio of frequency divider circuit 48 is set to DIV, the frequency of feedback clock signal FBCK becomes fvco / DIV. Then, phase comparison circuit 42 performs a phase comparison between clock signal CKQ and feedback clock signal FBCK from frequency divider circuit 48 as described above.

[0087] By using a PLL circuit 40 with a structure including a phase comparison circuit 42, a control voltage generation circuit 44, a voltage control oscillation circuit 46, and a frequency divider circuit 48, a clock signal CKQ that is phase-synchronized with the clock signal CK1 can be generated, thereby generating and outputting a high-precision clock signal CK2 based on the clock signal CKQ.

[0088] In this embodiment, the processing circuit 34 includes a Δ-Σ modulation circuit 36 ​​and an arithmetic circuit 38. Δ-Σ modulation is performed by the Δ-Σ modulation circuit 36, thereby enabling the PLL circuit 40 to operate as a fractional-N type PLL circuit. Furthermore, the arithmetic circuit 38 performs a second temperature compensation process based on the temperature detection data DT from the A / D conversion circuit 60 and the division ratio setting value VDIV from the register 62. The division ratio setting value VDIV is data used to set the division ratio of the PLL circuit 40. The Δ-Σ modulation circuit 36 ​​performs Δ-Σ modulation on the calculated value, which is the result of the arithmetic circuit 38's calculation, and outputs a division ratio setting signal SDIV to set the division ratio of the division circuit 48.

[0089] For example, in Figure 13In this circuit, a fractional frequency divider is constructed using a frequency divider circuit 48 and a Δ-Σ modulation circuit 36. The fractional frequency divider uses the reciprocal of the multiplication rate of the PLL circuit 40 as the division ratio to divide the clock signal CKQ, and outputs the divided clock signal as a feedback clock signal FBCK to the phase comparator circuit 42. The Δ-Σ modulation circuit 36 ​​performs Δ-Σ modulation on the fractional part of the division ratio to generate an integer modulation value. For example, the Δ-Σ modulation circuit 36 ​​performs 3 or 4 Δ-Σ modulation. Furthermore, the sum of the integer part of the division ratio and the modulation value is set in the frequency divider circuit 48 as the division ratio setting signal SDIV. Thus, a fractional-N type PLL circuit 40 is realized.

[0090] Specifically, the Δ-∑ modulation circuit 36 ​​performs Δ-∑ modulation by integrating and quantizing the fractional division ratio L / M to generate a Δ-∑ modulated signal. Furthermore, the Δ-∑ modulation circuit 36 ​​performs addition and subtraction operations on the Δ-∑ modulated signal and the integer division ratio N, and inputs the output signal after the addition and subtraction operations to the frequency divider circuit 48. Multiple integer division ratios in the range near the integer division ratio N of the output signal after the addition and subtraction operations change sequentially over time, and their time average value is consistent with N+L / M. This N+L / M is set according to the division ratio setting signal SDIV from the processing circuit 34. For example, as described above, the frequency of the clock signal CKQ is set to fvco, and the frequencies of the clock signal CK1 and the feedback clock signal FBCK, i.e., the phase comparison frequency, are set to fpfd. In this case, under stable conditions where the phase of the clock signal CK1, which serves as the reference clock signal, is synchronized with the phase of the feedback clock signal FBCK, the relationship fvco = (N+L / M) × fpfd holds. By using a fractional-N type PLL circuit 40 with such a structure, it is possible to generate a clock signal CKQ that is multiplied by the clock signal CK1 according to a division ratio represented by N+L / M.

[0091] The arithmetic circuit 38 performs a second temperature compensation process based on the temperature detection data DT to generate a temperature compensation value. Then, the arithmetic circuit 38 adds the frequency division ratio setting value VDIV to the temperature compensation value to obtain an calculated value, which is then output as the result to the Δ-Σ modulator circuit 36. The Δ-Σ modulator circuit 36 ​​performs Δ-Σ modulation on this calculated value to generate the frequency division ratio setting signal SDIV, which is then output to the frequency divider circuit 48.

[0092] In this way, a fractional frequency divider can be implemented, and a second temperature compensation process can be implemented to suppress frequency fluctuations of the clock signal CK2 caused by temperature changes. Furthermore, according to this embodiment, the fractional frequency division process and temperature compensation process for implementing the fractional frequency divider can be executed simultaneously through the digital arithmetic processing in the processing circuit 34. Therefore, fractional frequency division and temperature compensation processes can be implemented while suppressing increases in the circuit size of the circuit device 30.

[0093] Figure 14 The second structural example of the circuit device 30 is shown. Figure 14 and Figure 13 The difference is that, in Figure 14 In the process circuit 34, there is a neural network operation circuit 39, and a storage unit 35 stores information about the learned model used for neural network operations. That is, Figure 14 Corresponding to Figure 4 In the structural example described, the circuit device 30 includes a storage unit 35 storing information about the learned model, and the processing circuit 34 performs a second temperature compensation process based on the learned model. Furthermore, when performing the second temperature compensation process based on the learned model, it is preferable to perform neural network operations based on temperature detection signals from multiple temperature sensors. For example, neural network operations can be performed based on temperature detection signals from one or more temperature sensors 26 installed in the circuit device 20, one or more external temperature sensors 27, or one or more temperature sensors installed in the circuit device 30.

[0094] A neural network is a mathematical model that simulates brain function on a computer. It has an input layer, intermediate layers, and an output layer. The input layer consists of neurons that output input values. In the intermediate layers and subsequent neurons, operations simulate the transmission of information as electrical signals in the brain. In the brain, the ease of information transmission varies depending on the strength of synaptic connections; therefore, weights are used in neural networks to represent this connection strength. Furthermore, activation functions, which are non-linear functions, are used in the operations within the neurons. Examples of activation functions include the ReLU function or the sigmoid function. Then, in each neuron, the outputs of the neurons in the previous layer connected to that neuron are multiplied and summed using weights, and the biases are added to apply the activation function. Finally, the result of the operations in the output layer becomes the output of the neural network.

[0095] In neural networks, appropriate weights and biases need to be set to obtain the desired output from the input. Hereinafter, weights will also be referred to as weighting coefficients. Bias can also be included in the weighting coefficients. During learning, a dataset is prepared in advance that maps the input to the correct output given that input. The correct output is the teacher data. The learning process of a neural network can be considered as the process of finding the most reliable weighting coefficients based on this dataset. For example, backpropagation can be used as a learning process for neural networks. In backpropagation, the parameters are updated by repeatedly performing forward and backward propagation. Here, the parameters refer to the weighting coefficients.

[0096] Furthermore, in this embodiment, the input to the neural network is temperature detection data. In this case, it is preferable to use multiple temperature detection data from multiple temperature sensors as input. Additionally, the storage unit 35 stores, for example, information about the weighting coefficients of the neural network as information for the learned model. The learned model has an input layer, an intermediate layer, and an output layer, and the weighting coefficient information is set based on a dataset that maps temperature detection data to temperature compensation values. The neural network operation circuit 39 uses the temperature detection data as input to the input layer of the learned model, performs calculations based on the weighting coefficient information stored in the storage unit 35, and outputs temperature compensation values ​​as the output of the output layer of the learned model. In this case, for example, during the learning stage at manufacturing or shipping, the clock frequency at each temperature is measured, and a temperature compensation value is calculated based on the measured clock frequency to keep the clock frequency constant relative to temperature changes. Then, based on the dataset that maps temperature compensation values ​​to temperature detection data corresponding to each temperature, the weighting coefficient information is set and written to the storage unit 35 as information for the learned model. Thus, a second temperature compensation process based on the learned model can be implemented.

[0097] Furthermore, the machine learning in this embodiment is not limited to the use of neural networks. For example, it can be machine learning in various well-known ways, such as SVM (support vector machine), or machine learning in ways derived from these methods.

[0098] like Figure 14 As shown, a second temperature compensation process is performed through neural network computation based on the learned model, thereby achieving a more accurate and appropriate second temperature compensation process. For example, it can achieve a second temperature compensation process that suppresses the adverse effects caused by variations in manufacturing processes or circuit characteristics.

[0099] Figure 15 A third structural example of the circuit device 30 is shown. Figure 15 In the circuit, clock signal generation circuit 32 includes a direct digital synthesizer 68. The direct digital synthesizer 68 uses clock signal CK1 as a reference clock signal to generate clock signal CK2 at a frequency set according to the frequency setting signal FSD.

[0100] Specifically, in Figure 15In this circuit, processing circuit 34 includes arithmetic circuit 64 and adder 66. Temperature detection data DT, obtained by A / D conversion of the temperature detection signal ST using A / D conversion circuit 60, is input to arithmetic circuit 64. Then, arithmetic circuit 64 performs calculations to determine the temperature compensation value based on the temperature detection data DT, and outputs the temperature compensation value to adder 66. The temperature compensation value calculation in this case can also be performed by… Figure 4 , Figure 14 The computational processing described herein is achieved through neural network operations based on the learned model. Then, adder 66 performs addition of the frequency setting value VFSD to calculate the temperature compensation value, and outputs the frequency setting signal FSD to clock signal generation circuit 32. The direct digital synthesizer 68 of clock signal generation circuit 32 generates a clock signal CK2 at the frequency set according to the frequency setting signal FSD. Output circuit 33 outputs the generated clock signal CK2 externally in the form of LVDS, PECL, HCSL, or differential CMOS signals.

[0101] The direct digital synthesizer 68 is a circuit that digitally generates a clock signal of arbitrary frequency based on a reference clock signal. Here, the reference clock signal is clock signal CK1. The direct digital synthesizer 68 includes, for example, a phase accumulator as an accumulation block and a waveform signal generation circuit. The phase accumulator accumulates a set value synchronously with the reference clock signal as one cycle. The clock frequency is set according to this accumulated set value. The waveform signal generation circuit may include, for example, a waveform memory and a D / A conversion circuit. The accumulation result in the phase accumulator becomes the address of the waveform memory, thereby generating a clock waveform at a clock frequency corresponding to the frequency setting signal FSD.

[0102] By using Figure 15 Such a direct digital synthesizer 68 can generate a clock signal CK2 of any frequency set according to the frequency setting value VFSD. Then, through the processing circuit 34, a second temperature compensation process is performed to generate a temperature-compensated high-precision clock signal CK2.

[0103] 4. Example of oscillator construction

[0104] Next, an example of the construction of oscillator 4 will be described. Figure 16 The first construction example of oscillator 4 is shown. Figure 16 This is a schematic cross-sectional view illustrating the structure of the oscillator 4. In this embodiment, the oscillator 4 includes an oscillator 10, a circuit arrangement 20, and a circuit arrangement 30. Furthermore, the oscillator 4 includes a package 15 housing the oscillator 10 and the circuit arrangement 20, and a package 5 housing the package 15 and the circuit arrangement 30. Packages 15 and 5 are respectively a first package and a second package. The first package and the second package may also be referred to as a first container and a second container.

[0105] Furthermore, in this embodiment, the circuit device 20 housed in package 15 performs a first temperature compensation process, and the circuit device 30 housed in package 5 performs a second temperature compensation process. For example, by housing the oscillator 10 and the circuit device 20 in package 15, a temperature-compensated oscillator 14 performing the first temperature compensation process in an analog manner is configured. Moreover, by housing the oscillator 14 performing the first temperature compensation process in an analog manner and the circuit device 30 performing the second temperature compensation process in a digital manner in package 5, an oscillator 4 that generates a high-precision clock signal is configured. The circuit device 30 can also be referred to as a correction IC for the second temperature compensation process that performs fine adjustments in a digital manner.

[0106] Specifically, the package 5 is formed of, for example, ceramic, and has a storage space inside. The oscillator 14 and circuitry 30 are housed within this storage space. The oscillator 14 is further housed within the package 15, which contains the vibrator 10 and circuitry 20. The storage space is hermetically sealed, preferably in a near-vacuum state, i.e., a depressurized state. The package 5 provides adequate protection for the circuitry 30 and the oscillator 14 from the effects of impact, dust, heat, moisture, etc.

[0107] Package 5 has a base 6 and a cover 7. Specifically, package 5 is composed of a base 6 supporting an oscillator 14 and a circuit device 30, and a cover 7 engaging with the upper surface of the base 6 in a manner that forms a receiving space between the cover 7 and the base 6. The base 6 has a first recess opening on its upper surface and a second recess opening on the bottom surface of the first recess on its inner side. The circuit device 30 is supported on the bottom surface of the first recess. For example, the circuit device 30 is supported on a stepped portion of the bottom surface via terminal electrodes. Additionally, the oscillator 14 is supported on the bottom surface of the second recess. For example, the oscillator 14 is supported on a stepped portion of the bottom surface via terminal electrodes. Furthermore, the base 6 has a third recess opening on the bottom surface of the second recess, in which a circuit component 12 is disposed. The disposed circuit component 12 can be, for example, a capacitor, etc. Figure 3 External temperature sensor 27, etc., as described in the text.

[0108] The circuit device 30 is electrically connected to the terminals of the oscillator 14 via, for example, a bonding wire BW, terminal electrodes formed on the stepped portion, and internal wiring of the package 5. This allows the clock signal CK1 and the temperature detection signal ST from the oscillator 14 to be input to the circuit device 30. Additionally, the circuit device 30 is electrically connected to the external terminals 8 and 9 of the oscillator 4 via the bonding wire BW, terminal electrodes formed on the stepped portion, and internal wiring of the package 5. The external terminals 8 and 9 are formed on the outer bottom surface of the package 5. The external terminals 8 and 9 are connected to external devices via external wiring. The external wiring is, for example, wiring formed on a circuit board on which the external devices are mounted. This enables the electrical connection between the circuit device 30 and the external devices, allowing the output of clock signals such as CK2 to the external devices. Alternatively, the terminals of the oscillator 14 can also be electrically connected to the external terminals 8 and 9.

[0109] exist Figure 16 In this circuit, the oscillator 14 is positioned below the circuit assembly 30. For example, the direction perpendicular to the substrate of the circuit assembly 30 and toward the bottom surface of the package 5 is designated as DA1, and the direction perpendicular to DA1 is designated as direction DA2. The substrate of the circuit assembly 30 is a semiconductor substrate. In this case, the oscillator 14 is positioned in direction DA1 of the circuit assembly 30. The circuit component 12 is positioned in direction DA1 of the oscillator 14. The circuit assembly 30 is positioned with direction DA2 as the longitudinal direction of the substrate.

[0110] Moreover, in Figure 15 In this circuit, the circuit device 30 performs a first temperature compensation process based on the temperature detection signal ST from the temperature sensor 26. The distance L1 between the temperature sensor 26 and the oscillator 10 is closer than the distance L2 between the temperature sensor 26 and the circuit device 30. For example, the temperature sensor 26 is formed on the circuit device 20, which is a semiconductor chip, and the oscillator 10 is arranged with its main surface facing the main surface of the circuit device 20. Furthermore, distance L1 is the distance between the temperature sensor 26 and the oscillator 10 in direction DA1, for example, the shortest distance between the temperature sensor 26 and the oscillator 10 in direction DA1. Similarly, distance L2 is the distance between the temperature sensor 26 and the circuit device 30 in direction DA1, for example, the shortest distance between the temperature sensor 26 and the circuit device 30 in direction DA1.

[0111] In this way, by making the distance L1 shorter than the distance L2, the temperature of the oscillator 10 can be measured more accurately using the temperature sensor 26. For example, the circuit device 30 performs a second temperature compensation process in a digital manner, or generates a high-speed clock signal through the PLL circuit 40 or the direct digital synthesizer 68, thus becoming a heat source that generates a lot of heat. Therefore, if the distance L2 between the circuit device 30 and the temperature sensor 26 is short, the heat from the circuit device 30, which is a heat source, will adversely affect the temperature measurement of the oscillator 10 by the temperature sensor 26.

[0112] Regarding this, in this embodiment, since the distance L1 is shorter and the distance L2 is longer, the adverse effects of heat generation from the circuit device 30 on temperature measurement can be reduced. Furthermore, in this embodiment, by housing the oscillator 10 and the circuit device 20 within the package 15, heat transfer from the circuit device 30 can be thermally blocked using the package 15. Therefore, the adverse effects of heat generation from the circuit device 30 on temperature measurement can be further reduced. Thus, as... Figure 10 As shown, this can significantly reduce hysteresis error.

[0113] Figure 17 The second construction example of oscillator 4 is shown. Figure 17 In the package 5, a calibration circuit 30 is disposed on the bottom surface, and an oscillator 14 is disposed above the circuit 30. For example, in Figure 16 In the circuit, an oscillator 14 is arranged in the direction DA1 below the circuit device 30, but... Figure 17 In this configuration, an oscillator 14 is arranged in the direction opposite to DA1. Additionally, in... Figure 17 In the middle, the oscillator 14 is configured to move in the up and down directions in conjunction with... Figure 16 Conversely, the terminals on the bottom surface of the oscillator 14 are electrically connected to the terminals of the circuit device 30, which serve as solder pads, via bonding wire BW. Furthermore, the terminals of the circuit device 30 are electrically connected to external terminals 8 and 9 via bonding wire BW, terminal electrodes, and internal wiring of the package 5. Moreover, in Figure 17 In the second construction example, the distance L1 between the temperature sensor 26 and the oscillator 10 is also closer than the distance L2 between the temperature sensor 26 and the circuit device 30. Therefore, the temperature of the oscillator 10 can be accurately measured using the temperature sensor 26.

[0114] Figure 18 The third construction example of oscillator 4 is shown. Figure 18 In this configuration, a circuit device 30 is arranged in the direction DA2 of the oscillator 14. For example, in a top view of the oscillator 4, the oscillator 14 and the circuit device 30 are arranged in a manner aligned in the direction DA2. Furthermore, in Figure 18In the third construction example, the distance L1 between the temperature sensor 26 and the oscillator 10 is also closer than the distance L2 between the temperature sensor 26 and the circuit device 30, enabling accurate measurement of the temperature of the oscillator 10 using the temperature sensor 26. Furthermore, from the viewpoint of minimizing the compactness of the oscillator 4, and... Figure 18 Compared to the third construction example, the preferred one is... Figure 16 The first construction example, Figure 17 The second construction example.

[0115] Figure 19 An example of the construction of oscillator 14 is shown. Oscillator 14 has an oscillator 10, a circuit device 20, and a package 15 for housing the oscillator 10 and the circuit device 20. The package 15 is formed, for example, of ceramic, and has a housing space inside, in which the oscillator 10 and the circuit device 20 are housed. The housing space is hermetically sealed, preferably in a near-vacuum state, i.e., a depressurized state. Through the package 15, the oscillator 10 and the circuit device 20 can be appropriately protected from the effects of impact, dust, heat, moisture, etc.

[0116] Package 15 has a base 16 and a cover 17. Specifically, package 15 is composed of a base 16 and a cover 17. The base 16 supports the oscillator 10 and the circuit device 20, and the cover 17 is engaged with the upper surface of the base 16 in such a way that a receiving space is formed between the cover 17 and the base 16. Furthermore, the oscillator 10 is supported by terminal electrodes on a stepped portion provided inside the base 16. In addition, the circuit device 20 is disposed on the inner bottom surface of the base 16. Specifically, the circuit device 20 is disposed with its active surface facing the inner bottom surface of the base 16. The active surface is the surface of the circuit device 20 on which the circuit elements are formed. Furthermore, bumps BMP are formed on the terminals of the circuit device 20, which serve as pads. Moreover, the circuit device 20 is supported on the inner bottom surface of the base 16 by the conductive bumps BMP. The conductive bumps (BMP), such as metal bumps, electrically connect the oscillator 10 to the circuit device 20 via the bumps (BMP), internal wiring of the package 15, and terminal electrodes. Furthermore, the circuit device 20 is electrically connected to the external terminals 18 and 19 of the oscillator 14 via the bumps (BMP) and internal wiring of the package 15. The external terminals 18 and 19 are formed on the outer bottom surface of the package 15. Moreover, as... Figure 16 , Figure 17 , Figure 18 As shown, the external terminals 18 and 19 of the oscillator 14 are electrically connected to the circuit device 30 via the bonding wire BW, internal wiring, and terminal electrodes. Thus, the clock signal CK1 and the temperature detection signal ST from the oscillator 14 can be input to the circuit device 30.

[0117] In addition, Figure 19In this embodiment, the circuit device 20 is mounted upside down with its active surface facing downwards, but this embodiment is not limited to this mounting. For example, the circuit device 20 can be mounted with its active surface facing upwards. That is, the circuit device 20 is mounted with its active surface facing the oscillator 10. According to this mounting, as... Figure 16 , Figure 17 , Figure 18 As shown, the temperature sensor 26 formed on the active surface of the circuit device 20 is opposite to the oscillator 10. Furthermore, the double-shielded structure, in which the oscillator 10 and the circuit device 20 are housed in the package 15 of the oscillator 14, and the oscillator 14 and the circuit device 30 are housed in the package 5, has been described above. However, the structure of the oscillator 4 in this embodiment is not limited to this, and various modifications can be made. For example, a single-shielded structure, in which the oscillator 10, the circuit device 20, and the circuit device 30 are housed in a single package 5, can also be used.

[0118] 5. Electronic devices and mobile devices

[0119] Figure 20 An example of the structure of an electronic device 500 including the oscillator 4 of this embodiment is shown. The electronic device 500 includes the oscillator 4 and a processing device 520 that operates according to a clock signal CK2 from the oscillator 4. Furthermore, the electronic device 500 may also include an antenna ANT, a communication interface 510, an operation interface 530, a display unit 540, and a memory 550. However, the electronic device 500 is not limited to... Figure 20 The structure allows for various modifications, such as omitting some structural elements or adding other structural elements.

[0120] Electronic device 500 can be, for example, network-related equipment such as base stations or routers, high-precision measuring devices for physical quantities such as distance, time, flow rate, or flow volume, biological information measuring devices for measuring biological information, or vehicle-mounted devices. Biological information measuring devices include, for example, ultrasound measuring devices, pulse meters, or blood pressure measuring devices. Vehicle-mounted devices are devices used for autonomous driving. Furthermore, electronic device 500 can also be wearable devices such as head-mounted displays or clock-related devices, robots, printing equipment, projection devices, portable information terminals such as smartphones, content providing devices for publishing content, or imaging devices such as digital cameras or camcorders.

[0121] Furthermore, as electronic device 500, there are devices for next-generation mobile communication systems such as 5G. For example, the oscillator 4 of this embodiment can be used in various devices such as base stations, remote radio heads (RRHs), or portable communication terminals of next-generation mobile communication systems. In next-generation mobile communication systems, high-precision clock frequencies are required for time synchronization, etc., and applications of the oscillator 4 of this embodiment that can achieve a frequency deviation of less than 10 ppb are preferred.

[0122] The communication interface 510 processes data received from or transmitted to the outside via the antenna ANT. The processing unit 520, acting as a processor, performs control processing of the electronic device 500 and various digital processing of data transmitted and received via the communication interface 510. The functions of the processing unit 520 can be implemented, for example, by a processor such as a microcomputer. The user interface 530 allows for user input operations and can be implemented via operation buttons, a touchpad, or a display. The display unit 540 displays various information and can be implemented via a liquid crystal display (LCD) or an organic EL display. The memory 550 stores data, and its function can be implemented via a semiconductor memory such as RAM or ROM.

[0123] Figure 21 An example of a mobile body incorporating the oscillator 4 of this embodiment is shown. The mobile body includes the oscillator 4 and a processing device 220 that operates according to a clock signal CK2 from the oscillator 4. The oscillator 4 of this embodiment can be assembled into various mobile bodies such as cars, airplanes, motorcycles, bicycles, or ships. The mobile body is, for example, a device / apparatus that has a drive mechanism such as an engine or electric motor, a steering mechanism such as a steering wheel or rudder, various electronic devices, and moves on land, in the sky, or at sea. Figure 21 A car 206, as a specific example of a moving body, is shown in a schematic diagram. The oscillator 4 of this embodiment is assembled in the car 206. The control device 208 includes the oscillator 4 and a processing device 220 that operates according to a clock signal CK2 generated by the oscillator 4. The control device 208 can, for example, control the stiffness of the suspension based on the attitude of the vehicle body 207, or control the braking of each wheel 209. For example, automatic driving of the car 206 can be achieved using the control device 208. Furthermore, the device equipped with the oscillator 4 of this embodiment is not limited to such a control device 208, and can also be assembled into various in-vehicle devices such as instrument panel devices or navigation devices installed in moving bodies such as the car 206.

[0124] As explained above, the oscillator of this embodiment includes an oscillator, a first circuit device electrically connected to the oscillator, and a second circuit device. The first circuit device generates a first clock signal by oscillating the oscillator and performs a first temperature compensation process to compensate the frequency of the first clock signal. The second circuit device receives the first clock signal from the first circuit device, generates a second clock signal based on the first clock signal, and performs a second temperature compensation process to compensate the frequency of the second clock signal.

[0125] According to this embodiment, by performing a first temperature compensation process on the first circuit device that causes the oscillator to oscillate, the frequency variation of the first clock signal output from the first circuit device under the frequency-temperature characteristic can be reduced. Furthermore, the second circuit device performs a second temperature compensation process when generating a second clock signal based on the first clock signal from the first circuit device. Thus, by performing the first temperature compensation process via the first circuit device and then the second temperature compensation process via the second circuit device, frequency fluctuations caused by temperature measurement results can be reduced, and high accuracy of the oscillator's clock frequency can be achieved.

[0126] Alternatively, the first circuit device may have a temperature sensor and perform a first temperature compensation process based on the temperature detection signal from the temperature sensor.

[0127] In this way, by using a temperature sensor built into the first circuit device to perform the first temperature compensation process, appropriate temperature compensation of the frequency-temperature characteristics of the oscillator can be achieved.

[0128] Alternatively, in this embodiment, the distance between the temperature sensor and the oscillator may be shorter than the distance between the temperature sensor and the second circuit device.

[0129] In this way, by making the distance between the temperature sensor and the oscillator closer than the distance between the temperature sensor and the second circuit device, the temperature of the oscillator can be measured more accurately using the temperature sensor.

[0130] Alternatively, in this embodiment, the second circuit device may receive a temperature detection signal from a temperature sensor and perform a second temperature compensation process based on the temperature detection signal.

[0131] In this way, the first temperature compensation process in the first circuit device and the second temperature compensation process in the second circuit device can be performed based on the temperature detection signal from the same temperature sensor, thus enabling more appropriate temperature compensation processing.

[0132] Alternatively, in this embodiment, the second circuit device may be input with a temperature detection signal from an external temperature sensor located outside the first and second circuit devices, and a second temperature compensation process may be performed based on the temperature detection signal.

[0133] In this way, by placing an external temperature sensor in a location suitable for measuring temperature, appropriate temperature measurements can be performed.

[0134] Alternatively, in this embodiment, the absolute value of the frequency deviation of the second clock signal caused by temperature variation may be smaller than the absolute value of the frequency deviation of the first clock signal caused by temperature variation.

[0135] Thus, after the first temperature compensation process of coarse adjustment, the second temperature compensation process of fine adjustment can be performed to obtain a high-precision second clock signal with a small absolute value of frequency deviation from the oscillator output.

[0136] Alternatively, in this embodiment, the absolute value of the frequency deviation of the first clock signal caused by temperature variation within a temperature range of -40°C to 105°C may be less than 1 ppm.

[0137] In this way, the first clock signal, which has undergone a first temperature compensation process to make the absolute value of the frequency deviation, for example, less than 1 ppm, is input to the second circuit device, and a second temperature compensation process is performed in the second circuit device to generate a high-precision second clock signal.

[0138] Alternatively, in this embodiment, the first circuit device may include: an oscillation circuit that generates a first clock signal by oscillating an oscillator; and a first processing circuit that performs a first temperature compensation process. Alternatively, the second circuit device may include: a clock signal generation circuit that generates a second clock signal with a frequency set according to a frequency setting signal based on the first clock signal from the first circuit device; and a second processing circuit that outputs the frequency setting signal.

[0139] By employing this structure, the first circuit device can perform the processing of generating a first clock signal by oscillating the oscillator and the first temperature compensation processing of temperature compensation for the frequency of the first clock signal. Furthermore, the second circuit device can perform the processing of generating a second clock signal based on the first clock signal and the second temperature compensation processing of temperature compensation for the frequency of the second clock signal.

[0140] Alternatively, in this embodiment, as a first temperature compensation process, the first processing circuit generates a temperature compensation control voltage to compensate for the frequency-temperature characteristics of the oscillator and outputs the control voltage to the oscillation circuit. Alternatively, as a second temperature compensation process, the second processing circuit outputs a frequency setting signal, which is a digital signal, to the clock signal generation circuit.

[0141] Thus, by controlling the oscillation frequency of the oscillation circuit based on the control voltage generated through the first temperature compensation process, a first clock signal that has undergone the first temperature compensation process to compensate for the frequency-temperature characteristics of the oscillator can be generated. Furthermore, by inputting this first clock signal and the frequency setting signal generated through the second temperature compensation process into the clock signal generation circuit, a second clock signal that has undergone the second temperature compensation process can be generated.

[0142] Alternatively, in this embodiment, the second circuit device may include a storage unit that stores information about the learned model, and the second processing circuit may perform a second temperature compensation process based on the information about the learned model.

[0143] In this way, by using the information from the learned model for the second temperature compensation process, a more accurate and appropriate second temperature compensation process can be achieved.

[0144] Alternatively, in this embodiment, the clock signal generation circuit may include a fractional-N type PLL circuit that inputs the first clock signal as a reference clock signal, and the frequency setting signal is the division ratio data of the frequency divider circuit of the PLL circuit.

[0145] In this way, the frequency division ratio setting signal after the second temperature compensation processing is set in the frequency division circuit of the PLL circuit, which can generate the second clock signal based on the signal after the frequency of the first clock signal is multiplied, and can generate the second clock signal after the second temperature compensation processing based on the first clock signal.

[0146] Alternatively, in this embodiment, the PLL circuit may include: a phase comparison circuit that performs a phase comparison between a first clock signal, which serves as a reference clock signal, and a feedback clock signal from a frequency divider circuit; a control voltage generation circuit that generates a control voltage based on the result of the phase comparison; and a voltage-controlled oscillation circuit that generates a clock signal with a frequency corresponding to the control voltage.

[0147] By using a PLL circuit with this structure, it is possible to generate a clock signal of the PLL that is phase-synchronized with the first clock signal, and to generate a high-precision second clock signal based on the clock signal of the PLL.

[0148] Alternatively, in this embodiment, the clock signal generation circuit may include a direct digital synthesizer, which uses the first clock signal as a reference clock signal to generate a second clock signal with a frequency set according to the frequency setting signal.

[0149] By using such a direct digital synthesizer, a second clock signal of arbitrary frequency can be generated based on a frequency setting signal. Furthermore, by performing a second temperature compensation process through processing circuitry, a high-precision second clock signal after temperature compensation can be generated.

[0150] Alternatively, in this embodiment, it may include a first package that houses the oscillator and the first circuit device, and a second package that houses the first package and the second circuit device.

[0151] In this way, by housing the oscillator and the first circuit device in the first package, heat transfer from external heat sources such as the second circuit device can be blocked by the first package, thereby reducing the adverse effects of heat from external heat sources on temperature measurement.

[0152] Furthermore, this embodiment relates to an electronic device that includes the oscillator described above and a processing device that operates according to a second clock signal from the oscillator.

[0153] Furthermore, this embodiment relates to a moving body that includes the oscillator described above and a processing device that operates according to a second clock signal from the oscillator.

[0154] Furthermore, while this embodiment has been described in detail above, those skilled in the art will readily understand that various modifications can be made without substantially departing from the novel aspects and effects of this disclosure. Therefore, all such modifications are included within the scope of this disclosure. For example, a term described at least once in the specification or drawings along with a more general or synonymous term may be replaced with that different term anywhere in the specification or drawings. Additionally, all combinations of this embodiment and its modifications are also included within the scope of this disclosure. Furthermore, the structure and operation of the oscillator, transducer, first circuit device, second circuit device, oscillation circuit, first processing circuit, clock signal generation circuit, second processing circuit, electronic device, and moving body are not limited to the structures and operations described in this embodiment, and various modifications can be implemented.

Claims

1. An oscillator, characterized in that, The oscillator contains: Vibrator; A first circuit device, electrically connected to the oscillator; and Second circuit device, The first circuit device generates a first clock signal by oscillating the oscillator, and performs a first temperature compensation process based on temperature detection signals from at least one of a first temperature sensor within the first circuit device and an external temperature sensor outside the first and second circuit devices, as an analog method for coarsely adjusting the frequency of the first clock signal. The second circuit device receives the first clock signal from the first circuit device, generates a second clock signal based on the first clock signal, and performs a second temperature compensation process based on temperature detection signals from at least one of the first temperature sensor, the second temperature sensor within the second circuit device, and the external temperature sensor. This second temperature compensation is a digital method that fine-tunes the frequency of the second clock signal. The absolute value of the frequency deviation of the first clock signal after the first temperature compensation processing within the temperature range for which temperature compensation is performed is less than or equal to a first value but greater than a second value smaller than the first value; the absolute value of the frequency deviation of the second clock signal after the second temperature compensation processing within the temperature range is less than or equal to the second value.

2. The oscillator according to claim 1, characterized in that, The first circuit device performs the first temperature compensation process based on the temperature detection signal from the external temperature sensor. The second circuit device performs the second temperature compensation process based on the temperature detection signal from the external temperature sensor.

3. The oscillator according to claim 1 or 2, characterized in that, The first circuit device and the second circuit device are composed of a single semiconductor chip.

4. The oscillator according to claim 1 or 2, characterized in that, The oscillator is a microelectromechanical system (MEMS) oscillator formed using a silicon substrate.

5. The oscillator according to claim 2, characterized in that, The distance between the external temperature sensor and the oscillator is closer than the distance between the external temperature sensor and the second circuit device.

6. The oscillator according to claim 1 or 2, characterized in that, The absolute value of the frequency deviation of the first clock signal caused by temperature variation is less than 1 ppm in a temperature range of -40°C to 105°C.

7. The oscillator according to claim 1 or 2, characterized in that, The first circuit device includes: An oscillating circuit generates the first clock signal by oscillating the oscillator; and The first processing circuit performs the first temperature compensation process. The second circuit device includes: A clock signal generation circuit that generates a second clock signal with a frequency set according to a frequency setting signal, based on the first clock signal from the first circuit device; and The second processing circuit outputs the frequency setting signal.

8. The oscillator according to claim 7, characterized in that, As part of the first temperature compensation process, the first processing circuit generates a temperature compensation control voltage to compensate for the frequency-temperature characteristics of the oscillator, and outputs the control voltage to the oscillation circuit. As part of the second temperature compensation process, the second processing circuit outputs the frequency setting signal, which is a digital signal, to the clock signal generation circuit.

9. The oscillator according to claim 7, characterized in that, The second circuit device includes a storage unit for storing information about the learned model. The second processing circuit performs the second temperature compensation process based on the information from the learned model.

10. The oscillator according to claim 7, characterized in that, The clock signal generation circuit includes a fractional-N type PLL circuit that takes the first clock signal as a reference clock signal as input. The frequency setting signal is the division ratio data of the frequency divider circuit of the PLL circuit.

11. The oscillator according to claim 10, characterized in that, The PLL circuit includes: A phase comparison circuit performs a phase comparison between the first clock signal, which serves as the reference clock signal, and the feedback clock signal from the frequency divider circuit. A control voltage generation circuit generates a control voltage based on the result of the phase comparison. as well as A voltage-controlled oscillation circuit generates a clock signal with a frequency corresponding to the control voltage.

12. The oscillator according to claim 7, characterized in that, The clock signal generation circuit includes a direct digital synthesizer, which uses the first clock signal as a reference clock signal to generate the second clock signal at a frequency set according to the frequency setting signal.

13. The oscillator according to claim 1, characterized in that, The oscillator contains: A first package, which houses the oscillator and the first circuit device; and The second package houses the first package and the second circuit device.

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