A large dynamic range micro-current acquisition and amplification circuit

Abstract

The application discloses a large-dynamic-range micro-current collection and amplification circuit, which comprises a filter circuit, a logarithmic amplification circuit, a logarithmic amplification voltage conditioning circuit, a TIA circuit, a voltage regulation circuit and a signal reading circuit, wherein the filter circuit is connected with the logarithmic amplification circuit at the output end, the logarithmic amplification circuit is connected with the TIA circuit at the output end, and the TIA circuit is connected with the signal reading circuit at the output end. The logarithmic amplification circuit is adopted as the first-stage signal processing circuit, which greatly widens the current collection range and makes up for the small current detection range of the TIA circuit. The logarithmic conversion of the small signal is carried out through the triode for multiple times, so that a larger signal capable of being detected is obtained. The current collection scheme combining the logarithmic amplification circuit and the TIA circuit has the advantages of the two amplification circuits and also suppresses the shortcomings of the two amplification circuits to a certain extent.

Description

Technical Field

[0001] This application relates to the field of microcurrent detection technology, and in particular to a large dynamic range microcurrent acquisition and amplification circuit. Background Technology

[0002] Detecting particulate matter and exhaust pollutant concentrations from motor vehicles requires highly sensitive particulate matter monitors and gas chromatographs with a wide dynamic range. These instruments convert airborne particulate matter into a weak current, which is then detected by a microcurrent meter. However, the currently developed TIA microcurrent detectors still have certain drawbacks. Their detection range is small, making them unsuitable for scenarios requiring large-scale detection. Furthermore, they require large-volume glass resistors in the circuitry, and their sensitivity and signal-to-noise ratio are not ideal.

[0003] Application content

[0004] This application provides a large dynamic range microcurrent acquisition and amplification circuit to overcome the shortcomings of the prior art.

[0005] This application provides a large dynamic range micro-current acquisition and amplification circuit, including: a filter circuit, a logarithmic amplifier circuit, a logarithmic voltage conditioning circuit, a TIA circuit, a voltage regulation circuit, and a signal reading circuit. The output terminal of the filter circuit is connected to the logarithmic amplifier circuit, the output terminal of the logarithmic amplifier circuit is connected to the TIA circuit, and the output terminal of the TIA circuit is connected to the signal reading circuit, wherein:

[0006] The filtering circuit includes a filter resistor and a filter capacitor. One end of the filter resistor is connected to the signal input terminal, and the other end of the filter resistor is connected to the input terminal of the logarithmic amplifier circuit. One end of the filter capacitor is connected to the ground terminal.

[0007] The logarithmic amplifier circuit includes a first operational amplifier and a first transistor, wherein the collector of the first transistor is connected to the inverting input of the first operational amplifier, the emitter of the first transistor is connected to the non-inverting input of the first operational amplifier, the base of the first transistor is grounded, and the output of the first operational amplifier is connected to a logarithmic amplifier voltage conditioning circuit.

[0008] The output of the logarithmic voltage conditioning circuit is connected to the TIA circuit. The logarithmic voltage conditioning circuit includes a second transistor and a fourth transistor. The emitter of the second transistor is connected to the output of the logarithmic amplifier circuit. The emitter, base, and collector of the second transistor are connected. The emitter and base of the second transistor are connected to the emitter of the fourth transistor. The collector of the fourth transistor is connected to the input of the TIA circuit. The base of the fourth transistor is grounded.

[0009] The TIA circuit includes a second operational amplifier and a feedback resistor and a feedback capacitor connected in parallel between the inverting input and the output of the second operational amplifier. The output of the second operational amplifier is connected to a signal reading circuit, which includes an ADC sampling chip and a microcontroller connected to the output of the ADC sampling chip.

[0010] The non-inverting input of the second operational amplifier is connected to the output of the voltage regulation circuit. The voltage regulation circuit includes a third operational amplifier and a first resistor, a second resistor, a third resistor, and a first capacitor. The inverting input of the third operational amplifier is connected to one end of the first resistor, the other end of the first resistor is connected to one end of the second resistor, and the other end of the second resistor is connected to the microcontroller. The inverting input and the output of the third operational amplifier are connected to the third resistor and the first capacitor. The non-inverting input of the third operational amplifier is connected to the reference voltage power supply circuit.

[0011] Furthermore, the reference voltage power supply circuit includes a fourth operational amplifier. The non-inverting input of the fourth operational amplifier is connected to the reference input voltage. The inverting input and output of the fourth operational amplifier are connected to form a voltage follower. The output of the fourth operational amplifier is connected to the non-inverting input of the third operational amplifier. The output of the fourth operational amplifier is also connected to the power supply terminal of the logarithmic amplifier circuit through a negative voltage conversion circuit.

[0012] Furthermore, the negative voltage conversion circuit includes a fourth resistor, a fifth resistor, a sixth resistor, a second capacitor, and a third transistor. One end of the fourth resistor is connected to the output terminal of the fourth operational amplifier, and the other end of the fourth resistor is connected to one end of the fifth resistor. The other end of the fifth resistor is connected to one end of the second capacitor and the collector of the third transistor. The base of the third transistor is grounded, and the emitter of the third transistor is connected to the negative voltage power supply terminal of the first operational amplifier. The sixth resistor is also connected between the other end of the second capacitor and the emitter of the third transistor. The other end of the second capacitor is connected to the output terminal of the fifth operational amplifier, and the other end of the fifth resistor is also connected to the inverting input of the fifth operational amplifier. The non-inverting input of the fifth operational amplifier is grounded.

[0013] Furthermore, the feedback resistors are a seventh resistor and an eighth resistor connected in series.

[0014] Furthermore, the output of the second operational amplifier is also connected to one end of the ninth resistor, and the other end of the ninth resistor is connected to the ground terminal through the third capacitor.

[0015] Furthermore, the non-inverting input of the third operational amplifier is connected to the reference voltage power supply circuit through a first series voltage divider circuit. The first series voltage divider circuit includes a tenth resistor and an eleventh resistor connected in series. The non-inverting input of the third operational amplifier is connected to the series connection terminal of the tenth resistor and the eleventh resistor. The non-series connection terminal of the tenth resistor is connected to the reference voltage power supply circuit, and the non-series connection terminal of the eleventh resistor is connected to the ground terminal.

[0016] Furthermore, the non-inverting input of the second operational amplifier is connected to the output of the third operational amplifier through a second series voltage divider circuit. The second series voltage divider circuit includes a twelfth resistor and a thirteenth resistor connected in series. The output of the third operational amplifier is connected to the series connection of the twelfth resistor and the thirteenth resistor. The non-series connection of the twelfth resistor is grounded, and the non-series connection of the thirteenth resistor is connected to the non-inverting input of the second operational amplifier.

[0017] Furthermore, the ADC sampling chip is a 24-bit low-power, low-noise analog-to-digital converter chip.

[0018] Furthermore, the reference voltage power supply circuit outputs a 2.5V DC voltage to the inverting input of the fifth operational amplifier.

[0019] The above-described technical solutions adopted in the embodiments of this application can achieve the following beneficial effects:

[0020] (1) This application uses a logarithmic amplifier circuit as the first-stage signal processing circuit, which greatly expands the current acquisition range, makes up for the shortcomings of the small current detection range of the TIA circuit, and performs logarithmic conversion on the small signal multiple times through the transistor to obtain a larger detectable signal.

[0021] (2) This application combines a logarithmic amplifier circuit with a TIA circuit, which has the advantages of a wide dynamic range of the logarithmic amplifier circuit and the advantages of the TIA circuit being more sensitive to current changes. The large dynamic range of the logarithmic circuit is used to expand the detection range of the TIA circuit. Simultaneously, a logarithmic voltage conditioning circuit composed of a second transistor Q2 and a fourth transistor Q4 connected in series is used with the TIA circuit to adjust the IL of the logarithmic circuit. in with U out The logarithmic relation is transformed into the following operational relation, namely: C1 and C2 are constants, which to some extent improve the sensitivity of the logarithmic circuit to current.

[0022] (3) In this application, voltage followers and other circuits are used to isolate the reference voltage of the signal processing circuit from the power supply voltage, reducing the influence of subsequent circuits on the signal processing circuit and ensuring the accuracy of the signal. The reference voltage will clamp the voltage at critical positions, which facilitates the calculation of subsequent voltages. Attached Figure Description

[0023] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0024] Figure 1 This is a block diagram of a large dynamic range microcurrent acquisition and amplification circuit according to this application;

[0025] Figure 2 This is a schematic diagram of a large dynamic range microcurrent acquisition and amplification circuit according to this application. Detailed Implementation

[0026] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions of this application will be clearly and completely described below in conjunction with specific embodiments and corresponding drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0027] The technical solutions provided by the various embodiments of this application are described in detail below with reference to the accompanying drawings.

[0028] like Figure 1 , 2 As shown, this application proposes a large dynamic range micro-current acquisition and amplification circuit, including: a filter circuit, a logarithmic amplifier circuit, a logarithmic voltage conditioning circuit, a TIA circuit, a voltage regulation circuit, and a signal reading circuit. The output of the filter circuit is connected to the logarithmic amplifier circuit, the output of the logarithmic amplifier circuit is connected to the TIA circuit, and the output of the TIA circuit is connected to the signal reading circuit.

[0029] Combination Figure 2 In this embodiment, the specific composition of the circuit is as follows:

[0030] The filtering circuit includes filter resistors (AR9, AR9) and filter capacitors (AC12). One end of the filter resistor is connected to the signal input terminal, the other end of the filter resistor is connected to one end of the filter capacitor, and the other end of the filter capacitor is connected to the ground terminal.

[0031] The logarithmic amplifier circuit includes a first operational amplifier (ADA4530-1) and a first transistor (Q1), wherein the collector of the first transistor (Q1) is connected to the inverting input of the first operational amplifier (ADA4530-1), the emitter of the first transistor (Q1) is connected to the output of the first operational amplifier (ADA4530-1), the base of the first transistor is grounded, and the output of the first operational amplifier is connected to a logarithmic voltage conditioning circuit (composed of Q2, Q4 and their peripheral circuits).

[0032] Output of the logarithmic voltage conditioning circuit ( Figure 2 The IN- terminal is connected to the TIA circuit. The logarithmic amplification voltage conditioning circuit includes a second transistor (Q2) and a fourth transistor (Q4). The emitter of the second transistor (Q2) is connected to the output terminal of the logarithmic amplification circuit. The base and collector of the second transistor (Q2) are connected. The base of the second transistor (Q2) is connected to the emitter of the fourth transistor (Q4). The collector of the fourth transistor (Q4) is connected to the input terminal (IN-) of the TIA circuit. The base of the fourth transistor (Q4) is grounded.

[0033] The TIA circuit includes a second operational amplifier (right side of GS8332-SR) and a feedback resistor (resistor AR16 in series with AR3) and a feedback capacitor (AC26) connected in parallel between the inverting input and the output of the second operational amplifier (right side of GS8332-SR). The output of the second operational amplifier (right side of GS8332-SR) is connected to the input of the signal reading circuit (ADC+). The signal reading circuit includes an ADC sampling chip and a microcontroller connected to the output of the ADC sampling chip.

[0034] The non-inverting input of the second operational amplifier (right side of GS8332-SR) is connected to the output of the voltage regulation circuit (DR8, DR9, DR11 and capacitor DC5). The voltage regulation circuit includes a third operational amplifier (right side of U8332-2) and a first resistor, a second resistor, a third resistor, and a first capacitor (composed of DR8, DR11, DR9 and capacitor DC5). The inverting input of the third operational amplifier is connected to one end of the first resistor (DR8) in sequence, and the other end of the first resistor (DR8) is connected to one end of the second resistor (DR11). The other end of the second resistor (DR11) is connected to the microcontroller (PA4). The inverting input and output of the third operational amplifier (right side of U8332-2) are connected to the third resistor (DR9) and the first capacitor (capacitor DC5). The non-inverting input of the third operational amplifier (right side of U8332-2) is connected to the reference voltage power supply circuit (left side of U8332-2, DR2 and DR15).

[0035] The reference voltage power supply circuit includes a fourth operational amplifier (left side of U8332-2). The non-inverting input of the fourth operational amplifier (left side of U8332-2) is connected to the reference input voltage (Vrefout). The inverting input of the fourth operational amplifier (left side of U8332-2) is connected to the output (through resistor DR2) to form a voltage follower. The output of the fourth operational amplifier (left side of U8332-2) is connected to the non-inverting input of the third operational amplifier (right side of U8332-2). The output of the fourth operational amplifier (left side of U8332-2) is also connected to the non-inverting input of the logarithmic amplifier circuit through a negative voltage conversion circuit (composed of AR17, AR18, AR19, AC34, and Q3).

[0036] The negative voltage conversion circuit includes a fifth operational amplifier (left side of GS8332-SR), a fourth resistor (AR17), a fifth resistor (AR19), a sixth resistor (AR18), a second capacitor (AC34), and a third transistor (Q3). One end of the fourth resistor (AR17) is connected (through DR15) to the output of the fourth operational amplifier, and the other end of the fourth resistor (AR17) is connected to one end of the fifth resistor (AR19). The other end of the fifth resistor (AR19) is connected to one end of the second capacitor (AC34) and the collector of the third transistor (Q3). The base of the transistor is grounded. The emitter of the third transistor (Q3) is connected to the negative power supply terminal of the first operational amplifier (ADA4530-1). The other end of the second capacitor (AC34) is connected to the emitter of the third transistor (Q3) and the sixth resistor (AR18). The other end of the second capacitor (AC34) is connected to the output terminal of the fifth operational amplifier (left side of GS8332-SR). The other end of the fifth resistor (AR19) is connected to the inverting input of the fifth operational amplifier (left side of GS8332-SR). The non-inverting input of the fifth operational amplifier (left side of GS8332-SR) is grounded.

[0037] In this embodiment, the feedback resistors are the seventh resistor (resistor AR16) and the eighth resistor (resistor AR3) connected in series.

[0038] In this embodiment, the output terminal of the second operational amplifier (right side of GS8332-SR) is also connected to one end of the ninth resistor (resistor DR1), and the other end of the ninth resistor (resistor DR1) is connected to the ground terminal through the third capacitor (capacitors DC1 and DC3 in parallel).

[0039] In this embodiment, the non-inverting input of the third operational amplifier (right side of U8332-2) is connected to the reference voltage power supply circuit through the first series voltage divider circuit. The first series voltage divider circuit includes a tenth resistor (resistor DR6) and an eleventh resistor (resistor DR7) connected in series. The non-series connection of the third operational amplifier (right side of U8332-2) is connected to the series connection terminal of the tenth resistor (resistor DR6) and the eleventh resistor (resistor DR7). The non-series connection terminal of the tenth resistor (resistor DR6) is connected to the reference voltage power supply circuit, and the non-series connection terminal of the eleventh resistor (resistor DR7) is connected to the ground terminal.

[0040] In this embodiment, the non-inverting input of the second operational amplifier (right side of GS8332-SR) is connected to the output of the third operational amplifier (right side of U8332-2) through a second series voltage divider circuit. The second series voltage divider circuit includes a twelfth resistor (resistor DR10) and a thirteenth resistor (resistor AR15) connected in series. The output of the third operational amplifier (right side of U8332-2) is connected to the series connection of the twelfth resistor (resistor DR10) and the thirteenth resistor (resistor AR15). The non-series connection of the twelfth resistor (resistor DR10) is grounded, and the non-series connection of the thirteenth resistor (resistor AR15) is connected to the non-inverting input of the second operational amplifier (right side of GS8332-SR).

[0041] In this embodiment, the ADC sampling chip is a 24-bit low-power, low-noise analog-to-digital converter chip.

[0042] In this embodiment, the reference voltage power supply circuit outputs a 2.5V DC voltage to the inverting input of the fifth operational amplifier (left side of GS8332-SR).

[0043] The working principle of this application is:

[0044] This application uses the aforementioned logarithmic amplifier circuit and TIA circuit to measure current. The logarithmic amplifier circuit is composed of transistors and amplifiers. When the current changes by an order of magnitude, the voltage changes by approximately 60mV. When an external signal is input, it is filtered by the filter circuit and then input as a current to the logarithmic amplifier section. After logarithmic conversion, the current signal is output as a voltage signal, which is then input to the subsequent TIA amplifier section. This section of the circuit converts the voltage obtained from the previous stage back into a current through a transistor conversion, and then amplifies it again by the TIA circuit to read out as a voltage signal.

[0045] This application employs both a logarithmic amplifier circuit and a TIA circuit. When a signal enters the logarithmic amplifier circuit module, current flows through the transistor (first transistor Q1). Using the transistor's IV characteristic: Ic = Is * (exp(Vbe / 25.87(mV)-1), the current is converted into voltage. At this point, a reference voltage is provided to the base region of the transistor, allowing the calculation of the theoretical output voltage. However, the voltage obtained at this stage is negative. Then, a logarithmic voltage conditioning circuit is used, consisting of a second transistor Q2 and a fourth transistor Q4 connected in series, along with the aforementioned formula. This also considers the series connection of the second transistor Q2 and the fourth transistor Q4. Since the current Ic flowing through it is consistent with the current, we can obtain the collector voltage Vc of the fourth transistor Q4 as Vout / 2. This halves the resulting negative voltage and converts it into current. After amplification by the TIA circuit (because it is an inverting amplifier), a detectable positive voltage can be obtained. Subsequent circuits only need to detect the positive voltage. As the current increases, the positive voltage also increases. Because the first-stage voltage is halved and input to the TIA circuit module, the detection range is correspondingly expanded. Simultaneously, the logarithmic voltage conditioning circuit, composed of the second transistor Q2 and the fourth transistor Q4 connected in series, along with the TIA circuit, converts the current input signal Ic from the logarithmic circuit into a voltage conditioner. in With voltage output signal U out The logarithmic relation is transformed into the following operational relation, namely: C1 and C2 are constants, which to some extent improve the sensitivity of the logarithmic circuit to current.

[0046] The U8332-2 amplifier in the circuit mainly provides a voltage reference for the signal processing circuit. Its left amplifier, along with resistors DR2 and DR15, forms a voltage follower, i.e., Vref = Vrefout = 2.5V, serving to provide a reference voltage and provide isolation. The right amplifier, along with resistors DR8, DR9, DR11 and capacitor DC5, forms a voltage regulation circuit. PA4 is connected to a pin of the microcontroller, outputting 0-3.3V, Uout = (U... - -U ADJ) / (DR8+DR11)*DR9+U-, where U- is the input voltage at the right inverting terminal of the U8332-2 amplifier, which provides a bias voltage for the TIA circuit formed by the left amplifier of the GS8332-SR so that the voltage can be read out at zero current. The circuit consisting of the left-side amplifier of the GS8332-SR, resistors AR17, AR18, and AR19, capacitor AC34, and transistor Q3 provides a negative voltage for the logarithmic amplifier circuit. When the 2.5V reference voltage is input from the U8332-2 amplifier, a current Ic = 2.5V / (AR19 + AR17) is generated. At this time, according to the IV characteristic of transistor Q3: Ic = Is * (exp(Vbe / 25.87(mV) - 1), a stable negative voltage Ue = Ub - Ube = -Ube can be obtained. Alternatively, based on the negative voltage provided by the fifth operational amplifier (left side of the GS8332-SR), when the 2.5V reference voltage is input to the inverting input of the fifth operational amplifier (left side of the GS8332-SR) and compared with the non-inverting input (grounded) of the fifth operational amplifier, the output voltage of the fifth operational amplifier (left side of the GS8332-SR) is -5V. This voltage is output through resistor AR18 to the non-inverting input of the operational amplifier ADA4530-1.

[0047] The TIA circuit uses a common topology where the amplifier's input and negative terminals are connected to a feedback capacitor Cf (AC26) and a feedback resistor Rf (AR16 and AR3 in series). When DC current flows through the resistor, a voltage drop is generated across it. The output voltage, i.e., the output at the right side of the second operational amplifier GS8332-SR, is: Uo = Uin - + Iin * Rf. Since the current converted by the transistors (i.e., the logarithmic voltage conditioning circuit consisting of the second transistor Q2 and the fourth transistor Q4 in series, etc.) (i.e., the current at the IN- terminal in the diagram) is usually several orders of magnitude larger than the amplifier's bias current, almost all of Iin flows through the feedback resistor.

[0048] In addition, the resistor values ​​required for the above TIA circuit (feedback resistors AR16 and AR3) do not need to be very large, which avoids the use of large glass resistors, saves space to a certain extent, and multi-level operation can also prevent the subsequent voltage reading from affecting the acquisition circuit to a certain extent.

[0049] This application has the following features: (1) It simultaneously uses a logarithmic amplifier circuit and a TIA circuit to collect current, and has a wider detection range than a TIA microammeter, up to 10. 10 The above refers to the transition from fA-level current to mA-level current. (2) Large glass resistors are not required to form the TIA circuit, reducing the size of the signal processing module on the PCB board and improving space utilization. (3) A 24-bit low-power, low-noise analog-to-digital converter chip is used to improve voltage reading accuracy and data reliability.

[0050] The above description is merely an embodiment of this application and is not intended to limit the scope of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of the claims of this application.

Claims

1. A large dynamic range microcurrent acquisition and amplification circuit, characterized in that, include: The circuit comprises a filter circuit, a logarithmic amplifier circuit, a logarithmic amplifier voltage conditioning circuit, a TIA circuit, a voltage regulation circuit, and a signal readout circuit. The output of the filter circuit is connected to the logarithmic amplifier circuit, the output of the logarithmic amplifier circuit is connected to the TIA circuit, and the output of the TIA circuit is connected to the signal readout circuit. The filtering circuit includes a filter resistor and a filter capacitor. One end of the filter resistor is connected to the signal input terminal, and the other end of the filter resistor is connected to the input terminal of the logarithmic amplifier circuit. One end of the filter capacitor is connected to the ground terminal. The logarithmic amplifier circuit includes a first operational amplifier and a first transistor, wherein the collector of the first transistor is connected to the inverting input of the first operational amplifier, the emitter of the first transistor is connected to the output of the first operational amplifier, the base of the first transistor is grounded, and the output of the first operational amplifier is connected to a logarithmic amplifier voltage conditioning circuit. The output of the logarithmic voltage conditioning circuit is connected to the TIA circuit. The logarithmic voltage conditioning circuit includes a second transistor and a fourth transistor. The emitter of the second transistor is connected to the output of the logarithmic amplifier circuit. The base and collector of the second transistor are connected. The base of the second transistor is connected to the emitter of the fourth transistor. The collector of the fourth transistor is connected to the input of the TIA circuit. The base of the fourth transistor is grounded. The TIA circuit includes a second operational amplifier and a feedback resistor and a feedback capacitor connected in parallel between the inverting input and the output of the second operational amplifier. The output of the second operational amplifier is connected to a signal reading circuit, which includes an ADC sampling chip and a microcontroller connected to the output of the ADC sampling chip. The voltage regulation circuit includes a third operational amplifier and a first resistor, a second resistor, a third resistor and a first capacitor. The inverting input of the third operational amplifier is connected to one end of the first resistor in sequence, the other end of the first resistor is connected to one end of the second resistor, the other end of the second resistor is connected to a microcontroller, the inverting input and the output input of the third operational amplifier are connected to the third resistor and the first capacitor, and the non-inverting input of the third operational amplifier is connected to a reference voltage power supply circuit. The non-inverting input of the second operational amplifier is connected to the output of the third operational amplifier through a second series voltage divider circuit. The second series voltage divider circuit includes a twelfth resistor and a thirteenth resistor connected in series. The output of the third operational amplifier is connected to the series connection of the twelfth resistor and the thirteenth resistor. The non-series connection of the twelfth resistor is grounded. The non-series connection of the thirteenth resistor is connected to the non-inverting input of the second operational amplifier.

2. The large dynamic range micro-current acquisition and amplification circuit according to claim 1, characterized in that, The reference voltage power supply circuit includes a fourth operational amplifier. The non-inverting input of the fourth operational amplifier is connected to the reference input voltage. The inverting input and output of the fourth operational amplifier are connected to form a voltage follower. The output of the fourth operational amplifier is connected to the non-inverting input of the third operational amplifier. The output of the fourth operational amplifier is also connected to the power supply terminal of the logarithmic amplifier circuit through a negative voltage conversion circuit.

3. The large dynamic range micro-current acquisition and amplification circuit according to claim 2, characterized in that, The negative voltage conversion circuit includes a fifth operational amplifier, a fourth resistor, a fifth resistor, a sixth resistor, a second capacitor, and a third transistor. One end of the fourth resistor is connected to the output terminal of the fourth operational amplifier, and the other end of the fourth resistor is connected to one end of the fifth resistor. The other end of the fifth resistor is connected to one end of the second capacitor and the collector of the third transistor. The base of the third transistor is grounded, and the emitter of the third transistor is connected to the negative voltage power supply terminal of the first operational amplifier. The sixth resistor is also connected between the other end of the second capacitor and the emitter of the third transistor. The other end of the second capacitor is connected to the output terminal of the fifth operational amplifier, and the other end of the fifth resistor is also connected to the inverting input of the fifth operational amplifier. The non-inverting input of the fifth operational amplifier is grounded.

4. The large dynamic range micro-current acquisition and amplification circuit according to claim 1, characterized in that, The feedback resistors are the seventh and eighth resistors connected in series.

5. The large dynamic range micro-current acquisition and amplification circuit according to claim 1, characterized in that, The output of the second operational amplifier is also connected to one end of the ninth resistor, and the other end of the ninth resistor is connected to the ground terminal through the third capacitor.

6. The large dynamic range micro-current acquisition and amplification circuit according to claim 1, characterized in that, The non-inverting input of the third operational amplifier is connected to the reference voltage power supply circuit through a first series voltage divider circuit. The first series voltage divider circuit includes a tenth resistor and an eleventh resistor connected in series. The non-inverting input of the third operational amplifier is connected to the series connection terminal of the tenth resistor and the eleventh resistor. The non-series connection terminal of the tenth resistor is connected to the reference voltage power supply circuit, and the non-series connection terminal of the eleventh resistor is connected to the ground terminal.

7. The large dynamic range micro-current acquisition and amplification circuit according to claim 1, characterized in that, The ADC sampling chip is a 24-bit low-power, low-noise analog-to-digital converter chip.

8. The large dynamic range micro-current acquisition and amplification circuit according to claim 3, characterized in that, The reference voltage power supply circuit outputs a 2.5V DC voltage to the inverting input of the fifth operational amplifier.

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