Constant current output device and control method

CN117595677BActive Publication Date: 2026-10-30浙江屹晶微电子股份有限公司
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Patent Information

Application Number
CN202311631605.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-12-01
Publication Date
2026-10-30
Estimated Expiration
2043-12-01

AI Technical Summary

Technical Problem

[0003]针对相关技术中存在的恒流输出装置的成本较高的技术问题,目前尚未提出有效的解决方案

Benefits of technology

1、通过采用本申请实施例中的恒流输出装置,可以避免相关技术中通过采样输出电流与基准值比较后再经过负反馈控制来实现,需要多个电路模块,导致增加了成本和体积的问题,可以有效地控制恒流输出装置的成本,也可以实现减小恒流输出装置的整体体积的目的。

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Abstract

The application provides a constant current output device and a control method, and relates to the technical field of power electronics. The device comprises a first MOS tube, a second MOS tube, a third MOS tube, a fourth MOS tube, a fifth MOS tube, a sixth MOS tube, a transformer, an inductor, an output capacitor, a seventh device, an eighth device and a drive control module. The drive control module is used for providing pulse signals to the gates of the MOS tubes respectively. The pulse signals of the first MOS tube and the second MOS tube are opposite to each other. The pulse signals of the third MOS tube and the fourth MOS tube are opposite to each other. The pulse signals of the fifth MOS tube and the sixth MOS tube are opposite to each other. The pulse signal of the first MOS tube is ahead of the pulse signal of the fourth MOS tube by a first preset phase. The pulse signal of the first MOS tube is ahead of the pulse signal of the fifth MOS tube by a second preset phase. The second preset phase is greater than the first preset phase. The technical scheme provided by the application solves the technical problem of high cost of the constant current output device in the related art.
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Description

Technical Field

[0001] This application relates to the field of power electronics technology, specifically to a constant current output device and control method. Background Technology

[0002] Currently, DC-DC isolated converters typically achieve constant current output by sampling the output current and comparing it with a reference value, followed by negative feedback control. This mainly involves multiple circuit modules, including a current sensor, operational amplifier circuit, comparator circuit, and optocoupler isolation. However, optocouplers suffer from aging and degradation issues, affecting the overall circuit's lifespan. The current sensor and operational amplifier increase the circuit's cost and size. Therefore, constant current output devices in related technologies suffer from high costs.

[0003] There is currently no effective solution to the technical problem of high cost of constant current output devices in related technologies. Summary of the Invention

[0004] This application provides a constant current output device and control method to at least solve the technical problem of high cost of constant current output devices in related technologies.

[0005] In a first aspect, this application provides a constant current output device, comprising: a first MOSFET, a second MOSFET, a third MOSFET, a fourth MOSFET, a fifth MOSFET, a sixth MOSFET, a transformer, an inductor, an output capacitor, a seventh device, an eighth device, and a drive control module. The source of the first MOSFET is connected to the drain of the second MOSFET; the drain of the first MOSFET is connected to the drain of the third MOSFET; the source of the third MOSFET is connected to the drain of the fourth MOSFET; the source of the second MOSFET is connected to the source of the fourth MOSFET; the drain of the first MOSFET and the source of the second MOSFET are respectively connected to the two ends of a DC power supply; the source of the first MOSFET and the source of the third MOSFET are respectively connected to the input terminals of the transformer; the first output terminal of the transformer is connected to the first terminal of the inductor; the second terminal of the inductor is connected to the source of the fifth MOSFET; the drain of the fifth MOSFET is connected to the first terminal of the output capacitor; the second terminal of the inductor is also connected to the drain of the sixth MOSFET; the source of the sixth MOSFET is connected to the second terminal of the output capacitor; and the first terminal of the output capacitor is connected to the second output terminal of the transformer. A seventh device is connected between the second terminal of the output capacitor and the second output terminal of the transformer. An eighth device is connected between the second terminal of the output capacitor and the second terminal of the transformer. The first and second terminals of the output capacitor serve as the output terminals of the constant current output device. The output terminals of the constant current output device are used to connect to the load and provide a predetermined current to the load. The drive control module is used to provide pulse signals with preset frequency, preset amplitude, and preset duty cycle to the gates of the first MOSFET, the second MOSFET, the third MOSFET, the fourth MOSFET, the fifth MOSFET, and the sixth MOSFET, respectively. The first pulse signal of the gate of the first MOSFET is out of phase with the second pulse signal of the gate of the second MOSFET, the third pulse signal of the gate of the third MOSFET is out of phase with the fourth pulse signal of the gate of the fourth MOSFET, the fifth pulse signal of the gate of the fifth MOSFET is out of phase with the sixth pulse signal of the gate of the sixth MOSFET, and the first pulse signal leads the fourth pulse signal by a first preset phase and the first pulse signal leads the fifth pulse signal by a second preset phase. The second preset phase is greater than the first preset phase.

[0006] By adopting the above technical solution, on the primary side of the transformer, a full-bridge circuit composed of the first, second, third, and fourth MOSFETs can convert the input DC power supply voltage signal into a square wave AC voltage signal. On the secondary side of the transformer, a secondary-side conversion circuit composed of an inductor, a fifth, sixth, seventh, and eighth MOSFET, and an output capacitor can convert the AC voltage signal into a DC current signal. The drive control module controls the driving of the gates of each MOSFET, ensuring a specific phase relationship between the pulse signals driving the gates of each MOSFET to obtain a predetermined current, thereby providing a constant current signal to the load. This avoids the problems of increased cost and size associated with related technologies that rely on sampling the output current and comparing it with a reference value before negative feedback control. By adopting the above technical solution, the cost of the constant current output device can be effectively controlled, and the overall size of the constant current output device can be reduced.

[0007] Optionally, the seventh device is the first capacitor, and the eighth device is the second capacitor, with the first capacitor and the second capacitor being equal.

[0008] By adopting the above technical solution, the seventh and eighth devices can use capacitors of the same specifications. In order to meet the requirements of high voltage and low current output, the seventh and eighth devices can use a capacitor solution, which can further control the overall cost of the constant current output device.

[0009] Optionally, the seventh device is a seventh MOSFET and the eighth device is an eighth MOSFET. The drain of the seventh MOSFET is connected to the first terminal of the output capacitor, and the source of the seventh MOSFET is connected to the second output terminal of the transformer. The drain of the eighth MOSFET is connected to the second output terminal of the transformer, and the source of the eighth MOSFET is connected to the second terminal of the output capacitor. The drive control module is also used to provide pulse signals with preset frequency, preset amplitude, and preset duty cycle to the gate of the seventh MOSFET and the gate of the eighth MOSFET, respectively. The seventh pulse signal of the gate of the seventh MOSFET and the eighth pulse signal of the gate of the eighth MOSFET are inversely related, and the seventh pulse signal is the same as the sixth pulse signal, and the eighth pulse signal is the same as the fifth pulse signal.

[0010] By adopting the above technical solution, the seventh and eighth devices can be MOSFETs. The seventh pulse signal at the gate of the seventh MOSFET is the same as the sixth pulse signal at the gate of the sixth MOSFET, and the eighth pulse signal at the gate of the eighth MOSFET is the same as the fifth pulse signal at the gate of the fifth MOSFET. A full-bridge circuit is formed by the fifth, sixth, seventh, and eighth MOSFETs. Combined with an inductor and an output capacitor, the AC voltage signal on the secondary side can be converted into a DC current signal. For low-voltage, high-current output applications, the seventh and eighth devices can utilize MOSFETs.

[0011] Optionally, the transformer can be a step-up transformer or a step-down transformer.

[0012] By adopting the above technical solution, constant current output can be achieved in both voltage boosting and voltage transformation scenarios, thus expanding the application range of the constant current output device.

[0013] Optionally, the constant current output device also includes an input capacitor, wherein the positive terminal of the input capacitor is connected to the drain of the first MOSFET, and the negative terminal of the input capacitor is connected to the source of the second MOSFET.

[0014] By adopting the above technical solution, and by connecting an input capacitor in parallel at the input end, the power supply voltage can be filtered, and energy storage and voltage regulation can be achieved.

[0015] Optionally, the constant current output device further includes a determining module, wherein the determining module is used to determine a control signal according to the following formula, wherein the control signal is used to determine a first preset phase and a second preset phase: Where D is the control signal, n is the turns ratio of the primary to the secondary side of the transformer, and f max Here, L is the preset frequency threshold, and I is the inductance of the inductor. out For the predetermined current, V in The voltage of the DC power supply is used; the determining module is also used to determine the first preset phase and the second preset phase according to the following formulas: D1=0.5-D, D2=D1+0.25×D, where D1 is the first preset phase and D2 is the second preset phase.

[0016] By adopting the above technical solution, according to the needs of actual application, that is, after determining the predetermined output current, the voltage of the input DC power supply and some component parameters, the control signal D and the first preset phase D1 and the second preset phase D2 can be determined by the determination module. Thus, the phase relationship between the pulse signals that drive and control the gates of each MOS transistor can be determined. At the same time, the predetermined output current is linearly related to the control signal D, which can achieve the purpose of high-precision linear control of constant current output.

[0017] Optionally, the determining module is also used to determine the preset frequency according to the following formula: Where f is the preset frequency; the determining module is connected to the drive control module, and the determining module is also used to send the first preset phase, the second preset phase and the preset frequency to the drive control module.

[0018] By adopting the above technical solution, it is also possible to determine the control signals D and f. max By determining the preset frequency of the pulse signal for each MOSFET, the pulse signal used to drive and control the gate of each MOSFET can be determined.

[0019] In a second aspect of this application, a constant current output control method is also provided, applied to the constant current output device of any of the above claims, comprising: when a DC power supply is connected between the drain of the first MOSFET and the source of the second MOSFET, determining a first pulse signal of the gate of the first MOSFET, a second pulse signal of the gate of the second MOSFET, a third pulse signal of the gate of the third MOSFET, a fourth pulse signal of the gate of the fourth MOSFET, a fifth pulse signal of the gate of the fifth MOSFET, and a sixth pulse signal of the gate of the sixth MOSFET; driving the gates of the first MOSFET, the second MOSFET, the third MOSFET, the fourth MOSFET, the fifth MOSFET, and the sixth MOSFET respectively according to the first pulse signal, the second pulse signal, the third pulse signal, the fourth pulse signal, the fifth pulse signal, and the sixth pulse signal, so that the output terminal of the constant current output device outputs a predetermined current.

[0020] By employing the above technical solution, and by determining the pulse signals used to drive and control the gates of each MOSFET, wherein the pulse signals corresponding to each MOSFET satisfy a certain phase relationship, and then driving the gates of the first, second, third, fourth, fifth, and sixth MOSFETs respectively according to the first, second, third, fourth, fifth, and sixth pulse signals, a predetermined current can be obtained, thereby providing a constant current signal to the load. This avoids the problems of related technologies that require multiple circuit modules and increase cost and size by comparing the sampled output current with a reference value and then implementing negative feedback control. By adopting the above technical solution, the cost of the constant current output device can be effectively controlled, and the overall size of the constant current output device can be reduced.

[0021] Optionally, determining the first pulse signal of the gate of the first MOSFET, the second pulse signal of the gate of the second MOSFET, the third pulse signal of the gate of the third MOSFET, the fourth pulse signal of the gate of the fourth MOSFET, the fifth pulse signal of the gate of the fifth MOSFET, and the sixth pulse signal of the gate of the sixth MOSFET includes: determining that the first pulse signal is a pulse signal with a preset frequency, preset amplitude, and preset duty cycle; and determining that the second pulse signal is a pulse signal that is inversely phase to the first pulse signal; determining that the fourth pulse signal is a pulse signal with a preset frequency, preset amplitude, and preset duty cycle, and that the first pulse signal leads the fourth pulse signal by a first preset phase; and determining that the third pulse signal is an inversely phase to the fourth pulse signal; determining that the fifth pulse signal is a pulse signal with a preset frequency, preset amplitude, and preset duty cycle, and that the first pulse signal leads the fifth pulse signal by a second preset phase; and determining that the sixth pulse signal is an inversely phase to the fifth pulse signal.

[0022] By adopting the above technical solution and controlling the phase relationship of the pulse signals corresponding to each MOS transistor, the predetermined current can be obtained using the above constant current output device.

[0023] Optionally, the above method further includes: determining a control signal according to the following formula, wherein the control signal is used to determine a first preset phase and a second preset phase: D = 4 × n × f max ×L×I out / V in Where D is the control signal, n is the turns ratio of the primary to the secondary side of the transformer, and f max Here, L is the preset frequency threshold, and I is the inductance of the inductor. out For the predetermined current, V in The voltage of the DC power supply is used; the first and second preset phases are determined according to the following formulas: D1 = 0.5 - D, D2 = D1 + 0.25 × D, where D1 is the first preset phase and D2 is the second preset phase; the preset frequency is determined according to the following formula: f = (1 - 1.25 × D) × f max , where f is the preset frequency.

[0024] By adopting the above technical solution, and based on the needs of actual applications, namely the required predetermined current, the voltage of the input DC power supply, and some component parameters, the control signal D, the first preset phase D1, and the second preset phase D2 can be determined according to the above formula. This allows for the determination of the phase relationship between the pulse signals driving and controlling the gates of each MOS transistor, as well as the determination of the preset frequency of the pulse signals for each MOS transistor. Furthermore, the pulse signals used to drive and control the gates of each MOS transistor can be determined. Simultaneously, the predetermined output current has a linear relationship with the control signal D, achieving high-precision linear control of the constant current output.

[0025] In a third aspect of this application, an electronic device is also provided, including a memory and a processor, wherein a computer program is stored in the memory, and the processor executes the program to implement the method steps of any of the above claims.

[0026] In a fourth aspect of this application, a computer-readable storage medium is also provided, which stores instructions that, when executed, perform the method steps of any of the above claims.

[0027] In summary, one or more technical solutions provided in the embodiments of this application have at least the following technical effects or advantages: 1. By adopting the constant current output device in the embodiments of this application, the problem of increasing cost and size caused by comparing the sampled output current with the reference value and then implementing negative feedback control in related technologies can be avoided. This requires multiple circuit modules. The cost of the constant current output device can be effectively controlled, and the overall size of the constant current output device can be reduced.

[0028] 2. The predetermined output current has a linear relationship with the control signal, which can achieve the purpose of high-precision linear control of constant current output. Attached Figure Description

[0029] Figure 1 This is a structural block diagram of a constant current output device provided in an embodiment of this application; Figure 2 This is a flowchart of a constant current output control method provided in an embodiment of this application; Figure 3 This is an example diagram of a DC-DC converter provided in an embodiment of this application; Figure 4 This is an example diagram of another DC-DC converter provided in the embodiments of this application; Figure 5 This is a schematic diagram of the output constant current control provided in an embodiment of this application; Figure 6 These are simulation example diagrams provided in the embodiments of this application; Figure 7 This is a schematic diagram of the structure of an electronic device disclosed in an embodiment of this application.

[0030] Explanation of reference numerals in the attached figures: 700 - Electronic device; 701 - Processor; 702 - Communication bus; 703 - User interface; 704 - Network interface; 705 - Memory. Detailed Implementation

[0031] To enable those skilled in the art to better understand the technical solutions in this specification, the technical solutions in the embodiments of this specification will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments.

[0032] In the description of the embodiments of this application, the words "for example" or "for instance" are used to indicate examples, illustrations, or explanations. Any embodiment or design that is described as "for example" or "for instance" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design options. Rather, the use of the words "for example" or "for instance" is intended to present the relevant concepts in a specific manner.

[0033] In the description of the embodiments of this application, the term "multiple" means two or more. For example, multiple systems means two or more systems, and multiple screen terminals means two or more screen terminals. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the indicated technical features. Thus, a feature defined with "first" or "second" may explicitly or implicitly include one or more of that feature. The terms "comprising," "including," "having," and variations thereof all mean "including but not limited to," unless otherwise specifically emphasized.

[0034] This application provides a constant current output device, referring to... Figure 1 , Figure 1 This is a structural block diagram of a constant current output device provided in an embodiment of this application. The device includes: a first MOSFET, a second MOSFET, a third MOSFET, a fourth MOSFET, a fifth MOSFET, a sixth MOSFET, a transformer, an inductor, an output capacitor, a seventh device, an eighth device, and a drive control module. The source of the first MOSFET is connected to the drain of the second MOSFET, the drain of the first MOSFET is connected to the drain of the third MOSFET, the source of the third MOSFET is connected to the drain of the fourth MOSFET, the source of the second MOSFET is connected to the source of the fourth MOSFET, the drain of the first MOSFET and the source of the second MOSFET are respectively connected to the two ends of the DC power supply, and the source of the first MOSFET and the source of the third MOSFET are respectively connected to the input end of the transformer. The first output terminal of the transformer is connected to the first terminal of the inductor. The second terminal of the inductor is connected to the source of the fifth MOSFET. The drain of the fifth MOSFET is connected to the first terminal of the output capacitor. The second terminal of the inductor is also connected to the drain of the sixth MOSFET. The source of the sixth MOSFET is connected to the second terminal of the output capacitor. A seventh device is connected between the first terminal of the output capacitor and the second output terminal of the transformer. An eighth device is connected between the second terminal of the output capacitor and the second output terminal of the transformer. The first and second terminals of the output capacitor serve as the output terminals of the constant current output device. The output terminals of the constant current output device are used to connect to the load and provide a predetermined current to the load. The drive control module is used to provide pulse signals with preset frequency, preset amplitude, and preset duty cycle to the gates of the first MOSFET, the second MOSFET, the third MOSFET, the fourth MOSFET, the fifth MOSFET, and the sixth MOSFET, respectively. The first pulse signal of the gate of the first MOSFET is out of phase with the second pulse signal of the gate of the second MOSFET, the third pulse signal of the gate of the third MOSFET is out of phase with the fourth pulse signal of the gate of the fourth MOSFET, the fifth pulse signal of the gate of the fifth MOSFET is out of phase with the sixth pulse signal of the gate of the sixth MOSFET, and the first pulse signal leads the fourth pulse signal by a first preset phase and the first pulse signal leads the fifth pulse signal by a second preset phase. The second preset phase is greater than the first preset phase.

[0035] In the above embodiments, combined with Figure 1 To explain, on the primary side of the transformer, a full-bridge circuit composed of the first, second, third, and fourth MOSFETs converts the input DC power supply voltage signal into a square wave AC voltage signal. On the secondary side of the transformer, a secondary-side conversion circuit composed of an inductor, a fifth, sixth, seventh, and eighth MOSFET, and an output capacitor converts the AC voltage signal into a DC current signal. Figure 1As shown, the fifth, sixth, seventh, and eighth MOSFETs essentially function as a bidirectional switch. When the AC voltage on the secondary side of the transformer alternates between positive and negative, a constant current is obtained at the output terminal, and its direction remains unchanged. The inductor can be understood as the transformer's leakage inductance, and a separate inductor device can be used. It should be noted that the aforementioned constant output current requires proper control of the drive signals of the gates of the first, second, third, fourth, fifth, and sixth MOSFETs. The drive control module is connected to the gate of each of the first to sixth MOSFETs. To drive and control each MOSFET, i.e., to control the conduction and shutdown of each MOSFET, in this embodiment, pulse signals can be input to the gate of each MOSFET. For example, the first pulse signal is input to the gate of the first MOSFET, the second pulse signal is input to the gate of the second MOSFET, and so on, with the sixth pulse signal input to the gate of the sixth MOSFET. For example, the pulse amplitude, pulse period, and pulse width (or duty cycle) of the first, second, third, fourth, fifth, and sixth pulse signals are all the same, but their phases are not the same. Furthermore, the phases of these signals satisfy a certain relationship. Taking the first pulse signal as a reference, the second pulse signal is inversely related to the first pulse signal. That is, when the first pulse signal is high, the corresponding second pulse signal is low, and when the first pulse signal is low, the corresponding second pulse signal is high. The first pulse signal leads the fourth pulse signal by a first preset phase, or the fourth pulse signal lags the first pulse signal by a first preset phase. Similarly, the third pulse signal is inversely related to the fourth pulse signal. The first pulse signal leads the fifth pulse signal by a second preset phase, or the fifth pulse signal lags the first pulse signal by a second preset phase. Then, the second preset phase, and the fifth and sixth pulse signals are also out of phase, and the second preset phase is greater than the first preset phase; for example, assuming the above pulse period is 10us, the first preset phase is 0.3 (here 0.3 is obtained after normalization according to the pulse period or switching period), which is actually 0.3*10us=3us, and the second preset phase is 0.35 (here 0.35 is obtained after normalization according to the pulse period or switching period), which is actually 0.35*10us=3.5us. This is only an example for illustration, and the first and second preset phases can also take other values. It should be noted that the gates of the first, second, third, fourth, fifth, and sixth MOS transistors are all connected to the drive control module, which is used to provide drive control signals, that is, to each MOS transistor.The drive control module controls the driving of the gates of each MOSFET, ensuring that the pulse signals driving the gates of each MOSFET satisfy a certain phase relationship to obtain a predetermined current, thereby providing a constant current signal to the load. Figure 1 The leftmost one can be connected to a DC power supply. Figure 1 The rightmost part can be connected to the load. This avoids the problems of related technologies that require multiple circuit modules, increasing cost and size, by comparing the sampled output current with a reference value and then implementing negative feedback control. By adopting the above technical solution, the cost of the constant current output device can be effectively controlled, and the overall size of the constant current output device can be reduced.

[0036] In an optional embodiment, the seventh device is a first capacitor, the eighth device is a second capacitor, and the first capacitor and the second capacitor are equal.

[0037] In the above embodiments, the seventh and eighth devices can use capacitors of the same specifications. To meet the requirements of high voltage and low current output, the seventh and eighth devices can use a capacitor solution, which can further control the overall cost of the constant current output device.

[0038] In an optional embodiment, the seventh device is a seventh MOS transistor, and the eighth device is an eighth MOS transistor. The drain of the seventh MOS transistor is connected to the first terminal of the output capacitor, the source of the seventh MOS transistor is connected to the second output terminal of the transformer, the drain of the eighth MOS transistor is connected to the second output terminal of the transformer, and the source of the eighth MOS transistor is connected to the second terminal of the output capacitor. The drive control module is also used to provide pulse signals with preset frequency, preset amplitude, and preset duty cycle to the gate of the seventh MOS transistor and the gate of the eighth MOS transistor, respectively. The seventh pulse signal of the gate of the seventh MOS transistor and the eighth pulse signal of the gate of the eighth MOS transistor are inversely related, and the seventh pulse signal is the same as the sixth pulse signal, and the eighth pulse signal is the same as the fifth pulse signal.

[0039] In the above embodiments, the seventh and eighth devices can also be MOSFETs. The seventh pulse signal at the gate of the seventh MOSFET is the same as the sixth pulse signal at the gate of the sixth MOSFET, and the eighth pulse signal at the gate of the eighth MOSFET is the same as the fifth pulse signal at the gate of the fifth MOSFET. A full-bridge circuit is formed by the fifth, sixth, seventh, and eighth MOSFETs. Combined with an inductor and an output capacitor, the AC voltage signal on the secondary side can be converted into a DC current signal. In practical applications, for low-voltage, high-current output scenarios, the seventh and eighth devices can utilize MOSFETs.

[0040] In one alternative embodiment, the transformer is a step-up transformer or a step-down transformer.

[0041] In the above embodiments, in the DC-DC (or DC-DC) converter, the load side often needs to involve voltage boosting or bucking relative to the voltage of the input DC power supply. For voltage boosting or bucking in actual application scenarios, the constant current output device in the embodiments of this application can be used to achieve the effect of constant current output, thus expanding the application scope of the constant current output device.

[0042] In an optional embodiment, the constant current output device further includes an input capacitor, wherein the positive terminal of the input capacitor is connected to the drain of the first MOSFET, and the negative terminal of the input capacitor is connected to the source of the second MOSFET.

[0043] In the above embodiments, by connecting an input capacitor in parallel at the input terminal, the power supply voltage can be filtered, and energy can be stored and stabilized. For example, an electrolytic capacitor can be used as the input capacitor, wherein the positive terminal of the electrolytic capacitor is connected to the positive terminal of the DC power supply, and the negative terminal of the electrolytic capacitor is connected to the negative terminal of the DC power supply.

[0044] In an optional embodiment, the constant current output device further includes a determining module, wherein the determining module is configured to determine a control signal according to the following formula, wherein the control signal is used to determine a first preset phase and a second preset phase: Where D is the control signal, n is the turns ratio of the primary to the secondary side of the transformer, and f max Here, L is the preset frequency threshold, and I is the inductance of the inductor. out For the predetermined current, V in The voltage of the DC power supply is used; the determining module is also used to determine the first preset phase and the second preset phase according to the following formulas: D1=0.5-D, D2=D1+0.25×D, where D1 is the first preset phase and D2 is the second preset phase.

[0045] In the above embodiments, based on the needs of actual applications, after determining the predetermined output current, the voltage of the input DC power supply, and some component parameters, the determining module can determine the control signal D, the first preset phase D1, and the second preset phase D2, thereby determining the phase relationship between the pulse signals driving and controlling the gates of each MOS transistor. For example, the aforementioned preset frequency threshold can be the maximum operating frequency of the MOS transistor, such as 100kHz (or others), based on the predetermined output current I required by the user. out(e.g., 5A, 10A, or others), and based on the input DC power supply voltage (e.g., 100V, 300V, or others), the preset frequency threshold of the constant current output device (e.g., 100kHz), the inductance parameter L of the inductor, and the turns ratio n of the primary and secondary sides of the transformer, the control signal can be determined. For example, the primary side turns: secondary side turns = n:1. Then, according to the calculation formulas of D1 and D2 mentioned above, the first preset phase and the second preset phase can be determined. In this way, the specific relationship between the phases of the pulse signals (or drive control signals) of the first MOSFET, the second MOSFET, the third MOSFET, the fourth MOSFET, the fifth MOSFET, and the sixth MOSFET can be determined, thereby obtaining the predetermined output current, that is, the constant current output at the load end.

[0046] In an optional embodiment, the determining module is further configured to determine a preset frequency according to the following formula: Where f is the preset frequency; the determining module is connected to the drive control module, and the determining module is also used to send the first preset phase, the second preset phase and the preset frequency to the drive control module.

[0047] In the above embodiments, the control signals D and f can also be used as a basis. max By determining the preset frequency of the pulse signal for each MOSFET, the pulse signal used to drive and control the gate of each MOSFET can be determined. The preset frequency f can be calculated using the formula described above, thus determining the drive control signal for each MOSFET, i.e., the pulse signal input to the gate of each MOSFET. Optionally, the duty cycle of the pulse signal for each MOSFET can be 0.5 (or other values).

[0048] This application also provides a constant current output control method, which can be applied to the constant current output device of any of the foregoing embodiments, such as... Figure 2 As shown, Figure 2 This is a flowchart of a constant current output control method provided in an embodiment of this application. The method includes: Step S201: When a DC power supply is connected between the drain of the first MOSFET and the source of the second MOSFET, determine the first pulse signal of the gate of the first MOSFET, the second pulse signal of the gate of the second MOSFET, the third pulse signal of the gate of the third MOSFET, the fourth pulse signal of the gate of the fourth MOSFET, the fifth pulse signal of the gate of the fifth MOSFET, and the sixth pulse signal of the gate of the sixth MOSFET. In step S202, the gates of the first MOSFET, the second MOSFET, the third MOSFET, the fourth MOSFET, the fifth MOSFET, and the sixth MOSFET are driven according to the first pulse signal, the second pulse signal, the third pulse signal, the fourth pulse signal, the fifth MOSFET, and the sixth MOSFET, respectively, so that the output terminal of the constant current output device outputs a predetermined current.

[0049] In the above implementation, on the primary side of the transformer, a full-bridge circuit composed of a first, second, third, and fourth MOSFET can convert the input DC power supply voltage signal into a square wave AC voltage signal. On the secondary side of the transformer, a secondary-side conversion circuit composed of an inductor, a fifth, sixth, seventh, and eighth MOSFET, and an output capacitor can convert the AC voltage signal into a DC current signal. The pulse signals used to drive and control the gates of each MOSFET are determined, wherein the pulse signals corresponding to each MOSFET satisfy a certain phase relationship. For example, the pulse signal input to the gate of the first MOSFET corresponds to the first pulse signal, and the pulse signal input to the gate of the second MOSFET corresponds to the third pulse signal. The gate of the MOSFET corresponds to the second pulse signal, and so on, with the gate of the sixth MOSFET corresponding to the sixth pulse signal. For example, the pulse amplitude, pulse period, and pulse width (or duty cycle) of the first, second, third, fourth, fifth, and sixth pulse signals are all the same, but their phases are not the same, and their phases satisfy a certain relationship. Taking the first pulse signal as a reference, the second pulse signal and the first pulse signal are inverses of each other; that is, when the first pulse signal is high, the corresponding second pulse signal is low, and when the first pulse signal is low, the corresponding second pulse signal is high. The first pulse signal leads the fourth pulse signal by a first preset phase, or the fourth pulse signal lags the first pulse signal by a first preset phase. The third and fourth pulse signals are also out of phase. The first pulse signal leads the fifth pulse signal by a second preset phase, or the fifth pulse signal lags the first pulse signal by a second preset phase. The fifth and sixth pulse signals are also out of phase, and the second preset phase is greater than the first preset phase. For example, assuming the pulse period is 10µs and the first preset phase is 0.3 (where 0.3 is normalized according to the pulse period or switching period), the actual value is 0.3 * 10µs = 3µs. The second preset phase is 0.35 (0.35 here is normalized according to the pulse period or switching period), which is actually 0.35 * 10us = 3.5us. This is just an example. The first and second preset phases can also take other values. Then, the gates of the first MOSFET, the second MOSFET, the third MOSFET, the fourth MOSFET, the fifth MOSFET, and the sixth MOSFET are driven by the first pulse signal, the second pulse signal, the third pulse signal, the fourth MOSFET, the fifth MOSFET, and the sixth MOSFET, respectively, to obtain a predetermined current, thereby providing a constant current signal to the load.This avoids the problem of increasing cost and size caused by comparing the sampled output current with a reference value and then implementing negative feedback control, which requires multiple circuit modules. By adopting the above technical solution, the cost of the constant current output device can be effectively controlled, and the overall size of the constant current output device can also be reduced.

[0050] In an optional embodiment, determining the first pulse signal of the gate of the first MOS transistor, the second pulse signal of the gate of the second MOS transistor, the third pulse signal of the gate of the third MOS transistor, the fourth pulse signal of the gate of the fourth MOS transistor, the fifth pulse signal of the gate of the fifth MOS transistor, and the sixth pulse signal of the gate of the sixth MOS transistor includes: determining that the first pulse signal is a pulse signal with a preset frequency, a preset amplitude, and a preset duty cycle; and determining that the second pulse signal is a pulse signal that is inversely phase to the first pulse signal; determining that the fourth pulse signal is a pulse signal with a preset frequency, a preset amplitude, and a preset duty cycle, and that the first pulse signal leads the fourth pulse signal by a first preset phase; and determining that the third pulse signal is an inversely phase to the fourth pulse signal; determining that the fifth pulse signal is a pulse signal with a preset frequency, a preset amplitude, and a preset duty cycle, and that the first pulse signal leads the fifth pulse signal by a second preset phase; and determining that the sixth pulse signal is an inversely phase to the fifth pulse signal.

[0051] In the above embodiments, by controlling the phase relationship of the pulse signals corresponding to each MOS transistor, the first pulse signal leads the fourth pulse signal by a first preset phase, the first pulse signal leads the fifth pulse signal by a second preset phase, and the second preset phase is greater than the first preset phase. The predetermined current can be obtained using the above constant current output device.

[0052] In an optional embodiment, the method further includes: determining a control signal according to the following formula, wherein the control signal is used to determine a first preset phase and a second preset phase: D = 4 × n × f max ×L×I out / V in Where D is the control signal, n is the turns ratio of the primary to the secondary side of the transformer, and f max Here, L is the preset frequency threshold, and I is the inductance of the inductor. out For the predetermined current, V in The voltage of the DC power supply is used; the first and second preset phases are determined according to the following formulas: D1 = 0.5 - D, D2 = D1 + 0.25 × D, where D1 is the first preset phase and D2 is the second preset phase; the preset frequency is determined according to the following formula: f = (1 - 1.25 × D) × f max , where f is the preset frequency.

[0053] In the above embodiments, based on the needs of the actual application, i.e., based on the required predetermined current, the voltage of the input DC power supply, and some component parameters, for example, the preset frequency threshold can be the maximum operating frequency of the MOSFET, such as a preset frequency threshold of 100kHz (or others), and based on the user's required predetermined output current I... out (e.g., 5A, 10A, or others), and based on the input DC power supply voltage (e.g., 100V, 300V, or others), the preset frequency threshold of the constant current output device (e.g., 100kHz), the inductance parameter L of the inductor, and the turns ratio n of the primary and secondary sides of the transformer, the control signal can be determined. For example, the primary side turns: secondary side turns = n:1. Then, according to the calculation formulas of D1 and D2 mentioned above, the first preset phase and the second preset phase can be determined. In this way, the first MOSFET, the second MOSFET, the third MOSFET, the fourth MOSFET, the fifth MOSFET, and... The specific relationship between the phases of the pulse signal (or drive control signal) of the sixth MOS transistor can be determined by the above formula. The control signal D, the first preset phase D1, and the second preset phase D2 can be determined, thereby determining the phase relationship between the pulse signals driving and controlling the gates of each MOS transistor, and determining the preset frequency of the pulse signal of each MOS transistor. Thus, the pulse signal used to drive and control the gates of each MOS transistor can be determined. At the same time, the predetermined output current is linearly related to the control signal D, which can achieve the purpose of high-precision linear control of constant current output.

[0054] Obviously, the embodiments described above are only some embodiments of this application, and not all embodiments. The present application will be specifically described below with reference to specific embodiments.

[0055] This application provides a primary-side controlled output constant current DC-DC isolation converter and its implementation method, which can achieve constant current output and high-precision linear control by relying on the primary side without sampling the output current.

[0056] Figure 3 This is an example diagram of a DC-DC converter provided in an embodiment of this application, such as... Figure 3 As shown, the primary side consists of full-bridge switches Q1 (corresponding to the aforementioned first MOSFET), Q2 (corresponding to the aforementioned second MOSFET), Q3 (corresponding to the aforementioned third MOSFET), and Q4 (corresponding to the aforementioned fourth MOSFET), and the secondary side consists of half-bridge switches Q5 (corresponding to the aforementioned fifth MOSFET), Q6 (corresponding to the aforementioned sixth MOSFET), and double-voltage capacitor arms C1 (corresponding to the aforementioned seventh device, or the aforementioned first capacitor) and C2 (corresponding to the aforementioned eighth device, or the aforementioned second capacitor).

[0057] Where V in For the input voltage, Cin For the input capacitor, C o For the output capacitor, L lk For transformer leakage inductance, R load The load resistance is n, and the turns ratio of the primary to the secondary side of the transformer is n:1. Figure 3 Middle I o1 This is the output current before it is filtered by the output capacitor, I. o2 The output current is obtained after filtering by the output capacitor (corresponding to the aforementioned I). out ).

[0058] Each bridge arm's upper and lower pipes are switched on complementaryly with a duty cycle of 0.5. For example, Figure 3 In this configuration, Q1 and Q2 form one pair of upper and lower bridge arms, Q3 and Q4 form another pair, and Q5 and Q6 also form a pair. Bridge arms Q1 and Q2 lead bridge arms Q3 and Q4 by a phase difference of D1, and lead bridge arms Q1 and Q2 by a phase difference of D2, with D1 being less than D2. The gate drive control signals (e.g., pulse signals) for Q1 and Q2 are inverted, as are the gate drive control signals (e.g., pulse signals) for Q3 and Q4, and the gate drive control signals (e.g., pulse signals) for Q5 and Q6.

[0059] Optionally, embodiments of this application also provide another DC-DC converter, such as... Figure 4 As shown, with Figure 3 The difference lies in the Figure 3 The voltage multiplier capacitor arms C1 and C2 are replaced with Q7 (corresponding to the aforementioned seventh device, or the seventh MOSFET) and Q8 (corresponding to the aforementioned eighth device, or the eighth MOSFET), respectively. Figure 4 In the example, the primary side consists of full-bridge switches Q1-Q4, and the secondary side consists of full-bridge switches Q5-Q8.

[0060] It should be noted that the following is adopted: Figure 4 In the DC-DC converter, the gate drive control of Q7 is the same as that of Q6, that is, they are in phase. Similarly, the gate drive control of Q8 is the same as that of Q5, that is, they are in phase. The gate drive control of Q5 and Q6 are out of phase.

[0061] The specific control methods for the drive control signals of the MOSFETs on each bridge arm are explained below. Figure 5 This is a schematic diagram of the output constant current control provided in the embodiments of this application, wherein the preset value I of the output constant current is... out Substitute into the formula The control signal D is calculated, with a limiting value of [0, 0.5] and f. maxFor the maximum operating frequency, for example, the preset maximum operating frequency of the MOSFET, L lk V is the transformer leakage inductance (corresponding to the charge of the aforementioned inductance), n is the turns ratio of the primary to secondary windings of the transformer, and V is the leakage inductance of the transformer. in Given the input voltage, substitute the control signal D into the following formula to calculate D1, D2, and the actual operating frequency f. s .

[0062] D1 = 0.5 - D, D2 = D1 + 0.25D .

[0063] It should be noted that the control signal D mentioned above is a normalized representation of the switching period. The 0.5 above represents 0.5Ts (Ts is one switching period). Taking D=0.2 as an example, D=0.2 is equivalent to 0.2Ts. Therefore, D1=0.3, meaning that the phase lead of bridge arms Q1 and Q2 over bridge arms Q3 and Q4 is 0.3Ts. The above I... out This can be understood as the output current that the user needs, which can be predetermined, while V... in The voltage of the input DC power supply, ideally, is V. in To ensure a constant voltage, in practical applications, the input power supply voltage V can be acquired in real time. in When V in When changes occur, the corresponding control signal D can be determined, and then the drive control signal for the gate of the MOS transistor on different bridge arms can be determined.

[0064] Figure 6 These are simulation example diagrams provided in the embodiments of this application. Figure 6 Is with Figure 3 Simulation example of the corresponding DC-DC converter, Figure 6 The diagram shows the phase relationship between the drive control of each MOSFET Q1-Q6, from... Figure 6 As can be seen, Q1 and Q2 are out of phase, Q3 and Q4 are out of phase, and Q5 and Q6 are also out of phase. Moreover, Q4 lags behind Q1 by a certain phase (corresponding to D1 mentioned above), and Q5 also lags behind Q1 by a certain phase (corresponding to D2 mentioned above). However, both D1 and D2 are within half a cycle (0.5Ts, equivalent to one pulse width). AB express Figure 3 The voltage between A and B, V CD express Figure 3 The voltage between C and D, I Llk express Figure 3 The current I in the inductor o1 This is the output current before it is filtered by the output capacitor, I. o2The output current is obtained after filtering by the output capacitor (corresponding to the aforementioned I). out ),from Figure 6 As can be seen, the output current obtained is a constant current.

[0065] It should be noted that within one cycle, the drive control signals (such as pulse signals) for the gates of Q1-Q6 have the same amplitude, the same period, and the same duty cycle; when the input V in Or I out When there are adjustments or changes, the drive control signals for the gates of Q1-Q6 may also need to be changed. However, within the same cycle, they are pulse signals with the same amplitude, the same period and the same duty cycle, only the phase will be different.

[0066] The following technical effects can be achieved through the embodiments of this application: 1) Output side constant current can be achieved without the need for output current sampling and negative feedback isolation circuits, avoiding the problem of increased cost and size caused by the need to sample the output current and compare it with the reference value before negative feedback control in related technologies; 2) The output side constant current value is proportional to the control quantity D, simplifying the control strategy; 3) ZVS is achieved by the switching transistor.

[0067] It should be noted that the above embodiments of the apparatus are only illustrated by the division of the above functional modules. In practical applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. In addition, the apparatus and method embodiments provided above belong to the same concept, and the specific implementation process can be found in the method embodiments, which will not be repeated here.

[0068] This application also provides a computer-readable storage medium storing instructions that, when executed, perform the steps of any of the methods described above.

[0069] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0070] This application also discloses an electronic device. For example... Figure 7 As shown, Figure 7This is a schematic diagram of the structure of an electronic device disclosed in an embodiment of this application. The electronic device 700 may include: at least one processor 701, at least one network interface 704, a user interface 703, a memory 705, and at least one communication bus 702.

[0071] The communication bus 702 is used to enable communication between these components.

[0072] The user interface 703 may include a display screen and a camera. Optionally, the user interface 703 may also include a standard wired interface and a wireless interface.

[0073] The network interface 704 may optionally include a standard wired interface or a wireless interface (such as a Wi-Fi interface).

[0074] The processor 701 may include one or more processing cores. The processor 701 connects to various parts of the electronic device (such as a server) using various interfaces and lines, and performs various server functions and processes data by running or executing instructions, programs, code sets, or instruction sets stored in memory 705, and by calling data stored in memory 705. Optionally, the processor 701 may be implemented using at least one hardware form of Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), or Programmable Logic Array (PLA). The processor 701 may integrate one or more of the following: Central Processing Unit (CPU), Graphics Processing Unit (GPU), and modem. The CPU primarily handles the operating system, user interface, and applications; the GPU is responsible for rendering and drawing the content to be displayed on the screen; and the modem handles wireless communication. It is understood that the modem may also not be integrated into the processor 701 and may be implemented as a separate chip.

[0075] The memory 705 may include random access memory (RAM) or read-only memory. Optionally, the memory 705 may include a non-transitory computer-readable storage medium. The memory 705 may be used to store instructions, programs, code, code sets, or instruction sets. The memory 705 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for at least one function (such as touch function, sound playback function, image playback function, etc.), instructions for implementing the above-described method embodiments, etc.; the data storage area may store data involved in the above-described method embodiments, etc. Optionally, the memory 705 may also be at least one storage device located remotely from the aforementioned processor 701. (Refer to...) Figure 7 The memory 705, which serves as a computer storage medium, may include an operating system, a network communication module, a user interface module, and an application program for a constant current output control method.

[0076] exist Figure 7 In the illustrated electronic device 700, the user interface 703 is mainly used to provide an input interface for the user and acquire user input data; while the processor 701 can be used to call an application program of a constant current output control method stored in the memory 705. When executed by one or more processors 701, the electronic device 700 performs one or more of the methods described in the above embodiments. It should be noted that, for the foregoing method embodiments, for the sake of simplicity, they are all described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, because according to this application, some steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also understand that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily essential to this application.

[0077] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0078] In the various embodiments provided in this application, it should be understood that the disclosed apparatus can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some service interface; the indirect coupling or communication connection between apparatuses or units may be electrical or other forms.

[0079] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0080] In the various embodiments provided in this application, it should be understood that the disclosed apparatus can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some service interface; the indirect coupling or communication connection between apparatuses or units may be electrical or other forms.

[0081] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0082] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0083] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage device (CMD). Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a memory and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this application. The aforementioned memory includes various media capable of storing program code, such as USB flash drives, portable hard drives, magnetic disks, or optical disks.

[0084] The above description is merely an exemplary embodiment of this disclosure and should not be construed as limiting the scope of this disclosure. Any equivalent changes and modifications made in accordance with the teachings of this disclosure shall still fall within the scope of this disclosure. Other embodiments of this disclosure will be readily apparent to those skilled in the art upon consideration of the specification and the disclosure of practical truths.

[0085] This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art that are not described in this disclosure.

Claims

1. A constant current output device, characterized in that, include: The components include: first MOSFET, second MOSFET, third MOSFET, fourth MOSFET, fifth MOSFET, sixth MOSFET, transformer, inductor, output capacitor, seventh device, eighth device, and drive control module. The source of the first MOSFET is connected to the drain of the second MOSFET, the drain of the first MOSFET is connected to the drain of the third MOSFET, the source of the third MOSFET is connected to the drain of the fourth MOSFET, the source of the second MOSFET is connected to the source of the fourth MOSFET, the drain of the first MOSFET and the source of the second MOSFET are respectively connected to the two ends of a DC power supply, and the source of the first MOSFET and the source of the third MOSFET are respectively connected to the input end of the transformer. The first output terminal of the transformer is connected to the first terminal of the inductor, the second terminal of the inductor is connected to the source of the fifth MOSFET, the drain of the fifth MOSFET is connected to the first terminal of the output capacitor, the second terminal of the inductor is also connected to the drain of the sixth MOSFET, the source of the sixth MOSFET is connected to the second terminal of the output capacitor, the seventh device is connected between the first terminal of the output capacitor and the second output terminal of the transformer, and the eighth device is connected between the second terminal of the output capacitor and the second output terminal of the transformer. The first and second terminals of the output capacitor serve as the output terminals of the constant current output device, which is used to connect to the load and provide a predetermined current to the load. The drive control module is used to provide pulse signals with preset frequency, preset amplitude, and preset duty cycle to the gates of the first MOS transistor, the second MOS transistor, the third MOS transistor, the fourth MOS transistor, the fifth MOS transistor, and the sixth MOS transistor, respectively. The first pulse signal of the gate of the first MOS transistor is out of phase with the second pulse signal of the gate of the second MOS transistor; the third pulse signal of the gate of the third MOS transistor is out of phase with the fourth pulse signal of the gate of the fourth MOS transistor; the fifth pulse signal of the gate of the fifth MOS transistor is out of phase with the sixth pulse signal of the gate of the sixth MOS transistor; and the first pulse signal leads the fourth pulse signal by a first preset phase and the first pulse signal leads the fifth pulse signal by a second preset phase, wherein the second preset phase is greater than the first preset phase.

2. The constant current output device according to claim 1, characterized in that, The seventh device is a first capacitor, and the eighth device is a second capacitor, wherein the first capacitor and the second capacitor are equal.

3. The constant current output device according to claim 1, characterized in that, The seventh device is a seventh MOS transistor, and the eighth device is an eighth MOS transistor. The drain of the seventh MOS transistor is connected to the first terminal of the output capacitor, the source of the seventh MOS transistor is connected to the second output terminal of the transformer, the drain of the eighth MOS transistor is connected to the second output terminal of the transformer, and the source of the eighth MOS transistor is connected to the second terminal of the output capacitor. The drive control module is also used to provide pulse signals with the preset frequency, the preset amplitude, and the preset duty cycle to the gate of the seventh MOS transistor and the gate of the eighth MOS transistor, respectively. The seventh pulse signal of the gate of the seventh MOS transistor and the eighth pulse signal of the gate of the eighth MOS transistor are inversely related, and the seventh pulse signal is the same as the sixth pulse signal, and the eighth pulse signal is the same as the fifth pulse signal.

4. The constant current output device according to claim 1, characterized in that, The transformer is either a step-up transformer or a step-down transformer.

5. The constant current output device according to claim 1, characterized in that, The constant current output device further includes an input capacitor, wherein the positive terminal of the input capacitor is connected to the drain of the first MOSFET, and the negative terminal of the input capacitor is connected to the source of the second MOSFET.

6. The constant current output device according to claim 1, characterized in that, The constant current output device further includes a determining module, wherein... The determining module is used to determine the control signal according to the following formula, wherein the control signal is used to determine the first preset phase and the second preset phase: , Where D is the control signal, n is the turns ratio of the primary to the secondary side of the transformer, and f max Let L be the inductance of the inductor, and I be the preset frequency threshold. out For the predetermined current, V in The voltage of the DC power supply; The determining module is further configured to determine the first preset phase and the second preset phase according to the following formula: D1 = 0.5 - D, D2 = D1 + 0.25 × D, Wherein, D1 is the first preset phase and D2 is the second preset phase.

7. The constant current output device according to claim 6, characterized in that, The determining module is further configured to determine the preset frequency according to the following formula: , Where f is the preset frequency; The determining module is connected to the drive control module, and the determining module is further configured to send the first preset phase, the second preset phase and the preset frequency to the drive control module.

8. A constant current output control method, applied in the constant current output device according to any one of claims 1 to 7, characterized in that, include: When the DC power supply is connected between the drain of the first MOS transistor and the source of the second MOS transistor, the first pulse signal of the gate of the first MOS transistor, the second pulse signal of the gate of the second MOS transistor, the third pulse signal of the gate of the third MOS transistor, the fourth pulse signal of the gate of the fourth MOS transistor, the fifth pulse signal of the gate of the fifth MOS transistor, and the sixth pulse signal of the gate of the sixth MOS transistor are determined. The first pulse signal, the second pulse signal, the third pulse signal, the fourth pulse signal, the fifth pulse signal, and the sixth pulse signal drive the gates of the first MOS transistor, the second MOS transistor, the third MOS transistor, the fourth MOS transistor, the fifth MOS transistor, and the sixth MOS transistor, respectively, so that the output terminal of the constant current output device outputs the predetermined current.

9. The method according to claim 8, characterized in that, The determination of the first pulse signal of the gate of the first MOS transistor, the second pulse signal of the gate of the second MOS transistor, the third pulse signal of the gate of the third MOS transistor, the fourth pulse signal of the gate of the fourth MOS transistor, the fifth pulse signal of the gate of the fifth MOS transistor, and the sixth pulse signal of the gate of the sixth MOS transistor includes: The first pulse signal is determined to be a pulse signal with the preset frequency, the preset amplitude, and the preset duty cycle, and the second pulse signal is determined to be a pulse signal that is the opposite phase to the first pulse signal; The fourth pulse signal is determined to be a pulse signal with the preset frequency, the preset amplitude, and the preset duty cycle, and the first pulse signal is ahead of the fourth pulse signal by a first preset phase, and the third pulse signal and the fourth pulse signal are determined to be pulse signals that are opposite in phase. The fifth pulse signal is determined to be a pulse signal with the preset frequency, the preset amplitude, and the preset duty cycle, and the first pulse signal is ahead of the fifth pulse signal by a second preset phase, and the sixth pulse signal is determined to be a pulse signal that is out of phase with the fifth pulse signal.

10. The method according to claim 8, characterized in that, The method further includes: The control signal is determined according to the following formula, wherein the control signal is used to determine the first preset phase and the second preset phase: D=4×n×f max ×L×I out / V in , Where D is the control signal, n is the turns ratio of the primary to the secondary side of the transformer, and f max Let L be the inductance of the inductor, and I be the preset frequency threshold. out For the predetermined current, V in The voltage of the DC power supply; The first preset phase and the second preset phase are determined according to the following formula: D1 = 0.5 - D, D2 = D1 + 0.25 × D, Wherein, D1 is the first preset phase, and D2 is the second preset phase; The preset frequency is determined according to the following formula: f=(1-1.25×D)×f max , Where f is the preset frequency.

Citation Information

Patent Citations

  • Pulse width modulation type power converter

    CN112968608A

  • Circuit and method for generating accurate quadrature signals

    CN1146259A