Methods, devices, equipment, and media for identifying silkscreen markings on server PCIe card chassis.

Abstract

This application relates to a method, apparatus, computer equipment, and storage medium for identifying the silkscreen markings on a server PCIe card chassis. The BIOS reads the CPU address information and virtual pin interface address information of each adapter card and compares the read information with the CPU address information and virtual pin interface address information of the acquired PCIe card. If they match, it confirms that the PCIe card is correctly inserted into the adapter card. The BIOS reads the board number of the adapter card and looks up the chassis silkscreen markings of the PCIe card through a mapping table between the chassis silkscreen markings and the board number of the adapter card. This allows for fast and accurate identification and location of the PCIe card chassis silkscreen markings under different server configurations.

Description

Technical Field

[0001] This application relates to the field of server chassis silkscreen technology, and in particular to a method, apparatus, computer equipment, and storage medium for identifying silkscreen markings on server PCIe card chassis. Background Technology

[0002] With the development of artificial intelligence, big data, instant messaging, and other services, users have increasingly higher requirements for the network performance and computing power of server systems. To meet these growing demands, server systems often require various network cards, GPUs, RAID cards, HBA cards, and more, resulting in an increasing number and variety of PCIe cards. This presents significant challenges for server design and maintenance.

[0003] To facilitate maintenance when PCIe cards malfunction, server systems typically assign a unique silkscreen label to each PCIe card on the server chassis, such as PCIe0, PCIe1, PCIe2, etc. As server applications become more widespread and customer configuration requirements become more diverse, enabling the BMC and BIOS to automatically and correctly retrieve the silkscreen label of the faulty PCIe card under different configurations is becoming increasingly important for improving server maintainability. Summary of the Invention

[0004] Therefore, it is necessary to provide a method, apparatus, computer equipment, and storage medium for identifying the silkscreen markings on server PCIe card chassis that can automatically identify the silkscreen markings on server chassis with different configurations, in order to address the aforementioned technical problems.

[0005] On the one hand, a method for identifying silkscreen markings on a server PCIe card chassis is provided, the method comprising:

[0006] Obtain the CPU address information and virtual pin interface address information of the adapter card on the PCIe interface;

[0007] Obtain the CPU address information and virtual pin interface address information of the PCIe card;

[0008] Compare whether the CPU address information and virtual pin interface address information of the adapter card are consistent with the CPU address information and virtual pin interface address information of the PCIe card;

[0009] If so, determine that the PCIe card is correctly inserted into the adapter card, and read the board number of the adapter card;

[0010] Based on the board number and the preset mapping table of adapter board number, CPU address, virtual pin interface address and PCIe card chassis silkscreen, the chassis silkscreen information of the PCIe card is queried.

[0011] In one embodiment, before obtaining the CPU address information and virtual pin interface address information of the adapter card on the PCIe interface, the method further includes:

[0012] Configure the CPU address information and virtual pin interface address information of the motherboard PCIe interface;

[0013] Establish a one-to-one mapping relationship between the CPU address information of the motherboard PCIe interface and the system CPU, as well as a one-to-one mapping relationship between the virtual pin interface address information of the motherboard PCIe interface and the PCIE device. This facilitates the subsequent reading of the CPU address information and virtual pin interface address information of the adapter card inserted into the PCIe interface and comparison with the information of the PCIe card actually connected to the server system.

[0014] In one embodiment, before determining that the PCIe card is correctly inserted into the adapter card and reading the board number of the adapter card, the method further includes:

[0015] Obtain the module number for each adapter card;

[0016] Establish a mapping table between the adapter card board number, CPU address, virtual pin interface address and PCIe card chassis silkscreen, so that after locating the target RISER card by board number, the target PCIe card on the target RISER card can be located by CPU address and virtual pin interface address information.

[0017] In one embodiment, the uplink interface of the adapter card interconnecting with the motherboard is connected to a GPIO expander, and the I2C interface of the GPIO expander is connected to an integrated southbridge, resulting in more stable information transmission.

[0018] In one embodiment, the CPU address pins and virtual pin interface address pins of the adapter card are designed with weak pull-up; this ensures that the CPU address information and virtual pin interface address information are correctly transmitted from the PCIe interface of the server motherboard to the uplink interface of the adapter card.

[0019] In one embodiment, obtaining the CPU address information and virtual pin interface address information of the adapter card on the PCIe interface includes:

[0020] The CPU address information and virtual pin interface address information of each adapter card are read via I2C; each device has its own dedicated connection, does not need to request bandwidth from the entire bus, and can transmit data at high speeds.

[0021] The process of obtaining the CPU address information and virtual pin interface address information of the PCIe card includes:

[0022] After the server is powered on, the system can detect all PCIe cards in the server system, as well as the CPU and PCIe devices corresponding to each PCIe card. This method is intuitive and accurate.

[0023] In one embodiment, after querying the PCIe card's chassis silkscreen based on the board number and a preset mapping table of adapter card board number, CPU address, virtual pin interface address, and PCIe card chassis silkscreen, the method further includes:

[0024] Repeat the steps until you obtain the chassis silkscreen information for all PCIe cards;

[0025] The chassis silkscreen information of all PCIe cards is transmitted to the motherboard management chip for display to the user.

[0026] On the other hand, a server PCIe card chassis silkscreen identification device is provided, the device comprising:

[0027] The first acquisition module is used to acquire the CPU address information and virtual pin interface address information of the adapter card on the PCIe interface;

[0028] The second acquisition module is used to acquire the CPU address information and virtual pin interface address information of the PCIe card;

[0029] The comparison module is used to compare whether the CPU address information and virtual pin interface address information of the adapter card are consistent with the CPU address information and virtual pin interface address information of the PCIe card.

[0030] The judgment reading module is used to determine that the PCIe card is correctly inserted into the adapter card after the comparison result of the comparison module is yes, and to read the board number of the adapter card;

[0031] The query module is used to query the chassis silkscreen information of the PCIe card based on the board number and a preset mapping table of adapter board number, CPU address, virtual pin interface address and PCIe card chassis silkscreen.

[0032] In another aspect, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to perform the following steps:

[0033] Obtain the CPU address information and virtual pin interface address information of the adapter card on the PCIe interface;

[0034] Obtain the CPU address information and virtual pin interface address information of the PCIe card;

[0035] Compare whether the CPU address information and virtual pin interface address information of the adapter card are consistent with the CPU address information and virtual pin interface address information of the PCIe card;

[0036] If so, determine that the PCIe card is correctly inserted into the adapter card, and read the board number of the adapter card;

[0037] Based on the board number and the preset mapping table of adapter board number, CPU address, virtual pin interface address and PCIe card chassis silkscreen, the chassis silkscreen information of the PCIe card is queried.

[0038] In another aspect, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, performs the following steps:

[0039] Obtain the CPU address information and virtual pin interface address information of the adapter card on the PCIe interface;

[0040] Obtain the CPU address information and virtual pin interface address information of the PCIe card;

[0041] Compare whether the CPU address information and virtual pin interface address information of the adapter card are consistent with the CPU address information and virtual pin interface address information of the PCIe card;

[0042] If so, determine that the PCIe card is correctly inserted into the adapter card, and read the board number of the adapter card;

[0043] Based on the board number and the preset mapping table of adapter board number, CPU address, virtual pin interface address and PCIe card chassis silkscreen, the chassis silkscreen information of the PCIe card is queried.

[0044] This application provides a server PCIe card chassis silkscreen identification method, apparatus, computer equipment, and storage medium. The method includes: acquiring the CPU address information and virtual pin interface address information of an adapter card on a PCIe interface; acquiring the CPU address information and virtual pin interface address information of the PCIe card; comparing whether the CPU address information and virtual pin interface address information of the adapter card are consistent with the CPU address information and virtual pin interface address information of the PCIe card; if so, determining that the PCIe card is correctly inserted into the adapter card, and reading the board number of the adapter card; based on the board number and a preset adapter card board number, CPU address, ... The BIOS uses a mapping table between virtual pin interface addresses and PCIe card chassis silkscreen to query the chassis silkscreen information of the PCIe card. It reads the CPU address and virtual pin interface address information of each adapter card and compares this information with the acquired CPU address and virtual pin interface address information of the PCIe card. If they match, it confirms that the PCIe card is correctly inserted into the adapter card. The BIOS then reads the board number of the adapter card and uses the mapping table between chassis silkscreen and adapter card board number to find the chassis silkscreen of the PCIe card. This allows for fast and accurate identification and location of PCIe card chassis silkscreen under different server configurations. Attached Figure Description

[0045] Figure 1 This is an architecture diagram of a server PCIe card chassis silkscreen identification method in one embodiment;

[0046] Figure 2 This is a flowchart illustrating a method for identifying the silkscreen markings on a server PCIe card chassis in one embodiment.

[0047] Figure 3 This is a schematic diagram illustrating the PCIe interface CPU address and virtual pin interface address settings of a server motherboard in one embodiment.

[0048] Figure 4 A schematic diagram illustrating the mapping table between the adapter card board number, CPU address, virtual pin interface address, and PCIe card chassis silkscreen in one embodiment;

[0049] Figure 5 This is a structural block diagram of a server PCIe card chassis silkscreen identification device in one embodiment;

[0050] Figure 6 This is an internal structural diagram of a computer device in one embodiment. Detailed Implementation

[0051] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0052] The server PCIe card chassis silkscreen identification method provided in this application adopts, as follows: Figure 1 The architecture shown. (Refer to...) Figure 1 As shown, the architecture includes: a server motherboard with multiple PCIe interfaces, exemplarily two PCIe interfaces; and an integrated Southbridge (PCH, Platform Controller Hub), a crucial component of the server motherboard chipset, located on the motherboard below the CPU socket and near the PCI slots. The integrated Southbridge handles communication between I / O buses, such as PCI bus, USB, LAN, audio controller, keyboard controller, real-time clock controller, and advanced power management.

[0053] The architecture also includes multiple RISER cards, which are adapter cards that plug into PCIe interfaces. RISER cards utilize a next-generation bus interface; the server motherboard provides a relatively long, non-standard PCIe interface, and the RISER card is inserted into this interface. The RISER card also provides one or more standard PCIe slots (as shown in the diagram), allowing PCIe cards to be inserted into it. The RISER card's uplink interface communicates with the server motherboard's PCIe interface, and each RISER card has a unique board number.

[0054] The architecture also includes a GPIO Expander, which connects to the uplink interface of the RISER card. The GPIO Expander is connected to the integrated southbridge signal.

[0055] In one embodiment, such as Figure 2 As shown, a method for identifying the silkscreen markings on a server PCIe card chassis is provided. The method includes the following steps:

[0056] S210. Obtain the CPU address information and virtual pin interface address information of the adapter card on the PCIe interface.

[0057] The CPU address information indicates the origin of the CPU, and the VPP (virtual pin port) information indicates the origin of the PCIe port (PCIe device). Each CPU address and virtual pin port address is unique.

[0058] S220: Obtain the CPU address information and virtual pin interface address information of the PCIe card.

[0059] S230: Compare the CPU address information and virtual pin interface address information of the adapter card with the CPU address information and virtual pin interface address information of the PCIe card; if they are consistent, proceed to S240.

[0060] S240. Determine that the PCIe card is correctly inserted into the adapter card and read the board number of the adapter card;

[0061] S250: Based on the board number and the preset mapping table of adapter board number, CPU address, virtual pin interface address and PCIe card chassis silkscreen, query the chassis silkscreen information of the PCIe card.

[0062] In the aforementioned method for identifying the silkscreen markings on a server PCIe card chassis, the BIOS reads the CPU address information and virtual pin interface address information of each adapter card and compares the read information with the CPU address information and virtual pin interface address information of the acquired PCIe card. If they match, it confirms that the PCIe card is correctly inserted into the adapter card. The BIOS reads the board number of the adapter card and looks up the chassis silkscreen markings of the PCIe card through a mapping table between the chassis silkscreen markings and the board number of the adapter card. This method enables fast and accurate identification and location of the PCIe card chassis silkscreen markings under different server configurations.

[0063] Before obtaining the CPU address information and virtual pin interface address information of the adapter card on the PCIe interface, the method further includes:

[0064] Configure the CPU address information and virtual pin interface address information of the motherboard PCIe interface;

[0065] Establish a one-to-one mapping relationship between the CPU address information of the motherboard PCIe interface and the system CPU, as well as a one-to-one mapping relationship between the virtual pin interface address information of the motherboard PCIe interface and the PCIE device.

[0066] Specifically, the server is configured with multiple CPUs. A unique address is assigned to each CPU and written into the server's configuration space. The CPU address information and virtual pin interface address information are written into the server's PCIe configuration space. The server system has a dedicated PCIe configuration space that stores all PCIe configuration information for the current server configuration. This PCIe configuration information is stored in a mapping table, including the manufacturer information, model information, identifier, and other attributes of each PCIe card, as well as the corresponding chassis silkscreen, the corresponding adapter card's board number, and the CPU address and virtual pin interface address of the PCIe slot on the server motherboard where the adapter card is located. During subsequent configuration updates, only the relevant information for the newly added PCIe card needs to be written into this mapping table.

[0067] like Figure 3 As shown, the server motherboard's PCIe interface is configured with CPU address and VPP address, with each CPU address and VPP address corresponding one-to-one with the CPU and PCIe device. The design method for CPU address and VPP address is as follows: Figure 3 As shown, each PCIe interface is configured with a one-to-one CPU address and virtual pin interface address corresponding to the CPU and PCIe device, establishing a mapping relationship. This facilitates the subsequent reading of the CPU address information and virtual pin interface address information of the adapter card inserted into the PCIe interface, and comparison with the information of the PCIe card actually connected to the server system.

[0068] Before determining that the PCIe card is correctly inserted into the adapter card and reading the board number of the adapter card, the method further includes:

[0069] Obtain the module number for each adapter card;

[0070] Establish a mapping table between the adapter card module number, CPU address, virtual pin interface address and PCIe card chassis silkscreen.

[0071] like Figure 4 As shown, a mapping is established between the chassis silkscreen markings and the RISER card Board ID, CPU address, and VPP address. For example, a server motherboard PCIe interface has two RISER cards, each supporting one PCIe slot. This patented method can be used to expand the number of RISER cards and PCIe slots. A mapping is established between each RISER card's unique board ID, CPU address, virtual pin interface address, and the PCIe card's chassis silkscreen markings. This facilitates locating the target RISER card by using its board ID, and then locating the target PCIe card on that target RISER card using its CPU address and virtual pin interface address.

[0072] Preferably, the uplink interface of the adapter card interconnecting with the motherboard is connected to a GPIO expander, and the I2C interface of the GPIO expander is connected to the integrated southbridge. Specifically, the uplink interface of the adapter card interconnecting with the server motherboard is equipped with CPU address pins and virtual pin interface address pins. The CPU address information and virtual pin interface address information of the server motherboard's PCIe interface are transmitted to the adapter card through these pins. The adapter card is equipped with matching CPU address pins and virtual pin interface address pins and is connected to the GPIO expander. The I2C interface of the GPIO expander is connected to the integrated southbridge. Using physical pins for the transmission of CPU address information and virtual pin interface address information results in more stable and accurate transmission.

[0073] More preferably, the CPU address pins and virtual pin interface address pins of the adapter card employ a weak pull-up design. A weak pull-up setting refers to a resistor or equivalent resistor designed inside the chip pins, which allows the CPU address pins and virtual pin interface address pins to be set to their default state without the need for external components when their functions are not required. This weak pull-up design ensures that CPU address information and virtual pin interface address information are correctly transmitted from the server motherboard's PCIe interface to the adapter card's uplink interface.

[0074] The process of obtaining the CPU address information and virtual pin interface address information of the adapter card on the PCIe interface includes:

[0075] Read the CPU address information and virtual pin interface address information of each adapter card via I2C;

[0076] The process of obtaining the CPU address information and virtual pin interface address information of the PCIe card includes:

[0077] After the server is powered on, the system detects all PCIe cards in the server system, as well as the CPU and PCIe devices corresponding to each PCIe card.

[0078] I2C refers to the I2C protocol link. I2C is a simple, bidirectional, two-wire synchronous serial bus used to connect microcontrollers and their peripherals. Each device has its own dedicated connection, eliminating the need to request bandwidth from the entire bus, and allowing for high data transmission rates and frequencies. The PCIe bus enables in-band communication with PCIe devices, allowing the acquisition of the PCIe card's CPU address information and virtual pin interface address information. During power-on self-test (POST), the BIOS can detect all PCIe cards in the server system, as well as their corresponding CPUs and PCIe devices, providing a clear and accurate assessment.

[0079] Preferably, after querying the PCIe card's chassis silkscreen based on the board number and a preset mapping table of adapter card board number, CPU address, virtual pin interface address, and PCIe card chassis silkscreen, the method further includes:

[0080] Repeat the steps until you obtain the chassis silkscreen information for all PCIe cards;

[0081] The chassis silkscreen information of all PCIe cards is transmitted to the motherboard management chip for display to the user.

[0082] Specifically, the BIOS reads the CPU address information and virtual pin interface address information of the target RISER card via I2C, and compares the read CPU address information and virtual pin interface address information of the target PCIe card obtained through the PCIe bus. If the comparison results match, it is confirmed that the PCIe card is inserted into the RISER card. In response to the matching results, the BIOS reads the Board ID (board number) of the RISER card via I2C, and looks up the chassis silkscreen of the PCIe card through the correspondence table between the chassis silkscreen and the RISER card board number, CPU address, and VPP address.

[0083] Repeat the above steps until the chassis silkscreen of all PCIe cards in the system is confirmed. The BIOS transmits the PCIe card chassis silkscreen information of the server system to the BMC and displays it to the user on the BMC web interface. When adding a new configuration, only the chassis silkscreen of the new PCIe configuration device needs to be set. The RISE card board number, CPU address, and virtual pin interface address of the added PCIe configuration device are written into the mapping table. There is no need to re-obtain the chassis silkscreen of all PCIe devices, avoiding time and effort.

[0084] It should be understood that, although Figure 2The steps in the flowchart are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order in which these steps are executed, and they can be performed in other orders. Figure 2 At least some of the steps in the process may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least some of the sub-steps or stages of other steps.

[0085] In one embodiment, such as Figure 5 As shown, a server PCIe card chassis silkscreen identification device is provided, the device comprising:

[0086] The first acquisition module 510 is used to acquire the CPU address information and virtual pin interface address information of the adapter card on the PCIe interface;

[0087] The second acquisition module 520 is used to acquire the CPU address information and virtual pin interface address information of the PCIe card;

[0088] The comparison module 530 is used to compare whether the CPU address information and virtual pin interface address information of the adapter card are consistent with the CPU address information and virtual pin interface address information of the PCIe card.

[0089] The judgment reading module 540 is used to determine that the PCIe card is correctly inserted into the adapter card after the comparison result of the comparison module is yes, and to read the board number of the adapter card.

[0090] The query module 550 is used to query the chassis silkscreen information of the PCIe card based on the board number and a preset mapping table of adapter board number, CPU address, virtual pin interface address and PCIe card chassis silkscreen.

[0091] In one embodiment, the apparatus further includes:

[0092] Setting unit 561 is used to set the CPU address information and virtual pin interface address information of the motherboard PCIe interface before the first acquisition module 510 acquires the CPU address information and virtual pin interface address information of the adapter card on the PCIe interface.

[0093] Establishment unit 562 is used to establish a one-to-one mapping relationship between the CPU address information of the motherboard PCIe interface and the system CPU, and a one-to-one mapping relationship between the virtual pin interface address information of the motherboard PCIe interface and the PCIE device.

[0094] In one embodiment, the apparatus further includes:

[0095] The acquisition unit 571 is used to acquire the board number of each adapter card before the judgment and reading module 540 determines that the PCIe card is correctly inserted into the adapter card and reads the board number of the adapter card.

[0096] Unit 572 is used to create a mapping table between the adapter card board number, CPU address, virtual pin interface address and PCIe card chassis silkscreen.

[0097] In one embodiment, the uplink interface of the adapter card interconnecting with the motherboard is connected to a GPIO expander, and the I2C interface of the GPIO expander is connected to an integrated southbridge.

[0098] In one embodiment, the CPU address pins and virtual pin interface address pins of the adapter card adopt a weak pull-up design.

[0099] In one embodiment, the first acquisition module 510 includes:

[0100] The reading unit 511 is used to read the CPU address information and virtual pin interface address information of each adapter card via I2C.

[0101] The second acquisition module 520 includes:

[0102] The detection unit 521 is used to detect all PCIe cards in the server system and the CPU and PCIe devices corresponding to each PCIe card after the server is powered on via the PCIe bus.

[0103] In one embodiment, the apparatus further includes:

[0104] The repeat execution unit 581 is used to repeat the steps until the query module 550 queries the chassis silkscreen of the PCIe card based on the board number and a preset mapping table of the adapter board number, CPU address, virtual pin interface address and PCIe card chassis silkscreen, until the chassis silkscreen information of all PCIe cards is obtained.

[0105] The transmission unit 582 is used to transmit the chassis silkscreen information of all PCIe cards to the motherboard management chip so that the motherboard management chip can display it to the user.

[0106] Specific limitations regarding the server PCIe card chassis silkscreen identification device can be found in the above description of the server PCIe card chassis silkscreen identification method, and will not be repeated here. Each module in the aforementioned server PCIe card chassis silkscreen identification device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in hardware or independently of the processor in the computer device, or stored in software in the memory of the computer device, so that the processor can call and execute the corresponding operations of each module.

[0107] In one embodiment, a computer device is provided, which may be a server, and its internal structure diagram may be as follows: Figure 6 As shown, the computer device includes a processor, memory, network interface, and database connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system, computer programs, and database. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The database stores PCIe configuration data. The network interface communicates with external terminals via a network connection. When executed by the processor, the computer program implements a server PCIe card chassis silkscreen identification method.

[0108] In one embodiment, a computer device is provided, which may be a terminal, and its internal structure diagram may be as follows: Figure 6 As shown, the computer device includes a processor, memory, network interface, display screen, and input devices connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The network interface is used to communicate with external terminals via a network connection. When the computer program is executed by the processor, it implements a method for identifying a server PCIe card chassis. The display screen can be an LCD screen or an e-ink display screen. The input devices can be a touch layer covering the display screen, buttons, a trackball, or a touchpad mounted on the computer device casing, or an external keyboard, touchpad, or mouse.

[0109] Those skilled in the art will understand that Figure 6The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0110] In one embodiment, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to perform the following steps:

[0111] Obtain the CPU address information and virtual pin interface address information of the adapter card on the PCIe interface;

[0112] Obtain the CPU address information and virtual pin interface address information of the PCIe card;

[0113] Compare whether the CPU address information and virtual pin interface address information of the adapter card are consistent with the CPU address information and virtual pin interface address information of the PCIe card;

[0114] If so, determine that the PCIe card is correctly inserted into the adapter card, and read the board number of the adapter card;

[0115] Based on the board number and the preset mapping table of adapter board number, CPU address, virtual pin interface address and PCIe card chassis silkscreen, the chassis silkscreen information of the PCIe card is queried.

[0116] In one embodiment, the processor, when executing a computer program, also performs the following steps:

[0117] Configure the CPU address information and virtual pin interface address information of the motherboard PCIe interface;

[0118] Establish a one-to-one mapping relationship between the CPU address information of the motherboard PCIe interface and the system CPU, as well as a one-to-one mapping relationship between the virtual pin interface address information of the motherboard PCIe interface and the PCIE device.

[0119] In one embodiment, the processor, when executing a computer program, also performs the following steps:

[0120] Obtain the module number for each adapter card;

[0121] Establish a mapping table between the adapter card module number, CPU address, virtual pin interface address and PCIe card chassis silkscreen.

[0122] In one embodiment, the processor, when executing a computer program, also performs the following steps:

[0123] Read the CPU address information and virtual pin interface address information of each adapter card via I2C;

[0124] The process of obtaining the CPU address information and virtual pin interface address information of the PCIe card includes:

[0125] After the server is powered on, the system detects all PCIe cards in the server system, as well as the CPU and PCIe devices corresponding to each PCIe card.

[0126] In one embodiment, the processor, when executing a computer program, also performs the following steps:

[0127] Repeat the steps until you obtain the chassis silkscreen information for all PCIe cards;

[0128] The chassis silkscreen information of all PCIe cards is transmitted to the motherboard management chip for display to the user.

[0129] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon, the computer program performing the following steps when executed by a processor:

[0130] Obtain the CPU address information and virtual pin interface address information of the adapter card on the PCIe interface;

[0131] Obtain the CPU address information and virtual pin interface address information of the PCIe card;

[0132] Compare whether the CPU address information and virtual pin interface address information of the adapter card are consistent with the CPU address information and virtual pin interface address information of the PCIe card;

[0133] If so, determine that the PCIe card is correctly inserted into the adapter card, and read the board number of the adapter card;

[0134] Based on the board number and the preset mapping table of adapter board number, CPU address, virtual pin interface address and PCIe card chassis silkscreen, the chassis silkscreen information of the PCIe card is queried.

[0135] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0136] Configure the CPU address information and virtual pin interface address information of the motherboard PCIe interface;

[0137] Establish a one-to-one mapping relationship between the CPU address information of the motherboard PCIe interface and the system CPU, as well as a one-to-one mapping relationship between the virtual pin interface address information of the motherboard PCIe interface and the PCIE device.

[0138] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0139] Obtain the module number for each adapter card;

[0140] Establish a mapping table between the adapter card module number, CPU address, virtual pin interface address, and PCIe card chassis silkscreen.

[0141] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0142] Read the CPU address information and virtual pin interface address information of each adapter card via I2C;

[0143] The process of obtaining the CPU address information and virtual pin interface address information of the PCIe card includes:

[0144] After the server is powered on, the system detects all PCIe cards in the server system, as well as the CPU and PCIe devices corresponding to each PCIe card.

[0145] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0146] Repeat the steps until you obtain the chassis silkscreen information for all PCIe cards;

[0147] The chassis silkscreen information of all PCIe cards is transmitted to the motherboard management chip for display to the user.

[0148] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), Rambus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

[0149] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0150] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A method for identifying silkscreen markings on a server PCIe card chassis, characterized in that, The method includes: Obtain the CPU address information and virtual pin interface address information of the adapter card on the PCIe interface; Obtain the CPU address information and virtual pin interface address information of the PCIe card; Compare whether the CPU address information and virtual pin interface address information of the adapter card are consistent with the CPU address information and virtual pin interface address information of the PCIe card; If so, determine that the PCIe card is correctly inserted into the adapter card, and read the board number of the adapter card; Based on the board number and the preset mapping table of adapter board number, CPU address, virtual pin interface address and PCIe card chassis silkscreen, query the chassis silkscreen information of the PCIe card; Before obtaining the CPU address information and virtual pin interface address information of the adapter card on the PCIe interface, the method further includes: Configure the CPU address information and virtual pin interface address information of the motherboard PCIe interface; Establish a one-to-one mapping relationship between the CPU address information of the motherboard PCIe interface and the system CPU, and a one-to-one mapping relationship between the virtual pin interface address information of the motherboard PCIe interface and the PCIe device. Before determining that the PCIe card is correctly inserted into the adapter card and reading the board number of the adapter card, the method further includes: Obtain the module number for each adapter card; Establish a mapping table between the adapter card module number, CPU address, virtual pin interface address and PCIe card chassis silkscreen; The method further includes, after querying the PCIe card's chassis silkscreen based on the board number and a preset mapping table of adapter card board number, CPU address, virtual pin interface address, and PCIe card chassis silkscreen, the method also includes: Repeat the steps until you obtain the chassis silkscreen information for all PCIe cards; The chassis silkscreen information of all PCIe cards is transmitted to the motherboard management chip for display to the user.

2. The server PCIe card chassis silkscreen identification method according to claim 1, characterized in that, The uplink interface of the adapter card, which interconnects with the motherboard, is connected to the GPIO expander, and the I2C interface of the GPIO expander is connected to the integrated southbridge.

3. The server PCIe card chassis silkscreen identification method according to claim 2, characterized in that, The CPU address pins and virtual pin interface address pins of the adapter card adopt a weak pull-up design.

4. The server PCIe card chassis silkscreen identification method according to claim 1, characterized in that, The process of obtaining the CPU address information and virtual pin interface address information of the adapter card on the PCIe interface includes: Read the CPU address information and virtual pin interface address information of each adapter card via I2C; The process of obtaining the CPU address information and virtual pin interface address information of the PCIe card includes: After the server is powered on, the system detects all PCIe cards in the server system, as well as the CPU and PCIe devices corresponding to each PCIe card, through the PCIe bus.

5. A server PCIe card chassis silkscreen identification device for implementing the method of claim 1, characterized in that, The device includes: The first acquisition module is used to acquire the CPU address information and virtual pin interface address information of the adapter card on the PCIe interface; The second acquisition module is used to acquire the CPU address information and virtual pin interface address information of the PCIe card; The comparison module is used to compare whether the CPU address information and virtual pin interface address information of the adapter card are consistent with the CPU address information and virtual pin interface address information of the PCIe card. The judgment reading module is used to determine that the PCIe card is correctly inserted into the adapter card after the comparison result of the comparison module is yes, and to read the board number of the adapter card; The query module is used to query the chassis silkscreen information of the PCIe card based on the board number and a preset mapping table of adapter board number, CPU address, virtual pin interface address and PCIe card chassis silkscreen.

6. A computer device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the server PCIe card chassis silkscreen identification method according to any one of claims 1 to 4.

7. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the server PCIe card chassis silkscreen identification method according to any one of claims 1 to 4.

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