DC bias suppression method and system for DAB converter when power is reversed

Abstract

This invention discloses a DC bias suppression method and system for a DAB converter during power reversal, belonging to the field of bidirectional DC / DC converters. The method includes: calculating the shift ratio before and after power reversal of the DAB converter; calculating the inductor volt-second S1 before and after power reversal of the inductor volt-second S2; and setting a volt-second S2 composed of multiple voltage vectors to be inserted during the transition phase. x S1, S2 and S x By satisfying the volt-second balance constraint, the duration of each voltage vector is calculated based on the shift ratio and the magnitude of each voltage vector. During the transition phase, the switching transistors of the DAB converter are controlled according to the magnitude and duration of each voltage vector, based on the operating mode of the DAB converter, to suppress DC bias during power reversal. This invention effectively suppresses DC bias that occurs when the power of the DAB converter is reversed, and is simple and practical.

Description

Technical Field

[0001] This invention belongs to the field of bidirectional DC / DC converters, and more specifically, relates to a method and system for suppressing DC bias when the power of a DAB converter is reversed. Background Technology

[0002] In DC / DC converters incorporating energy storage, the Dual Active Bridge (DAB) converter is widely used due to its excellent performance. DAB converters rely on inductors for power transfer; according to the volt-second balance principle, the average inductor current should be zero in steady state. However, inconsistencies in semiconductor device parameters, differences in gate drive signal delays, sudden load changes, and control command updates can all lead to DC bias in the inductor current during actual operation of the DAB converter. A large transient DC bias component can easily cause significant instantaneous overcurrent in the inductor current, severely impairing the overcurrent capability of the switching transistors. The natural elimination of DC bias depends on the equivalent series resistance in the circuit, which has a long transition time and can easily lead to transformer and inductor saturation, thus compromising the reliable operation and fast performance of the DAB converter.

[0003] Current research largely focuses on the unidirectional power variation condition of DAB converters. However, in reality, when power is reversed, the inductor current and magnetizing inductance exhibit larger DC bias components, resulting in greater instantaneous overcurrent values. This also makes the transformer and inductor more prone to saturation, severely jeopardizing the reliable operation of the DAB converter. Furthermore, current research on suppressing DC bias under reverse power conditions is limited to single-phase-shift modulation, which cannot meet the needs of steady-state optimization in practical engineering. Therefore, there is an urgent need to study DC bias suppression measures with higher modulation degrees of freedom. Summary of the Invention

[0004] In view of the shortcomings of the existing technology and the need for improvement, the present invention provides a DC bias suppression method and system for DAB converters when the power is reversed. The purpose is to solve the serious DC bias problem that occurs when the power of the DAB converter is reversed and to improve its applicability.

[0005] To achieve the above objectives, according to one aspect of the present invention, a method for suppressing DC bias in a DAB converter during power reversal is provided, comprising: calculating the shift ratio before power reversal and the shift ratio after power reversal of the DAB converter; wherein, under single-phase-shift modulation, the shift ratio is the outer shift ratio; under dual-phase-shift modulation or triple-phase-shift modulation, the shift ratio includes the outer shift ratio and the inner shift ratio satisfying a preset optimization target; calculating the inductor volt-second S1 before power reversal and the inductor volt-second S2 after power reversal according to the operating mode of the DAB converter; and setting an insertion volt-second S during the transition phase between power reversal and power reversal. x , wherein the volt-second Sx It consists of multiple voltage vectors. The amplitude and duration of each voltage vector are obtained as follows: the amplitude of each voltage vector is selected from a given range, and S1, S2, and S... x With volt-second balance as a constraint, the duration of each voltage vector is calculated based on the shift ratio and the magnitude of each voltage vector. During the transition phase, each switch of the DAB converter is controlled according to the magnitude and duration of each voltage vector based on the operating mode of the DAB converter, so as to suppress DC bias when power is reversed.

[0006] Furthermore, the preset optimization target is to minimize the return current power, minimize the peak value of the inductor current in the DAB converter, or minimize the effective value of the inductor current in the DAB converter.

[0007] Furthermore, under dual-phase-shift modulation, the calculation of the shift ratio before and after power reversal of the DAB converter includes: calculating the outward shift ratio d2 before and after power reversal of the DAB converter. * Based on the operating mode of the DAB converter, calculate the inward shift ratio d1 before power reversal and the inward shift ratio d1 after power reversal of the DAB converter, satisfying the preset optimization objective. * .

[0008] Furthermore, when the preset optimization target is to minimize the return current power: when the operating mode is buck mode, d1, d1 * They are respectively:

[0009] d1=d2

[0010] d1 * =d2 *

[0011] When the operating mode is boost mode, d1, d1 * They are respectively:

[0012]

[0013]

[0014] Wherein, V1 and V2 are the primary input voltage and secondary output voltage of the high-frequency transformer in the DAB converter, respectively, and n is the turns ratio of the high-frequency transformer.

[0015] Furthermore, the given value range includes five values: V1, nV2, V1+nV2, V1-nV2, and nV2-V1, where V1 and V2 are the primary input voltage and secondary output voltage of the high-frequency transformer in the DAB converter, respectively, and n is the turns ratio of the high-frequency transformer.

[0016] Furthermore, when the operating mode is buck mode, the transition phase duration is 0.5T, and the volt-second duration is S. x It consists of voltage vectors V1+nV2 and V1-nV2 in time sequence. The duration of voltage vector V1+nV2 is dT, and the duration of voltage vector V1-nV2 is 0.5T-dT, where d is:

[0017]

[0018] Where T is the switching period, d is the duration percentage, M is the voltage conversion ratio of the DAB converter, M = nV2 / V1, M ≤ 1, and d2 is the ratio of the power shift before the DAB converter reverses. * Compared to the outward shift after the power is reversed in the DAB converter.

[0019] Furthermore, when the operating mode is boost mode, the transition phase duration is 0.5T, and the volt-second duration is S. x It consists of voltage vectors V1+nV2 and nV2-V1 in time sequence. The duration of voltage vector V1+nV2 is dT, and the duration of voltage vector nV2-V1 is 0.5T-dT, where d is:

[0020]

[0021] Where T is the switching period, d is the duration percentage, M is the voltage conversion ratio of the DAB converter, M = nV2 / V1, M > 1, and d2 is the ratio of the power shift before the DAB converter reverses. * Compared to the outward shift after the power is reversed in the DAB converter.

[0022] Furthermore, an inductor is connected between the midpoints of the two bridge arms on the primary side of the high-frequency transformer in the DAB converter; the control of each switch of the DAB converter includes: controlling each switch of the DAB converter according to the operating mode of the DAB converter, so that the voltage across the inductor during the transition phase is consistent with the volt-second S. x The voltage vectors in the data remain consistent.

[0023] According to another aspect of the present invention, a DC bias suppression system for a DAB converter when the power is reversed is provided, comprising: a DAB converter and a controller, the controller being configured to perform the DC bias suppression method for the DAB converter when the power is reversed as described above, in order to control the DAB converter.

[0024] In summary, the above-described technical solutions conceived in this invention can achieve the following beneficial effects:

[0025] (1) A method for suppressing DC bias when power is reversed in a DAB converter is provided. Based on single-phase-shift modulation or dual-phase-shift modulation or triple-phase-shift modulation that meets the preset optimization target, multiple voltage vectors that meet the volt-second balance are inserted during the transition phase between power reversal. The DC bias when power is reversed is eliminated by controlling the magnitude and duration of each voltage vector (auxiliary shift ratio d). This method has low computational complexity, is applicable to different scenarios, does not involve complex methods such as table lookup, is simple, practical and low cost.

[0026] (2) A specific design under the goal of minimizing return power is given. During the transition process, only one auxiliary variable d needs to be introduced to eliminate the DC bias under power reversal. No other transition variables need to be introduced, and the control is simple. At the same time, the selection of voltage vector takes into account the generation sequence of the switching transistor drive pulse and the continuity before and after reversal, which effectively reduces the complexity of software implementation.

[0027] (3) A transition phase duration of 0.5T and containing only two voltage vector segments is given. x Under the premise of achieving the preset optimization goals and DC bias suppression, the DAB converter is protected from damage caused by frequent switching of switching transistors, thus ensuring the reliable operation of the DAB converter. Attached Figure Description

[0028] Figure 1 A flowchart of a DC bias suppression method for a DAB converter when the power is reversed, provided in an embodiment of the present invention;

[0029] Figure 2 This is a schematic diagram of the DAB converter topology provided in an embodiment of the present invention;

[0030] Figure 3 The basic waveform diagram of the dual phase-shift modulation of the DAB converter provided in the embodiment of the present invention;

[0031] Figure 4 The voltage and current waveforms of the inductor in the DAB converter when two voltage vectors are inserted are provided in an embodiment of the present invention.

[0032] Figure 5A , Figure 5B These are the voltage vector combinations corresponding to the buck mode and boost mode provided in the embodiments of the present invention;

[0033] Figure 6A , Figure 6B The effective regions of the DC bias suppression method provided in the embodiments of the present invention are analyzed under two different voltage drop levels.

[0034] Figure 7A , Figure 7BThe effective regions of the DC bias suppression method provided in the embodiments of the present invention are analyzed under two different boost levels. Detailed Implementation

[0035] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention. Furthermore, the technical features involved in the various embodiments of this invention described below can be combined with each other as long as they do not conflict with each other.

[0036] In this invention, the terms "first," "second," etc. (if present) in the invention and the accompanying drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0037] Figure 1 A flowchart illustrating the DC bias suppression method for a DAB converter during power reversal, provided in an embodiment of the present invention. (See also...) Figure 1 , combined Figures 2-7B The DC bias suppression method for the DAB converter when the power is reversed in this embodiment is described in detail. The method includes operations S1-S4.

[0038] The structure of a DAB converter is as follows: Figure 2 As shown, the circuit includes switching transistors Q1-Q8, inductor L, high-frequency transformer T, capacitor C1 and capacitor C2, and diodes connected in reverse parallel to each of the switching transistors Q1-Q8. The source of Q1 is connected to the drain of Q2 to form a bridge arm; the source of Q3 is connected to the drain of Q4 to form a bridge arm; the source of Q5 is connected to the drain of Q6 to form a bridge arm; the source of Q7 is connected to the drain of Q8 to form a bridge arm; the drain of Q1 is connected to the drain of Q3; the source of Q2 is connected to the source of Q4; the drain of Q5 is connected to the drain of Q7; the source of Q6 is connected to the source of Q8; the connection point of Q1 and Q2 is connected to one end of the primary side of the high-frequency transformer T through inductor L; the connection point of Q3 and Q4 is connected to the other end of the primary side of the high-frequency transformer T; the connection points of Q5 and Q6, and Q7 and Q8 are respectively connected to the two ends of the secondary side of the high-frequency transformer T; capacitor C1 is connected in parallel with the primary side bridge arm; capacitor C2 is connected in parallel with the secondary side bridge arm. Q1-Q4 form a primary side full bridge, and Q5-Q8 form a secondary side full bridge.

[0039] Operation S1 calculates the shift ratio before and after power reversal of the DAB converter; where, under single-phase-shift modulation, the shift ratio is the outer shift ratio; under dual-phase-shift modulation or triple-phase-shift modulation, the shift ratio includes the outer shift ratio and the inner shift ratio that satisfies the preset optimization target.

[0040] When the DAB converter uses single-phase-shift modulation, in operation S1, the external shift ratio before and after the power reversal of the DAB converter is directly calculated.

[0041] When the DAB converter uses dual phase-shift modulation, operation S1 specifically includes: calculating the outward shift ratio d2 before power reversal and the outward shift ratio d2 after power reversal. * Based on the operating mode of the DAB converter, calculate the inward shift ratio d1 before power reversal and the inward shift ratio d1 after power reversal, satisfying the preset optimization objective. * .

[0042] Specifically, d2 and d2 * The calculation process is as follows: before the power is reversed, the voltage reference signal V is used. ref The voltage error is obtained by subtracting the output voltage feedback V2. This voltage error, after passing through the voltage controller, yields the outward shift ratio d2 before power reversal. When power reversal occurs in the DAB converter, the outward shift ratio d2 after power reversal can be quickly obtained through feedforward control. * .

[0043] When the DAB converter uses three-phase-shift modulation, operation S1 specifically includes: calculating the outward shift ratio d2 before power reversal and the outward shift ratio d2 after power reversal. * Based on the operating mode of the DAB converter, calculate the inward shift ratio (including d1 and d3) before power reversal and the inward shift ratio (including d1) after power reversal, satisfying the preset optimization objective. * and d3 * ). d1 and d1 * The phase difference between Q1 and Q4, d2 and d2 * The phase difference between Q1 and Q5, d3 and d3 * This represents the phase difference between Q5 and Q8.

[0044] In this embodiment of the invention, the preset optimization objectives are to minimize the return current power, minimize the peak value of the inductor current in the DAB converter, or minimize the effective value of the inductor current in the DAB converter.

[0045] The turns ratio of the high-frequency transformer T is n:1. The voltage conversion ratio of the DAB converter is defined as M = nV2 / V1. When M < 1, the DAB converter operates in buck mode, and when M > 1, the DAB converter operates in boost mode.

[0046] When the DAB converter uses dual phase-shift modulation, and the preset optimization objective is to minimize the return current power, in operation S1, based on the operating mode of the DAB converter, d1 and d1' are calculated with the goal of minimizing the return current power. * .

[0047] See Figure 3 Integrating the voltage at the midpoint of the bridge arm in the shaded region and the inductor current, we can obtain the expression for the return power Q as follows:

[0048]

[0049] Finding the minimum value of Q under the constraint d1≤d2, we can obtain the condition for minimum return power when M<1: d1=d2; similarly, we can obtain the condition for minimum return power when M>1:

[0050]

[0051] After the power is reversed, the condition for minimizing return power remains the same. Therefore, when the preset optimization objective is to minimize return power, if the operating mode is buck mode, d1, d1 * They are respectively:

[0052] d1=d2

[0053] d1 * =d2 *

[0054] If the operating mode is boost mode, d1, d1 * They are respectively:

[0055]

[0056]

[0057] Where V1 and V2 are the primary input voltage and secondary output voltage of the high-frequency transformer in the DAB converter, respectively, and n is the turns ratio of the high-frequency transformer.

[0058] When the preset optimization objective is to minimize the peak inductor current in the DAB converter, in operation S1, based on the operating mode of the DAB converter, d1 and d1' are calculated with the goal of minimizing the peak inductor current in the DAB converter. * .

[0059] When the preset optimization objective is to minimize the effective value of the inductor current in the DAB converter, in operation S1, based on the operating mode of the DAB converter, d1 and d1' are calculated with the objective of minimizing the effective value of the inductor current in the DAB converter. * .

[0060] Operation S2 calculates the inductor volt-second S1 before power reversal and the inductor volt-second S2 after power reversal, based on the operating mode of the DAB converter.

[0061] Operation S3 sets the insertion volt-second S during the transition phase between power reversal and power reversal. x Among them, volt-second S x It consists of multiple voltage vectors. The amplitude and duration of each voltage vector are obtained as follows: the amplitude of each voltage vector is selected from a given range, and S1, S2, and S... x With volt-second balance as a constraint, the duration of action of each voltage vector is calculated based on the shift ratio and the magnitude of each voltage vector.

[0062] When the power reverses in the DAB converter, for example, before the power reverses, the power flows from the primary side to the secondary side, and after the power reverses, the power flows from the secondary side to the primary side. In this embodiment, the above-mentioned transition stage is inserted between the power reverse and the power reverse stage to suppress DC bias.

[0063] Optimizing the return power and soft switching in a DAB converter are contradictory; soft switching requires a certain amount of return power. Zero return power is precisely the boundary of soft switching. Considering the removal of the charge from the switching transistor capacitors, a margin should be appropriately reserved for d1 based on the above formula. This allows for both a relatively small return power and zero-voltage switching (ZVS) of all switching transistors in the DAB converter.

[0064] According to an embodiment of the present invention, the given value range includes five values: V1, nV2, V1+nV2, V1-nV2, and nV2-V1, where V1 and V2 are the primary input voltage and secondary output voltage of the high-frequency transformer in the DAB converter, respectively, and n is the turns ratio of the high-frequency transformer. It is only necessary to ensure the total volt-second area S of the voltage vector in the inserted volt-second intervals. X As long as the volt-second balance is satisfied.

[0065] To achieve the minimum return power optimization objective using dual-phase-shift modulation, with a transition phase duration of 0.5T, and when M≤1, two voltage vectors V1+nV2 and V1-nV2 are inserted. The duration of the first voltage vector V1+nV2 is dT, and the duration of the second voltage vector V1-nV2 is 0.5T-dT (e.g., ...). Figure 5A As shown), when M > 1, two voltage vectors V1 + nV2 and nV2 - V1 are inserted. The duration of the first voltage vector V1 + nV2 is dT, and the duration of the second voltage vector nV2 - V1 is 0.5T - dT (as shown). Figure 5B Taking the example shown below, we can illustrate the volt-second insertion process. At this time, the voltage and current of the inductor in the DAB converter are as follows: Figure 4 As shown.

[0066] Taking M≤1 as an example, derive the expression for d. Calculate the inductor volt-second values ​​S1 and S2 during the first half of the switching cycle, the first half of the switching cycle during the transition, and the second half of the switching cycle after the transition.x S2:

[0067]

[0068]

[0069]

[0070] The increase in inductance volt-seconds ΔS1 in the previous switching cycle, including the transition time, and the decrease in inductance volt-seconds ΔS2 in the next switching cycle are:

[0071] ΔS1=S x -S1

[0072] ΔS2=S x -S2

[0073] Therefore, eliminating the DC bias when the power of the DAB converter is reversed must satisfy the following:

[0074] ΔS1+ΔS2=0

[0075] The minimum return power modulation strategy for the DAB converter when M≤1 has been derived. Substituting it into the above formulas and simplifying, we can solve for:

[0076]

[0077] Similarly, when M > 1:

[0078]

[0079] Preferably, when the operating mode is buck mode, the transition phase duration is 0.5T, and the volt-second is composed of voltage vectors V1+nV2 and V1-nV2 in chronological order. The duration of voltage vector V1+nV2 is dT, and the duration of voltage vector V1-nV2 is 0.5T-dT, where d is:

[0080]

[0081] Where T is the switching period, d is the duration percentage, M is the voltage conversion ratio of the DAB converter, M=nV2 / V1, M≤1.

[0082] Preferably, when the operating mode is boost mode, the transition phase duration is 0.5T, and the volt-second is composed of voltage vectors V1+nV2 and nV2-V1 in chronological order. The duration of voltage vector V1+nV2 is dT, and the duration of voltage vector nV2-V1 is 0.5T-dT, where d is:

[0083]

[0084] Where d is the duration percentage, M is the voltage conversion ratio of the DAB converter, M = nV2 / V1, M > 1.

[0085] It should be noted that in this embodiment, other forms of volt-second S can also be inserted during the transition phase. x volt-second S x It can contain more voltage vector segments, as long as the sum of the volt-second areas of each voltage vector satisfies the volt-second balance constraint.

[0086] Operation S4, during the transition phase, controls each switch of the DAB converter according to the amplitude and duration of each voltage vector based on the operating mode of the DAB converter, in order to suppress DC bias when power is reversed.

[0087] An inductor is connected between the midpoints of the two bridge arms on the primary side of the DAB converter; the switching transistors of the DAB converter are controlled according to the operating mode of the DAB converter, so that the voltage across the inductor during the transition phase is consistent with the voltage vector in the volt-second.

[0088] Taking the working mode as buck mode, the transition phase duration as 0.5T, and the volt-second as 0.5T-dT, which is composed of voltage vectors V1+nV2 and V1-nV2 in time sequence, with the action time of voltage vector V1+nV2 being dT and the action time of voltage vector V1-nV2 being 0.5T-dT, the switching sequence and switching state during the transition process are as follows: Q1 and Q4 are always on, Q5 and Q8 lag behind Q1 and Q4 by a shift ratio of d, and the PWM signals of the same bridge arm are complementary.

[0089] Taking the working mode as boost mode, the transition phase duration as 0.5T, and the volt-second as 0.5T-dT, which is composed of voltage vectors V1+nV2 and nV2-V1 in time sequence, with the action time of voltage vector V1+nV2 being dT and the action time of voltage vector nV2-V1 being 0.5T-dT, the switching sequence and switching state during the transition process are as follows: Q6 and Q7 are always on, Q2 and Q3 lag behind Q6 and Q7 by a shift ratio of d, and the PWM signals of the same bridge arm are complementary.

[0090] The DC bias suppression method for DAB converters during power reversal proposed in this invention is closely related to the voltage conversion ratio M. It may cause the suppression strategy to fail at certain voltage conversion ratios. Therefore, it is necessary to analyze the effective region of this suppression strategy and clarify its boundaries for practical guidance. Analyzing with M ranging from 0.8 to 1.2, the regions where d > 0 can be plotted as shown in the gray shaded areas. Figure 6A (M=0.8) Figure 6B (M=0.9) Figure 7A (M=1.2) Figure 7B As shown in (M=1.1). The method achieves DC bias suppression across the entire power range under reverse power conditions when the DAB converter is in voltage matching mode (i.e., M=1). From Figures 6A-7B In the middle region, it can be observed that as M deviates from 1, the suppression strategy fails during the transition from light load to light load, and the failure area expands as M deviates further from 1. Considering that in actual operation, DAB converters generally operate with M=1 to ensure the soft-switching range, this method can achieve good DC bias suppression in voltage matching mode and near voltage matching mode.

[0091] The DC bias suppression method for DAB converters in this embodiment of the invention, based on dual-phase-shift modulation that meets a preset optimization target, eliminates DC bias by controlling the magnitude of the auxiliary phase shift ratio d. This method involves low computational complexity, does not involve complex methods such as table lookups, is simple and practical, and incurs no additional hardware costs. This method can also be extended to other phase-shift modulations (single-phase-shift modulation, three-phase-shift modulation) and other bidirectional DC / DC converters.

[0092] This invention also provides a DC bias suppression system for a DAB converter when the power is reversed, including a DAB converter and a controller. The structure of the DAB converter is as follows: Figure 2 As shown, the controller is used to execute the DC bias suppression method when the power of the DAB converter is reversed, so as to control the DAB converter and suppress the DC bias when the power of the DAB converter is reversed.

[0093] Those skilled in the art will readily understand that the above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for suppressing DC bias in a DAB converter when the power is reversed, characterized in that, include: Calculate the shift ratio before and after power reversal of the DAB converter; wherein, under single-phase-shift modulation, the shift ratio is the outer shift ratio; under dual-phase-shift modulation or triple-phase-shift modulation, the shift ratio includes the outer shift ratio and the inner shift ratio that satisfies the preset optimization target; Calculate the inductor volt-seconds before power reversal based on the operating mode of the DAB converter. S 1. Inductor volt-seconds after power reversal S 2; Set the insertion volt-second during the transition phase between power reversal and power reversal. S x , wherein the volt-second S x It consists of multiple voltage vectors. The amplitude and duration of each voltage vector are obtained by selecting the amplitude of each voltage vector from a given range, and simultaneously... S 1. S 2 and S x With volt-second balance as a constraint, the duration of action of each voltage vector is calculated based on the shift ratio and the magnitude of each voltage vector. During the transition phase, based on the operating mode of the DAB converter, the switching transistors of the DAB converter are controlled according to the amplitude and duration of each voltage vector to suppress DC bias when power is reversed. The given value range includes , , , , Five possible values, among which, , These are the primary input voltage and secondary output voltage of the high-frequency transformer in the DAB converter, respectively. The turns ratio of the high-frequency transformer; When the operating mode is buck mode, the transition phase duration is 0.5T, and the volt-second... S x From voltage vector and voltage vector Composed in chronological order, voltage vector The duration of action is dT, and the voltage vector... The duration of action is 0.5T-dT, where d is: Where T is the switching period. For the percentage of time spent, The voltage conversion ratio of the DAB converter is given. , d2 is the outward shift of the power of the DAB converter before power reversal, compared to d2 Compared to the outward shift after the power is reversed in the DAB converter.

2. The DC bias suppression method for DAB converter when power is reversed as described in claim 1, characterized in that, The preset optimization targets are to minimize the return power, minimize the peak value of the inductor current in the DAB converter, or minimize the effective value of the inductor current in the DAB converter.

3. The DC bias suppression method for DAB converter when power is reversed as described in claim 1, characterized in that, Under dual phase-shift modulation, the calculation of the shift ratio before and after power reversal of the DAB converter includes: Calculate the outward shift ratio d2 before power reversal and the outward shift ratio d2 after power reversal of the DAB converter. ; Based on the operating mode of the DAB converter, calculate the inward shift ratio d1 before power reversal and the inward shift ratio d1 after power reversal of the DAB converter, satisfying the preset optimization target. .

4. The DC bias suppression method for DAB converter power reversal as described in claim 3, characterized in that, When the preset optimization target is to minimize the return power: When the operating mode is buck mode, d1, d1 They are respectively: When the operating mode is boost mode, d1, d1 They are respectively: in, , These are the primary input voltage and secondary output voltage of the high-frequency transformer in the DAB converter, respectively. The turns ratio of the high-frequency transformer is given.

5. The DC bias suppression method for DAB converter when power is reversed as described in claim 1, characterized in that, When the operating mode is boost mode, the transition phase duration is 0.5T, and the volt-second... S x From voltage vector and voltage vector Composed in chronological order, voltage vector The duration of action is dT, and the voltage vector... The duration of action is 0.5T-dT, where d is: Where T is the switching period. For the percentage of time spent, The voltage conversion ratio of the DAB converter is given. , d2 is the outward shift of the power of the DAB converter before power reversal, compared to d2 Compared to the outward shift after the power is reversed in the DAB converter.

6. The DC bias suppression method for DAB converter when power is reversed as described in claim 1, characterized in that, An inductor is connected between the midpoints of the two bridge arms on the primary side of the DAB converter; the switching transistors controlling the DAB converter include: The switching transistors of the DAB converter are controlled according to the operating mode of the DAB converter, so that the voltage across the inductor during the transition phase is equal to the volt-second value. S x The voltage vectors in the data remain consistent.

7. A DC bias suppression system for a DAB converter when the power is reversed, characterized in that, include: A DAB converter and a controller, the controller being configured to perform a DC bias suppression method for reverse power of the DAB converter as described in any one of claims 1-6, to control the DAB converter.

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