Method, device, system and equipment for analyzing operation status of lightning arrester and medium

Abstract

The application discloses a lightning arrester operation condition analysis method, device, system, equipment and medium, and technical points are as follows: step 1, current signals of leakage currents of the lightning arrester are collected; step 2, the current signals are preprocessed to obtain corresponding current data; step 3, fast Fourier transform is performed on the current data to obtain fundamental wave data corresponding to the current signals and each harmonic data corresponding to the current signals; and step 4, the fundamental wave data and each harmonic data are compared with corresponding preset reference values to obtain corresponding comparison results, and first operation conditions of the lightning arrester are judged according to the comparison results, so that the problem of measurement error caused by unreasonable synchronous setting can be prevented without introducing synchronous detection voltage, and measurement accuracy is improved.

Description

Technical Field

[0001] This invention belongs to the field of surge arrester monitoring technology, specifically relating to a surge arrester operation status analysis method, device, system, equipment, and medium. Background Technology

[0002] Existing surge arresters include metal oxide surge arresters, such as zinc oxide surge arresters. As protective devices for electrical equipment in power systems against lightning strikes or operational overvoltages, metal oxide surge arresters mainly consist of metal oxide varistors connected in series. However, after long-term operation under pressure, the nonlinear resistance characteristics of the metal oxide varistors will fail due to aging. Once a metal oxide surge arrester fails, it will directly affect the safe operation of the power system.

[0003] To ensure the safe and stable operation of the power system and to understand the operating status of surge arresters in a timely manner, engineering applications typically employ methods such as the full current method, capacitor current compensation method, resistive current third harmonic method, and voltage synchronization waveform analysis method to measure the leakage current of surge arresters. By analyzing the leakage current of surge arresters, their operating status can be understood.

[0004] However, the total current method suffers from low sensitivity because the resistive current accounts for a very small proportion of the total current. Even if the resistive current increases significantly, the change in the total current is not obvious, making it difficult to detect early defects in the surge arrester. The capacitive current compensation method suffers from large measurement errors due to the significant influence of phase-to-phase interference and voltage harmonics. The resistive current third harmonic method affects the reliability of the measurement because the bus voltage usually contains obvious third harmonics in actual measurements. Compared with the above methods, the voltage synchronization waveform analysis method uses Fourier transform to perform harmonic analysis on the synchronously detected voltage and current signals, obtaining the amplitude and phase angle of each harmonic of the voltage and resistive current, and then calculating the active and reactive components of each harmonic. Currently, the analysis and processing of the 1st, 3rd, 5th, and 7th harmonics are more commonly used. It can effectively measure the fundamental and higher harmonic components of the resistive current and can more accurately determine the operating status and performance degradation of the metal oxide surge arrester. However, this method requires the introduction of synchronous detection voltage, and measurement errors may occur due to unreasonable synchronization settings. Summary of the Invention

[0005] The purpose of this invention is to provide a method, device, system, equipment, and medium for analyzing the operating status of surge arresters. This eliminates the need for a synchronous detection voltage, preventing measurement errors caused by improper synchronization settings and thus improving measurement accuracy.

[0006] The first aspect of this invention discloses a method for analyzing the operating status of surge arresters, comprising:

[0007] Step 1: Collect the leakage current signal of the surge arrester;

[0008] Step 2: Preprocess the current signal to obtain the corresponding current data;

[0009] Step 3: Perform a Fast Fourier Transform on the current data to obtain the fundamental frequency data and the harmonic data corresponding to the current signal.

[0010] Step 4: Compare the fundamental wave data and each harmonic data with the corresponding preset reference values ​​to obtain the corresponding comparison results, and determine the first operating status of the surge arrester based on the comparison results.

[0011] Optionally, the step of comparing the fundamental wave data and each harmonic data with the corresponding preset reference value to obtain the corresponding comparison result, and determining the first operating state of the surge arrester based on the comparison result, includes:

[0012] The fundamental wave data and each harmonic data are compared with the corresponding first preset reference value to obtain the corresponding first comparison result;

[0013] If the first comparison result is that the fundamental wave data or any harmonic data exceeds the first preset threshold of the corresponding first preset reference value, then the operation of the surge arrester is determined to be abnormal.

[0014] Optionally, the step of comparing the fundamental wave data and each harmonic data with the corresponding preset reference value to obtain the corresponding comparison result, and determining the first operating state of the surge arrester based on the comparison result, includes:

[0015] The phase difference between the fundamental wave and each harmonic wave is calculated based on the fundamental wave data and each harmonic wave data. The phase difference between the fundamental wave and each harmonic wave is compared with the corresponding second preset reference value to obtain the corresponding second comparison result.

[0016] If the second comparison result shows that the phase difference between the fundamental wave and any harmonic exceeds the second preset threshold of the corresponding second preset reference value, then the operation of the surge arrester is determined to be abnormal.

[0017] Optionally, after performing a fast Fourier transform on the current data to obtain the fundamental frequency data and the harmonic data corresponding to the current signal, the method further includes:

[0018] The resistive current value of the surge arrester is calculated according to the resistive current calculation formula, which is as follows:

[0019]

[0020] Wherein, the I r The I value is the resistive current value. bI3 represents the fundamental amplitude in the fundamental frequency data, where n is a positive odd number with a minimum value of 3 and a maximum value of 27. I3 represents the amplitude of the third harmonic in the harmonic data. n The amplitude of the nth harmonic in the harmonic data;

[0021] The second operating condition of the surge arrester is determined based on the resistive current value.

[0022] Optionally, the step of preprocessing the current signal to obtain the corresponding current data includes:

[0023] The current signal is converted into a voltage signal using a current sampling circuit. The voltage signal is then converted from analog to digital to obtain data representing the current signal, which is used as current data.

[0024] Optionally, the surge arrester operation status analysis method further includes:

[0025] By repeatedly executing steps 1-4, the operating status of the surge arrester corresponding to multiple current signals can be obtained.

[0026] Determine whether the number of times the surge arrester operates abnormally among multiple surge arrester operating conditions reaches a third preset threshold. If so, determine that the overall operating condition of the surge arrester is abnormal.

[0027] Optionally, before acquiring the current signal of the leakage current of the surge arrester, the method further includes:

[0028] The operating power of the surge arrester detection and analysis system;

[0029] Determine if the operating power is normal. If yes, proceed to step 1. If no, start the sleep mode. If the sleep mode runs for a preset time, turn off the sleep mode and return to the step of analyzing the operating power of the surge arrester operation status analysis system.

[0030] A second aspect of the present invention discloses a surge arrester operation status analysis device, comprising: a lightning protection circuit, a current sampling circuit, an ammeter circuit, a power management circuit, a microprocessor, and a wireless communication module; the input terminals of the lightning protection circuit and the current sampling circuit are both connected to the low-voltage terminal of the surge arrester, the output terminal of the lightning protection circuit is connected to the ground terminal, the first output terminal of the current sampling circuit is connected to the input terminal of the ammeter circuit, the second output terminal of the current sampling circuit is connected to the microprocessor, the first output terminal of the ammeter circuit is connected to the ground terminal, the second output terminal of the ammeter circuit is connected to the input terminal of the power management circuit, the output terminal of the power management circuit is connected to the wireless communication module and the microprocessor, the wireless communication module is connected to the microprocessor, and the microprocessor is used to execute the steps of the method according to any one of claims 1 to 7.

[0031] A third aspect of this invention discloses a surge arrester operation status analysis system, comprising:

[0032] The current acquisition module is used to acquire the current signal of the leakage current of the surge arrester;

[0033] A current preprocessing module is used to preprocess the current signal to obtain corresponding current data;

[0034] The Fourier transform module is used to perform fast Fourier transform calculations on the current data to obtain the fundamental wave data and the harmonic data corresponding to the current signal.

[0035] The operation status judgment module is used to compare the fundamental wave data and each harmonic data with the corresponding preset reference value to obtain the corresponding comparison result, and judge the first operation status of the surge arrester based on the comparison result.

[0036] A fourth aspect of the present invention discloses a computer device, including a memory and a processor, wherein the memory stores a computer program and the processor executes the computer program to implement the steps of the above-described method.

[0037] The fifth aspect of the present invention discloses a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the above-described method.

[0038] The technical solution provided by this invention has the following advantages and effects: by collecting the leakage current signal, preprocessing the leakage current to obtain current data, and then performing a fast Fourier transform to obtain the fundamental wave data and harmonic data of the current signal, the fundamental wave data and harmonic data are compared with the corresponding preset reference values ​​to obtain the corresponding comparison results, and the first operating status of the surge arrester is determined based on the comparison results. There is no need to introduce a synchronous detection voltage, which prevents measurement errors caused by unreasonable synchronization settings, thereby improving measurement accuracy. Attached Figure Description

[0039] Figure 1 This is a flowchart illustrating the surge arrester operation status analysis method disclosed in an embodiment of the present invention;

[0040] Figure 2 This is a leakage current waveform diagram disclosed in an embodiment of the present invention when the grid voltage is 15kV;

[0041] Figure 3 This is a circuit block diagram of the surge arrester operation status analysis device disclosed in the embodiments of the present invention;

[0042] Figure 4 This is a framework diagram of the surge arrester operation status analysis program disclosed in the embodiments of the present invention;

[0043] Figure 5 This is a structural block diagram of the surge arrester operation status analysis system disclosed in the embodiments of the present invention;

[0044] Figure 6 This is an internal structural diagram of the computer device disclosed in an embodiment of the present invention.

[0045] Explanation of reference numerals in the attached figures:

[0046] 10. Lightning protection circuit; 20. Current sampling circuit; 30. Ammeter circuit; 40. Power management circuit; 50. Microprocessor; 60. Wireless communication module. Detailed Implementation

[0047] To facilitate understanding of the present invention, specific embodiments of the present invention will be described in more detail below with reference to the accompanying drawings.

[0048] Unless otherwise specified or defined, the terms "first," "second," etc., used in this document are for distinguishing names only and do not represent a specific number or order.

[0049] Unless otherwise stated or defined, the term “and / or” as used herein includes any and all combinations of one or more of the associated listed items.

[0050] It should be noted that in this article, "fixed to" or "connected to" can mean directly fixed to or connected to a component, or indirectly fixed to or connected to a component.

[0051] like Figure 1 As shown in the figure, an embodiment of the present invention discloses a method for analyzing the operating status of a surge arrester, including:

[0052] Step 1: Acquire the leakage current signal of the surge arrester. Specifically, the surge arrester is a metal oxide arrester (MOA). In this embodiment, the metal oxide arrester is a zinc oxide arrester. The leakage current signal of the surge arrester is acquired by connecting to the low-voltage terminal interface of the surge arrester.

[0053] In practical applications, before acquiring the current signal flowing through the surge arrester, the following steps are also included:

[0054] The operating power of the surge arrester operation status analysis device;

[0055] Determine if the operating power is normal. If yes, proceed to step 1. If no, start the sleep mode. If the sleep mode runs for a preset time, turn off the sleep mode and return to the step of analyzing the operating power of the surge arrester.

[0056] Specifically, if a power threshold is set, it is determined whether the working power is higher than the power threshold. If so, the working power is considered normal and sufficient to support the surge arrester operation status analysis device in performing the surge arrester operation status analysis method. If not, the working power is considered abnormal and a sleep mode needs to be activated. In the sleep mode, the surge arrester operation status analysis device is charged. When the sleep mode operation time reaches a preset time, that is, after charging the surge arrester operation status analysis device for a preset time, and the working power is sufficient to support the surge arrester operation status analysis device in performing the surge arrester operation status analysis method, the sleep mode is deactivated, and the process returns to the step of detecting the working power of the surge arrester operation status analysis device. By detecting the working power of the surge arrester operation status analysis device, it is determined whether the working power is normal, which can prevent the analysis of the surge arrester operation status from being affected due to insufficient working power.

[0057] Step 2: Preprocess the current signal to obtain the corresponding current data.

[0058] Specifically, the preprocessing of the current signal to obtain the corresponding current data includes:

[0059] The current signal is converted into a voltage signal using a current sampling circuit. The voltage signal is then converted from analog to digital to obtain data representing the current signal, which is used as current data.

[0060] In practical applications, the current sampling circuit can adopt existing current sampling circuit technologies. A current sampling circuit typically includes a current sensor, a signal conditioning circuit, and an analog-to-digital converter (ADC). It converts the current signal into a voltage signal, amplifies, filters, and linearizes the signal, ultimately outputting a digitized current value. The current sensor converts the current in the circuit into a voltage signal. Depending on the application scenario and current range, the current sensor can be a Hall effect sensor, a resistive sensor, or a mutual inductance sensor. The signal conditioning circuit mainly converts the low-level voltage signal output by the current sensor into a voltage range suitable for the ADC. During this process, the signal conditioning circuit also amplifies, filters, and linearizes the voltage signal to ensure the accuracy and reliability of the current sampling circuit. The ADC converts the analog voltage signal processed by the signal conditioning circuit into a digital signal, i.e., obtains the digitized current value. As current data, the digital signal can be further analyzed and processed by processors such as microprocessors and single-chip microcomputers, for purposes such as real-time monitoring, fault diagnosis, and data storage.

[0061] Step 3: Perform a Fast Fourier Transform on the current data to obtain the fundamental frequency data and the harmonic data corresponding to the current signal.

[0062] In practical applications, after obtaining the current data, a fast Fourier transform can be performed on a random segment of the current data to obtain the fundamental wave data and the harmonic data corresponding to the current signal. The fundamental wave data includes the fundamental wave amplitude, fundamental wave frequency and fundamental wave phase, and the harmonic data includes the harmonic amplitude, harmonic frequency and harmonic phase.

[0063] Step 4: Compare the fundamental wave data and each harmonic data with the corresponding preset reference values ​​to obtain the corresponding comparison results, and determine the first operating status of the surge arrester based on the comparison results.

[0064] Specifically, the step of comparing the fundamental wave data and each harmonic data with the corresponding preset reference value to obtain the corresponding comparison result, and determining the first operating state of the surge arrester based on the comparison result, includes:

[0065] The fundamental wave data and each harmonic data are compared with the corresponding first preset reference value to obtain the corresponding first comparison result;

[0066] The phase difference between the fundamental wave and each harmonic wave is calculated based on the fundamental wave data and each harmonic wave data. The phase difference between the fundamental wave and each harmonic wave is compared with the corresponding second preset reference value to obtain the corresponding second comparison result.

[0067] If the first comparison result is that the fundamental wave data or any harmonic data exceeds the first preset threshold of the corresponding first preset reference value, or if the second comparison result is that the phase difference between the fundamental wave and any harmonic exceeds the second preset threshold of the corresponding second preset reference value, then the operation of the surge arrester is determined to be abnormal.

[0068] In practical applications, the grid voltage acts on the surge arrester. Due to the nonlinear resistance characteristics of the surge arrester, a current sampling voltage with harmonics is generated, as shown in the waveform. Figure 2 As shown, Figure 2The waveforms are obtained under conditions where there is no harmonic interference or interphase interference in the power grid. When the nonlinear resistance characteristics of the surge arrester remain unchanged, the fundamental and harmonic frequencies, amplitudes, and phase differences of the waveforms obtained in each sampling should be the same. When the surge arrester operation status analysis device is in use, a scenario with the worst-case harmonic interference and the worst-case interphase interference is simulated without affecting the power grid operation. Under this scenario, the normal fundamental and harmonic data of the waveform corresponding to the leakage current of the surge arrester with unchanged nonlinear resistance characteristics are set as the corresponding first preset reference values. The phase differences of the normal fundamental and normal harmonics of the waveform corresponding to the leakage current of the surge arrester with unchanged nonlinear resistance characteristics are set as the corresponding second preset reference values. The fundamental data is compared with the corresponding first preset reference values. This involves comparing the fundamental amplitude of the current signal with the fundamental amplitude in normal fundamental frequency data; comparing the fundamental frequency of the current signal with the fundamental frequency in normal fundamental frequency data; comparing the amplitudes of each harmonic of the current signal with the corresponding harmonic amplitudes in normal fundamental frequency data (e.g., comparing the amplitude of the 3rd harmonic of the current signal with the amplitude of the 3rd harmonic in normal fundamental frequency data); and comparing the frequencies of each harmonic of the current signal with the corresponding frequencies in normal fundamental frequency data (e.g., comparing the frequency of the 5th harmonic of the current signal with the frequency of the 5th harmonic in normal fundamental frequency data). If any of the first comparison results is a fundamental wave data or a harmonic data corresponding to the current signal exceeding a first preset threshold value (in this embodiment, the first preset threshold is 10%), and the amplitude of the third harmonic corresponding to the current signal exceeds 10% of the amplitude of the third harmonic in the normal fundamental wave data, then the operation of the surge arrester is determined to be abnormal. Furthermore, the phase difference between the fundamental wave and each harmonic corresponding to the current signal can be calculated based on the phase of the fundamental wave and the phase of each harmonic, and the phase difference between the fundamental wave and each harmonic corresponding to the current signal can be calculated. The difference is compared with the corresponding second preset reference value. For example, the phase difference between the fundamental wave and the third harmonic of the current signal is compared with the phase difference between the normal fundamental wave and the normal third harmonic to obtain multiple second comparison results. Among all the second comparison results, if any second comparison result is that the phase difference between the fundamental wave and any harmonic of the current signal exceeds the second preset threshold of the corresponding second preset reference value, in this embodiment, the second preset threshold is 20%. If the phase difference between the fundamental wave and the third harmonic of the current signal exceeds 20% of the phase difference between the normal fundamental wave and the normal third harmonic, then the operation of the surge arrester is determined to be abnormal.

[0069] Furthermore, after performing a fast Fourier transform on the current data to obtain the fundamental frequency data and the harmonic data corresponding to the current signal, the method further includes:

[0070] The resistive current value of the surge arrester is calculated according to the resistive current calculation formula, which is as follows:

[0071]

[0072] Wherein, the I r The I value is the resistive current value. b I3 represents the fundamental amplitude in the fundamental frequency data, where n is a positive odd number with a minimum value of 3 and a maximum value of 27. I3 represents the amplitude of the third harmonic in the harmonic data. n This represents the amplitude of the nth harmonic in the harmonic data.

[0073] In practical applications, the capacitive impedance of a surge arrester does not change much within the operating temperature range. Therefore, the capacitive current in the fundamental frequency remains basically unchanged. Only the fundamental frequency current value changes due to the change in resistive resistance of the surge arrester as it ages. Therefore, the resistive current value can be calculated based on the amplitude of the fundamental frequency and each harmonic. The resistive current value of the leakage current can be calculated using the resistive current calculation formula. The magnitude of the resistive current value can also reflect the operating status of the surge arrester. If the resistive current value is compared with the resistive current reference value, and the resistive current value exceeds the resistive current reference value, then the operating status of the surge arrester is determined to be abnormal.

[0074] Furthermore, the surge arrester operation status analysis method also includes:

[0075] Step 5: Repeat steps 1-4 multiple times to obtain the arrester operating status corresponding to multiple current signals;

[0076] Step 6: Determine whether the number of times the surge arrester operates abnormally among multiple surge arrester operating conditions has reached the third preset threshold. If yes, proceed to step 7; otherwise, proceed to step 8.

[0077] Step 7: Determine that the overall operating status of the surge arrester is abnormal;

[0078] Step 8: The overall operating status of the surge arrester is determined to be normal.

[0079] In this embodiment, steps 1-4 are executed multiple times to obtain multiple current signals flowing through the surge arrester at different times, as well as the surge arrester operating status corresponding to the multiple current signals. Analyzing the surge arrester operating status corresponding to the multiple current signals can further determine the overall operating status of the surge arrester and prevent incorrect analysis of the surge arrester due to power grid interference. For example, if the number of executions of steps 1-4 is 10 and the third preset threshold is set to 3, the surge arrester operating status corresponding to 10 current signals is obtained. If more than 3 surge arrester operating statuses are abnormal, the overall operating status of the surge arrester is determined to be abnormal. If no more than 3 surge arrester operating statuses are abnormal, the overall operating status of the surge arrester is determined to be normal.

[0080] Furthermore, after obtaining the operating status of the surge arrester, it can also upload the operating status of the surge arrester and the fundamental wave data and harmonic data corresponding to the current signal to the back-end, so that the back-end staff can understand the operating status of the surge arrester in a timely manner. It can also upload the comprehensive operating status of the surge arrester to the back-end, so that the back-end staff can carry out timely maintenance when the comprehensive operating status of the surge arrester is abnormal.

[0081] This invention discloses a method for analyzing the operating status of a surge arrester. The method involves acquiring leakage current signals, preprocessing the leakage current to obtain current data, performing a Fast Fourier Transform to obtain the fundamental and harmonic data of the current signal, comparing the fundamental and harmonic data with corresponding preset reference values ​​to obtain comparison results, and determining the first operating status of the surge arrester based on the comparison results. This method eliminates the need for a synchronous detection voltage, preventing measurement errors caused by unreasonable synchronization settings.

[0082] like Figure 3 As shown in the figure, this embodiment of the invention also discloses a surge arrester operation status analysis device, including: a lightning protection circuit 10, a current sampling circuit 20, an ammeter circuit 30, a power management circuit 40, a microprocessor 50, and a wireless communication module 60; the input terminals of the lightning protection circuit 10 and the current sampling circuit 20 are both connected to the low-voltage terminal of the surge arrester, the output terminal of the lightning protection circuit 10 is connected to the ground terminal, the first output terminal of the current sampling circuit 20 is connected to the input terminal of the ammeter circuit, the second output terminal of the current sampling circuit 20 is connected to the microprocessor, the first output terminal of the ammeter circuit 30 is connected to the ground terminal, the second output terminal of the ammeter circuit 30 is connected to the input terminal of the power management circuit 40, the output terminal of the power management circuit 40 is connected to the wireless communication module 60 and the microprocessor 50, the wireless communication module 60 is connected to the microprocessor 50, and the microprocessor 50 executes the computer program to implement the steps of the above-mentioned surge arrester operation status analysis method.

[0083] In this embodiment, the wireless communication module 60 can be a LoRa module, connected to the low-voltage end of the surge arrester and the current sampling circuit 20 via the low-voltage end interface of the surge arrester, and also connected to the low-voltage end interface of the surge arrester and the lightning protection circuit 10. In the absence of a lightning strike, the leakage current flows from the low-voltage end of the surge arrester into the current sampling circuit 20. The current sampling circuit 20 converts the leakage current signal into current data, and then transmits the current data to the microprocessor 50. The microprocessor 50 has a surge arrester operation status analysis program programmed on it. This program executes the aforementioned surge arrester operation status analysis method to process the current data, obtaining the fundamental wave data and harmonic data corresponding to the leakage current signal, as well as the surge arrester's operation status and overall operation status. Then, the wireless communication module 60 uploads the fundamental wave data and harmonic data corresponding to the leakage current signal, along with the surge arrester's operation status and overall operation status, to the backend. This system enables remote and timely monitoring of the surge arrester's operating status, avoiding the time-consuming and laborious task of manual on-site meter reading. The leakage current, after passing through the current sampling circuit 20, flows into the ammeter circuit 30. The ammeter in the ammeter circuit 30 indicates the actual leakage current magnitude, preserving the function of directly observing the surge arrester's operating status on-site, further ensuring the surge arrester's optimal performance. The input terminal of the power management circuit 40 is connected to the output terminal of the ammeter circuit, allowing the power management circuit 40 to obtain power from the leakage current. The output terminal of the power management circuit 40 is connected to the wireless communication module 60 and the microprocessor 50, providing power to them. Furthermore, the power management circuit 40 can detect the operating power of the surge arrester's operating status analysis device. The lightning protection circuit 10 protects the current sampling circuit 20, ammeter circuit 30, power management circuit 40, microprocessor 50, and wireless communication module 60 from damage caused by lightning current.

[0084] In this embodiment, as Figure 4 As shown, the surge arrester operation status analysis program includes: a hardware layer, a driver layer, a front-end program, and a back-end program. The hardware layer includes: a JTAG interface, a FLASH memory, an I2C-RTC interface, an SD24 module, a GPIO interface, and a UART serial port. The driver layer includes a board-level support package and driver modules, which realize the conversion of circuit signals from the hardware layer into digital information, or the conversion of digital information from the hardware layer into circuit signals. The front-end program includes: an analog-to-digital conversion interrupt program, a real-time clock interrupt service program, a lightning strike exception interrupt program, and an asynchronous communication interrupt program, which further process the digital information from the driver layer or transmit the digital information to the driver layer. The back-end program includes: a leakage current calculation module, used to execute the surge arrester operation status analysis method, a log / data management program module, and a remote communication program module.

[0085] like Figure 5As shown in the figure, this invention also discloses a surge arrester operation status analysis system, including:

[0086] The current acquisition module 100 is used to acquire the current signal of the leakage current of the surge arrester;

[0087] The current preprocessing module 200 is used to preprocess the current signal to obtain the corresponding current data;

[0088] The Fourier transform module 300 is used to perform fast Fourier transform calculation on the current data to obtain the fundamental wave data and the harmonic data corresponding to the current signal.

[0089] The operation status judgment module 400 is used to compare the fundamental wave data and each harmonic data with the corresponding preset reference value to obtain the corresponding comparison result, and judge the first operation status of the surge arrester based on the comparison result.

[0090] For the specific structure of the surge arrester operation status analysis system, please refer to the above description of the surge arrester operation status analysis method; it will not be repeated here. Each module of the aforementioned surge arrester operation status analysis system can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in the processor of a computer device in hardware form or independent of it, or they can be stored in the memory of a computer device in software form, so that the processor can call and execute the corresponding operations of each module.

[0091] In one embodiment, a computer device is provided, which may be a server, and its internal structure diagram may be as follows: Figure 6 As shown, the computer device includes a processor, memory, network interface, and database connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system, computer programs, and database. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The network interface is used for communication with external terminals via a network connection. When the computer program is executed by the processor, it implements a method for analyzing the operating status of a surge arrester.

[0092] Those skilled in the art will understand that Figure 6 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a configuration of the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0093] In one embodiment, a computer device is provided, including a memory and a processor, the memory storing a computer program, the processor executing the computer program to perform the following steps:

[0094] Step 1: Collect the leakage current signal of the surge arrester;

[0095] Step 2: Preprocess the current signal to obtain the corresponding current data;

[0096] Step 3: Perform a Fast Fourier Transform on the current data to obtain the fundamental frequency data and the harmonic data corresponding to the current signal.

[0097] Step 4: Compare the fundamental wave data and each harmonic data with the corresponding preset reference values ​​to obtain the corresponding comparison results, and determine the first operating status of the surge arrester based on the comparison results.

[0098] In one embodiment, comparing the fundamental wave data and each harmonic data with corresponding preset reference values ​​to obtain corresponding comparison results, and determining the first operating state of the surge arrester based on the comparison results, includes:

[0099] The fundamental wave data and each harmonic data are compared with the corresponding first preset reference value to obtain the corresponding first comparison result;

[0100] If the first comparison result is that the fundamental wave data or any harmonic data exceeds the first preset threshold of the corresponding first preset reference value, then the operation of the surge arrester is determined to be abnormal.

[0101] In one embodiment, comparing the fundamental wave data and each harmonic data with corresponding preset reference values ​​to obtain corresponding comparison results, and determining the first operating state of the surge arrester based on the comparison results, includes:

[0102] The phase difference between the fundamental wave and each harmonic wave is calculated based on the fundamental wave data and each harmonic wave data. The phase difference between the fundamental wave and each harmonic wave is compared with the corresponding second preset reference value to obtain the corresponding second comparison result.

[0103] If the second comparison result shows that the phase difference between the fundamental wave and any harmonic exceeds the second preset threshold of the corresponding second preset reference value, then the operation of the surge arrester is determined to be abnormal.

[0104] In one embodiment, after performing a fast Fourier transform on the current data to obtain the fundamental frequency data and the harmonic data corresponding to the current signal, the method further includes:

[0105] The resistive current value of the surge arrester is calculated according to the resistive current calculation formula, which is as follows:

[0106]

[0107] Wherein, the I r The I value is the resistive current value. b I3 represents the fundamental amplitude in the fundamental frequency data, where n is a positive odd number with a minimum value of 3 and a maximum value of 27. I3 represents the amplitude of the third harmonic in the harmonic data. n The amplitude of the nth harmonic in the harmonic data;

[0108] The second operating condition of the surge arrester is determined based on the resistive current value.

[0109] In one embodiment, preprocessing the current signal to obtain corresponding current data includes:

[0110] The current signal is converted into a voltage signal using a current sampling circuit. The voltage signal is then converted from analog to digital to obtain data representing the current signal, which is used as current data.

[0111] In one embodiment, the surge arrester operation status analysis method further includes:

[0112] By repeatedly executing steps 1-4, the operating status of the surge arrester corresponding to multiple current signals can be obtained.

[0113] Determine whether the number of times the surge arrester operates abnormally among multiple surge arrester operating conditions reaches a third preset threshold. If so, determine that the overall operating condition of the surge arrester is abnormal.

[0114] In one embodiment, before acquiring the current signal of the leakage current of the surge arrester, the method further includes:

[0115] The operating power of the surge arrester detection and analysis system;

[0116] Determine if the operating power is normal. If yes, proceed to step 1. If no, start the sleep mode. If the sleep mode runs for a preset time, turn off the sleep mode and return to the step of analyzing the operating power of the surge arrester operation status analysis system.

[0117] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon, the computer program performing the following steps when executed by a processor:

[0118] Step 1: Collect the leakage current signal of the surge arrester;

[0119] Step 2: Preprocess the current signal to obtain the corresponding current data;

[0120] Step 3: Perform a Fast Fourier Transform on the current data to obtain the fundamental frequency data and the harmonic data corresponding to the current signal.

[0121] Step 4: Compare the fundamental wave data and each harmonic data with the corresponding preset reference values ​​to obtain the corresponding comparison results, and determine the first operating status of the surge arrester based on the comparison results.

[0122] In one embodiment, comparing the fundamental wave data and each harmonic data with corresponding preset reference values ​​to obtain corresponding comparison results, and determining the first operating state of the surge arrester based on the comparison results, includes:

[0123] The fundamental wave data and each harmonic data are compared with the corresponding first preset reference value to obtain the corresponding first comparison result;

[0124] If the first comparison result is that the fundamental wave data or any harmonic data exceeds the first preset threshold of the corresponding first preset reference value, then the operation of the surge arrester is determined to be abnormal.

[0125] In one embodiment, comparing the fundamental wave data and each harmonic data with corresponding preset reference values ​​to obtain corresponding comparison results, and determining the first operating state of the surge arrester based on the comparison results, includes:

[0126] The phase difference between the fundamental wave and each harmonic wave is calculated based on the fundamental wave data and each harmonic wave data. The phase difference between the fundamental wave and each harmonic wave is compared with the corresponding second preset reference value to obtain the corresponding second comparison result.

[0127] If the second comparison result shows that the phase difference between the fundamental wave and any harmonic exceeds the second preset threshold of the corresponding second preset reference value, then the operation of the surge arrester is determined to be abnormal.

[0128] In one embodiment, after performing a fast Fourier transform on the current data to obtain the fundamental frequency data and the harmonic data corresponding to the current signal, the method further includes:

[0129] The resistive current value of the surge arrester is calculated according to the resistive current calculation formula, which is as follows:

[0130]

[0131] Wherein, the I r The I value is the resistive current value. bI3 represents the fundamental amplitude in the fundamental frequency data, where n is a positive odd number with a minimum value of 3 and a maximum value of 27. I3 represents the amplitude of the third harmonic in the harmonic data. n The amplitude of the nth harmonic in the harmonic data;

[0132] The second operating condition of the surge arrester is determined based on the resistive current value.

[0133] In one embodiment, preprocessing the current signal to obtain corresponding current data includes:

[0134] The current signal is converted into a voltage signal using a current sampling circuit. The voltage signal is then converted from analog to digital to obtain data representing the current signal, which is used as current data.

[0135] In one embodiment, the surge arrester operation status analysis method further includes:

[0136] By repeatedly executing steps 1-4, the operating status of the surge arrester corresponding to multiple current signals can be obtained.

[0137] Determine whether the number of times the surge arrester operates abnormally among multiple surge arrester operating conditions reaches a third preset threshold. If so, determine that the overall operating condition of the surge arrester is abnormal.

[0138] In one embodiment, before acquiring the current signal of the leakage current of the surge arrester, the method further includes:

[0139] The operating power of the surge arrester detection and analysis system;

[0140] Determine if the operating power is normal. If yes, proceed to step 1. If no, start the sleep mode. If the sleep mode runs for a preset time, turn off the sleep mode and return to the step of analyzing the operating power of the surge arrester operation status analysis system.

[0141] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), Rambus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

[0142] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

Claims

1. A method for analyzing the operating status of surge arresters, characterized in that, include: Step 1: Collect the leakage current signal of the surge arrester; Step 2: Preprocess the current signal to obtain the corresponding current data; Step 3: Calculate the fundamental frequency data and harmonic data of the current signal by performing a fast Fourier transform based solely on the current data. Step 4: Compare the fundamental wave data and harmonic data with the corresponding preset reference values ​​to obtain the corresponding comparison results. Determine the first operating condition of the surge arrester based on the comparison results. Without affecting the operation of the power grid, simulate a situation with the worst harmonic interference and the worst phase-to-phase interference. In this case, set the normal fundamental wave data and normal harmonic data of the waveform corresponding to the leakage current of the surge arrester whose nonlinear resistance characteristics have not changed as the preset reference values, or set the phase difference between the normal fundamental wave and the normal harmonic waves of the waveform corresponding to the leakage current as the preset reference values.

2. The surge arrester operation status analysis method as described in claim 1, characterized in that, The step of comparing the fundamental wave data and each harmonic data with the corresponding preset reference value to obtain the corresponding comparison result, and determining the first operating state of the surge arrester based on the comparison result, includes: The fundamental wave data and each harmonic data are compared with the corresponding first preset reference value to obtain the corresponding first comparison result; If the first comparison result is that the fundamental wave data or any harmonic data exceeds the first preset threshold of the corresponding first preset reference value, then the operation of the surge arrester is determined to be abnormal.

3. The surge arrester operation status analysis method as described in claim 1, characterized in that, The step of comparing the fundamental wave data and each harmonic data with the corresponding preset reference value to obtain the corresponding comparison result, and determining the first operating state of the surge arrester based on the comparison result, includes: The phase difference between the fundamental wave and each harmonic wave is calculated based on the fundamental wave data and each harmonic wave data. The phase difference between the fundamental wave and each harmonic wave is compared with the corresponding second preset reference value to obtain the corresponding second comparison result. If the second comparison result shows that the phase difference between the fundamental wave and any harmonic exceeds the second preset threshold of the corresponding second preset reference value, then the operation of the surge arrester is determined to be abnormal.

4. The surge arrester operation status analysis method as described in claim 1, characterized in that, After performing a Fast Fourier Transform on the current data to obtain the fundamental frequency data and the harmonic data corresponding to the current signal, the method further includes: The resistive current value of the surge arrester is calculated according to the resistive current calculation formula, which is as follows: ， Among them, the The resistive current value, the This refers to the fundamental amplitude in the fundamental frequency data. It is a positive odd number, and The minimum value is 3. The maximum value is 27. This represents the amplitude of the third harmonic in the harmonic data. For harmonic data Second harmonic amplitude; The second operating condition of the surge arrester is determined based on the resistive current value; The first operating status and the second operating status are merged to obtain the target operating status.

5. The surge arrester operation status analysis method as described in claim 1, characterized in that, The step of preprocessing the current signal to obtain the corresponding current data includes: The current signal is converted into a voltage signal using a current sampling circuit. The voltage signal is then converted from analog to digital to obtain data representing the current signal, which is used as current data.

6. The surge arrester operation status analysis method as described in claim 1, characterized in that, The method for analyzing the operating status of surge arresters also includes: By repeatedly executing steps 1-4, the operating status of the surge arrester corresponding to multiple current signals can be obtained. Determine whether the number of times the surge arrester operates abnormally among multiple surge arrester operating conditions reaches a third preset threshold. If so, determine that the overall operating condition of the surge arrester is abnormal.

7. The surge arrester operation status analysis method as described in claim 1, characterized in that, Before acquiring the current signal of the leakage current of the surge arrester, the method further includes: The operating power of the surge arrester detection and analysis system; Determine if the operating power is normal. If yes, proceed to step 1. If no, start the sleep mode. If the sleep mode runs for a preset time, turn off the sleep mode and return to the step of analyzing the operating power of the surge arrester operation status analysis system.

8. A surge arrester operation status analysis device, characterized in that, include: Lightning protection circuit, current sampling circuit, ammeter circuit, power management circuit, microprocessor and wireless communication module; The input terminals of the lightning protection circuit and the current sampling circuit are both connected to the low-voltage terminal of the surge arrester. The output terminal of the lightning protection circuit is connected to the ground terminal. The first output terminal of the current sampling circuit is connected to the input terminal of the ammeter circuit. The second output terminal of the current sampling circuit is connected to the microprocessor. The first output terminal of the ammeter circuit is connected to the ground terminal. The second output terminal of the ammeter circuit is connected to the input terminal of the power management circuit. The output terminal of the power management circuit is connected to the wireless communication module and the microprocessor. The wireless communication module is connected to the microprocessor. The microprocessor is used to execute the steps of the method according to any one of claims 1 to 7.

9. A surge arrester operation status analysis system, characterized in that, include: The current acquisition module is used to acquire the current signal of the leakage current of the surge arrester; A current preprocessing module is used to preprocess the current signal to obtain corresponding current data; The Fourier transform module is used to perform fast Fourier transform calculations based solely on the current data to obtain the fundamental wave data and the harmonic data corresponding to the current signal. The operation status judgment module is used to compare the fundamental wave data and each harmonic data with the corresponding preset reference values ​​to obtain the corresponding comparison results. Based on the comparison results, the first operation status of the surge arrester is judged. Without affecting the operation of the power grid, a situation with the worst harmonic interference and the worst phase-to-phase interference is simulated. Under this situation, the normal fundamental wave data and normal harmonic data of the waveform corresponding to the leakage current of the surge arrester whose nonlinear resistance characteristics have not changed are set as the preset reference values, or the phase difference between the normal fundamental wave and the normal harmonic waves of the waveform corresponding to the leakage current is set as the preset reference value.

10. A computer device, comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 7.

11. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 7.

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