Method for using wafer buffer system and wafer buffer system

Abstract

The application provides a wafer caching system and a wafer caching system use method. The wafer caching system use method comprises the following steps: providing a wafer caching device and a control module, making wafers in an interlayer process module pass through a wafer pre-exposure process module, the wafer caching device and a cooling assembly in sequence, and then being transmitted to an exposure module for photolithography processing, and the number of wafer caching stations in the wafer caching device is greater than or equal to the number of wafer processing stations in the wafer pre-exposure process module; the control module controls the wafer transmission speed of the interlayer process module to the wafer pre-exposure process module, so that the total number of wafers in the wafer pre-exposure process module and the wafer caching device is equal to the number of wafer caching stations in the wafer caching device. The application can make the wafers processed in the wafer pre-exposure process module all be transmitted and avoided in the wafer caching device for caching, and the wafer quality is not affected.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a method of using a wafer cache system and the wafer cache system itself. Background Technology

[0002] In the coating and developing process, a buffer device is typically placed before the exposure equipment to hold the wafers. The pre-exposure processing module located before the buffer device generally includes a coating unit, a heat treatment unit, a cooling unit, and an edge exposure unit. Some pre-exposure processing modules also include a back washing unit. Existing buffer devices can only buffer a few wafers, making it impossible to buffer all the wafers in the pre-exposure processing module. If the coated wafers remain in the coating unit for an extended period without being transferred to the next heat treatment unit, it will affect the wafer quality.

[0003] Therefore, it is necessary to provide a novel method for using a wafer caching system and a wafer caching system in order to solve the aforementioned problems existing in the prior art. Summary of the Invention

[0004] The purpose of this invention is to provide a method for using a wafer caching system and a wafer caching system in order to solve the problem that in the prior art, the caching device can only cache a few wafers and cannot cache all the wafers in the pre-exposure process module, which leads to the wafer quality being affected if the wafers stay in the coating unit, heat treatment unit, cooling unit, edge exposure unit and back washing unit for a long time.

[0005] To achieve the above objectives, the method of using the wafer caching system of the present invention includes the following steps:

[0006] A wafer caching device and a control module are provided, wherein the wafer caching device is disposed between a pre-wafer processing module and a post-wafer processing module. The pre-wafer processing module includes an interlayer process module and a pre-exposed wafer process module, and the post-wafer processing module includes a cooling component and an exposure module. The wafers in the interlayer process module are sequentially passed through the pre-exposed wafer process module, the wafer caching device, and the cooling component before being transferred to the exposure module for photolithography. The number of wafer caching stations in the wafer caching device is greater than or equal to the number of wafer processing stations in the pre-exposed wafer process module.

[0007] The control module controls the wafer transfer speed of the interlayer process module to the wafer pre-exposure process module, so that the total number of wafers in the wafer pre-exposure process module and the wafer buffer device is equal to the number of wafer buffer stations in the wafer buffer device.

[0008] The beneficial effects of the wafer buffer system usage method of the present invention are as follows: by ensuring that the number of wafer buffer stations in the wafer buffer device is greater than or equal to the number of wafer processing stations in the pre-exposure process module, the control module controls the wafer transfer speed of the interlayer process module to the pre-exposure process module, so that the total number of wafers in the pre-exposure process module and the wafer buffer device is equal to the number of wafer buffer stations in the wafer buffer device. This ensures that when an exposure module malfunctions, all processed wafers in the pre-exposure process module can be transferred and buffered in the wafer buffer device, thereby avoiding the wafers from remaining in the coating unit, heat treatment unit, cooling unit, and back washing unit for extended periods, which would affect wafer quality, and ensuring the production capacity of the coating and developing equipment.

[0009] Preferably, the wafer cache device includes a necessary cache component and a spare cache component, and the total number of wafer cache stations in the necessary cache component and the spare cache component is greater than the number of wafer processing stations in the wafer pre-exposure process module.

[0010] The control module selects whether to use the necessary cache component and the backup cache component to cache the wafer, or selects to use only the necessary cache component to transfer the wafer, based on the operating status information of the exposure module. Its advantages are: it flexibly selects whether to use the backup cache component based on the operating status information of the exposure module, ensuring that when the exposure module malfunctions, all wafers in the pre-exposure process module can be transferred and buffered in the wafer cache device; moreover, setting up a backup cache component makes more efficient use of semiconductor equipment space. For the same total number of wafer cache stations, compared to setting up a large cache component, dividing the work into necessary and backup cache components provides better stability, makes it easier to process and manufacture the cache components, and achieves higher accuracy, which is beneficial for accurate wafer handling.

[0011] Preferably, the step of the control module selecting the necessary cache component and the spare cache component to cache the wafer based on the operating status information of the exposure module includes:

[0012] S110, The control module analyzes and determines that the operating status information of the exposure module is abnormal operating information of the exposure module;

[0013] S120, The control module controls the interlayer process module to stop transferring the wafer to the pre-exposed wafer process module, and controls the processed wafer in the pre-exposed wafer process module to be transferred to the cache in the necessary cache component.

[0014] S130. After all wafers are cached at the wafer cache stations in the necessary cache component, the control module controls the processed wafers in the pre-exposure process module to be transferred to the backup cache component for caching. The advantages are: when the exposure module malfunctions, the wafers are first transferred to the necessary cache component for caching, and only after all wafer cache stations in the necessary cache component are filled with wafers is the backup cache component activated and used to cache the wafers. This avoids the backup cache component being constantly operational, saving energy and avoiding unnecessary maintenance. Furthermore, when the exposure module is operating normally, the wafers only pass through the necessary cache component. Therefore, if either the necessary or backup cache component is damaged, only the damaged cache component needs to be maintained or replaced, without replacing the entire wafer cache device, saving maintenance costs.

[0015] Preferably, the step of the control module selecting to use only the necessary cache component to transfer the wafer based on the operating status information of the exposure module includes:

[0016] S210, The control module analyzes and determines that the exposure module's operating status information is normal.

[0017] S220: The control module controls the wafers in the pre-exposure process module to sequentially pass through the pre-exposure process module, the necessary cache component, and the cooling component before being transferred to the exposure module for photolithography. The number of wafers in the necessary cache component is less than or equal to the number of reserved cache stations in the wafer cache device. The advantages are: when the exposure module is operating normally, the wafers only pass through the necessary cache component; when the exposure module malfunctions, the necessary cache component and the backup cache component are used to cache the wafers. This avoids the backup cache component being constantly activated, saving energy and unnecessary maintenance. Furthermore, if the necessary cache component or the backup cache component is damaged, only the damaged cache component needs to be maintained or replaced, without replacing the entire wafer cache device, thus saving maintenance costs.

[0018] Preferably, after performing step S130, the method further includes the following step:

[0019] S140, The control module analyzes and determines that the exposure module's operating status information indicates that the exposure module has resumed normal operation.

[0020] S150, The control module controls the robotic arm to sequentially transfer the wafers cached in the necessary cache component to the cooling component and the exposure module;

[0021] S160. After all the wafers cached in the necessary cache component are transferred to the exposure module, the control module controls the interlayer robotic arm to transfer the wafers cached in the spare cache component to the necessary cache component, and controls the interface module robotic arm to sequentially transfer the wafers transferred to the necessary cache component to the cooling component and the exposure module, until all the wafers cached in the spare cache component are transferred to the necessary cache component.

[0022] S170, the control module controls the wafers within the interlayer process module to sequentially pass through the pre-exposure process module, the necessary buffer component, and the cooling component before being transferred to the exposure module for photolithography. Its advantages are: the necessary buffer component is a crucial component before the wafer enters the cooling component, requiring minimal modifications to the original wafer buffer device, interface module, robotic arm, etc., and exhibiting high adaptability to original semiconductor components.

[0023] Preferably, after executing step S220, the system further includes step S230: the control module selects whether to transfer the wafers in the necessary buffer component to the cooling component and the exposure module based on the first station usage status information of the exposure module and the second station usage status information of the cooling component. The beneficial effect is that it monitors the station usage status of the cooling component and the exposure module in real time, and reasonably adjusts the number of wafers transferred to the pre-exposure process processing module and the necessary buffer component. This avoids sudden abnormal operation of the exposure module, preventing the wafers in the pre-exposure process processing module from not being fully moved to the wafer buffer device, which would cause the wafers to remain in the pre-exposure process processing module for a long time and affect wafer quality.

[0024] Preferably, in step S230, the step of the control module selecting whether to transfer the wafer in the necessary buffer component to the cooling component and the exposure module based on the first station usage status information of the exposure module and the second station usage status information of the cooling component includes:

[0025] S2311, The control module analyzes and finds that the usage status information of the first workstation and the usage status information of the second workstation are both information on no idle workstations.

[0026] S2312, The control module controls the interface module to stop the robotic arm from transferring the wafer in the necessary buffer component to the cooling component and the exposure module;

[0027] S2313. When the control module detects that the number of wafers in the necessary buffer component is equal to the number of reserved buffer stations in the wafer buffer device, it controls the interlayer process module to stop transferring wafers to the pre-exposure process module. Its beneficial effect is that it monitors the station usage status of the cooling component and the exposure module in real time, and reasonably adjusts the number of wafers entering the pre-exposure process module and the necessary buffer component. This avoids sudden abnormal operation of the exposure module, preventing the wafers in the pre-exposure process module from not being fully moved to the wafer buffer device, thus avoiding wafers remaining in the pre-exposure process module for an extended period and affecting wafer quality.

[0028] Preferably, in step S230, the step of the control module selecting whether to transfer the wafer in the necessary buffer component to the cooling component and the exposure module based on the first station usage status information of the exposure module and the second station usage status information of the cooling component includes:

[0029] S2321, The control module analyzes and finds that at least one of the first workstation usage status information and the second workstation usage status information is an idle workstation;

[0030] S2322, the control module controls the robotic arm to sequentially transfer the wafers from the necessary buffer component to the cooling component and the exposure module until there are no idle workstations in either component. The beneficial effect is that it allows for real-time monitoring of the workstation usage status of the cooling component and the exposure module, and reasonable adjustment of the number of wafers fed into the pre-exposure process processing module and the necessary buffer component. This prevents sudden abnormal operation of the exposure module, where wafers in the pre-exposure process processing module cannot be fully moved to the wafer buffer device, causing wafers to remain in the pre-exposure process processing module for an extended period, thus affecting wafer quality.

[0031] Preferably, in step S160, the step of the control module controlling the interlayer robotic arm to transfer the wafer cached in the spare cache component to the required cache component, and controlling the interface module robotic arm to sequentially transfer the wafer transferred to the required cache component to the cooling component and the exposure module includes:

[0032] S161, The control module controls the interlayer robotic arm to remove the wafers cached in the spare cache component and place them in the required cache component in the order of the first wafer cache station, the M / 2th wafer cache station, the second wafer cache station, the M / 2+1th wafer cache station, ..., the M / 2-1th wafer cache station and the Mth wafer cache station, where M is the number of wafer cache stations in the required cache component;

[0033] S162, the control module controls the interface module robotic arm to remove the wafers from the necessary cache assembly in the following order: the first wafer cache station, the M / 2th wafer cache station, the second wafer cache station, the M / 2+1th wafer cache station, ..., the M / 2-1th wafer cache station, and the Mth wafer cache station, and then sequentially transfer them to the cooling assembly and the exposure module. This has the advantage of preventing interference between the interlayer robotic arm that places the wafers into the necessary cache assembly and the interface module robotic arm that removes the wafers from the necessary cache assembly, effectively avoiding damage to the components and the wafers.

[0034] Preferably, in step S110, the abnormal operation information of the exposure module includes either exposure module crash information or information that the wafer processing speed in the exposure module is less than the wafer processing speed in the wafer pre-exposure process processing module.

[0035] When the abnormal information of the exposure module is exposure module crash information, in step S120, the control module controls the interlayer process module to immediately stop transferring the wafer to the wafer pre-exposure process module.

[0036] When the exposure module malfunctions and the processing speed of the wafers in the exposure module is lower than that in the wafer pre-exposure process module, in step S120, when the control module detects that the number of wafers in the necessary buffer assembly is equal to the number of reserved buffer positions in the wafer buffer device, it controls the interlayer process module to stop transferring wafers to the wafer pre-exposure process module. The beneficial effect is that it ensures that when the exposure module malfunctions, all wafers in the wafer pre-exposure process module can be transferred and buffered in the wafer buffer device.

[0037] Preferably, the wafer caching system of the present invention includes a wafer caching device and a control module. The wafer caching device is disposed between a pre-wafer processing module and a post-wafer processing module. The pre-wafer processing module includes an interlayer process module and a wafer pre-exposure process module. The post-wafer processing module includes a cooling component and an exposure module. This allows the wafers in the interlayer process module to sequentially pass through the wafer pre-exposure process module, the wafer caching device, and the cooling component before being transferred to the exposure module for photolithography. Furthermore, the number of wafer caching stations in the wafer caching device is greater than or equal to the number of wafer processing stations in the wafer pre-exposure process module. The control module controls the wafer transfer speed from the interlayer process module to the wafer pre-exposure process module, ensuring that the total number of wafers in the wafer pre-exposure process module and the wafer caching device is equal to the number of wafer caching stations in the wafer caching device.

[0038] The beneficial effect of the wafer caching system of the present invention is that: the number of wafer caching stations in the wafer caching device is greater than or equal to the number of wafer processing stations in the pre-exposure process module, and the control module is used to control the wafer transfer speed of the interlayer process module to the pre-exposure process module, so that the total number of wafers in the pre-exposure process module and the wafer caching device is equal to the number of wafer caching stations in the wafer caching device. This ensures that when the exposure module malfunctions, all wafers in the pre-exposure process module can be transferred and buffered in the wafer caching device, thereby avoiding the impact on wafer quality caused by the wafers remaining in the coating unit, heat treatment unit, cooling unit, and back washing unit for a long time.

[0039] Preferably, the wafer caching device includes a necessary caching component and a spare caching component, and the total number of wafer caching stations in the necessary and spare caching components is greater than the number of wafer processing stations in the pre-exposure process module. The control module is used to select whether to use the necessary and spare caching components to cache the wafers or to select to use only the necessary caching components to transfer the wafers based on the operating status information of the exposure module. Its advantages are: it allows for flexible selection of whether to use the spare caching component based on the operating status information of the exposure module, ensuring that when the exposure module malfunctions, all wafers in the pre-exposure process module can be transferred and buffered in the wafer caching device; moreover, setting a spare caching component makes better use of semiconductor equipment space. For the same total number of wafer caching stations, compared to setting a large caching component, dividing the caching into necessary and spare caching components provides better stability, makes it easier to process and manufacture the caching components, and increases accuracy, which is beneficial for accurate wafer handling.

[0040] Preferably, the total number of wafer cache stations in the necessary cache component and the spare cache component is equal to the sum of the number of wafer processing stations in the pre-exposure process module and the number of reserved cache stations. The advantage of this is that by setting reserved cache stations, meaning the total number of wafer cache stations in the wafer cache device is greater than the number of wafer processing stations in the pre-exposure process module, it is ensured that if an abnormality occurs in the exposure module and all wafers have been transferred to the necessary cache component, all wafers in the pre-exposure process module can also be transferred and buffered in the wafer cache device.

[0041] Preferably, at least one backup cache component is provided, and the essential cache component and at least one backup cache component are stacked sequentially from bottom to top. The advantage of this is that it makes the wafer cache device compact, occupies little space, and the number of backup cache components is specifically set according to the structure and layout of the semiconductor device.

[0042] Preferably, both the necessary cache component and the spare cache component include several sets of cache units. Each cache unit includes N wafer supports for carrying wafers, where N is a positive integer greater than or equal to 3. Each wafer support includes a support body and a wafer contact portion disposed near the proximal end of the support body. The support bodies of the N wafer supports in each set of cache units are respectively disposed along different radii of the wafers to be carried, and the proximal ends of the support bodies are arranged facing each other. The surface of the wafer contact portion is higher or lower than the surface of the support body. The wafer contact portions of the N wafer supports in each set of cache units are evenly distributed on the same circumference to form a wafer cache station for carrying wafers. Its beneficial effects are as follows: the support body can not only provide effective and stable support for the wafer contact portion that carries the wafer, but also ensure that only the wafer contact portion contacts the wafer when the wafer is placed on the wafer support. This can effectively prevent the wafer from contacting the support body, which helps to reduce the contact area between the wafer and the wafer support. This reduces the vibration caused by the vacuum breaking effect when the wafer leaves the contact surface quickly during wafer removal, and helps to reduce or avoid damage to the wafer.

[0043] Preferably, the wafer support further includes a clearance portion, one end of which is connected to the proximal end of the support body, and the other end of which is connected to the wafer contact portion. The surface of the wafer contact portion is lower than the surface of the support body, and the surface of the clearance portion is lower than both the surface of the support body and the surface of the wafer contact portion. The advantages are: when the wafer is placed on the wafer support, only the wafer contact portion contacts the wafer. Because of the clearance portion, a gap exists between the wafer contact portion and the support body, effectively preventing contact between the wafer and the support body. This reduces the contact area between the wafer and the wafer support, thereby reducing vibration caused by the vacuum breaking effect when the wafer rapidly leaves the contact surface during wafer removal, and helping to reduce or avoid damage to the wafer. Furthermore, the lower surface of the wafer contact portion compared to the surface of the support body, and the lower surface of the clearance portion compared to both the surface of the support body and the surface of the wafer contact portion, reduces the overall thickness of the wafer support, resulting in a smaller footprint and a more compact structure, allowing for more cache units to store a large number of wafers.

[0044] Preferably, the necessary cache component and the cooling component transfer wafers via an interface module robotic arm. The necessary cache component and the backup cache component, the necessary cache component and the wafer pre-exposure process module, and the backup cache component and the wafer pre-exposure process module all transfer wafers via an interlayer robotic arm. The advantage is that the backup cache component only needs to use the interlayer robotic arm for wafer handling, while the necessary cache component requires not only placing wafers into it via the interlayer robotic arm but also retrieving wafers from it via the interface module robotic arm.

[0045] Preferably, N equals 4, and the structure formed by sequentially connecting the distal ends of the support bodies of the four wafer supports in each group of cache units is a rectangular structure. The support bodies extend along the diagonal of the rectangular structure, and the proximal ends of the support bodies are positioned towards the center of the rectangular structure. This has the advantage of making the overall structure of the cache assembly more stable and facilitating wafer handling by the robotic arm.

[0046] Preferably, in the essential cache component, the adjacent sides of the rectangular structure are of equal length, and the side lengths of the two symmetrical sides of the rectangular structure in the essential cache component are greater than the diameter of the wafer to be supported; in the backup cache component, the adjacent sides of the rectangular structure are of equal length, and the side length of one symmetrical side of the rectangular structure in the backup cache component is greater than the diameter of the wafer to be supported, while the side length of the other symmetrical side is less than or equal to the diameter of the wafer to be supported. The advantage is that the essential cache component can achieve wafer pick-and-place from both sides, meaning that not only can a wafer be placed on one side of the essential cache component via an interlayer robotic arm, but a wafer can also be retrieved from the other side of the essential cache component via an interface module robotic arm, avoiding interference between the interlayer robotic arm and the interface module robotic arm. The backup cache component only needs to pick up and place wafers via an interlayer robotic arm, therefore, the backup cache component only needs to be configured for wafer pick-and-place from one side. Attached Figure Description

[0047] Figure 1 This is a schematic diagram of the layout of a wafer cache device according to an embodiment of the present invention. Figure 1 ;

[0048] Figure 2 for Figure 1 The layout diagram of the wafer cache device shown Figure 2 ;

[0049] Figure 3 This is a schematic diagram of the wafer cache device in an embodiment of the present invention;

[0050] Figure 4This is a schematic diagram of the structure of the necessary caching component in an embodiment of the present invention;

[0051] Figure 5 for Figure 4 The diagram shows an assembly schematic of the wafer cache device.

[0052] Figure 6 This is a schematic diagram of the structure of the backup cache component in an embodiment of the present invention;

[0053] Figure 7 for Figure 4 and Figure 6 The diagram shows the structure of the wafer support component. Detailed Implementation

[0054] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention. Unless otherwise defined, the technical or scientific terms used herein should have the ordinary meaning understood by those skilled in the art. The terms "comprising" and similar expressions used herein mean that the element or object preceding the word covers the element or object listed after the word and its equivalents, but does not exclude other elements or objects.

[0055] To overcome the problems existing in the prior art, the present invention provides a method for using a wafer caching system and a wafer caching system, so as to solve the problem that the caching device in the prior art can only cache a few wafers and cannot cache all the wafers in the pre-exposure process module, which causes the wafer quality to be affected if the wafer stays in the coating unit, heat treatment unit, cooling unit, edge exposure unit and back washing unit for a long time.

[0056] Figure 1 This is a schematic diagram of the layout of a wafer cache device according to an embodiment of the present invention. Figure 1 ; Figure 2 for Figure 1 The layout diagram of the wafer cache device shown Figure 2 .

[0057] In some embodiments, reference is made to Figure 1 and Figure 2The wafer caching system includes a wafer caching device 10 and a control module. The wafer caching device 10 is disposed between the pre-wafer processing module and the post-wafer processing module. The pre-wafer processing module includes an interlayer process module 20 and a pre-exposure process module 30. The post-wafer processing module includes a cooling assembly 40 and an exposure module 50, so that the wafer 2 in the interlayer process module 20 passes sequentially through the pre-exposure process module 30, the wafer caching device 10, and the cooling assembly 40. The wafers are transferred to the exposure module 50 for photolithography, and the number of wafer cache stations in the wafer cache device 10 is greater than or equal to the number of wafer processing stations in the wafer pre-exposure process processing module 30. The control module controls the wafer transfer speed of the interlayer process module 20 into the wafer pre-exposure process processing module 30, so that the total number of wafers in the wafer pre-exposure process processing module 30 and the wafer cache device 10 is equal to the number of wafer cache stations in the wafer cache device 10.

[0058] Specifically, the number of wafer buffer stations in the wafer buffer device 10 is greater than or equal to the number of wafer processing stations in the wafer pre-exposure process module 30. The control module controls the wafer transfer speed of the interlayer process module 20 into the wafer pre-exposure process module 30, so that the total number of wafers in the wafer pre-exposure process module 30 and the wafer buffer device 10 is equal to the number of wafer buffer stations in the wafer buffer device 10. This ensures that when an exposure module malfunctions, all wafers in the wafer pre-exposure process module can be transferred and buffered in the wafer buffer device, thereby preventing the wafers from staying in the coating unit, heat treatment unit, cooling unit, and back washing unit for a long time, which would affect the wafer quality.

[0059] In some embodiments, the pre-exposure process module includes a coating process module.

[0060] In other embodiments, reference is made to Figure 1 and Figure 2 The wafer pre-exposure process module 30 includes a resist coating module 31 and a backwash assembly 32. The wafer buffer device 10, the backwash assembly 32, and the cooling assembly 40 belong to the interface module 1.

[0061] In some embodiments, reference is made to Figure 2 The adhesive coating process module 31 includes an adhesive coating unit 311, a heat treatment unit 312, a cooling unit 313, a transfer unit 314, and an edge exposure unit 315.

[0062] In some embodiments, reference is made to Figure 2The wafer cache device 10 includes a necessary cache component 11 and a spare cache component 12. The total number of wafer cache stations in the necessary cache component 11 and the spare cache component 12 is greater than the number of wafer processing stations in the wafer pre-exposure process module 30. The control module is used to select whether to use the necessary cache component 11 and the spare cache component 12 to cache wafers or to select to use only the necessary cache component 11 to transfer wafers based on the operating status information of the exposure module 50. That is, the spare cache component 12 is flexibly selected based on the operating status information of the exposure module 50 to ensure that when the exposure module 50 malfunctions, all wafers in the wafer pre-exposure process module 30 can be transferred and buffered in the wafer cache device 10. Moreover, setting up a spare cache component 12 can make more reasonable use of semiconductor equipment space. For the same total number of wafer cache stations, compared with setting up a large cache component, splitting it into a necessary cache component 11 and a spare cache component 12 has better stability, is easier to process and manufacture cache components, and has higher accuracy, which is conducive to accurate wafer handling.

[0063] In some embodiments, the total number of wafer cache stations in the necessary cache component and the spare cache component is equal to the sum of the number of wafer processing stations in the pre-exposure process module and the number of reserved cache stations. Reserved cache stations are provided, meaning the total number of wafer cache stations in the wafer cache device is greater than the number of wafer processing stations in the pre-exposure process module. This ensures that if an exposure module malfunctions and all wafers have been transferred to the necessary cache component, all wafers in the pre-exposure process module can also be transferred and buffered in the wafer cache device.

[0064] In some embodiments, the number of reserved cache slots is greater than or equal to 1 and less than or equal to 20. The specific number of reserved cache slots is set according to the structure and layout of the semiconductor device, with the aim of making reasonable use of the semiconductor device space and setting up more cache units to store a large number of wafers.

[0065] Figure 3 This is a schematic diagram of the structure of the wafer cache device in an embodiment of the present invention.

[0066] In some embodiments, at least one backup cache component 12 is provided, and the essential cache component 11 and at least one backup cache component 12 are stacked sequentially from bottom to top. This makes the wafer cache device 10 compact in structure and occupies little space. The number of backup cache components 12 is specifically set according to the structure and layout of the semiconductor device.

[0067] Figure 4 This is a schematic diagram of the structure of the necessary caching component in an embodiment of the present invention; Figure 5 for Figure 4 The diagram shows an assembly schematic of the wafer cache device. Figure 6 This is a schematic diagram of the structure of the backup cache component in an embodiment of the present invention; Figure 7 for Figure 4 and Figure 6 The diagram shows the structure of the wafer support component.

[0068] In some embodiments, reference is made to Figures 3 to 7 Both the required cache component 11 and the backup cache component 12 include several sets of cache units 100. Each cache unit 100 includes N wafer supports 110 for supporting wafers 2, where N is a positive integer greater than or equal to 3. Each wafer support 110 includes a support body 111 and a wafer contact portion 112 disposed near the proximal end of the support body 111. The support bodies 111 of the N wafer supports 110 in each set of cache units 100 are respectively arranged along different radial directions of the wafers 2 to be supported, and the proximal ends of the support bodies 111 are arranged facing each other. The surface of the wafer contact portion 112 is higher or lower than the surface of the support body 111. The wafer contact portions 112 of the N wafer supports 110 in each set of cache units 100 are evenly distributed on the same circumference to form a wafer cache station for supporting wafers.

[0069] Specifically, the cache unit 100 includes N wafer supports 110 for supporting wafers 2, where N is a positive integer greater than or equal to 3. Each wafer support 110 includes a support body 111 and a wafer contact portion 112 disposed near the proximal end of the support body 111. The support bodies 111 of the N wafer supports 110 in each cache unit 100 are respectively arranged along different radial directions of the wafers 2 to be supported, and the proximal ends of the support bodies 111 face each other, so that the support body 111 can provide effective and stable support for the wafer contact portion 112 supporting the wafers 2; through the wafer contact portion 112... The surface is higher or lower than the surface of the support body 111, so that when the wafer 2 is placed on the wafer support 110, only the wafer contact portion 112 contacts the wafer 2. This effectively prevents the wafer 2 from contacting the support body 111, which helps to reduce the contact area between the wafer 2 and the wafer support 110. This reduces the vibration caused by the vacuum breaking effect when the wafer 2 leaves the contact surface quickly during wafer removal, and helps to reduce or avoid damage to the wafer 2. By having the wafer contact portions 112 of the N wafer supports 110 in each group of cache units 100 evenly distributed on the same circumference to form a wafer cache station that carries the wafer, the support stability of the wafer 2 is improved.

[0070] In some embodiments, reference is made to Figures 3 to 7The wafer support 110 further includes a clearance portion 113, one end of which is connected to the proximal end of the support body 111, and the other end of which is connected to the wafer contact portion 112. The surface of the wafer contact portion 112 is lower than the surface of the support body 111, and the surface of the clearance portion 113 is lower than both the surface of the support body 111 and the surface of the wafer contact portion 112. When wafer 2 is placed on wafer support 110, only wafer contact portion 112 contacts wafer 2. Due to the setting of clearance portion 113, there is a gap between wafer contact portion 112 and support body 111, which can effectively prevent wafer 2 from contacting support body 111. This helps to reduce the contact area between wafer 2 and wafer support 110, thereby reducing the vibration caused by the vacuum breaking effect when wafer 2 leaves the contact surface quickly during wafer removal, which helps to reduce or avoid damage to wafer 2. Moreover, the surface of wafer contact portion 112 is lower than the surface of support body 111, and the surface of clearance portion 113 is lower than the surface of support body 111 and the surface of wafer contact portion 112, which can reduce the overall thickness of wafer support 110. That is, wafer support 110 occupies less space and has a compact structure, so more cache units 100 can be set to store a large number of wafers.

[0071] In some embodiments, reference is made to Figures 3 to 7 The distance L between the proximal end of the support body 111 and the wafer contact portion 112 along the extending direction of the support body 111 is no greater than 10 mm. This is to prevent the distance between the proximal end of the support body 111 and the wafer contact portion 112, i.e., the length of the clearance portion 113 along the extending direction of the support body 111, from being too large, which would cause the wafer contact portion 112 to sink when carrying the wafer 2.

[0072] In an embodiment of the present invention, the extending direction of the support body 111 is toward the length direction of the support body 111, and points from the distal end of the support body 111 to the proximal end of the support body 111, i.e. Figure 7 The direction indicated by A in the middle is shown.

[0073] In some embodiments, the surface area of ​​the wafer contact portion is no greater than one square centimeter. This helps reduce vibrations caused by the vacuum breaking effect resulting from the rapid separation of the wafer from the contact surface during wafer removal, and helps reduce or avoid damage to the wafer.

[0074] In some embodiments, reference is made to Figures 3 to 6Both the necessary cache component 11 and the spare cache component 12 further include N positioning through rods 200. Each of the N positioning through rods 200 is disposed one-to-one through the distal end of the support body 111 of each of the N wafer supports 110 in each group of cache units 100, so that several groups of cache units 100 are arranged sequentially along the height direction of the positioning through rods 200. This not only makes the structure between cache units 100 compact, allowing for more cache units 100 to be arranged along the height direction of the positioning through rods 200 to store a large number of wafers, but also improves the support stability of the wafer supports 110 by having the support body 111 of each of the N wafer supports 110 in each group of cache units 100 connected through the N positioning through rods 200.

[0075] In an embodiment of the present invention, the height direction of the positioning through rod 200 is as follows: Figure 5 The direction indicated by B in the middle is shown.

[0076] In some specific embodiments, reference is made to Figure 7 The far end of the support body 111 is provided with a through hole 114, and the positioning through rod 200 passes through the through hole 114 to fix the wafer support 110.

[0077] In some embodiments, reference is made to Figures 3 to 6 Both the necessary cache component 11 and the spare cache component 12 further include several interlayer positioning blocks 300. These interlayer positioning blocks 300 are disposed on the upper surface of the support body 111 and are penetrated by the positioning through rod 200. That is, the interlayer positioning blocks 300 reserve a certain space on the upper surface of the wafer support 110 to facilitate the robotic arm's handling of the wafer 2. This also improves the support stability of the wafer support 110 and enhances the positioning accuracy of the cache unit 100, thereby improving the precision of the robotic arm's handling of the wafer 2.

[0078] In some embodiments, reference is made to Figures 3 to 6 Both the necessary cache component 11 and the spare cache component 12 further include a base 400 and N bottom positioning blocks 500. The base 400 has N positioning slots (not shown in the figure), and the N bottom positioning blocks 500 are correspondingly disposed in the N positioning slots (not shown in the figure). The bottom ends of the N positioning through rods 200 are correspondingly disposed in the N bottom positioning blocks 500. This allows the positioning through rods 200 to be more accurately positioned in the corresponding positions of the base 400, thereby improving the positioning accuracy of the cache unit 100 and thus improving the accuracy of the robotic arm when picking up and placing the wafer 2.

[0079] In some embodiments, reference is made to Figures 3 to 7Both the necessary cache component 11 and the spare cache component 12 further include a reinforcing member 600, with the top end of the positioning through rod 200 disposed on the reinforcing member 600. This effectively improves the stability of the cache unit 100 and facilitates more precise positioning of the positioning through rod 200, thereby improving the positioning accuracy of the cache unit 100 and thus enhancing the precision of the robotic arm when picking up and placing the wafer 2.

[0080] In some embodiments, the wafer support is a polyetheretherketone (PEEK) support, meaning the wafer support is made of PEEK. PEEK has excellent antistatic properties, which reduces or prevents the generation of static electricity when the wafer is separated from the wafer support.

[0081] In some embodiments, the wafer support is a one-piece molded structure.

[0082] In some embodiments, reference is made to Figure 1 and Figure 2 The necessary buffer component 11 and the cooling component 40 transfer wafers 2 via an interface module robotic arm. The necessary buffer component 11 and the spare buffer component 12, the necessary buffer component 11 and the wafer pre-exposure process processing module 30, and the spare buffer component 12 and the wafer pre-exposure process processing module 30 all transfer wafers via interlayer robotic arms. The spare buffer component 12 only requires wafer placement and removal via the interlayer robotic arm, while the necessary buffer component 11 requires both wafer placement via the interlayer robotic arm and wafer removal via the interface module robotic arm.

[0083] In some embodiments, reference is made to Figures 3 to 6 N equals 4. The structure formed by sequentially connecting the distal ends of the support bodies 111 of the four wafer supports 110 in each group of cache units 100 is a rectangular structure. The support bodies 111 extend diagonally towards the rectangle, and the proximal ends of the support bodies 111 face the center of the rectangle. This makes the overall structure of the cache assembly more stable and facilitates wafer handling by the robotic arm.

[0084] For details, please refer to Figures 3 to 6Each cache unit 100 includes four wafer supports 110, namely a first wafer support 101, a second wafer support 102, a third wafer support 103, and a fourth wafer support 104. The distal ends of the support body 111 of the first wafer support 101, the second wafer support 102, the third wafer support 103, and the fourth wafer support 104 are sequentially connected to form a rectangular structure. The support body 111 of the first wafer support 101 and the support body 111 of the third wafer support 103 extend along one diagonal of the rectangular structure, and the proximal ends of the support body 111 of the first wafer support 101 and the support body 111 of the third wafer support 103 face each other and are oriented toward the center of the rectangular structure; the support body 111 of the second wafer support 102 and the support body 111 of the fourth wafer support 104 extend along the other diagonal of the rectangular structure, and the proximal ends of the support body 111 of the second wafer support 102 and the support body 111 of the fourth wafer support 104 face each other and are oriented toward the center of the rectangular structure.

[0085] Among them, reference Figures 3 to 6 The positioning through rod 200 is provided with four components. The first wafer support members 101 in several groups of cache units 100 are arranged sequentially along the height direction of the positioning through rod 200 and are penetrated by the first positioning through rod 200. The second wafer support members 102 in several groups of cache units 100 are arranged sequentially along the height direction of the positioning through rod 200 and are penetrated by the second positioning through rod 200. The third wafer support members 103 in several groups of cache units 100 are arranged sequentially along the height direction of the positioning through rod 200 and are penetrated by the third positioning through rod 200. The fourth wafer support members 104 in several groups of cache units 100 are arranged sequentially along the height direction of the positioning through rod 200 and are penetrated by the fourth positioning through rod 200.

[0086] In some embodiments, reference is made to Figures 3 to 5 The adjacent sides of the rectangular structure in the necessary cache component 11 are of equal length, and the side lengths of the two symmetrical sides of the rectangular structure in the necessary cache component 11 are greater than the diameter of the wafer 2 to be carried. This enables the necessary cache component 11 to pick up and place wafers from both sides. That is, not only can the wafer 2 be placed on one side of the necessary cache component 11 by the interlayer robotic arm, but the wafer 2 can also be taken out from the other side of the necessary cache component 11 by the interface module robotic arm, thus avoiding interference between the interlayer robotic arm and the interface module robotic arm.

[0087] In some embodiments, reference is made to Figure 3 and Figure 6 In the backup cache component 12, the adjacent sides of the rectangular structure are of equal length, and the side length of one symmetrical side of the rectangular structure in the backup cache component 12 is greater than the diameter of the wafer 2 to be supported, while the side length of the other symmetrical side is less than or equal to the diameter of the wafer to be supported. The backup cache component 12 only needs to handle wafer handling via an interlayer robotic arm; therefore, the backup cache component 12 can be configured for single-sided wafer handling.

[0088] In some specific embodiments, reference is made to Figures 3 to 5 In the necessary cache component 11, the adjacent sides of the rectangular structure have equal lengths, and the lengths of the two symmetrical sides of the rectangular structure are both greater than the diameter of the wafer 2 to be supported, allowing the robotic arm to pick up and place wafers on both sides of the wafer cache device. Specifically, the distal end of the support body 111 of the first wafer support 101 is connected to the distal end of the support body 111 of the second wafer support 102 to form the first side of the rectangular structure, and the distal end of the support body 111 of the second wafer support 102 is connected to the distal end of the support body 111 of the third wafer support 103 to form the second side of the rectangular structure. The first side and the second side are adjacent sides of the rectangular structure. The lengths of the first side and the second side are equal, and the length of the first side is greater than the diameter of the wafer 2 to be supported.

[0089] In other specific embodiments, reference is made to Figure 6 In the backup cache component 12, the adjacent sides of the rectangular structure have unequal lengths, and the side length of a symmetrical side of the rectangular structure is greater than the diameter of the wafer 2 to be supported, so that the robotic arm can only pick up and place wafers on one side of the wafer cache device. Specifically, the distal end of the support body 111 of the first wafer support 101 is connected to the distal end of the support body 111 of the second wafer support 102 to form the first side of the rectangular structure, and the distal end of the support body 111 of the second wafer support 102 is connected to the distal end of the support body 111 of the third wafer support 103 to form the second side of the rectangular structure. The first side and the second side are adjacent sides of the rectangular structure. The side lengths of the first side and the second side are unequal, and the side length of the first side is less than the diameter of the wafer 2 to be supported, while the side length of the second side is greater than the diameter of the wafer 2 to be supported.

[0090] In some embodiments, reference is made to Figures 1 to 6The reinforcing member 600 is a hollow rectangular structure, and the top ends of the four positioning through rods 200 are respectively fixed to the four corners of the reinforcing member 600 by positioning pins.

[0091] In some embodiments, the number of wafer cache stations in the necessary cache component and the number of wafer cache stations in the spare cache component may be the same or different. Specifically, the arrangement is based on the structure and layout of the semiconductor device, aiming to make efficient use of semiconductor device space and to set up more cache units to store a large number of wafers.

[0092] In some specific embodiments, the number of wafer processing stations in the coating process module is 72, and the number of reserved cache stations is 4, so the total number of wafer cache stations in the wafer cache device is 76. In some embodiments, the number of wafer cache stations in the required cache component 11 and the number of wafer cache stations in the spare cache component 12 are the same, both being 38.

[0093] In some embodiments, the method of using the wafer cache system includes the following steps:

[0094] A wafer caching device and a control module are provided, wherein the wafer caching device is disposed between a pre-wafer processing module and a post-wafer processing module. The pre-wafer processing module includes an interlayer process module and a pre-exposed wafer process module, and the post-wafer processing module includes a cooling component and an exposure module. The wafers in the interlayer process module are sequentially passed through the pre-exposed wafer process module, the wafer caching device, and the cooling component before being transferred to the exposure module for photolithography. The number of wafer caching stations in the wafer caching device is greater than or equal to the number of wafer processing stations in the pre-exposed wafer process module.

[0095] The control module controls the wafer transfer speed of the interlayer process module to the wafer pre-exposure process module, so that the total number of wafers in the wafer pre-exposure process module and the wafer buffer device is equal to the number of wafer buffer stations in the wafer buffer device.

[0096] Specifically, by ensuring that the number of wafer buffer stations in the wafer buffer device is greater than or equal to the number of wafer processing stations in the pre-exposure process module, the control module controls the wafer transfer speed from the interlayer process module to the pre-exposure process module. This ensures that the total number of wafers in the pre-exposure process module and the wafer buffer device equals the number of wafer buffer stations in the wafer buffer device. Consequently, when an exposure module malfunctions, all wafers in the pre-exposure process module can be transferred and buffered in the wafer buffer device. This prevents wafers from remaining in the coating unit, heat treatment unit, cooling unit, and back washing unit for extended periods, thus avoiding impacts on wafer quality and ensuring the production capacity of the coating and developing equipment.

[0097] In some embodiments, the wafer cache device includes a necessary cache component and a spare cache component, and the total number of wafer cache stations in the necessary cache component and the spare cache component is greater than the number of wafer processing stations in the pre-exposure process module. The control module selects whether to use the necessary cache component and the spare cache component to cache the wafer or selects to use only the necessary cache component to transfer the wafer based on the operating status information of the exposure module. That is, the spare cache component is flexibly selected based on the operating status information of the exposure module to ensure that when the exposure module malfunctions, all wafers in the pre-exposure process module can be transferred and buffered in the wafer cache device. Moreover, setting a spare cache component can make more efficient use of semiconductor equipment space. For the same total number of wafer cache stations, compared with setting a large cache component, dividing it into necessary cache components and spare cache components has better stability, is easier to process and manufacture, and has higher accuracy, which is beneficial to the accurate handling of wafers.

[0098] In some embodiments, the step of the control module selecting to use the necessary cache component and the spare cache component to cache the wafer based on the operating status information of the exposure module includes:

[0099] S110, The control module analyzes and determines that the operating status information of the exposure module is abnormal operating information of the exposure module;

[0100] S120, The control module controls the interlayer process module to stop transferring the wafer to the pre-exposed wafer process module, and controls the processed wafer in the pre-exposed wafer process module to be transferred to the cache in the necessary cache component.

[0101] S130. After all wafers are cached at the wafer cache stations in the necessary cache component, the control module controls the processed wafers in the pre-exposure process module to be transferred to the backup cache component for caching. The advantages are: when the exposure module malfunctions, the wafers are first transferred to the necessary cache component for caching, and only after all wafer cache stations in the necessary cache component are filled with wafers is the backup cache component activated and used to cache the wafers. This avoids the backup cache component being constantly operational, saving energy and avoiding unnecessary maintenance. Furthermore, when the exposure module is operating normally, the wafers only pass through the necessary cache component. Therefore, if either the necessary or backup cache component is damaged, only the damaged cache component needs to be maintained or replaced, without replacing the entire wafer cache device, saving maintenance costs.

[0102] In some embodiments, in step S110, the abnormal operation information of the exposure module includes either exposure module crash information or information that the wafer processing speed in the exposure module is less than the wafer processing speed in the wafer pre-exposure process processing module.

[0103] When the abnormal information of the exposure module is exposure module crash information, in step S120, the control module controls the interlayer process module to immediately stop transferring the wafer to the wafer pre-exposure process module.

[0104] When the exposure module malfunctions and the processing speed of the wafers in the exposure module is lower than that in the wafer pre-exposure process module, in step S120, when the control module detects that the number of wafers in the necessary buffer assembly is equal to the number of reserved buffer positions in the wafer buffer device, it controls the interlayer process module to stop transferring wafers to the wafer pre-exposure process module. This ensures that when the exposure module malfunctions, all wafers in the wafer pre-exposure process module can be transferred and buffered in the wafer buffer device.

[0105] In some embodiments, after performing step S130, the method further includes performing the following steps:

[0106] S140, The control module analyzes and determines that the exposure module's operating status information indicates that the exposure module has resumed normal operation.

[0107] S150, The control module controls the robotic arm to sequentially transfer the wafers cached in the necessary cache component to the cooling component and the exposure module;

[0108] S160. After all the wafers cached in the necessary cache component are transferred to the exposure module, the control module controls the interlayer robotic arm to transfer the wafers cached in the spare cache component to the necessary cache component, and controls the interface module robotic arm to sequentially transfer the wafers transferred to the necessary cache component to the cooling component and the exposure module, until all the wafers cached in the spare cache component are transferred to the necessary cache component.

[0109] S170, the control module controls the wafers in the interlayer process module to sequentially pass through the pre-exposure process module, the necessary buffer component, and the cooling component before being transferred to the exposure module for photolithography. That is, the necessary buffer component is an essential component before the wafer enters the cooling component, requiring minimal modification to the original wafer buffer device, interface module, robotic arm, etc., and exhibiting high adaptability to original semiconductor components.

[0110] In some embodiments, step S160, in which the control module controls the interlayer robotic arm to transfer the wafer cached in the spare cache component to the required cache component, and controls the interface module robotic arm to sequentially transfer the wafer transferred to the required cache component to the cooling component and the exposure module, includes:

[0111] S161, The control module controls the interlayer robotic arm to remove the wafers cached in the spare cache component and place them in the required cache component in the order of the first wafer cache station, the M / 2th wafer cache station, the second wafer cache station, the M / 2+1th wafer cache station, ..., the M / 2-1th wafer cache station and the Mth wafer cache station, where M is the number of wafer cache stations in the required cache component;

[0112] S162, the control module controls the interface module robotic arm to remove wafers from the necessary cache assembly in the following order: the first wafer cache station, the M / 2th wafer cache station, the second wafer cache station, the M / 2+1th wafer cache station, ..., the M / 2-1th wafer cache station, and the Mth wafer cache station, and then sequentially transfer them to the cooling assembly and the exposure module. This prevents interference between the interlayer robotic arm that places wafers into the necessary cache assembly and the interface module robotic arm that removes wafers from the necessary cache assembly, effectively avoiding damage to components and wafers.

[0113] In some embodiments, the step of the control module selecting to use only the necessary cache component to transfer the wafer based on the operating status information of the exposure module includes:

[0114] S210, The control module analyzes and determines that the exposure module's operating status information is normal.

[0115] S220: The control module controls the wafers in the pre-exposure process module to sequentially pass through the pre-exposure process module, the necessary cache component, and the cooling component before being transferred to the exposure module for photolithography. The number of wafers in the necessary cache component is less than or equal to the number of reserved cache stations in the wafer cache device. When the exposure module is operating normally, the wafers only pass through the necessary cache component. Only when the exposure module malfunctions are the necessary cache component and the backup cache component used to cache the wafers. This avoids the backup cache component being constantly activated, saving energy and unnecessary maintenance. Furthermore, if the necessary cache component or the backup cache component is damaged, only the damaged cache component needs to be maintained or replaced, without replacing the entire wafer cache device, thus saving maintenance costs.

[0116] In some embodiments, after performing step S220, the control module further includes the following step: S230, whereby the control module selects whether to transfer the wafers in the necessary buffer component to the cooling component and the exposure module based on the first station usage status information of the exposure module and the second station usage status information of the cooling component. The control module monitors the station usage status of the cooling component and the exposure module in real time and adjusts the number of wafers transferred to the pre-exposure process processing module and the necessary buffer component accordingly. This prevents sudden abnormal operation of the exposure module, which could prevent all wafers in the pre-exposure process processing module from being moved to the wafer buffer device, causing the wafers to remain in the pre-exposure process processing module for an extended period and affecting wafer quality.

[0117] In some embodiments, step S230, where the control module selects whether to transfer the wafer in the necessary buffer component to the cooling component and the exposure module based on the first station usage status information of the exposure module and the second station usage status information of the cooling component, includes:

[0118] S2311, The control module analyzes and finds that the usage status information of the first workstation and the usage status information of the second workstation are both information on no idle workstations.

[0119] S2312, The control module controls the interface module to stop the robotic arm from transferring the wafer in the necessary buffer component to the cooling component and the exposure module;

[0120] S2313. When the control module detects that the number of wafers in the necessary buffer component is equal to the number of reserved buffer stations in the wafer buffer device, it controls the interlayer process module to stop transferring wafers to the wafer pre-exposure process module. The module monitors the station usage status of the cooling component and the exposure module in real time and adjusts the number of wafers entering the wafer pre-exposure process module and the necessary buffer component accordingly. This prevents sudden abnormal operation of the exposure module, which could prevent all wafers in the wafer pre-exposure process module from being moved to the wafer buffer device, causing wafers to remain in the wafer pre-exposure process module for an extended period and affecting wafer quality.

[0121] In some embodiments, step S230, where the control module selects whether to transfer the wafer in the necessary buffer component to the cooling component and the exposure module based on the first station usage status information of the exposure module and the second station usage status information of the cooling component, includes:

[0122] S2321, The control module analyzes and finds that at least one of the first workstation usage status information and the second workstation usage status information is an idle workstation;

[0123] S2322, the control module controls the interface module robotic arm to sequentially transfer wafers from the necessary buffer component to the cooling component and the exposure module until there are no idle workstations in either component. That is, if the workstations in the cooling component and exposure module are not completely filled with wafers, the wafers transferred to the necessary buffer component will be immediately picked up by the interface module robotic arm and transferred backward until both components are full. The system monitors the workstation usage status of the cooling component and exposure module in real time and adjusts the number of wafers entering the pre-exposure process processing module and the necessary buffer component accordingly. This prevents sudden malfunctions in the exposure module, which could prevent wafers from being fully moved to the wafer buffer, causing them to remain in the pre-exposure process processing module for extended periods and affecting wafer quality.

[0124] While embodiments of the present invention have been described in detail above, it will be apparent to those skilled in the art that various modifications and variations can be made to these embodiments. However, it should be understood that such modifications and variations fall within the scope and spirit of the invention as set forth in the claims. Furthermore, the invention described herein may have other embodiments and can be implemented or carried out in various ways.

Claims

1. A method of using a wafer caching system, characterized in that, Includes the following steps: A wafer caching device and a control module are provided, wherein the wafer caching device is disposed between a pre-wafer processing module and a post-wafer processing module. The pre-wafer processing module includes an interlayer process module and a pre-exposed wafer process module, and the post-wafer processing module includes a cooling component and an exposure module. The wafers in the interlayer process module are sequentially passed through the pre-exposed wafer process module, the wafer caching device, and the cooling component before being transferred to the exposure module for photolithography. The number of wafer caching stations in the wafer caching device is greater than or equal to the number of wafer processing stations in the pre-exposed wafer process module. The control module controls the wafer transfer speed of the interlayer process module to the wafer pre-exposure process module, so that the total number of wafers in the wafer pre-exposure process module and the wafer buffer device is equal to the number of wafer buffer stations in the wafer buffer device. It also includes the following steps: The wafer cache device includes a necessary cache component and a spare cache component, and the total number of wafer cache stations in the necessary cache component and the spare cache component is greater than the number of wafer processing stations in the wafer pre-exposure process module. The control module selects to use the necessary cache component and the backup cache component to cache the wafer or selects to use only the necessary cache component to transmit the wafer based on the operating status information of the exposure module.

2. The method of claim 1, wherein, The step of the control module selecting to use the necessary cache component and the spare cache component to cache the wafer based on the operating status information of the exposure module includes: S110, The control module analyzes and determines that the operating status information of the exposure module is abnormal operating information of the exposure module; S120, The control module controls the interlayer process module to stop transferring the wafer to the pre-exposed wafer process module, and controls the processed wafer in the pre-exposed wafer process module to be transferred to the cache in the necessary cache component. S130. After all wafers are cached in the wafer cache station of the necessary cache component, the control module controls the processed wafers in the wafer pre-exposure process processing module to be transferred to the backup cache component for caching.

3. The method of using the wafer caching system according to claim 1, characterized in that, The step of the control module selecting to use only the necessary cache component to transmit the wafer based on the operating status information of the exposure module includes: S210, The control module analyzes and determines that the exposure module's operating status information is normal. S220, The control module controls the wafers in the pre-exposure process module to pass sequentially through the pre-exposure process module, the necessary cache component, and the cooling component before being transferred to the exposure module for photolithography, and ensures that the number of wafers in the necessary cache component is less than or equal to the number of reserved cache stations in the wafer cache device.

4. The method of using the wafer caching system according to claim 2, characterized in that, After performing step S130, the following steps are also included: S140, The control module analyzes and determines that the exposure module's operating status information indicates that the exposure module has resumed normal operation. S150, The control module controls the robotic arm to sequentially transfer the wafers cached in the necessary cache component to the cooling component and the exposure module; S160. After all the wafers cached in the necessary cache component are transferred to the exposure module, the control module controls the interlayer robotic arm to transfer the wafers cached in the spare cache component to the necessary cache component, and controls the interface module robotic arm to sequentially transfer the wafers transferred to the necessary cache component to the cooling component and the exposure module, until all the wafers cached in the spare cache component are transferred to the necessary cache component. S170, The control module controls the wafer in the interlayer process module to pass sequentially through the wafer pre-exposure process module, the necessary buffer component and the cooling component before being transmitted to the exposure module for photolithography.

5. The method of using the wafer caching system according to claim 3, characterized in that, After performing step S220, the following steps are also included: S230, the control module selects whether to transfer the wafer in the necessary buffer component to the cooling component and the exposure module based on the first station usage status information of the exposure module and the second station usage status information of the cooling component.

6. The method of using the wafer caching system according to claim 5, characterized in that, In step S230, the step of the control module selecting whether to transfer the wafer in the necessary buffer component to the cooling component and the exposure module based on the first station usage status information of the exposure module and the second station usage status information of the cooling component includes: S2311, The control module analyzes and finds that the usage status information of the first workstation and the usage status information of the second workstation are both information on no idle workstations. S2312, The control module controls the interface module to stop the robotic arm from transferring the wafer in the necessary buffer component to the cooling component and the exposure module; S2313. When the control module detects that the number of wafers in the necessary cache component is equal to the number of reserved cache stations in the wafer cache device, it controls the interlayer process module to stop transferring wafers to the wafer pre-exposure process processing module.

7. The method of using the wafer cache system according to claim 5, characterized in that, In step S230, the step of the control module selecting whether to transfer the wafer in the necessary buffer component to the cooling component and the exposure module based on the first station usage status information of the exposure module and the second station usage status information of the cooling component includes: S2321, The control module analyzes and finds that at least one of the first workstation usage status information and the second workstation usage status information is an idle workstation; S2322, The control module controls the robotic arm to sequentially transfer the wafers in the necessary buffer component to the cooling component and the exposure module until there are no idle workstations in the cooling component and the exposure module.

8. The method of using the wafer cache system according to claim 4, characterized in that, In step S160, the control module controls the interlayer robotic arm to transfer the wafer cached in the spare cache component to the required cache component, and controls the interface module robotic arm to sequentially transfer the wafer transferred to the required cache component to the cooling component and the exposure module. This step includes: S161, The control module controls the interlayer robotic arm to remove the wafers cached in the spare cache component and place them in the required cache component in the order of the first wafer cache station, the M / 2th wafer cache station, the second wafer cache station, the M / 2+1th wafer cache station, ..., the M / 2-1th wafer cache station and the Mth wafer cache station, where M is the number of wafer cache stations in the required cache component; S162, The control module controls the interface module robotic arm to remove the wafers from the necessary cache component in the order of the first wafer cache station, the M / 2th wafer cache station, the second wafer cache station, the M / 2+1th wafer cache station, ..., the M / 2-1th wafer cache station and the Mth wafer cache station, and then sequentially transfer them to the cooling component and the exposure module.

9. The method of using the wafer caching system according to claim 2, characterized in that, In step S110, the abnormal operation information of the exposure module includes either exposure module crash information or information that the wafer processing speed in the exposure module is less than the wafer processing speed in the wafer pre-exposure process processing module. When the abnormal information of the exposure module is exposure module crash information, in step S120, the control module controls the interlayer process module to immediately stop transferring the wafer to the wafer pre-exposure process module. When the abnormal operation information of the exposure module is that the wafer processing speed in the exposure module is less than the wafer processing speed in the wafer pre-exposure process processing module, in step S120, when the control module detects that the number of wafers in the necessary cache component is equal to the number of reserved cache stations in the wafer cache device, it controls the interlayer process module to stop transferring wafers to the wafer pre-exposure process processing module.

10. A wafer caching system, characterized in that, include: A wafer buffer device is disposed between a front-end wafer processing module and a back-end wafer processing module. The front-end wafer processing module includes an interlayer process module and a wafer pre-exposure process module. The back-end wafer processing module includes a cooling component and an exposure module. The wafers in the interlayer process module pass sequentially through the wafer pre-exposure process module, the wafer buffer device, and the cooling component before being transferred to the exposure module for photolithography. The number of wafer buffer stations in the wafer buffer device is greater than or equal to the number of wafer processing stations in the wafer pre-exposure process module. The control module is used to control the wafer transfer speed of the interlayer process module to the wafer pre-exposure process module, so that the total number of wafers in the wafer pre-exposure process module and the wafer buffer device is equal to the number of wafer buffer stations in the wafer buffer device. The wafer caching device includes a necessary caching component and a spare caching component, and the total number of wafer caching stations in the necessary caching component and the spare caching component is greater than the number of wafer processing stations in the wafer pre-exposure process processing module. The control module is used to select whether to use the necessary caching component and the spare caching component to cache the wafer or to select to use only the necessary caching component to transfer the wafer based on the operating status information of the exposure module.

11. The wafer cache system according to claim 10, characterized in that, The total number of wafer cache stations in the required cache components and the spare cache components is equal to the sum of the number of wafer processing stations and the number of reserved cache stations in the wafer pre-exposure process module.

12. The wafer cache system according to claim 10, characterized in that, The backup cache component is provided at least one, and the required cache component and at least one of the backup cache components are stacked sequentially from bottom to top.

13. The wafer cache system according to claim 10, characterized in that, Both the required cache component and the backup cache component include several sets of cache units. Each cache unit includes N wafer supports for supporting wafers, where N is a positive integer greater than or equal to 3. Each wafer support includes a support body and a wafer contact portion disposed near the proximal end of the support body. The support bodies of the N wafer supports in each set of cache units are respectively disposed along different radii of the wafers to be supported, and the proximal ends of the support bodies are arranged facing each other. The surface of the wafer contact portion is higher or lower than the surface of the support body. The wafer contact portions of the N wafer supports in each set of cache units are evenly distributed on the same circumference to form a wafer cache station for supporting wafers.

14. The wafer caching system according to claim 13, characterized in that, The wafer support also includes a clearance portion, one end of which is connected to the proximal end of the support body, and the other end of which is connected to the wafer contact portion. The surface of the wafer contact portion is lower than the surface of the support body, and the surface of the clearance portion is lower than both the surface of the support body and the surface of the wafer contact portion.

15. The wafer cache system according to claim 10, characterized in that, The necessary cache component and the cooling component transfer wafers via an interface module robotic arm. The necessary cache component and the backup cache component, the necessary cache component and the wafer pre-exposure process processing module, and the backup cache component and the wafer pre-exposure process processing module all transfer wafers via interlayer robotic arms.

16. The wafer caching system according to claim 13, characterized in that, The N is equal to 4. The structure formed by the far ends of the support bodies of the four wafer supports in each group of cache units is a rectangular structure. The support bodies extend in the diagonal direction of the rectangular structure, and the near ends of the support bodies are set towards the center of the rectangular structure.

17. The wafer cache system according to claim 16, characterized in that, In the required cache component, the adjacent sides of the rectangular structure are of equal length, and the side lengths of the two symmetrical sides of the rectangular structure in the required cache component are greater than the diameter of the wafer to be supported; in the spare cache component, the adjacent sides of the rectangular structure are of equal length, and the side length of one symmetrical side of the rectangular structure in the spare cache component is greater than the diameter of the wafer to be supported, while the side length of the other symmetrical side is less than or equal to the diameter of the wafer to be supported.

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