Control circuit, control method, and electronic device

Abstract

The application provides a control circuit, a control method and an electronic device. The control circuit comprises a storage circuit, a voltage detection circuit, a processing circuit and a wake-up circuit. The storage circuit comprises a register and stores a program code. The voltage detection circuit detects an external voltage. When the external voltage reaches a first preset voltage, the processing circuit accesses the register. When the external voltage reaches a second preset voltage, the processing circuit enters a power saving mode. In the power saving mode, the processing circuit stops accessing the register. The wake-up circuit detects whether a wake-up event occurs. When the wake-up event does not occur, the processing circuit remains in the power saving mode. When the wake-up event occurs, the wake-up circuit instructs the processing circuit to exit the power saving mode and enter an operation mode. In the operation mode, the processing circuit executes the program code. The control circuit, the control method and the electronic device provided by the application can avoid the control circuit from performing a reset operation multiple times.

Description

Technical Field

[0001] This invention relates to a control circuit, and more particularly to a control circuit that can improve energy storage capacity. Background Technology

[0002] A typical control circuit receives an external voltage and operates accordingly. When the control circuit begins running its program, the external voltage gradually decreases due to power consumption. When the external voltage falls below a Low-Voltage Reset (LVR) voltage, the control circuit is reset. After the reset, the external voltage gradually rises. However, when the control circuit resumes running its program, the external voltage drops again. When the external voltage falls below the LVR voltage, the control circuit is reset again. Because the control circuit is repeatedly reset, it cannot quickly complete the power-on process. Summary of the Invention

[0003] This invention provides a control circuit, including a storage circuit, a voltage detection circuit, a processing circuit, and a wake-up circuit. The storage circuit includes a temporary register and stores program code. The voltage detection circuit detects an external voltage. When the external voltage reaches a first preset voltage, the processing circuit accesses the temporary register. When the external voltage reaches a second preset voltage, the processing circuit enters a power-saving mode. In power-saving mode, the processing circuit stops accessing the temporary register. The wake-up circuit detects whether a wake-up event has occurred. When no wake-up event occurs, the processing circuit remains in power-saving mode. When a wake-up event occurs, the wake-up circuit commands the processing circuit to disable the power-saving mode and enter an operating mode. In operating mode, the processing circuit executes the program code.

[0004] This invention provides a control method applicable to a microcontroller. The control method includes: detecting an external voltage; when the external voltage reaches a first preset voltage, accessing a register; when the external voltage reaches a second preset voltage, commanding the microcontroller to enter a power-saving mode, in which the microcontroller stops accessing the register; detecting whether a wake-up event has occurred; when the wake-up event has not occurred, commanding the microcontroller to maintain the power-saving mode; when the wake-up event occurs, commanding the microcontroller to enter an operating mode. In the operating mode, the microcontroller executes program code.

[0005] The present invention also provides an electronic device that receives electrical energy from an external device, and includes an energy storage circuit, a storage circuit, a voltage detection circuit, a processing circuit, and a wake-up circuit. The energy storage circuit stores electrical energy to provide an external voltage. The storage circuit includes a register and stores program code. The voltage detection circuit detects the external voltage. When the external voltage reaches a first preset voltage, the processing circuit accesses the register. When the external voltage reaches a second preset voltage, the processing circuit enters a power-saving mode. In power-saving mode, the processing circuit stops accessing the register. The wake-up circuit detects whether a wake-up event has occurred. When no wake-up event occurs, the processing circuit remains in power-saving mode. When a wake-up event occurs, the wake-up circuit commands the processing circuit to turn off the power-saving mode and enter an operating mode. In operating mode, the processing circuit executes the program code.

[0006] The control method of the present invention can be implemented by the control circuit and electronic device of the present invention, which can be hardware or software capable of performing specific functions, or can be implemented by storing program code in a storage medium and combining it with specific hardware. When the program code is loaded and executed by an electronic device, processor, computer or machine, the electronic device, processor, computer or machine becomes the control circuit and electronic device for implementing the present invention. Attached Figure Description

[0007] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0008] Figure 1 This is a schematic diagram of the electronic device of the present invention.

[0009] Figure 2A This is a schematic diagram of the control circuit of the present invention.

[0010] Figure 2B This is a schematic diagram of the external voltage of the present invention.

[0011] Figure 3A This is another schematic diagram of the control circuit of the present invention.

[0012] Figure 3B This is another schematic diagram of the external voltage of the present invention.

[0013] Figure 4 This is a flowchart illustrating the control method of the present invention.

[0014] Explanation of reference numerals in the attached figures:

[0015] 110: Electronic devices

[0016] 111: Induction coil

[0017] 112: Energy storage circuit

[0018] 113: Control Circuit

[0019] 130: Radio waves

[0020] VR: Induced Voltage

[0021] VDD: External voltage

[0022] 120: External device

[0023] 200, 300: Control circuit

[0024] 210, 310: Voltage detection circuit

[0025] 220, 320: Wake-up circuit

[0026] 221: Comparator

[0027] 230, 330: Processing circuits

[0028] 240, 340: Storage circuit

[0029] 241, 341: Temporary registers

[0030] 242, 342: Memory

[0031] C: Capacitor

[0032] V1~V3: Preset voltage

[0033] STP: Stop Signal

[0034] RST: Initialization signal

[0035] 250, 350: Drive circuit

[0036] 251: Voltage conversion circuit

[0037] VOP: Output voltage

[0038] 252: Clock Source

[0039] 321: Timer

[0040] CLK1: Clock signal

[0041] T21~T27, T31~T37: Time points

[0042] S411~S417: Steps

[0043] SWU: Wake-up signal Detailed Implementation

[0044] To make the objectives, features, and advantages of this invention more apparent and understandable, embodiments are described below in conjunction with the accompanying drawings. This specification provides different embodiments to illustrate the technical features of different implementations of the invention. The configuration of the elements in the embodiments is for illustrative purposes only and is not intended to limit the invention. Furthermore, some reference numerals are repeated in the embodiments for simplification and are not intended to indicate any correlation between different embodiments.

[0045] Figure 1 This is a schematic diagram of the electronic device of the present invention. The electronic device 110 includes an induction coil 111, an energy storage circuit 112, and a control circuit 113. The induction coil 111 senses a radio wave 130 and generates an induced voltage VR based on the electrical energy component of the radio wave 130. The induction coil 111 provides the induced voltage VR to the energy storage circuit 112 for charging the energy storage circuit 112. The energy storage circuit 112 stores the induced voltage VR for generating an external voltage VDD. In this embodiment, since the induction coil 111 continuously charges the energy storage circuit 112, the external voltage VDD gradually increases. In some embodiments, when the external voltage VDD reaches a target value, the induction coil 111 stops charging the energy storage circuit 112. The control circuit 113 operates according to the external voltage VDD. In one embodiment, the control circuit 113 is a micro-controller unit (MCU).

[0046] This invention does not limit the type of electronic device 110. In one embodiment, the electronic device 110 is a smoke detector or a tag for a Radio Frequency Identification (RFID) system. In this embodiment, an external device 120 transmits radio waves 130 to drive the electronic device 110. This invention does not limit the type of external device 120. In one embodiment, the transmitter 120 is a reader for an RFID system. In another embodiment, the electronic device 110 is a passive stylus. In this embodiment, the external device 120 is a digital tablet. In other embodiments, the external device 120 charges the energy storage circuit 112 via a connecting cable (not shown). In this embodiment, the electronic device 110 does not need to have an induction coil 111.

[0047] Figure 2AThis is a schematic diagram of the control circuit of the present invention. The control circuit 200 includes a voltage detection circuit 210, a wake-up circuit 220, a processing circuit 230, and a storage circuit 240. The voltage detection circuit 210 detects an external voltage VDD. In this embodiment, the external voltage VDD is provided by the energy storage circuit 112. As shown, the energy storage circuit 112 includes at least a capacitor C. The voltage stored in the capacitor C serves as the external voltage VDD.

[0048] Voltage detection circuit 210 stores a preset voltage V1. In one embodiment, the preset voltage V1 is a power-on reset (POR) voltage. When the external voltage VDD is lower than the preset voltage V1, voltage detection circuit 210 enables a stop signal STP. When the external voltage VDD reaches the preset voltage V1, voltage detection circuit 210 enables an initialization signal RST. This invention does not limit the structure of voltage detection circuit 210. Any circuit capable of detecting voltage can be used as voltage detection circuit 210.

[0049] Processing circuit 230 receives a stop signal STP and an initialization signal RST. When the stop signal STP is enabled, processing circuit 230 stops operating. When the initialization signal RST is enabled, processing circuit 230 enters an initialization mode. In initialization mode, processing circuit 230 performs an initialization operation. In one embodiment, processing circuit 230 initializes temporary register 241 in storage circuit 240.

[0050] This invention does not limit how the processing circuit 230 initializes the register 241. In one embodiment, the processing circuit 230 writes a set value to the register 241. In this embodiment, an element within the control circuit 200 (such as comparator 221) operates based on the value of the register 241. This invention does not limit the number of registers in the storage circuit 240. In other embodiments, the storage circuit 240 includes more registers. In this embodiment, the processing circuit 230 writes multiple set values ​​to the register. In some embodiments, the storage circuit 240 further includes a memory 242. The memory 242 stores program code. This invention does not limit the type of memory 242. In one embodiment, the memory 242 is a flash memory.

[0051] In some embodiments, the control circuit 200 further includes a drive circuit 250. The drive circuit 250 drives the processing circuit 230. When the external voltage VDD reaches a preset voltage V1, the voltage detection circuit 210 triggers the drive circuit 250. Therefore, the drive circuit 250 provides at least one drive signal (such as at least one of the output voltage VOP and the clock signal CLK1) to the processing circuit 230. In another embodiment, the drive circuit 250 directly receives the external voltage VDD and determines whether the external voltage VDD reaches the preset voltage V1. When the external voltage VDD reaches the preset voltage V1, the drive circuit 250 provides a drive signal to the processing circuit 230.

[0052] This invention does not limit the structure of the driving circuit 250. In one embodiment, the driving circuit 250 includes a voltage conversion circuit 251. The voltage conversion circuit 251 converts an external voltage VDD to generate an output voltage VOP and provides the output voltage VOP to the processing circuit 230. This invention does not limit how the voltage conversion circuit 251 converts the external voltage VDD. In one embodiment, the voltage conversion circuit 251 increases or decreases the level of the external voltage VDD. When the processing circuit 230 receives the output voltage VOP, the processing circuit 230 performs an initialization operation, such as initializing the register 241. This invention does not limit the structure of the voltage conversion circuit 251. In one embodiment, the voltage conversion circuit 251 is a low-dropout regulator (LDO). In another embodiment, the driving circuit 250 includes a clock source 252. The clock source 252 generates a clock signal CLK1 and provides the clock signal CLK1 to the processing circuit 230. This invention does not limit the circuit structure of the clock source 252. In one embodiment, clock source 252 includes an internal resistive-capacitive oscillator (IRC).

[0053] In other embodiments, the processing circuit 230 operates in a corresponding mode based on the frequency of the clock signal CLK1. For example, when the frequency of the clock signal CLK1 is equal to a first value, the processing circuit 230 enters a standby mode. When the frequency of the clock signal CLK1 is equal to a second value, the processing circuit 230 enters an operating mode. The first value is less than the second value. The first value is approximately 1 MHz, and the second value is approximately 4 MHz, 8 MHz, 24 MHz, or 48 MHz.

[0054] In some embodiments, the voltage detection circuit 210 also stores a preset voltage V2. The preset voltage V2 is greater than the preset voltage V1. When the external voltage VDD reaches the preset voltage V2, the processing circuit 230 enters a power-down mode. In power-down mode, the processing circuit 230 stops performing the initialization operation. In this embodiment, the preset voltage V2 is slightly greater than the LVR voltage. In some embodiments, when the external voltage VDD gradually decreases and falls below the LVR voltage, the processing circuit 230 re-executes the initialization operation.

[0055] The wake-up circuit 220 is coupled to the processing circuit 230 and determines whether a wake-up event has occurred. In this embodiment, when the external voltage VDD reaches a preset voltage V2, the wake-up circuit 220 determines whether a wake-up event has occurred. If no wake-up event occurs, the wake-up circuit 220 does not wake up the processing circuit 230. Therefore, the processing circuit 230 remains in power-saving mode. However, when a wake-up event occurs, the wake-up circuit 220 wakes up the processing circuit 230. Therefore, the processing circuit 230 shuts down the power-saving mode and enters an operating mode. In the operating mode, the processing circuit 230 accesses the memory 242 to execute the program code stored in the memory 242.

[0056] In one embodiment, a wake-up event refers to an external voltage VDD reaching a preset voltage V3. The present invention does not limit how the wake-up circuit 220 determines whether the external voltage VDD reaches the preset voltage V3. In one embodiment, the wake-up circuit 220 includes a comparator 221. The comparator 221 compares the external voltage VDD with the preset voltage V3. When the external voltage VDD is less than the preset voltage V3, the comparator 221 does not enable a wake-up signal SWU. Therefore, the processing circuit 230 remains in power-saving mode. When the external voltage VDD reaches the preset voltage V3, the comparator 221 enables the wake-up signal SWU. Therefore, the processing circuit 230 disables the power-saving mode and enters the operating mode. In one embodiment, after the processing circuit 230 enters the operating mode, the wake-up circuit 220 stops detecting whether a wake-up event has occurred. Therefore, power consumption of the control circuit 200 can be saved. In some embodiments, after the wake-up circuit 220 wakes up the processing circuit 230, the processing circuit 230 ignores the wake-up signal SWU. In this embodiment, the processing circuit 230 may re-enter the power-saving mode or turn off the power-saving mode according to the program code in the memory 242.

[0057] In some embodiments, the wake-up circuit 220 includes at least one register (not shown). In this embodiment, when the external voltage VDD reaches a preset voltage V1, the processing circuit 230 performs an initialization operation. This initialization operation involves writing at least one set value into the register of the wake-up circuit 220 to initialize the comparator 221.

[0058] In this embodiment, the preset voltage V3 is greater than the preset voltage V2, and the preset voltage V2 is greater than the preset voltage V1. For example, the preset voltage V3 can be 4V, the preset voltage V2 can be 1.8V, and the preset voltage V1 can be 1.2V.

[0059] Figure 2B This is a schematic diagram of the external voltage VDD of the present invention. Before time point T21, the external voltage VDD generated by the energy storage circuit 112 gradually increases because the induction coil 111 charges the energy storage circuit 112. Since the external voltage VDD is lower than the preset voltage V1, the processing circuit 230 does not operate.

[0060] At time T21, the external voltage VDD reaches the preset voltage V1. Therefore, the processing circuit 230 enters an initialization mode. In the initialization mode, the processing circuit 230 performs an initialization operation. During the initialization operation, the processing circuit 230 does not consume much voltage, so the external voltage VDD continues to rise.

[0061] At time T22, because the external voltage VDD reaches the preset voltage V2, the processing circuit 230 enters a power-saving mode and suspends the initialization operation. Before the processing circuit 230 enters the power-saving mode, the external voltage VDD drops slightly. Since the external voltage VDD is not lower than the LVR voltage, it will not trigger the processing circuit 230 to perform a reset operation, such as initializing the register 241.

[0062] At time T23, since the processing circuit 230 has entered a power-saving mode, the external voltage VDD gradually increases. At this time, the wake-up circuit 220 starts to operate, determining whether a wake-up event has occurred.

[0063] At time T24, because the external voltage VDD reaches the preset voltage V3, the wake-up circuit 220 wakes up the processing circuit 230. Therefore, the processing circuit 230 shuts down the power-saving mode and enters an operating mode. In the operating mode, the processing circuit 230 executes the program code in the memory 242. While executing the program code, the processing circuit 230 incurs power loss, causing the external voltage VDD to gradually decrease.

[0064] At time T25, the processing circuit 230 enters power-saving mode according to the program code in the memory 242. Since the processing circuit 230 stops operating, the external voltage VDD gradually rises after time T25.

[0065] At time T26, processing circuit 230, based on the program code in memory 242, disables power-saving mode and enters operating mode. In operating mode, processing circuit 230 executes the program code in memory 242, thus the external voltage VDD gradually decreases.

[0066] At time T27, the processing circuit 230 enters power-saving mode according to the program code in the memory 242. Since the processing circuit 230 stops operating, the external voltage VDD gradually rises after time T27.

[0067] In this embodiment, when the external voltage VDD reaches the preset voltage V2, the processing circuit 230 enters a power-saving mode to reduce power consumption. Therefore, the external voltage VDD steadily and continuously rises. When the external voltage VDD reaches the preset voltage V3, it indicates that the external voltage VDD is sufficient. At this time, even if the processing circuit 230 executes the program code in the memory 242, it will not allow the external voltage VDD to fall below the LVR voltage, thus avoiding the processing circuit 230 from performing a reset operation multiple times.

[0068] Figure 3A This is another schematic diagram of the control circuit of the present invention. Figure 3A The control circuit 300 is similar to Figure 2A The control circuit 200 differs in that... Figure 3A The wake-up circuit 320 is a timer 321. Because... Figure 3A The voltage detection circuit 310, processing circuit 330, and storage circuit 340 have similar characteristics to Figure 2A The voltage detection circuit 210, processing circuit 230, and storage circuit 240 are described in detail, so they will not be described further.

[0069] When the external voltage VDD reaches the preset voltage V2, the processing circuit 330 enters a power-saving mode. In this embodiment, the wake-up circuit 320 detects whether the processing circuit 330 has been in power-saving mode for a preset value (e.g., 4 seconds). If the processing circuit 330 has been in power-saving mode for less than the preset value, the wake-up circuit 320 does not wake up the processing circuit 330. However, if the processing circuit 330 has been in power-saving mode for a preset value, the wake-up circuit 320 wakes up the processing circuit 330. Therefore, the processing circuit 330 shuts down the power-saving mode and enters the operation mode. In one embodiment, after the wake-up circuit 320 wakes up the processing circuit 330, the wake-up circuit 320 stops operating. In this embodiment, once the processing circuit 330 is woken up, it is no longer controlled by the wake-up circuit 320.

[0070] In this embodiment, the wake-up circuit 320 is a timer 321. The timer 321 counts the number of pulses of a clock signal CLK2 and adjusts the count value based on the counting result. When the count value is less than a target value, it indicates that the processing circuit 330 has been in power-saving mode for less than a preset value. Therefore, the timer 321 does not enable the wake-up signal SWU, allowing the processing circuit 330 to remain in power-saving mode. When the count value reaches the target value, it indicates that the processing circuit 330 has been in power-saving mode for a preset value. Therefore, the timer 321 enables the wake-up signal SWU, causing the processing circuit 330 to turn off power-saving mode and enter operating mode.

[0071] In some embodiments, when the external voltage VDD reaches a preset voltage V1, the processing circuit 330 writes a set value to the register 341. In this embodiment, the timer 321 operates according to the set value stored in the register 341. In another embodiment, the wake-up circuit 320 further includes a register (not shown). When the external voltage VDD reaches the preset voltage V1, the processing circuit 330 writes a set value to the register within the wake-up circuit 320. In this embodiment, the timer 321 operates according to the set value in the register within the wake-up circuit 320.

[0072] This invention does not limit the source of the clock signal CLK2. In one embodiment, the clock signal CLK2 is provided by the driving circuit 350. In this embodiment, the driving circuit 350 may include a first clock source (not shown) and a second clock source (not shown). The first clock source is used to provide the clock signal CLK2. The second clock source provides a driving signal SD to the processing circuit 330. In this embodiment, the driving signal SD is a clock signal (such as...) Figure 2A (CLK1). In other embodiments, the drive circuit 350 includes a voltage conversion circuit (not shown) for supplying power to the processing circuit 330. In this embodiment, the voltage provided by the drive circuit 350 serves as the drive signal SD.

[0073] Figure 3B This is a schematic diagram of the external voltage VDD of the present invention. Figure 3B and Figure 2B Similar, the difference is that, Figure 3B The time point T34 is different Figure 2B The T24. Figure 2B In the above, time point T24 is when the external voltage VDD reaches the preset voltage V3. Figure 3B In the above, time point T34 is the time when the processing circuit 330 enters the power-saving mode and reaches a preset value.

[0074] exist Figure 3BAt time point T33, processing circuit 330 enters power-saving mode, and timer 321 starts timing. At time point T34, the time that processing circuit 330 has been in power-saving mode reaches a preset value, so timer 321 enables the wake-up signal SWU, commanding processing circuit 330 to turn off power-saving mode and enter an operating mode. Since the characteristics of external voltage VDD at times T31-T33 and T35-T37 are similar to those at times T21-T23 and T25-T27 in section 2B, they will not be described further.

[0075] Figure 4 This is a schematic flowchart of the control method of the present invention. The control method of the present invention is applicable to a microcontroller. First, an external voltage is received (step S411). In one embodiment, the external voltage is provided by a capacitor. In this embodiment, the capacitor is located outside the microcontroller.

[0076] Next, it is determined whether the external voltage reaches a first preset voltage (step S412). When the external voltage reaches the first preset voltage, an initialization operation is performed (step S413). In one embodiment, the initialization operation involves writing a setting parameter into a register. The register may be located within the microcontroller. In one embodiment, step S413 also converts the external voltage to generate a drive voltage for the microcontroller. In another embodiment, step S413 generates a clock signal for the microcontroller. In other embodiments, when the external voltage is less than the first preset voltage, the microcontroller is disabled, causing it to stop operating.

[0077] Then, it is determined whether the external voltage reaches a second preset voltage (step S414). When the external voltage reaches the second preset voltage, the microcontroller is commanded to enter a power-saving mode (step S415). In power-saving mode, the microcontroller stops accessing the registers.

[0078] Next, a wake-up event is detected (step S416). If no wake-up event occurs, the microcontroller is instructed to remain in power-saving mode. If a wake-up event occurs, the microcontroller is instructed to enter an operating mode (step S417). In operating mode, the microcontroller executes program code. In one embodiment, when the microcontroller enters operating mode, the detection of whether a wake-up event has occurred is stopped.

[0079] In one embodiment, a wake-up event refers to an external voltage reaching a third preset voltage. In this embodiment, when the external voltage is less than the third preset voltage, the microcontroller is commanded to maintain power-saving mode. When the external voltage reaches the third preset voltage, the microcontroller is woken up, causing it to disable the power-saving mode and enter operating mode. In this embodiment, the third preset voltage is greater than the second preset voltage, and the second preset voltage is greater than the first preset voltage.

[0080] In another embodiment, a wake-up event refers to the time the microcontroller has been in power-saving mode reaching a preset value. In this embodiment, when the external voltage reaches a second preset voltage and the microcontroller enters the power-saving mode, a timer is enabled, causing the timer to adjust a count value. Then, it is determined whether the count value has reached a target value. When the count value is less than the target value, it indicates that the time the microcontroller has been in power-saving mode is less than a preset value. Therefore, the microcontroller is commanded to remain in power-saving mode. When the count value reaches the target value, it indicates that the time the microcontroller has been in power-saving mode has reached a preset value. Therefore, the microcontroller is woken up, causing it to turn off power-saving mode and enter operating mode.

[0081] The control method of the present invention, or a specific form thereof, or a portion thereof, may exist in the form of program code. The program code may be stored on physical media, such as floppy disks, optical disks, hard disks, or any other machine-readable (e.g., computer-readable) storage media, or may be a computer program product, not limited to an external form. When the program code is loaded and executed by a machine, such as a computer, that machine becomes involved in the control circuitry and electronic device of the present invention. The program code may also be transmitted via some transmission medium, such as wires or cables, optical fibers, or any transmission method. When the program code is received, loaded, and executed by a machine, such as a computer, that machine becomes involved in the control circuitry and electronic device of the present invention. When implemented in a general-purpose processing unit, the program code, in conjunction with the processing unit, provides a unique device that operates similarly to an application-specific logic circuit.

[0082] Unless otherwise defined, all terms herein (including technical and scientific terms) are as commonly understood by one of ordinary skill in the art. Furthermore, unless expressly stated otherwise, definitions of terms in general dictionaries should be interpreted as consistent with their meaning in writings of their relevant technical field, and not as idealized or overly formal expressions. While terms such as “first,” “second,” etc., may be used to describe various elements, these elements should not be limited by these terms. These terms are merely used to distinguish one element from another.

[0083] While the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the invention. Any person skilled in the art can make variations and modifications without departing from the spirit and scope of the invention. For example, the systems, apparatus, or methods described in the embodiments of the present invention can be implemented in physical embodiments of hardware, software, or a combination of hardware and software. Therefore, the scope of protection of the present invention shall be determined by the appended claims.

Claims

1. A control circuit, characterized in that, include: A storage circuit includes a temporary register that stores program code; A voltage detection circuit for detecting an external voltage; A processing circuit accesses the register when the external voltage reaches a first preset voltage, and enters a power-saving mode when the external voltage reaches a second preset voltage. In the power-saving mode, the processing circuit stops accessing the register. as well as A wake-up circuit detects whether a wake-up event has occurred. When the wake-up event occurs, the wake-up circuit commands the processing circuit to turn off the power-saving mode and enter an operating mode. in: When the wake-up event does not occur, the processing circuit remains in the power-saving mode; In the operating mode, the processing circuit executes the program code.

2. The control circuit as described in claim 1, characterized in that, When the external voltage is less than the first preset voltage, the voltage detection circuit disables the processing circuit; when the external voltage is the first preset voltage, the voltage detection circuit enables an initialization signal, allowing the processing circuit to access the temporary register.

3. The control circuit as described in claim 1, characterized in that, The wake-up event is when the external voltage reaches a third preset voltage, the third preset voltage being greater than the second preset voltage, and the second preset voltage being greater than the first preset voltage.

4. The control circuit as described in claim 3, characterized in that, The wake-up circuit is a comparator. When the external voltage is less than the third preset voltage, the comparator does not enable a wake-up signal, so that the processing circuit remains in the power-saving mode. When the external voltage reaches the third preset voltage, the comparator enables the wake-up signal, so that the processing circuit turns off the power-saving mode and enters the operation mode.

5. The control circuit as described in claim 1, characterized in that, The wake-up event is defined as the processing circuit entering the power-saving mode for a preset time.

6. The control circuit as described in claim 5, characterized in that, The wake-up circuit is a timer. When the count value of the timer is less than a target value, the timer does not enable a wake-up signal, so that the processing circuit remains in the power-saving mode. When the count value of the timer reaches the target value, the timer enables the wake-up signal, so that the processing circuit turns off the power-saving mode and enters the operation mode.

7. A control method, characterized in that, Applicable to a microcontroller, the control method includes: Detect an external voltage; When the external voltage reaches a first preset voltage, a temporary register is accessed; When the external voltage reaches a second preset voltage, the microcontroller is commanded to enter a power-saving mode. In the power-saving mode, the microcontroller stops accessing the register. Detect whether a wake-up event has occurred; When the wake-up event does not occur, the microcontroller is instructed to remain in the power-saving mode; and When the wake-up event occurs, the microcontroller is commanded to enter an operating mode; In the aforementioned operating mode, the microcontroller executes a program code.

8. The control method as described in claim 7, characterized in that, Also includes: When the external voltage reaches the first preset voltage, the external voltage is converted to generate a driving voltage; as well as The drive voltage is provided to the microcontroller.

9. The control method as described in claim 7, characterized in that, Also includes: When the external voltage reaches the first preset voltage, a clock signal is generated; as well as The clock signal is provided to the microcontroller.

10. An electronic device, characterized in that, Receiving electrical energy from an external device, and including: An energy storage circuit stores the electrical energy for use in providing an external voltage; A storage circuit includes a temporary register that stores program code; A voltage detection circuit is used to detect the external voltage; A processing circuit, wherein when the external voltage reaches a first preset voltage, the processing circuit accesses the temporary register; when the external voltage reaches a second preset voltage, the processing circuit enters a power-saving mode; and in the power-saving mode, the processing circuit stops accessing the temporary register; and A wake-up circuit detects whether a wake-up event has occurred. When the wake-up event occurs, the wake-up circuit commands the processing circuit to turn off the power-saving mode and enter an operating mode. in: When the wake-up event does not occur, the processing circuit remains in the power-saving mode; In the operating mode, the processing circuit executes the program code.

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