Circuit equation system partition solving method and system based on two-part graph theory
Patent Information
- Application Number
- CN202311600072.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-11-24
- Publication Date
- 2026-10-20
- Estimated Expiration
- 2043-11-24
AI Technical Summary
在对每个子系统独立求解过程中,涉及大规模线性方程组的求解,而一般的方程系统中存在独立方程与联立方程,直接求解会导致结构奇异或失败等问题,使得求解过程中的收敛速度和求解效率较低
[0020]总体而言,通过本发明所构思的以上技术方案,能够取得以下有益效果:提供了一种基于二部图理论的电路方程系统分区求解方法,针对电路方程系统中存在的独立方程与联立方程进行分析,对结构关联矩阵中的元素进行排序与分区,基于方程与变量之间的最大匹配原则,确定方程之间的最优求解次序,避免求解过程中的结构奇异或者求解失败等问题;其次将得到的结果进行分区,基于无向图的强连通分量的分区算法,对电路方程系统进行划分,得到块对角形式的结构矩阵;最后采用LU分解法并行求解,提高了求解过程中的收敛速度和求解效率。
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Abstract
Description
Technical Field
[0001] This invention belongs to the field of power systems, and more specifically, relates to a method and system for solving circuit equations by partitioning based on bipartite graph theory. Background Technology
[0002] Driven by energy structure upgrading, resource optimization, and power technology innovation, large-scale new energy sources and power electronic devices will be connected to the power grid, resulting in dynamic responses of the power system that are coupled across multiple time scales and have wide-ranging interactive effects. To accurately characterize system characteristics and improve real-time simulation speed, electromagnetic transient simulation has gradually become a key technology for understanding system characteristics.
[0003] Most electromagnetic transient simulation analyzers widely used in the power industry were largely established in the mid-to-late 20th century, and the basic solution algorithms have remained largely unchanged since then. The general solution process involves: extracting the circuit from the front-end power grid model to obtain the power grid topology matrix; then discretizing the energy storage components using a modified Euler method; capturing switching events using interpolation; and finally obtaining a system of algebraic equations. The Newton-Raphson iterative method is typically used for solving these equations. The algorithm for solving the linear equations is continuously used in the iterations. By employing techniques such as matrix compression and point reduction during the solution process, the simulation speed is improved by 2 to 3 orders of magnitude. However, compared to large-scale new power electronic systems, this improvement remains negligible.
[0004] Currently, with the rapid development of computers and the widespread adoption of multi-core computers, the biggest change in simulation analysis software in recent years compared to the past is the introduction of multi-core parallel solution algorithms. The front end parses the netlist file to obtain the connection relationships of various components, then divides the power system in the netlist file into multiple subsystems. Each subsystem can be simulated and solved independently in a sub-thread. Finally, the calculation of coupled nodes is performed. Crucially, the unsolved remainder terms in the subsystems are collected and solved in the main thread. The resulting solution is then substituted back into the circuits of each subsystem to complete the solution for the subsystem. The independent solution process for each subsystem involves solving large-scale linear equation systems. However, general equation systems contain both independent and simultaneous equations. Direct solution can lead to structural singularities or failures, resulting in low convergence speed and solution efficiency. Summary of the Invention
[0005] To address the shortcomings and improvement needs of existing technologies, this invention provides a method and system for partitioning and solving circuit equation systems based on bipartite graph theory. The purpose is to improve the convergence speed, solution efficiency, and success rate of solving circuit equation systems by sorting and partitioning the equation system and determining the solution order among equations or groups of equations.
[0006] To achieve the above objectives, according to one aspect of the present invention, a method for solving circuit equation systems by partitioning based on bipartite graph theory is provided, comprising: S1, obtaining the structural correlation matrix of the circuit model, and constructing a corresponding bipartite graph based on the row and column relationships in the structural correlation matrix; S2, pairing the equation set and variable set in the bipartite graph using the maximum matching method to determine the pairing relationship between variables and equations in the bipartite graph; S3, partitioning the pairing relationship using the connectivity of the equation system to obtain a set of subgraph partitions of the bipartite graph; S4, transforming the structural correlation matrix into a block diagonal form based on the subgraph partition set, solving the block diagonal form structural correlation matrix by partitioning to obtain the working state of the circuit model.
[0007] Furthermore, S2 specifically includes: S21, for any variable x in the bipartite graph G = (X, F, E), arbitrarily select an edge from the edges connected to x to connect with the equation f, where X is the set of variables, F is the set of equations, and E is the set of connection relations; S22, when f is not paired, x and f are successfully paired and form a new augmenting path; when f is paired, if the variable x paired with f... ′ It can be combined with other equations f ′ Pairing successful, update the pairing relationship to x and f paired, x ′ and f ′ If a pairing is successful, then select another edge from the edges connected to x to pair with it until x is successfully paired; S23, repeat S21-S22 until all variables in X have been traversed to obtain the final pairing relationship.
[0008] Furthermore, S3 specifically includes: S31, for any unvisited variable, perform a depth-first traversal, divide all traversed variables and equations and the unvisited variable into a subgraph partition, and mark the variables and equations in the subgraph partition as visited; S32, repeat S31 until all variables have been visited, to obtain the subgraph partition set of the bipartite graph.
[0009] Furthermore, the diagonal form of the structural incidence matrix is:
[0010]
[0011] Among them, A i For dimension n i ×n i Let B be a square matrix representing the connection relationship matrix of the nodes within the i-th sub-partition; i For dimension n i ×n t The bar matrix, C i For dimension n t ×ni The bar matrix, B i and C i The x's transpose represents the connection relationship between nodes within the i-th sub-partition and the boundary node of the i-th sub-partition; i For dimension n i The set of variables in the i-th subpartition; b i Let n be the partition of vector b with respect to the edge of the corresponding i-th sub-partition; i n is the number of variables in the i-th subpartition; i = 1, 2, ..., m, where m is the number of subpartitions; n t For square matrix D t The dimension of D; t For dimension n t ×n t A square matrix representing the connection relationships between the boundary nodes of all sub-partitions; vector x t b t These represent the partitioning of vectors x and b with respect to their respective sub-partitions.
[0012] Furthermore, when all the pairing relationships determined in S2 are strong connections, there are no connections between the subgraph partitions in the subgraph partition set obtained in S3, B i C i D t x t b t All are zero matrices.
[0013] Furthermore, the partitioning solution of the block diagonal structural incidence matrix includes solving the following sub-problems respectively:
[0014] A i x i +B i x t =b i
[0015]
[0016] Where i = 1, 2, ..., m, the subproblem is solved by LU decomposition.
[0017] Furthermore, obtaining the structural correlation matrix of the circuit model specifically includes: obtaining the structural correlation matrix of the circuit model using an improved node analysis method.
[0018] According to another aspect of the present invention, a system for solving circuit equations based on bipartite graph theory is provided, comprising: a processor; and a memory storing a computer-executable program, wherein when the program is executed by the processor, the processor performs the method for solving circuit equations based on bipartite graph theory as described above.
[0019] According to another aspect of the present invention, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements the method for solving circuit equation systems by partitioning based on bipartite graph theory as described above.
[0020] In summary, the above-described technical solutions of this invention achieve the following beneficial effects: First, a partitioning solution method for circuit equation systems based on bipartite graph theory is provided. This method analyzes the independent and simultaneous equations within the circuit equation system, sorts and partitions the elements in the structural correlation matrix, and determines the optimal solution order based on the maximum matching principle between equations and variables, thus avoiding structural singularities or solution failures during the solution process. Second, the obtained results are partitioned using a partitioning algorithm based on strongly connected components of an undirected graph to divide the circuit equation system, obtaining a block diagonal structural matrix. Finally, the LU decomposition method is used for parallel solution, improving the convergence speed and solution efficiency during the solution process. Attached Figure Description
[0021] Figure 1 A flowchart of a system partitioning solution method for circuit equations based on bipartite graph theory provided in an embodiment of the present invention;
[0022] Figure 2 A schematic diagram illustrating the implementation process of the system partitioning solution method for circuit equations based on bipartite graph theory provided in this embodiment of the invention;
[0023] Figure 3 The diagram shows the effect before and after the algorithm processing of a circuit system structure matrix provided in an embodiment of the present invention. Detailed Implementation
[0024] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention. Furthermore, the technical features involved in the various embodiments of this invention described below can be combined with each other as long as they do not conflict with each other.
[0025] In this invention, the terms "first," "second," etc. (if present) in the invention and the accompanying drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.
[0026] Figure 1 A flowchart illustrating a method for solving circuit equations in a system based on bipartite graph theory, provided in an embodiment of the present invention. (See also...) Figure 1 , combined Figures 2-3The method for solving circuit equations in a system based on bipartite graph theory is described in detail in this embodiment. The method includes operations S1-S4.
[0027] Operation S1 obtains the structural correlation matrix of the circuit model, and constructs its corresponding bipartite graph based on the row and column relationships in the structural correlation matrix.
[0028] According to an embodiment of the present invention, the specific implementation of obtaining the structural correlation matrix of a circuit model is as follows: The structural correlation matrix of the circuit model is obtained using an improved nodal analysis method. In circuit analysis, nodal analysis is a method that analyzes a circuit using its node voltages. The improved nodal analysis method can also establish the structural correlation matrix of a circuit model. The structural correlation matrix is used to establish the relationship between variables and equations in the circuit model.
[0029] A bipartite graph is a special model in graph theory. Let G = (V, E) be an undirected graph. If a vertex V can be partitioned into two disjoint subsets (X, F), and every edge (x, f) in the graph connects to two vertices x and f belonging to these two distinct vertex sets (x in X, f in F), then graph G is called a bipartite graph. Figure 2 As shown.
[0030] Operation S2 performs a maximum matching pairing on the set of equations and the set of variables in the bipartite graph to determine the pairing relationship between variables and equations in the bipartite graph.
[0031] According to an embodiment of the present invention, operation S2 specifically includes sub-operations S21-S23.
[0032] In suboperation S21, for any variable x in the bipartite graph G = (X, F, E), an equation f is arbitrarily selected from the edges connected to x and paired with it, where X is the set of variables, F is the set of equations, and E is the set of connection relations.
[0033] In suboperation S22, when f is not paired, x and f are successfully paired and a new augmenting path is formed; when f is paired, if the variable x paired with f... ′ It can be combined with other equations f ′ Pairing successful, update the pairing relationship to x and f paired, x ′ and f ′ If x is successfully paired, then select another edge from the edges connected to x to pair with it until x is successfully paired.
[0034] In suboperation S23, suboperations S21-S22 are executed repeatedly until all variables in X have been traversed, and the final pairing relationship is obtained.
[0035] In this embodiment, the obtained pairing relationship is a one-to-one pairing, which ensures the solvability of the system. For this purpose, it is necessary to determine whether the pairing relationship contains all the equations and variables to ensure that the pairing of all equations and variables is completed.
[0036] Operation S3 uses the connectivity of the equation system to partition the pairing relationships to obtain the subgraph partition set of the bipartite graph.
[0037] According to an embodiment of the present invention, operation S3 specifically includes sub-operations S31-S32.
[0038] In suboperation S31, for any unvisited variable, perform a depth-first traversal, divide all traversed variables and equations into a subgraph partition along with the unvisited variable, and mark the variables and equations within the subgraph partition as visited.
[0039] The main idea of depth-first traversal is to start from an unvisited node in the graph, follow a path all the way to the end, then backtrack from the node at the end of the path to the previous node, and then start from another path to the end, recursively repeating this process until all vertices have been traversed.
[0040] In suboperation S32, suboperation S31 is executed repeatedly until all variables have been accessed, resulting in the set of subgraph partitions of the bipartite graph.
[0041] Operation S4 transforms the structural correlation matrix into a block diagonal form based on the subgraph partition set. The block diagonal form of the structural correlation matrix is then solved by partitioning to obtain the working state of the circuit model.
[0042] According to an embodiment of the present invention, the diagonal structural correlation matrix obtained by transformation is:
[0043]
[0044] Among them, A i For dimension n i ×n i Let B be a square matrix representing the connection relationship matrix of the nodes within the i-th sub-partition; i For dimension n i ×n t The bar matrix, C i For dimension n t ×n i The bar matrix, B i and C i The x's transpose represents the connection relationship between nodes within the i-th sub-partition and the boundary node of the i-th sub-partition; i For dimension n i The set of variables in the i-th subpartition; b iLet n be the partition of vector b with respect to the edge of the corresponding i-th sub-partition; i n is the number of variables in the i-th subpartition; i = 1, 2, ..., m, where m is the number of subpartitions; n t For square matrix D t The dimension of D; t For dimension n t ×n t A square matrix representing the connection relationships between the boundary nodes of all sub-partitions; vector x t b t These represent the partitioning of vectors x and b with respect to their respective sub-partitions.
[0045] This embodiment partitions a system of equations, which is equivalent to a system of equations. The effects of processing a circuit system structure matrix before and after processing using the method in this embodiment are as follows: Figure 3 As shown, the circuit equation system is block diagonalized and divided into multiple independent sub-partitions, exhibiting good parallel characteristics, which is beneficial for subsequent parallel solutions. Secondly, the solution order of the equations is determined, i.e., solved sequentially from top to bottom, which improves the solution efficiency.
[0046] According to an embodiment of the present invention, when all the pairing relationships determined in operation S2 are strong connections (e.g. Figure 2 The maximum matching sort set shown), the subgraph partitions in the subgraph partition set obtained in operation S3 are not related to each other (e.g., Figure 2 The equation system is partitioned as shown. At this time, B i C i D t x t b t All are zero matrices. The resulting diagonal structural incidence matrix is:
[0047]
[0048] After the system is partitioned, solutions can be found on each sub-partition, and then combined to obtain the operating state of the original circuit equations. Partitioning the solution to the block diagonal structural incidence matrix involves solving the following subproblems:
[0049] A i x i +B i x t =b i
[0050]
[0051] Where i = 1, 2, ..., m, the subproblems are solved using LU decomposition. According to the circuit system partitioning hierarchy, the above matrix A... iIt can be called a submatrix, matrix D t This can be called the main matrix. The submatrices have the property of being sparse. The variables to be solved in the submatrices are added to the main matrix during the solution process, and finally solved by LU decomposition.
[0052] The circuit equation system partitioning solution method based on bipartite graph theory provided in this invention analyzes the independent and simultaneous equations in the circuit equation system, sorts and partitions the elements in the structural correlation matrix, and determines the optimal solution order between equations based on the maximum matching principle between equations and variables, avoiding problems such as structural singularities or solution failures during the solution process. Secondly, the obtained results are partitioned using a partitioning algorithm based on strongly connected components of an undirected graph to divide the circuit equation system, obtaining a block diagonal structural matrix. Finally, the LU decomposition method is used for parallel solution, improving the convergence speed and solution efficiency during the solution process.
[0053] This invention also provides a system for solving circuit equations in a partitioned manner based on bipartite graph theory, comprising: a processor; and a memory storing a computer-executable program, which, when executed by the processor, causes the processor to perform the aforementioned method for solving circuit equations in a partitioned manner based on bipartite graph theory.
[0054] This invention also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the above-described method for solving circuit equations in a system partitioned manner based on bipartite graph theory.
[0055] Those skilled in the art will readily understand that the above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.
Claims
1. A method for solving circuit equations in a system by partitioning based on bipartite graph theory, characterized in that, include: S1, Obtain the structural correlation matrix of the circuit model, and construct its corresponding bipartite graph based on the row and column relationships in the structural correlation matrix; S2, perform maximum matching on the set of equations and the set of variables in the bipartite graph to determine the pairing relationship between variables and equations in the bipartite graph; S3, the pairing relationship is partitioned using the connectivity of the equation system to obtain the subgraph partition set of the bipartite graph; S4. Based on the subgraph partition set, the structural correlation matrix is transformed into a block diagonal form. The block diagonal form of the structural correlation matrix is solved by partitioning to obtain the working state of the circuit model. Specifically, S2 includes: S21, for bipartite diagrams any variable in ,from The equation of arbitrarily choosing one edge from the connected edges Pairing, where, For a set of variables, For a set of equations, It is a set of connection relationships; S22, when When not paired, and Successful pairing and the formation of a new augmentation path; when When already paired, if with Paired variables It can be combined with other equations Pairing successful, update the pairing relationship to and pair, and Pair, otherwise, from Choose another edge from the connected edges and pair it with the first edge until... Pairing successful; S23, repeat S21-S22 until completion. By iterating through all variables, the final pairing relationship is obtained; S3 specifically includes: S31. For any unvisited variable, perform a depth-first traversal, divide all traversed variables and equations into a subgraph partition along with the unvisited variable, and mark the variables and equations within the subgraph partition as visited. S32, repeat S31 until all variables have been accessed, and obtain the set of subgraph partitions of the bipartite graph.
2. The method for solving circuit equations in a system based on bipartite graph theory according to claim 1, characterized in that, The structural incidence matrix in block diagonal form is: in, For dimension is The square matrix represents the first square matrix. The connection relationship matrix of nodes within each sub-partition; For dimension is a bar matrix, For dimension is a bar matrix, and They are transposes of each other, representing the first... The nodes within each sub-partition and the first The connection relationships of the boundary nodes of each sub-partition; For dimension is The The set of variables for each subpartition; For vectors Regarding the corresponding number The division of sub-partition edges; For the first The number of variables within each sub-partition; , This represents the number of sub-partitions. For square array dimensionality; For dimension is A square matrix representing the connection relationships between the boundary nodes of all sub-partitions; a vector , Representing vectors respectively ,vector Regarding the division of the corresponding sub-partitions.
3. The method for solving circuit equations in a system based on bipartite graph theory according to claim 2, characterized in that, When all the pairing relationships determined in S2 are strong connections, there are no relationships between the subgraph partitions in the subgraph partition set obtained in S3. , , , , All are zero matrices.
4. The method for solving circuit equations in a system based on bipartite graph theory according to claim 2, characterized in that, The partitioning solution of the block diagonal structural incidence matrix includes solving the following sub-problems respectively: in, ,pass Decompose and solve the subproblem.
5. The method for solving circuit equations in a system based on bipartite graph theory according to any one of claims 1-4, characterized in that, The acquisition of the structural correlation matrix of the circuit model specifically includes: acquiring the structural correlation matrix of the circuit model using an improved node analysis method.
6. A partitioned solution system for circuit equations based on bipartite graph theory, characterized in that, include: processor; A memory storing a computer-executable program, which, when executed by the processor, causes the processor to perform the system partitioning solution method for circuit equations based on bipartite graph theory as described in any one of claims 1-5.
7. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the program is executed by the processor, it implements the system partitioning solution method for circuit equations based on bipartite graph theory as described in any one of claims 1-5.
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