A multi-die domestic GPU efuse module identity information verification and classification method
Patent Information
- Application Number
- CN202311746342.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-19
- Publication Date
- 2026-10-30
- Estimated Expiration
- 2043-12-19
AI Technical Summary
[0004]鉴于上述问题,本发明的目的在于提供一种多DIE国产GPU的efuse模块身份信息校验和分类方法,旨在解决现有方案对于操作基台和芯片的身份校验以及芯片分类未能同时兼顾的技术问题
[0019]首先,本发明使用加密数据和加密算法完成操作基台和多DIE国产GPU芯片的身份验证,避免身份信息被篡改和芯片逻辑泄露,国产GPU芯片内置的DFT测试功能具有快速功能检测的能力,在优选方案中,进一步进行多DIE互联测试、频率测试和模块极限温度测试完成芯片的功能和性能测试,可以快速的对多DIE国产GPU进行分类;同时具有返回CRC检验值验证功能,可对写入的身份信息进行再次校验,确保写入正确的身份信息;
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Figure CN117633913B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of GPU testing technology, and in particular relates to a method for verifying and classifying the identity information of the efuse module of a multi-DIE domestic GPU. Background Technology
[0002] With the continuous development of domestically produced GPUs, the internal circuitry of these chips is becoming increasingly complex, and the demands on computing power are gradually increasing. Multi-Die (die refers to the unpackaged chip, a small die cut from a silicon wafer using laser cutting) packaging schemes are becoming more common, leading to a significant increase in the number of logic gates and increasing chip manufacturing difficulty, thus increasing the possibility of internal chip failures. The high manufacturing cost means that chips with failed logic gates cannot be discarded arbitrarily. These chips must be classified and sold according to application requirements, requiring the programming of chip identification information for each type of chip. To prevent the misuse of chip identification information and the leakage of chip logic, multiple bidirectional verifications are needed for the operating base and the internal information of the domestically produced GPU chip. When the identification information cannot be correctly identified, the chip should be locked. To avoid stability and compatibility issues caused by BIOS tampering or the use of different batches of BIOS, a batch verification function based on efuse needs to be added.
[0003] While some read / write verification schemes exist for efuse modules (efuse is a one-time programmable memory located inside the GPU chip, serving as an internal identification module that allows chip identification information to be programmed onto the operating platform), these existing schemes fail to simultaneously address the identification verification of the operating platform and the chip, as well as chip classification. Some schemes, after verifying the identity of the operating platform and the chip, use read / write operations to test the correctness of the chip's identification module, which is time-consuming and cannot complete read / write verification at all locations. Furthermore, they cannot effectively power off faulty circuits to reduce chip power consumption. Current schemes also lack encryption processing for batch information of domestically produced GPU chips, making it impossible to individually control different batches of domestically produced GPU chips. Summary of the Invention
[0004] In view of the above problems, the purpose of this invention is to provide a method for verifying and classifying the identity information of the efuse module of a multi-DIE domestic GPU, aiming to solve the technical problem that the existing solutions cannot simultaneously take into account the identity verification of the operating base and the chip and the chip classification.
[0005] The present invention adopts the following technical solution:
[0006] The method for verifying and classifying the identity information of the efuse module of the multi-DIE domestic GPU includes the following steps:
[0007] Step S1: The operating platform reads the first encrypted data built into the domestic GPU chip and the second encrypted data of each internal DIE;
[0008] Step S2: Based on the first encrypted data and the second encrypted data, perform encryption calculation according to the preset encryption algorithm to obtain the third encrypted data, and send the third encrypted data to the corresponding DIE in the domestic GPU chip;
[0009] Step S3: Each DIE uses its corresponding verification algorithm to verify the correctness of the third encrypted data;
[0010] Step S4: If the data verification is normal, enable the identity information writing function; if the data verification fails, lock the domestic GPU chip.
[0011] Step S5: After enabling the identity information writing function, the operating platform performs DFT function tests on each DIE within the domestic GPU chip.
[0012] Step S6: After the test is completed, classify the domestic GPUs according to the test results and write the identity information data. If the test fails, lock the domestic GPU chip.
[0013] Step S7: After the base station completes the writing of identity information data, it returns the CRC check value of the written information. After successful verification, the efuse module in the domestic GPU chip uses the encryption algorithm to obtain batch encrypted data and write it, and at the same time returns the CRC check value. After successful verification, the process ends.
[0014] Furthermore, in step S1, if no second encrypted data is read, the operation is abandoned and terminated; if only part of the DIE is read, the data source is marked and the invalid DIE is isolated and powered off.
[0015] Furthermore, in step S5, if a critical module is found to be faulty through DFT functional testing, the domestic GPU chip is directly locked. If the critical module is not faulty but a non-critical module is faulty, the non-critical module that failed is isolated and powered off.
[0016] Furthermore, in step S5, after the DFT functional test is completed, multi-DIE interconnection test, frequency test, and module extreme temperature test are performed.
[0017] Furthermore, in step S7, when verifying the CRC check value of the written information and the CRC check value of the batch encrypted data, if the verification fails, the data is rewritten; if multiple write failures occur, the domestic GPU chip is locked.
[0018] The beneficial effects of this invention are:
[0019] First, this invention uses encrypted data and encryption algorithms to complete the authentication of the operating base and the multi-DIE domestic GPU chip, preventing the identity information from being tampered with and the chip logic from being leaked. The built-in DFT testing function of the domestic GPU chip has the ability to quickly detect functions. In the preferred scheme, multi-DIE interconnection testing, frequency testing and module extreme temperature testing are further carried out to complete the functional and performance testing of the chip, which can quickly classify multi-DIE domestic GPUs. At the same time, it has a CRC check value verification function, which can re-verify the written identity information to ensure that the correct identity information is written.
[0020] In addition, the efuse module isolates and disconnects the power of failed DIEs and modules that fail DFT tests. The failed circuits are not powered during the entire use of the domestic GPU, which can effectively reduce the power consumption of multi-DIE domestic GPUs and reduce heat dissipation requirements. It is suitable for various scenarios with strict requirements for high performance and low power consumption.
[0021] Finally, the efuse module adds batch-encrypted data obtained using encryption algorithms and batch information. When used, it is read by the corresponding version of the BIOS. After successful verification, the domestic GPU chip loads the BIOS of the domestic GPU chip according to the customer's requirements. Chips from different batches are verified in this way to avoid stability and compatibility issues caused by the cross-use of BIOS customized by different customers. Attached Figure Description
[0022] Figure 1 This is a flowchart of the identity information verification and classification method for the efuse module of a multi-DIE domestic GPU provided in this embodiment of the invention;
[0023] Figure 2 This is a flowchart of the boot and BIOS loading process of a domestically produced GPU provided in an embodiment of the present invention. Detailed Implementation
[0024] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.
[0025] To illustrate the technical solution described in this invention, specific embodiments are described below.
[0026] like Figure 1 As shown in this embodiment, the method for verifying and classifying the identity information of the efuse module of a multi-DIE domestic GPU includes the following steps:
[0027] Step S1: The operating platform reads the first encrypted data that comes with the domestic GPU chip and the second encrypted data of each internal DIE.
[0028] DIE (Digital Equivalent Epoxy) refers to a bare die with a specific function obtained after wafer dicing using a photolithography machine. These dies are then packaged to obtain a fully functional chip. With the development of semiconductor technology, chip integration is constantly increasing, but the functionality and performance of a single chip often cannot meet the needs of complex applications. Therefore, multi-DIE packaging technology has emerged. Multi-DIE packaging technology encapsulates multiple chips within a single package, achieving communication and collaborative operation between the chips through high-density interconnects. This invention focuses on the identity information verification and classification of domestically produced multi-DIE GPUs.
[0029] For each DIE within the GPU chip, domestically produced GPU chips have first-level encrypted data set, such as m1, m2, etc. Simultaneously, the GPU chip also has built-in second-level encrypted data. The operating platform reads this first-level and second-level encrypted data.
[0030] If the operating base does not read any second encrypted data, the operation is abandoned and terminated; if only a portion of the DIE is read, the data source is marked, and the invalid DIE is isolated and powered off. Power-off isolation is performed by the power control module in the efuse module.
[0031] Step S2: Based on the first encrypted data and the second encrypted data, perform encryption calculation according to the preset encryption algorithm to obtain the third encrypted data, and send the third encrypted data to the corresponding DIE in the domestic GPU chip.
[0032] The operating base station combines and encrypts the first and second encrypted data using a preset encryption algorithm; this embodiment does not limit the specific encryption algorithm. After obtaining the third encrypted data through the encryption algorithm, it is sent to the corresponding DIE.
[0033] Step S3: Each DIE uses its corresponding verification algorithm to verify the correctness of the third encrypted data.
[0034] Since the encryption algorithm is pre-built, each DIE can verify the correctness of the third encrypted data through a built-in similar verification algorithm.
[0035] Step S4: If the data verification is normal, enable the identity information writing function; if the data verification fails, lock the domestic GPU chip.
[0036] In this step, if the data verification is normal, the identity information writing enable is turned on; if the data verification fails, the domestic GPU chip is locked to prevent the abuse of chip identity information and the leakage of chip logic.
[0037] Step S5: After enabling the identity information writing function, the operating platform performs DFT function tests on each DIE within the domestic GPU chip.
[0038] Design for Test (DFT) is a functional test module design that serves as an auxiliary design to detect faulty modules. It is a structural test service based on fault models. Domestic GPU chips have built-in DFT functional testing. DFT is used to test whether the internal logic of the chip is operating normally, making it convenient to quickly perform functional tests on each functional module.
[0039] After enabling the writing of the identity information of the domestically produced GPU, the operating platform begins to perform DFT functional tests on each DIE of the domestically produced GPU chip. After passing the tests, further optional tests can be performed, including multi-DIE interconnection tests, frequency tests, and module extreme temperature tests.
[0040] In addition, through DFT functional testing, if a critical module failure is found, the domestic GPU chip is directly locked. If the critical module is not failed but a non-critical module fails, the failed non-critical module is isolated and powered down, and subsequent testing continues. Similarly, the power isolation and power-down are performed by the power control module in the efuse module.
[0041] In this embodiment, non-critical modules that fail to read encrypted data (DIE) and fail DFT tests are isolated and powered off by the power consumption control module to save power.
[0042] Step S6: After the test is completed, classify the domestic GPUs according to the test results and write identity information data. If the test fails, lock the domestic GPU chip.
[0043] After the test is completed, the domestic GPUs are classified according to the test results and their identity information data is written. If the DFT function test fails, it indicates that the function is abnormal, and the domestic GPU chip is locked.
[0044] Step S7: After the base station completes the writing of identity information data, it returns the CRC check value of the written information. After successful verification, the efuse module in the domestic GPU chip uses the encryption algorithm to obtain batch encrypted data and write it, and at the same time returns the CRC check value. After successful verification, the process ends.
[0045] In this step, batch-encrypted data obtained using an encryption algorithm is added to the efuse module. By adding batch verification of domestically produced GPU chips, compatibility issues caused by the misuse of different batches of domestically produced GPU chips can be avoided. In addition, when verifying the CRC checksum of the written information and the CRC checksum of the batch-encrypted data, if the verification fails, it is rewritten; if multiple write failures occur, the domestically produced GPU chip is locked.
[0046] For domestically produced chips after verification and classification, after the domestically produced GPU chip starts up, such as Figure 2As shown, the BIOS reads the identity information and fourth encrypted data from the efuse module in the domestic GPU chip, and verifies the correctness of the fourth encrypted data according to the built-in algorithm. If the verification is successful, the BIOS of the domestic GPU chip is loaded according to the customer's requirements. If the verification fails, the loading is abandoned.
[0047] The technical solution of this invention has the following technical advantages:
[0048] 1. In the efuse module, encrypted data and encryption algorithms are used to complete the authentication of the operating base and multi-DIE domestic GPU chips to prevent identity information from being tampered with and chip logic from being leaked. DFT test is used, and further optional multi-DIE interconnect test, frequency test and module extreme temperature test are used to classify the chips. The identity information is written and the CRC check value is returned to verify that the identity information is written normally.
[0049] 2. The power consumption control module of the efuse module isolates and shuts down non-critical modules that fail DIE and DFT test failures to reduce the power consumption of multi-DIE domestic GPUs.
[0050] 3. Add batch data obtained using encryption algorithms to the efuse module, and add batch verification for multi-DIE domestic GPU chips to avoid compatibility issues caused by the use of domestic GPU chips from different batches.
[0051] 4. The BIOS detects the identity information and batch-encrypted data of the domestic GPU chip. After verification using the built-in algorithm, it starts loading the BIOS program according to the customized functions required by the customer.
[0052] In summary, this invention, by setting up an identity verification function, can effectively establish mutual recognition between the operating base and the multi-DIE domestic GPU chip, preventing the misuse of chip identity information and the leakage of chip logic. The operating base uses the DFT function to verify the functionality of the efuse module, which requires little time and can effectively verify the functional correctness of the efuse module of the domestic GPU chip. It can also classify chips by selecting multi-DIE interconnection test, frequency, and extreme temperature test results, and isolate and power off failed circuits based on the test results to save power consumption. The CRC check value of the written information returned by the domestic GPU can effectively verify the correctness of the identity information written to the efuse module of the domestic GPU. Batch data obtained using an encryption algorithm is added to the efuse module, which is read by the corresponding version of the BIOS during use. After successful verification, the BIOS of the domestic GPU chip is loaded according to customer requirements. Different batches of chips are verified in this way to avoid stability and compatibility issues caused by the cross-use of BIOS customized by different customers.
[0053] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.
Claims
1. A method for verifying and classifying the identity information of the efuse module in a multi-DIE domestic GPU, characterized in that, The method includes the following steps: Step S1: The operating platform reads the first encrypted data built into the domestic GPU chip and the second encrypted data of each internal DIE; Step S2: Based on the first encrypted data and the second encrypted data, perform encryption calculation according to the preset encryption algorithm to obtain the third encrypted data, and send the third encrypted data to the corresponding DIE in the domestic GPU chip; Step S3: Each DIE uses its corresponding verification algorithm to verify the correctness of the third encrypted data; Step S4: If the data verification is normal, enable the identity information writing function; if the data verification fails, lock the domestic GPU chip. Step S5: After enabling the identity information writing function, the operating platform performs DFT function tests on each DIE within the domestic GPU chip. Step S6: After the test is completed, classify the domestic GPUs according to the test results and write the identity information data. If the test fails, lock the domestic GPU chip. Step S7: After the base station completes the writing of identity information data, it returns the CRC check value of the written information. After successful verification, the efuse module in the domestic GPU chip uses the encryption algorithm to obtain batch encrypted data and write it, and at the same time returns the CRC check value. After successful verification, the process ends.
2. The method for verifying and classifying the identity information of the efuse module of a multi-DIE domestic GPU as described in claim 1, characterized in that, In step S1, if no second encrypted data is read, the operation is abandoned and terminated; if only part of the DIE is read, the data source is marked and the invalid DIE is isolated and powered off.
3. The method for verifying and classifying the identity information of the efuse module of a multi-DIE domestic GPU as described in claim 2, characterized in that, In step S5, if a critical module fails during the DFT functional test, the domestic GPU chip is directly locked. If the critical module does not fail but a non-critical module fails, the non-critical module that failed is isolated and powered off.
4. The method for verifying and classifying the identity information of the efuse module of a multi-DIE domestic GPU as described in claim 3, characterized in that, In step S5, after the DFT functional test is completed, multi-DIE interconnection test, frequency test, and module extreme temperature test are performed.
5. The method for verifying and classifying the identity information of the efuse module of a multi-DIE domestic GPU as described in claim 4, characterized in that, In step S7, when verifying the CRC check value of the written information and the CRC check value of the batch encrypted data, if the verification fails, the data is rewritten; if multiple write failures occur, the domestic GPU chip is locked.
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