Method of forming a semiconductor structure

Abstract

A method for forming a semiconductor structure includes: providing a layer to be etched; forming a pattern transfer layer, a sacrificial material layer on the pattern transfer layer, and a patterned layer on the sacrificial material layer on the pattern transfer layer, the patterned layer having an opening therein, the opening exposing a portion of the sacrificial material layer; implanting modification ions into the pattern transfer layer at a bottom of the opening to form a modified layer at the bottom of the opening; after forming the modified layer, removing the patterned layer, the sacrificial material layer, and the pattern transfer layer at the bottom of the patterned layer; and etching the layer to be etched using the modified layer as a mask, which improves the accuracy of pattern definition when the modified layer is used as a mask and improves process stability.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to a method for forming a semiconductor structure. Background Technology

[0002] With the continuous development of integrated circuit manufacturing technology, in order to achieve faster computing speed, larger data storage capacity and more functions, integrated circuit chips are developing towards higher device density and higher integration.

[0003] As the integration density of semiconductor chips continues to increase and the feature size of transistors continues to shrink, the challenges to photolithography processes are becoming increasingly greater. In the manufacturing process of mid-section metal contact (MOL) circuits, a selective removal method for boron-rich layer (BRL) is being introduced into the cutting process for metal contacts, allowing the fabrication of metal contact circuits with complex patterns using a simple photomask. This metal contact cutting process, compared to the method of forming trenches with complex target patterns using photolithography and then filling them with metal material, avoids the target patterns becoming too complex and exceeding the limits of photolithography.

[0004] However, existing photolithography technology still needs further improvement. Summary of the Invention

[0005] The technical problem solved by this invention is to provide a method for forming a semiconductor structure to improve the performance of the formed semiconductor structure.

[0006] To address the aforementioned technical problems, the present invention provides a method for forming a semiconductor structure, comprising: providing a layer to be etched; forming a pattern transfer layer, a sacrificial material layer on the pattern transfer layer, and a patterning layer on the sacrificial material layer on the layer to be etched, wherein the patterning layer has an opening that exposes a portion of the sacrificial material layer; implanting modified ions into the pattern transfer layer at the bottom of the opening, using the pattern transfer layer at the bottom of the opening as a modified layer; after forming the modified layer, removing the patterning layer, the sacrificial material layer, and the pattern transfer layer at the bottom of the patterning layer; and etching the layer to be etched using the modified layer as a mask.

[0007] Optionally, it further includes: modified ions with a first doping concentration in the sacrificial material layer exposed by the opening, and modified ions with a second doping concentration in the pattern transfer layer at the bottom of the opening, wherein the second doping concentration is greater than the first doping concentration.

[0008] Optionally, the patterning layer includes an anti-reflective layer and a photoresist layer located on the anti-reflective layer.

[0009] Optionally, the anti-reflective layer includes a first anti-reflective layer and a second anti-reflective layer located on the first anti-reflective layer.

[0010] Optionally, the method for forming the patterned layer includes: forming a first antireflective material layer, a second antireflective material layer on the first antireflective material layer, and a photoresist material layer on the second antireflective material layer on the surface of the sacrificial material layer; patterning the photoresist material layer to form the photoresist layer; etching the second antireflective material layer and the first antireflective material layer using the photoresist layer as a mask, forming a first antireflective layer using the first antireflective material layer, and forming a second antireflective layer using the second antireflective material layer.

[0011] Optionally, the material of the first antireflective layer includes organic carbon; the material of the second antireflective layer includes organosiloxane.

[0012] Optionally, the thickness range of the sacrificial material layer is: to

[0013] Optionally, the material of the sacrificial material layer includes a dielectric material, which is different from the material of the pattern transfer layer. The dielectric material includes one or more of silicon nitride, silicon oxynitride, silicon oxycarbide, silicon carbonitride, and silicon carbonitride.

[0014] Optionally, the material of the pattern transfer layer includes amorphous silicon; the material of the sacrificial material layer includes silicon oxide.

[0015] Optionally, the process for removing the pattern transfer layer at the bottom of the patterned layer includes a dry etching process and a wet etching process.

[0016] Optionally, the process parameters of the wet etching process include: the etching solution includes an ammonia solution, wherein 29% ammonia and deionized water are mixed in a volume ratio of 1:3 to 1:15.

[0017] Optionally, the process parameters for implanting the modified ions include: the modified ions include boron ions with an energy range of 4.5 keV to 9 keV.

[0018] Optionally, the process for removing the patterned layer includes one or a combination of dry etching and wet etching processes.

[0019] Optionally, the process for removing the sacrificial material layer includes a wet etching process.

[0020] Optionally, the layer to be etched includes a device layer and a dielectric layer located on the surface of the device layer. The device layer includes source / drain regions. The dielectric layer has a contact layer parallel to a first direction, and the contact layer is located on the surface of the source / drain regions. The opening exposes a portion of the sacrificial material layer on the contact layer. The method further includes: using the modified layer as a mask, etching the dielectric layer to form a trench parallel to a second direction within the dielectric layer. The trench penetrates the contact layer, and the second direction is perpendicular to the first direction.

[0021] Compared with the prior art, the technical solution of the embodiments of the present invention has the following beneficial effects:

[0022] In the semiconductor structure formation method provided by the present invention, a pattern transfer layer, a sacrificial material layer on the pattern transfer layer, and a patterning layer on the sacrificial material layer are formed on the layer to be etched. The patterning layer has an opening that exposes a portion of the sacrificial material layer. When modified ions are implanted into the pattern transfer layer at the bottom of the opening, the area with low modified ion concentration remains within the sacrificial material layer, improving the uniformity of the ion concentration in the modified layer. This, in turn, improves the etching selectivity ratio between the pattern transfer layer at the bottom of the patterning layer and the modified layer, reduces etching damage to the modified layer when removing the pattern transfer layer at the bottom of the patterning layer, thereby improving the accuracy of pattern definition when the modified layer is used as a mask and improving process stability. Attached Figure Description

[0023] Figures 1 to 5 This is a schematic cross-sectional view of the semiconductor structure formation process;

[0024] Figures 6 to 10 This is a schematic diagram of the steps in the method for forming a semiconductor structure according to an embodiment of the present invention. Detailed Implementation

[0025] It should be noted that the terms "surface" and "on" in this specification are used to describe the relative spatial position and are not limited to whether there is direct contact.

[0026] As described in the background section, the performance of semiconductor structures formed using existing photolithography techniques urgently needs improvement. This paper will now explain and analyze a method for forming a semiconductor structure.

[0027] Figures 1 to 5 This is a cross-sectional schematic diagram of the semiconductor structure formation process.

[0028] Please refer to Figure 1The method provides a layer 100 to be etched; an amorphous silicon material layer 101 is formed on the layer 100 to be etched; a spin-coated carbon material layer 102 is formed on the surface of the amorphous silicon material layer; an anti-reflective material layer 103 is formed on the surface of the spin-coated carbon material layer 102; and a patterned photoresist layer 104 is formed on the anti-reflective material layer 103, wherein the photoresist layer 104 exposes a portion of the anti-reflective material layer 103.

[0029] Please refer to Figure 2 Using the photoresist layer 104 as a mask, the antireflective material layer 103 and the spin-coated carbon material layer 102 are etched until the amorphous silicon material layer 101 is exposed. A first opening 107 is formed in the antireflective material layer 103 and the spin-coated carbon material layer 102. An antireflective layer 105 is formed with the antireflective material layer 103, and a spin-coated carbon layer 106 is formed with the spin-coated carbon material layer.

[0030] Please refer to Figure 3 Boron ions 108 are injected into the bottom of the first opening 107, so that the amorphous silicon material layer 101 exposed by the first opening 107 forms a modified layer 109.

[0031] Please refer to Figure 4 Remove the photoresist layer 104, the anti-reflective layer 105, the spin-coated carbon layer 106, and the amorphous silicon material layer 101 covered by the spin-coated carbon layer 106.

[0032] Please refer to Figure 5 Using the modified layer 109 as a mask, the layer to be etched 100 is etched to form a second opening 110 in the layer to be etched 100.

[0033] In the above method, the process of removing the amorphous silicon material layer 101 covered by the spin-coated carbon layer 106 using the modified layer 109 as a pattern-defined mask is a wet etching process, which uses NH4OH solution as the etching solution. Because the boron ions 108 are implanted, the distribution of boron ions within the modified layer 109 is not uniform, resulting in a low boron ion concentration on the surface of the modified layer 109. When etching the amorphous silicon material layer 101 covered by the spin-coated carbon layer 106 with NH4OH solution, the low boron concentration region at the top of the modified layer 109 is also consumed, leading to a reduction in the thickness of the modified layer 109. When using the modified layer 109 as a mask, there are even cases where the modified layer 109 is too thin to function as a mask, severely affecting the stability of the process.

[0034] To address the aforementioned problems, the present invention provides a method for forming a semiconductor structure, wherein a pattern transfer layer, a sacrificial material layer on the pattern transfer layer, and a patterning layer on the sacrificial material layer are formed on the layer to be etched. The patterning layer has an opening that exposes a portion of the sacrificial material layer. When modified ions are implanted into the pattern transfer layer at the bottom of the opening, the sacrificial material layer ensures that areas with low modified ion concentrations remain within the sacrificial material layer, thereby improving the uniformity of ion concentration in the modified layer. This, in turn, increases the etching selectivity ratio between the pattern transfer layer at the bottom of the patterning layer and the modified layer, reduces etching damage to the modified layer when removing the pattern transfer layer at the bottom of the patterning layer, and thus improves the accuracy of pattern definition when the modified layer is used as a mask, thereby enhancing process stability.

[0035] To make the above-mentioned objectives, features and beneficial effects of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0036] Figures 6 to 10 This is a schematic diagram of the steps in the method for forming a semiconductor structure according to an embodiment of the present invention.

[0037] Please refer to Figure 6 Provide the layer to be etched, 201.

[0038] In this embodiment, the layer to be etched 201 includes a device layer (not shown in the figure) and a dielectric layer (not shown in the figure) located on the surface of the device layer. The device layer includes source and drain regions (not shown in the figure). The dielectric layer has a contact layer (not shown in the figure) parallel to a first direction, and the contact layer is located on the surface of the source and drain regions.

[0039] Subsequently, the layer to be etched is etched in order to improve the accuracy of pattern transfer.

[0040] Please refer to Figure 7 A pattern transfer layer 202, a sacrificial material layer 203 on the pattern transfer layer 202, and a patterning layer 204 on the sacrificial material layer 203 are formed on the etchable layer 201. The patterning layer 204 has an opening 205 that exposes a portion of the sacrificial material layer 203.

[0041] In this embodiment, specifically, the opening 205 exposes a portion of the sacrificial material layer 203 on the contact layer. The purpose of this embodiment is to etch the dielectric layer, thereby cutting off the contact layer. In other embodiments, the purpose of pattern transfer may not be limited to this.

[0042] In this embodiment, the patterning layer 204 includes an anti-reflection layer and a photoresist layer 206 located on the anti-reflection layer.

[0043] The anti-reflective layer includes a first anti-reflective layer 207 and a second anti-reflective layer 208 located on the first anti-reflective layer 207.

[0044] In this embodiment, the method for forming the patterned layer 204 includes: forming a first antireflective material layer (not shown in the figure), a second antireflective material layer (not shown in the figure) located on the first antireflective material layer, and a photoresist material layer (not shown in the figure) located on the second antireflective material layer on the surface of the sacrificial material layer 203; patterning the photoresist material layer to form the photoresist layer 206; etching the second antireflective material layer and the first antireflective material layer using the photoresist layer 206 as a mask; forming a first antireflective layer 207 using the first antireflective material layer; and forming a second antireflective layer 208 using the second antireflective material layer.

[0045] The material of the sacrificial material layer 203 includes a dielectric material, which is different from the material of the pattern transfer layer 202. The dielectric material includes one or more of silicon nitride, silicon oxynitride, silicon carbon oxynitride, silicon carbonitride, and silicon carbonitride.

[0046] In this embodiment, the material of the pattern transfer layer 202 includes amorphous silicon; the material of the sacrificial material layer 203 includes silicon oxide.

[0047] In this embodiment, the material of the first antireflective layer 207 includes organic carbon; the material of the second antireflective layer 208 includes organosiloxane.

[0048] In this embodiment, the first antireflective material layer is made of organic carbon and is formed by spin coating; the second antireflective material layer is made of silicon-containing antireflective layer, including organosiloxanes, and is also formed by spin coating.

[0049] In this embodiment, the thickness range of the sacrificial material layer 203 is [missing information]. to The purpose of selecting the thickness range is to avoid the situation where the thickness is too low to be effective, while the thickness is too high, which may result in the subsequent modification ions being difficult to implant into the pattern transfer layer 202.

[0050] Please refer to Figure 8 Modified ions are injected into the pattern transfer layer 202 at the bottom of the opening 205, and the pattern transfer layer 202 at the bottom of the opening 202 is used as the modified layer 209.

[0051] By injecting modified ions into the pattern transfer layer 202 at the bottom of the opening 205, areas with low modified ion concentration remain within the sacrificial material layer 203, improving the uniformity of ion concentration in the modified layer 209. This, in turn, increases the etching selectivity between the pattern transfer layer 202 and the modified layer 209 at the bottom of the patterned layer 204, reducing etching damage to the modified layer 209 when removing the pattern transfer layer 202 at the bottom of the patterned layer 204. Consequently, the accuracy of pattern definition when the modified layer 209 is used as a mask is improved, enhancing process stability.

[0052] Specifically, modified ions are injected into the pattern transfer layer 202 at the bottom of the opening 205, so that the sacrificial material layer 203 exposed by the opening 205 has a first doping concentration of modified ions, and the pattern transfer layer 202 at the bottom of the opening 205 has a second doping concentration of modified ions, wherein the second doping concentration is greater than the first doping concentration.

[0053] The process parameters for implanting modified ions include: the modified ions include boron ions, with an energy range of 4.5 keV to 9 keV. In this embodiment, the modified ions are boron ions.

[0054] Please refer to Figure 9 After forming the modified layer 209, the patterned layer 204, the sacrificial material layer 203, and the pattern transfer layer 202 at the bottom of the patterned layer 204 are removed.

[0055] The process for removing the patterned layer 204 includes one or a combination of dry etching and wet etching.

[0056] In this embodiment, the process for removing the patterned layer 204 is a wet etching process. The process parameters of the wet etching process include: the etching solution is a mixture of sulfuric acid solution and hydrogen peroxide solution, wherein concentrated sulfuric acid with a concentration of 96% and hydrogen peroxide with a concentration of 31% are mixed in a volume ratio of 2:1 to 10:1.

[0057] The process for removing the sacrificial material layer 203 includes a wet etching process.

[0058] In this embodiment, the process for removing the sacrificial material layer 203 is a wet etching process. The process parameters of the wet etching process include: the etching solution includes a hydrofluoric acid solution, wherein 49% hydrofluoric acid and deionized water are mixed at a volume ratio of 1:100 to 1:500. The hydrofluoric acid solution has a large etching selectivity for both the sacrificial material layer 203 and the modified layer 209, which helps to reduce etching damage to the modified layer 209 during the etching process, thereby improving the accuracy of pattern transfer.

[0059] The process for removing the pattern transfer layer 202 at the bottom of the patterned layer 204 includes a dry etching process and a wet etching process.

[0060] In this embodiment, the process for removing the pattern transfer layer 202 at the bottom of the patterned layer 204 is a wet etching process. The process parameters of the wet etching process include: the etching solution includes an ammonia solution, wherein 29% ammonia and deionized water are mixed in a volume ratio of 1:3 to 1:15. The NH4OH solution has a large etching selectivity for the pattern transfer layer 202 and the modified layer 209 at the bottom of the patterned layer 204, which helps to reduce etching damage to the modified layer 209 during the etching process, thereby improving the accuracy of pattern transfer.

[0061] Please refer to Figure 10 Using the modified layer 209 as a mask, the layer to be etched 201 is etched.

[0062] In this embodiment, specifically, the modified layer 209 is used as a mask to etch the dielectric layer, forming a trench 210 parallel to the second direction in the dielectric layer. The trench 210 penetrates the contact layer, and the second direction is perpendicular to the first direction.

[0063] In this embodiment, the contact layer is cut off in order to create a metal contact layer circuit with complex patterns using a simple photomask. Compared with the method of forming trenches with complex target patterns using photolithography and then filling them with metal material, this method can avoid the target pattern from becoming too complex and reaching the limit of photolithography.

[0064] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A method for forming a semiconductor structure, characterized in that, include: Provide the layer to be etched; A pattern transfer layer, a sacrificial material layer on the pattern transfer layer, and a patterned layer on the sacrificial material layer are formed on the layer to be etched. The patterned layer has an opening that exposes a portion of the sacrificial material layer. Modified ions are injected into the pattern transfer layer at the bottom of the opening, with the pattern transfer layer at the bottom of the opening serving as the modified layer; After forming the modified layer, the patterned layer, the sacrificial material layer, and the pattern transfer layer at the bottom of the patterned layer are removed; Using the modified layer as a mask, the layer to be etched is etched.

2. The method for forming a semiconductor structure as described in claim 1, characterized in that, Also includes: The sacrificial material layer exposed by the opening has modified ions with a first doped ion concentration, and the pattern transfer layer at the bottom of the opening has modified ions with a second doped ion concentration greater than the first doped ion concentration.

3. The method for forming a semiconductor structure as described in claim 1, characterized in that, The patterning layer includes an anti-reflective layer and a photoresist layer located on the anti-reflective layer.

4. The method for forming a semiconductor structure as described in claim 3, characterized in that, The anti-reflective layer includes a first anti-reflective layer and a second anti-reflective layer located on the first anti-reflective layer.

5. The method for forming a semiconductor structure as described in claim 4, characterized in that, The method for forming the patterned layer includes: forming a first antireflective material layer, a second antireflective material layer on the first antireflective material layer, and a photoresist material layer on the second antireflective material layer on the surface of the sacrificial material layer; patterning the photoresist material layer to form the photoresist layer; etching the second antireflective material layer and the first antireflective material layer using the photoresist layer as a mask; forming a first antireflective layer using the first antireflective material layer; and forming a second antireflective layer using the second antireflective material layer.

6. The method for forming a semiconductor structure as described in claim 4, characterized in that, The material of the first antireflective layer includes organic carbon; the material of the second antireflective layer includes organosiloxane.

7. The method for forming a semiconductor structure as described in claim 1, characterized in that, The thickness range of the sacrificial material layer is: to 8. The method for forming a semiconductor structure as described in claim 1, characterized in that, The material of the sacrificial material layer includes a dielectric material, which is different from the material of the pattern transfer layer. The dielectric material includes one or more of silicon nitride, silicon oxynitride, silicon carbon oxynitride, and silicon carbon oxynitride.

9. The method for forming a semiconductor structure as described in claim 8, characterized in that, The material of the pattern transfer layer includes amorphous silicon; the material of the sacrificial material layer includes silicon oxide.

10. The method for forming a semiconductor structure as described in claim 9, characterized in that, The process for removing the pattern transfer layer at the bottom of the patterned layer includes dry etching and wet etching.

11. The method for forming a semiconductor structure as described in claim 10, characterized in that, The process parameters of the wet etching process include: the etching solution includes an ammonia solution, wherein 29% ammonia and deionized water are mixed in a volume ratio of 1:3 to 1:

15.

12. The method for forming a semiconductor structure as described in claim 1, characterized in that, The process parameters for implanting modified ions include: the modified ions include boron ions with an energy range of 4.5 keV to 9 keV.

13. The method for forming a semiconductor structure as described in claim 1, characterized in that, The process for removing the patterned layer includes one or a combination of dry etching and wet etching processes.

14. The method for forming a semiconductor structure as described in claim 1, characterized in that, The process for removing the sacrificial material layer includes a wet etching process.

15. The method for forming a semiconductor structure as described in claim 1, characterized in that, The layer to be etched includes a device layer and a dielectric layer located on the surface of the device layer. The device layer includes source and drain regions. The dielectric layer has a contact layer parallel to a first direction, and the contact layer is located on the surface of the source and drain regions. The opening exposes a portion of the sacrificial material layer on the contact layer; The method further includes: using the modified layer as a mask, etching the dielectric layer to form a trench parallel to the second direction in the dielectric layer, the trench penetrating the contact layer, and the second direction being perpendicular to the first direction.

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