半导体元件
By designing overlapping notches in the I-shaped gate line extensions in the transistor structure, the gate line design of the low-noise amplifier is optimized, solving the problems of high gate resistance and high gate-to-substrate capacitance, and improving the maximum oscillation frequency and current gain.
CN117637733BActive Publication Date: 2026-07-17UNITED MICROELECTRONICS CORP
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- UNITED MICROELECTRONICS CORP
- Filing Date
- 2022-09-06
- Publication Date
- 2026-07-17
AI Technical Summary
Technical Problem
The transistor designs in existing low-noise amplifiers perform poorly in terms of high gate resistance, high gate-to-substrate doped region capacitance, and minimum noise figure, which affects the efficiency of the amplifier circuit.
Method used
In a transistor structure, gate line extensions extend from both sides of the gate line and overlap the notch outside the active region to form an I-shaped structure. Combined with polysilicon or metal gate patterns, the gate line design is optimized to improve these parameters.
Benefits of technology
Increasing the maximum oscillation frequency and current gain at low current levels improves the efficiency of transistor devices.
✦ Generated by Eureka AI based on patent content.
Smart Images
Figure CN117637733B_ABST
Abstract
本发明公开一种半导体元件，其主要包含一基底包含主动区、第一栅极线沿着第一方向延伸于该主动区上、第一栅极线延伸部设于第一栅极线旁并设于主动区外、第二栅极线沿着该第一方向延伸于主动区上并设于第一栅极线旁以及第二栅极线延伸部设于第二栅极线旁并设于主动区外，其中主动区包含第一凹口以及第二凹口，该第一栅极线延伸部重叠该第一凹口且该第二栅极线延伸部重叠该第二凹口。
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