A fully integrated carrier phase recovery circuit, a reverse antenna array system, and a method

Abstract

This invention discloses a fully integrated carrier phase recovery circuit, a reverse antenna array system, and a method, including a mixer, a low-pass filter, an RF amplifier, an analog phase detector, a loop filter, and a voltage-controlled oscillator. This invention is used for carrier phase recovery of data signals in a reverse antenna array, enabling the reverse antenna array to be applied to full-duplex high-order phase modulation information communication scenarios. The circuit can operate in two modes, for carrier phase recovery and reference signal generation respectively, and is suitable for carrier phase recovery of high-order phase modulation signals, featuring high integration and a wide dynamic range.

Description

Technical Field

[0001] This invention belongs to the field of integrated circuit technology, specifically a fully integrated carrier phase recovery circuit, a reverse antenna array system, and a method. Background Technology

[0002] Reverse antenna arrays do not require prior knowledge of the incident wave angle and can automatically align the array's transmitted beam towards the incoming wave, achieving automatic tracking of the incoming signal. They offer advantages such as low cost, small size, and rapid automatic tracking. To enable the application of reverse antenna arrays in modern communication systems, particularly in full-duplex high-order phase modulation information communication scenarios, a carrier phase recovery circuit is used to separate the spatial phase information and data phase information from the received modulated signal. The spatial phase information is extracted for retransmission, and the data phase information is extracted for signal demodulation.

[0003] Phase-locked loops (PLLs) can track weak-power signals and generate stable, high-power, low-noise carrier signals, thus they are widely used in carrier phase recovery circuits. However, for high-order phase-modulated signals that do not contain a carrier component, traditional PLL structures struggle to directly extract their carrier phase. Currently, methods such as nonlinear transformations of the received modulated signal, like the square loop method and the Costas loop method, are commonly used to extract the carrier signal. However, the initial phase of the carrier recovered by these methods is random and may be in phase or out of phase with the received signal's carrier, a problem known as "phase ambiguity," making it difficult to directly apply to reverse antenna arrays.

[0004] Currently, some scholars have proposed adding pilot signals to high-order phase modulation signals and using phase-locked loops to track the pilot signals to recover the carrier phase of the modulated signal. However, this inevitably leads to a waste of spectrum resources. Additionally, some literature describes using algorithms to correct phase ambiguity; however, this method significantly increases system complexity and is difficult to fully integrate on a single chip. Furthermore, based on the square-loop method, some schemes propose cross-multiplication of the phase modulation signal to eliminate baseband information and recover carrier phase information. However, this method is applicable to only a single modulation scheme and has a very limited system power dynamic range. Summary of the Invention

[0005] Purpose of the invention: To address the problems of existing carrier phase recovery circuits being unsuitable for information communication scenarios involving high-order phase modulation signals and having low dynamic range, this invention proposes a fully integrated carrier phase recovery circuit, a reverse antenna array system, and a method that eliminates the need for additional pilot signals and algorithm correction, thereby saving spectrum resources and improving circuit integration.

[0006] Technical solution: A fully integrated carrier phase recovery circuit, comprising: a mixer, a low-pass filter, an RF amplifier, an analog phase detector, a loop filter, and a voltage-controlled oscillator;

[0007] The mixer is coupled to a low-pass filter and a voltage-controlled oscillator, respectively, and is used to perform a mixing operation on the first input signal of the fully integrated carrier phase recovery circuit and the feedback carrier signal generated by the voltage-controlled oscillator, and output the first intermediate frequency signal to the low-pass filter.

[0008] The low-pass filter is coupled to the radio frequency amplifier to suppress high-frequency components and noise signals in the first intermediate frequency signal and output the second intermediate frequency signal to the radio frequency amplifier.

[0009] The radio frequency amplifier is coupled to the analog phase detector to amplify the voltage of the second intermediate frequency signal and output the third intermediate frequency signal to the analog phase detector.

[0010] The analog phase detector is coupled to the loop filter and is used to compare the phase of the input reference signal and the third intermediate frequency signal, convert the phase difference between the two into a first electrical signal, and output the first electrical signal to the loop filter.

[0011] The loop filter is coupled to the voltage-controlled oscillator and is used to filter the first electrical signal and output the second electrical signal to the voltage-controlled oscillator.

[0012] The voltage-controlled oscillator is used to generate a feedback carrier signal of a corresponding frequency under the control of the second electrical signal, and output the feedback carrier signal to the mixer.

[0013] Furthermore, the first input signal is a phase-modulated signal, including data phase information and spatial phase information.

[0014] Furthermore, the input reference signal is generated by another fully integrated carrier phase recovery circuit operating in reference signal generation mode; the voltage-controlled oscillator of the reference signal generation mode is controlled by an external fixed DC voltage to generate a fixed carrier signal, and the second input signal is mixed with the fixed carrier signal through a mixer, filtered by a low-pass filter, and amplified by an RF amplifier to generate the input reference signal.

[0015] Furthermore, the second input signal is a phase-modulated signal that has the same data phase information as the first input signal but has different spatial phase information than the first input signal.

[0016] Furthermore, the comparison of the phases of the input reference signal and the third intermediate frequency signal specifically includes using the multiplication characteristics of an analog phase detector to perform phase detection on the input reference signal and the third intermediate frequency signal.

[0017] Furthermore, the analog phase detector is a Gilbert double-balanced mixer structure.

[0018] Furthermore, the Gilbert double-balanced mixer structure includes a transconductance stage, a switching stage, and a load stage;

[0019] The transconductance stage is composed of a first transistor and a second transistor. The sources of the first transistor and the second transistor are connected to ground. The gate of the first transistor is the non-inverting input terminal of the differential form of the third intermediate frequency signal, and the gate of the second transistor is the inverting input terminal of the differential form of the third intermediate frequency signal.

[0020] The switching stage consists of a third transistor, a fourth transistor, a fifth transistor, and a sixth transistor. The sources of the third and fourth transistors are connected to the drain of the first transistor, and the sources of the fifth and sixth transistors are connected to the drain of the second transistor. The gates of the third and sixth transistors are non-inverting input terminals of the differential input reference signal, and the gates of the fourth and fifth transistors are inverting input terminals of the differential input reference signal.

[0021] The load stage consists of a first resistor and a second resistor. One end of the first resistor and the second resistor are connected to the power supply, the other end of the first resistor is connected to the drain of the third transistor and the fifth transistor, and the other end of the second resistor is connected to the drain of the fourth transistor and the sixth transistor.

[0022] This invention discloses a reverse antenna array system, including an antenna, a radio frequency front-end, and a fully integrated carrier phase recovery circuit. The fully integrated carrier phase recovery circuit serves as an intermediate frequency signal processing module, used to extract the spatial phase information of the phase modulation signal input to the radio frequency front-end, and to mix the feedback carrier signal with the spatial phase information with a new transmit modulation signal before outputting it to the radio frequency front-end for transmission, thereby realizing automatic tracking of the reverse antenna array system.

[0023] This invention discloses a method for separating spatial phase information and data phase information, comprising the following steps:

[0024] Construct a fully integrated carrier phase recovery circuit; input the phase modulation signal into the fully integrated carrier phase recovery circuit;

[0025] After the fully integrated carrier phase recovery circuit loop locks, the third intermediate frequency signal output by the RF amplifier is acquired; the third intermediate frequency signal is demodulated to obtain baseband data information, which contains the data phase information of the input phase modulation signal, thus realizing the data phase extraction of the phase modulation signal;

[0026] After the fully integrated carrier phase recovery circuit loop locks, the feedback carrier signal output by the voltage-controlled oscillator is obtained. The feedback carrier signal contains the spatial phase information of the input phase modulation signal, thus realizing the carrier phase recovery of the phase modulation signal.

[0027] Beneficial effects: Compared with the prior art, the present invention has the following advantages:

[0028] (1) The present invention uses an analog phase detector to perform phase detection on two phase modulation signals, which can be used for carrier phase recovery of high-order phase modulation signals, so that the reverse antenna array can be applied to information communication scenarios of full-duplex high-order phase modulation.

[0029] (2) The fully integrated carrier phase recovery circuit proposed in this invention can be reused in the reference signal generation mode and the carrier phase recovery mode, respectively for the generation of the input reference signal and the recovery of the carrier phase, effectively reducing the circuit area and saving circuit cost.

[0030] (3) The fully integrated carrier phase recovery circuit proposed in this invention does not require additional pilot signals and external correction modules, and can directly extract the carrier phase of high-order phase modulation signals, effectively saving spectrum resources and improving the integration of the circuit.

[0031] (4) The analog phase detector proposed in this invention can be used for phase detection of sinusoidal signals without converting low-power signals into square wave signals, which effectively expands the dynamic range of the system. Attached Figure Description

[0032] Figure 1 This is a schematic diagram of the fully integrated carrier phase recovery circuit proposed in this invention;

[0033] Figure 2 This is a schematic diagram illustrating the application of the fully integrated carrier phase recovery circuit in the reverse antenna array system of this invention;

[0034] Figure 3 This is a schematic diagram of the analog phase detector circuit in this invention;

[0035] Figure 4 This is a schematic diagram of the fully integrated carrier phase recovery circuit operating in the reference signal generation mode in this invention;

[0036] Figure 5 This is a schematic diagram showing the frequency and phase of each signal when the fully integrated carrier phase recovery circuit in this invention is working;

[0037] Figure 6 This is a schematic diagram of the first input signal and the second input signal in this invention;

[0038] Figure 7 This is a schematic diagram of the feedback carrier signal and the fixed carrier signal in this invention. Detailed Implementation

[0039] The technical solution of the present invention will now be further described in conjunction with the accompanying drawings and embodiments.

[0040] Example 1:

[0041] like Figure 1As shown, this embodiment discloses a fully integrated carrier phase recovery circuit, which includes a mixer 1, a low-pass filter 2, an RF amplifier 3, an analog phase detector 4, a loop filter 5, and a voltage-controlled oscillator 6.

[0042] Mixer 1 is coupled to low-pass filter 2 and voltage-controlled oscillator 6, respectively, and is used to process the first input signal S input to the fully integrated carrier phase recovery circuit based on the reverse antenna array. DATA1 The feedback carrier signal S generated by voltage-controlled oscillator 6 VCO1 Perform a mixing operation and output the first intermediate frequency signal S. IF1 Low-pass filter 2.

[0043] The low-pass filter 2 is coupled to the radio frequency amplifier 3 and is used to suppress the first intermediate frequency signal S. IF1 The high-frequency components and noise signals in the signal are removed, and a second intermediate frequency signal S is output. IF2 To RF amplifier 3.

[0044] Among them, the radio frequency amplifier 3 is coupled to the analog phase detector 4 and is used to amplify the second intermediate frequency signal S. IF2 The voltage, and output the third intermediate frequency signal S IF3 To analog phase detector 4.

[0045] The analog phase detector 4 is coupled to the loop filter 5 and is used to compare the input reference signal S. REF and the third intermediate frequency signal S IF3 The phase difference between the two is converted into a first electrical signal V1, and the first electrical signal V1 is output to the loop filter 5.

[0046] The loop filter 5 is coupled to the voltage-controlled oscillator 6 and is used to filter the first electrical signal V1 and output the second electrical signal V2 to the voltage-controlled oscillator.

[0047] Among them, the voltage-controlled oscillator 6 is used to generate a feedback carrier signal S of a corresponding frequency under the control of the second electrical signal V2. VCO1 And output to mixer 1.

[0048] Example 2:

[0049] This embodiment proposes a carrier phase recovery circuit for use in a reverse antenna array system, based on Embodiment 1. Figure 2 The diagram illustrates the application of the fully integrated carrier phase recovery circuit constructed in Example 1 in a reverse antenna array system. The entire reverse antenna array system includes an antenna, a radio frequency (RF) front-end, and the fully integrated carrier phase recovery circuit. The fully integrated carrier phase recovery circuit, as the intermediate frequency (IF) signal processing module of the reverse antenna array system, is used to extract the first input signal S from the RF front-end. DATA1The spatial phase information, and the feedback carrier signal S containing the spatial phase information. VCO1 After mixing with the new modulated LO signal, the signal is output to the RF front-end for transmission, and spatial phase information is extracted to achieve automatic tracking of the reverse antenna array. In addition, the third intermediate frequency signal S in the fully integrated carrier phase recovery circuit... IF3 The data phase information from the receiving end is output to the demodulation circuit, where it is demodulated to obtain the baseband data information. Therefore, the fully integrated carrier phase recovery circuit can separate the spatial phase information and data phase information of the input high-order phase modulation signal, enabling full-duplex information communication functionality of the reverse antenna array.

[0050] Now combined with the appendix Figure 3 The structure of the analog phase detector 4 used in this embodiment will be further explained. For example... Figure 3 As shown, the analog phase detector in this embodiment is a Gilbert double-balanced mixer structure, including a transconductance stage, a switching stage, and a load stage. The transconductance stage converts the RF voltage signal into an RF current signal. It consists of a first transistor M1 and a second transistor M2. The sources of both transistors M1 and M2 are connected to ground. The gate of the first transistor M1 is the non-inverting input terminal INA+ of the differential form of the third intermediate frequency signal SIF3, and the gate of the second transistor M2 is the inverting input terminal INA- of the differential form of the third intermediate frequency signal SIF3. The switching stage consists of a third transistor M3, a fourth transistor M4, a fifth transistor M5, and a sixth transistor M6. The sources of the third transistor M3 and the fourth transistor M4 are connected to the drain of the first transistor M1. The sources of the fifth transistor M5 and the sixth transistor M6 are connected to the drain of the second transistor M2. The gates of the third transistor M3 and the sixth transistor M6 are the non-inverting input terminal LOA+ of the differential form of the input reference signal SREF, and the gates of the fourth transistor M4 and the fifth transistor M5 are the inverting input terminal S... REF The inverting input terminal LOA- is used in the switching stage, where transistors alternately conduct to switch and modulate the RF current signal under the drive of the switching signal. The load stage is used to convert the current signal into a voltage signal output, and it consists of a first resistor R1 and a second resistor R2. One end of the first resistor R1 and the second resistor R2 are connected to the power supply, and the other end of the first resistor R1 is connected to the drain of the third transistor M3 and the fifth transistor M5. The other end of the second resistor R2 is connected to the drain of the fourth transistor M4 and the sixth transistor M6. In this embodiment, the analog phase detector 4 uses its multiplication characteristic to perform phase detection on the two input signals, which is suitable for phase detection of sine wave signals and expands the dynamic range of the system.

[0051] In this embodiment, the input reference signal is generated by another fully integrated carrier phase recovery circuit operating in reference signal generation mode, such as... Figure 4As shown, in this mode, the voltage-controlled oscillator 6 is controlled by an external fixed DC voltage, generating a fixed carrier signal S. VCO2 The second input signal S DATA2 Mixer 1 and fixed carrier signal S VCO2 The signal is mixed, filtered by low-pass filter 2, and amplified by RF amplifier 3 to generate the input reference signal S. REF The input reference signal S is generated by a fully integrated carrier phase recovery circuit based on a reverse antenna array. REF It can be used as the input reference signal for multiple different antenna array elements at the same time.

[0052] Now combined Figure 5 The working principle of the fully integrated carrier phase recovery circuit based on the reverse antenna array proposed in this embodiment is explained.

[0053] The first input signal S in this embodiment DATA1 Second input signal S DATA2 The signal is a phase-modulated signal, containing two types of phase information: one is the data phase information introduced by the signal modulation method, and the other is the spatial phase information under different incident angles and delays during signal propagation. The first input signal is represented as:

[0054] S DATA1 =m(t)Acos(w) IN t+θ1) (1)

[0055] The second input signal is represented as:

[0056] S DATA2 =m(t)Acos(w) IN t+θ2) (2)

[0057] Where m(t) is the original data signal, containing data phase information; θ1 and θ2 are the spatial phase signals of the first and second input signals, respectively, containing spatial phase information; w IN Let S be the carrier frequency of the input signal, and A be the amplitude of the input signal. The first input signal S... DATA1 With the second input signal S DATA2 They have the same data phase information but different spatial phase information. The feedback carrier signal is represented as:

[0058] S VCO1 =Bcos(w VCO1 +θ VCO1 (3)

[0059] A fixed carrier signal is represented as:

[0060] S VCO2 =Bcos(w VCO2 +θVCO2 (4)

[0061] Where, θ VCO1 θ VCO2 The phases of the feedback carrier signal and the fixed carrier signal are respectively, w VCO1 w VCO2 Here, B represents the frequencies of the feedback carrier signal and the fixed carrier signal, respectively, and B represents the amplitude of the carrier signal.

[0062] First input signal S DATA1 With feedback carrier signal S VCO1 After mixing, the signal is filtered by low-pass filter 2 and amplified by RF amplifier 3 to obtain the third intermediate frequency signal, which is represented as:

[0063] S IF3 =m(t)Ccos(w) IF3 t+θ IF3 (5)

[0064] Second input signal S DATA2 With fixed carrier signal S VCO2 After mixing, the signal is filtered by low-pass filter 2 and amplified by RF amplifier 3 to obtain the input reference signal, which is represented as:

[0065] S REF =m(t)Ccos(w) REF t+θ REF (6)

[0066] Where m(t) is the original data signal, θ IF3 θ REF These are the spatial phase signals of the third intermediate frequency signal and the input reference signal, respectively. IF3 w REF Here, C represents the carrier frequencies of the third intermediate frequency signal and the input reference signal, respectively, and C is the amplitude of the signal.

[0067] Third intermediate frequency signal S IF3 With input reference signal S REF The third intermediate frequency signal S is a phase-modulated signal with the same data phase information. IF3 Due to the phase abrupt change caused by modulation, the input reference signal S REF This also generates a corresponding phase abrupt change, simulating the phase detector 4 pair of the third intermediate frequency signal S. IF3 and input reference signal S REF During phase detection and loop locking, the carrier frequencies of the two signals are equal, and the spatial phase signals are fixed at a phase difference of 90°, i.e., w IF3 =w REF θ IF3 =θ REF+90°. Based on the formulas for frequency and phase between the ports of mixer 1:

[0068] w VCO1 =w IN +w IF3 (7)

[0069] w VCO2 =w IN +w REF (8)

[0070] θ VCO1 =θ1+θ IF3 (9)

[0071] θ VCO2 =θ2+θ REF (10)

[0072] get:

[0073] w VCO1 =w VCO2 (11)

[0074] θ VCO1 -θ VCO2 =θ1-θ2+90° (12)

[0075] Therefore, the carrier signal generated by the voltage-controlled oscillator 6 extracts the spatial phase information of the input high-order phase modulation signal, realizing the carrier phase recovery of the high-order phase modulation signal.

[0076] Figure 6 The first input signal S is shown in the locked state. DATA1 Second input signal S DATA2 A waveform diagram. Figure 7 The feedback carrier signal S is shown in the locked state. VCO1 and fixed carrier signal S VCO2 The waveform diagram shows that the phases satisfy θ. VCO1 -θ VCO2 The relationship is θ1-θ2+90°.

[0077] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. An all integrated carrier phase recovery circuit, characterized by: include: Mixers, low-pass filters, RF amplifiers, analog phase detectors, loop filters, and voltage-controlled oscillators; The mixer is coupled to a low-pass filter and a voltage-controlled oscillator, respectively, and is used to perform a mixing operation on the first input signal of the fully integrated carrier phase recovery circuit and the feedback carrier signal generated by the voltage-controlled oscillator, and output the first intermediate frequency signal to the low-pass filter. The low-pass filter is coupled to the radio frequency amplifier to suppress high-frequency components and noise signals in the first intermediate frequency signal and output the second intermediate frequency signal to the radio frequency amplifier. The radio frequency amplifier is coupled to the analog phase detector to amplify the voltage of the second intermediate frequency signal and output the third intermediate frequency signal to the analog phase detector. The analog phase detector is coupled to the loop filter and is used to compare the phase of the input reference signal and the third intermediate frequency signal, convert the phase difference between the two into a first electrical signal, and output the first electrical signal to the loop filter. The loop filter is coupled to the voltage-controlled oscillator and is used to filter the first electrical signal and output the second electrical signal to the voltage-controlled oscillator. The voltage-controlled oscillator is used to generate a feedback carrier signal of a corresponding frequency under the control of the second electrical signal, and output the feedback carrier signal to the mixer.

2. A fully integrated carrier phase recovery circuit according to claim 1, characterized in that: The first input signal is a phase-modulated signal, which includes data phase information and spatial phase information.

3. A fully integrated carrier phase recovery circuit as claimed in claim 1, characterized in that: The input reference signal is generated by another fully integrated carrier phase recovery circuit operating in reference signal generation mode. The voltage-controlled oscillator of the reference signal generation mode is controlled by an external fixed DC voltage to generate a fixed carrier signal. The second input signal is mixed with the fixed carrier signal by a mixer, filtered by a low-pass filter, and amplified by an RF amplifier to generate the input reference signal.

4. The fully integrated carrier phase recovery circuit according to claim 3, characterized in that: The second input signal is a phase-modulated signal that has the same data phase information as the first input signal but has different spatial phase information than the first input signal.

5. The fully integrated carrier phase recovery circuit according to claim 1, characterized in that: The comparison of the phases of the input reference signal and the third intermediate frequency signal specifically includes using the multiplication characteristics of an analog phase detector to perform phase detection on the input reference signal and the third intermediate frequency signal.

6. The fully integrated carrier phase recovery circuit according to claim 1, characterized in that: The analog phase detector is a Gilbert double-balanced mixer structure.

7. The fully integrated carrier phase recovery circuit according to claim 6, characterized in that: The Gilbert double-balanced mixer structure includes a transconductance stage, a switching stage, and a load stage; The transconductance stage is composed of a first transistor and a second transistor. The sources of the first transistor and the second transistor are connected to ground. The gate of the first transistor is the non-inverting input terminal of the differential form of the third intermediate frequency signal, and the gate of the second transistor is the inverting input terminal of the differential form of the third intermediate frequency signal. The switching stage consists of a third transistor, a fourth transistor, a fifth transistor, and a sixth transistor. The sources of the third and fourth transistors are connected to the drain of the first transistor, and the sources of the fifth and sixth transistors are connected to the drain of the second transistor. The gates of the third and sixth transistors are non-inverting input terminals of the differential input reference signal, and the gates of the fourth and fifth transistors are inverting input terminals of the differential input reference signal. The load stage consists of a first resistor and a second resistor. One end of the first resistor and the second resistor are connected to the power supply, the other end of the first resistor is connected to the drain of the third transistor and the fifth transistor, and the other end of the second resistor is connected to the drain of the fourth transistor and the sixth transistor.

8. A reverse antenna array system, characterized in that: It includes an antenna, a radio frequency front-end, and a fully integrated carrier phase recovery circuit; the fully integrated carrier phase recovery circuit is a fully integrated carrier phase recovery circuit as described in any one of claims 1 to 7. The fully integrated carrier phase recovery circuit serves as an intermediate frequency signal processing module, used to extract the spatial phase information of the phase modulation signal input to the radio frequency front-end, and mix the feedback carrier signal with the spatial phase information with the new transmit modulation signal before outputting it to the radio frequency front-end for transmission, thereby realizing the automatic tracking of the reverse antenna array system.

9. A method for separating spatial phase information and data phase information, characterized in that: Includes the following steps: A fully integrated carrier phase recovery circuit is constructed, wherein the fully integrated carrier phase recovery circuit is a fully integrated carrier phase recovery circuit as described in any one of claims 1 to 7; The phase modulation signal is input to the fully integrated carrier phase recovery circuit; After the fully integrated carrier phase recovery circuit loop locks, the third intermediate frequency signal output by the RF amplifier is acquired; the third intermediate frequency signal is demodulated to obtain baseband data information, which contains the data phase information of the input phase modulation signal, thus realizing the data phase extraction of the phase modulation signal; After the fully integrated carrier phase recovery circuit loop locks, the feedback carrier signal output by the voltage-controlled oscillator is obtained. The feedback carrier signal contains the spatial phase information of the input phase modulation signal, thus realizing the carrier phase recovery of the phase modulation signal.

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