Video display method and device, computer device, and storage medium

Abstract

This application relates to a video display method, apparatus, computer device, storage medium, and computer program product. The method includes: acquiring an initial video signal and identifying a flag bit in the initial video signal; if the flag bit is a first preset flag, performing gamma processing on the initial video signal to obtain a 2D video signal, and displaying the 2D video signal through a preset display screen; if the flag bit is a second preset flag, interleaving the left-eye and right-eye frames of the initial video signal in at least two preset memories to obtain a 3D video signal, and displaying the 3D video signal through the preset display screen. This method achieves 2D / 3D compatible display without increasing the hardware cost of the control system; it also improves the processing efficiency of the initial video, thereby helping to reduce video display latency.

Description

Technical Field

[0001] This application relates to the field of signal display technology, and in particular to a video display method, apparatus, computer equipment, storage medium, and computer program product. Background Technology

[0002] With the development of video display technology, 3D display technology has emerged. 3D display technology mainly utilizes the subtle differences between the images seen by the left and right eyes of the human eye, namely parallax. This parallax causes the brain to interpret it as a three-dimensional imaging effect, thereby achieving the purpose of 3D display.

[0003] Currently, 3D display is mainly achieved through active 3D display technology. Active 3D display mainly utilizes the screen to sequentially display complete left and right eye images, while simultaneously sending left and right eye synchronization signals to strictly synchronize with the left and right eye opening and closing of the active shutter 3D glasses, so as to achieve consistency between the left and right eye images on the screen and the images seen by the user's left and right eyes.

[0004] However, 2D video is still the mainstream video format. Active 3D display technology uses the screen to display complete left and right eye images sequentially, so each frame of image needs to be transmitted twice, thus requiring twice the transmission bandwidth. This leads to increased hardware costs in the control system to ensure compatibility between 2D and 3D displays. Summary of the Invention

[0005] Therefore, it is necessary to provide a video display method, apparatus, computer equipment, computer-readable storage medium, and computer program product that can reduce hardware costs in response to the above-mentioned technical problems.

[0006] Firstly, this application provides a video display method. The method includes:

[0007] Acquire the initial video signal and identify the flag bits of the initial video signal;

[0008] If the flag bit is the first preset flag, then the initial video signal is subjected to gamma processing to obtain a 2D video signal, and the 2D video signal is displayed through a preset display screen;

[0009] If the flag bit is a second preset flag, then the left-eye frame and the right-eye frame of the initial video signal are interleaved in at least two preset memories to obtain a 3D video signal, and the 3D video signal is displayed through the preset display screen.

[0010] In one embodiment, the at least two preset memories include a first preset memory and a second preset memory, and the 3D video signal is composed of multiple 3D frame line information; the step of interleaving the left-eye frame and right-eye frame of the initial video signal in the at least two preset memories to obtain the 3D video signal includes:

[0011] If the initial video signal belongs to the first 3D video signal type, then the writing step is performed: the current left-eye frame line information of the initial video signal is written to the first preset memory; pixel information is alternately selected from the current left-eye frame line information stored in the first preset memory and the current right-eye frame line information of the initial video signal as 3D frame line information and written to the second preset memory; the writing step is returned to until all the left-eye frame line information of the initial video signal is written to the first preset memory.

[0012] In one embodiment, the frame line information is composed of multiple pixels arranged in a row; the step of interleaving pixel information from the current left-eye frame line information stored in the first preset memory and the current right-eye frame line information of the initial video signal as 3D frame line information and writing it into the second preset memory includes:

[0013] Pixel identifier reading steps: Obtain a first pixel position identifier and a second pixel position identifier; based on the first pixel position identifier, read the first pixel value from the current left-eye frame line information stored in the first preset memory, and based on the second pixel position identifier, read the second pixel value from the current right-eye frame line information of the initial video signal; write the first pixel value and the second pixel value into the second preset memory according to a preset interleaving order; return to the pixel identifier reading steps until the current left-eye frame line information and the previous right-eye frame line information are read; wherein, the first pixel position identifier is 2N-1, the second pixel position identifier is 2N, N is a positive integer, and the value of N increases with the number of times the pixel position identifier reading steps are executed.

[0014] In one embodiment, the at least two preset memories include a first preset memory and a second preset memory, and the 3D video signal is composed of multiple 3D frame line information; the step of interleaving the left-eye frame and right-eye frame of the initial video signal in the at least two preset memories to obtain the 3D video signal includes:

[0015] If the initial video signal belongs to the second 3D video signal type, then the left eye frame information of the initial video signal is read; the left eye frame information is masked to obtain masked left eye frame information, and the masked left eye frame information is written into the first preset memory; the right eye frame information of the initial video signal is read, and the right eye frame information is masked to obtain masked right eye frame information; the masked left eye frame information and the masked right eye frame information in the first preset memory are interleaved and written into the second preset memory.

[0016] In one embodiment, the left-eye frame information includes multiple left-eye frame rows; the step of performing masking processing on the left-eye frame information to obtain masked left-eye frame information, and writing the masked left-eye frame information into the first preset memory, includes:

[0017] If the current left-eye frame line is an odd number of left-eye frame lines, then the pixel at the first pixel position in the left-eye frame line information is masked to obtain masked left-eye frame information, and the masked left-eye frame information is written into the first preset memory; if the current left-eye frame line is an even number of left-eye frame lines, then the pixel at the second pixel position in the left-eye frame line information is masked to obtain masked left-eye frame information, and the masked left-eye frame information is written into the first preset memory; wherein, the first pixel position is arranged in the left-eye frame line information in the order of 2M, the second pixel position is arranged in the left-eye frame line information in the order of 2M-1, and M is a positive integer.

[0018] In one embodiment, displaying the 2D video signal through a preset display screen includes: adjusting the screen brightness of the preset display screen to a first preset brightness, and displaying the 2D video signal through the preset display screen at the first preset brightness; displaying the 3D video signal through the preset display screen includes: adjusting the screen brightness of the preset display screen to a second preset brightness, and displaying the 3D video signal through the preset display screen at the second preset brightness; wherein the second preset brightness is greater than the first preset brightness.

[0019] Secondly, this application also provides a video display device. The device includes:

[0020] The signal source module acquires the initial video signal and performs flag bit identification on the initial video signal to obtain the flag bit type;

[0021] The 2D video processing module is used to perform gamma processing on the initial video signal to obtain a 2D video signal, and to display the 2D video signal through a preset display screen;

[0022] A 3D video processing module is used to interleave the left-eye and right-eye frames of the initial video signal in at least two preset memories to obtain a 3D video signal, and to display the 3D video signal through the preset display screen.

[0023] Thirdly, this application also provides a computer device. The computer device includes a memory and a processor, the memory storing a computer program, and the processor executing the computer program to perform the following steps:

[0024] An initial video signal is acquired, and a flag bit of the initial video signal is identified. If the flag bit is a first preset flag, the initial video signal is subjected to gamma processing to obtain a 2D video signal, and the 2D video signal is displayed through a preset display screen. If the flag bit is a second preset flag, the left-eye frame and the right-eye frame of the initial video signal are interleaved in at least two preset memories to obtain a 3D video signal, and the 3D video signal is displayed through the preset display screen.

[0025] Fourthly, this application also provides a computer-readable storage medium. The computer-readable storage medium stores a computer program thereon, which, when executed by a processor, performs the following steps:

[0026] An initial video signal is acquired, and a flag bit of the initial video signal is identified. If the flag bit is a first preset flag, the initial video signal is subjected to gamma processing to obtain a 2D video signal, and the 2D video signal is displayed through a preset display screen. If the flag bit is a second preset flag, the left-eye frame and the right-eye frame of the initial video signal are interleaved in at least two preset memories to obtain a 3D video signal, and the 3D video signal is displayed through the preset display screen.

[0027] Fifthly, this application also provides a computer program product. The computer program product includes a computer program that, when executed by a processor, performs the following steps:

[0028] An initial video signal is acquired, and a flag bit of the initial video signal is identified. If the flag bit is a first preset flag, the initial video signal is subjected to gamma processing to obtain a 2D video signal, and the 2D video signal is displayed through a preset display screen. If the flag bit is a second preset flag, the left-eye frame and the right-eye frame of the initial video signal are interleaved in at least two preset memories to obtain a 3D video signal, and the 3D video signal is displayed through the preset display screen.

[0029] The aforementioned passive 3D display method, apparatus, computer equipment, storage medium, and computer program product acquire an initial video signal and perform flag bit identification on the initial video signal to obtain a flag bit type; if the flag bit type is a first preset flag, the initial video signal is subjected to gamma processing to obtain a 2D video signal, and the 2D video signal is displayed through a preset display screen; if the flag bit type is a second preset flag, the left-eye frame and right-eye frame of the initial video signal are interleaved in at least two preset memories to obtain a 3D video signal, and the 3D video signal is displayed through the preset display screen. In this application, the left-eye and right-eye frames of the initial video signal with the second preset flag are interleaved in at least two preset memories. The resulting 3D video signal is frame information in which the left-eye and right-eye frame information are interleaved. Based on this interleaved frame information, the left and right eye images can be displayed simultaneously. Therefore, the transmission bandwidth of the processed 3D video signal in this application is the same as that of the 2D video signal, so 3D display can be achieved without increasing the hardware cost of the control system. Furthermore, when interleaving the initial video signal with the second preset flag, this application uses at least two preset memories to interleave the initial video signal simultaneously. Interleaving can be performed at the same time as reading the initial video signal, which improves the processing efficiency of the initial video and helps to reduce video display latency. Attached Figure Description

[0030] Figure 1 This is a flowchart illustrating a video display method in one embodiment;

[0031] Figure 2 This is a schematic diagram illustrating two formats of 3D video frames in one embodiment;

[0032] Figure 3 This is a schematic diagram of the format of a left-right 3D video type in one embodiment;

[0033] Figure 4 This is a schematic diagram of the format of a top-bottom 3D video type in one embodiment;

[0034] Figure 5 This is a schematic diagram of the format of a line-interval 3D video type in one embodiment;

[0035] Figure 6 This is a schematic diagram illustrating the interlacing process of left and right 3D video types in one embodiment;

[0036] Figure 7 This is a schematic diagram illustrating the interlacing process of vertical 3D video types in one embodiment;

[0037] Figure 8 This is a schematic diagram of mask interleaving processing for a row-interval 3D video type in one embodiment;

[0038] Figure 9 This is a flowchart illustrating a video display method in one embodiment;

[0039] Figure 10 This is a structural block diagram of a video display device in one embodiment;

[0040] Figure 11 This is an internal structural diagram of a computer device in one embodiment. Detailed Implementation

[0041] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0042] In one embodiment, such as Figure 1 As shown, a video display method is provided. This embodiment illustrates the application of this method to a terminal. It is understood that this method can also be applied to a server, and further to a system including both a terminal and a server, and is implemented through interaction between the terminal and the server. In this embodiment, the method includes the following steps:

[0043] Step 202: Acquire the initial video signal and identify the flag bits of the initial video signal.

[0044] The initial video signal can be obtained through interfaces such as HDMI, DP, DVI and cinema server. The initial video signal includes a video flag bit. The video type of the initial video signal can be obtained based on the initial video flag bit. The flag bit can be 0 or 1. When the flag bit is 1, it indicates that the initial video signal is a 3D video type. When the flag bit is 0, it indicates that the initial video signal is a 2D video type.

[0045] Step 204: If the flag bit is the first preset flag, then the initial video signal is subjected to gamma processing to obtain a 2D video signal, and the 2D video signal is displayed through a preset display screen.

[0046] The first preset flag can be 0, the initial video signal corresponding to the first preset flag is a 2D video type, gamma processing is to edit the gamma curve of the image, and to perform non-linear tone editing on the image, to detect the dark and light parts in the image signal and increase their ratio, thereby improving the image contrast effect. The gamma curve is the conversion relationship curve between the screen output voltage and the corresponding brightness. The preset display screen can be an LED screen.

[0047] As an example, the specific mathematical expression for gamma processing is as follows:

[0048] V out =V in γ

[0049] Among them, V out For 2D video output signal, V in γ is the initial video input signal, and γ is a constant.

[0050] Step 206: If the flag bit is the second preset flag, then the left eye frame and the right eye frame of the initial video signal are interleaved in at least two preset memories to obtain a 3D video signal, and the 3D video signal is displayed through a preset display screen.

[0051] The second preset flag can be 1. The initial video signal corresponding to the second preset flag is a 3D video type. The initial video signal of the 3D video type includes a left-eye frame and a right-eye frame. Interleaving processing refers to selecting half of the left-eye frame and half of the right-eye frame for interleaving and merging. The interleaving and merging result in a 3D video frame. The 3D video signal is composed of 3D video frames. The 3D video frame is the same size as the left-eye frame and the right-eye frame. Moreover, the passive 3D frame, in conjunction with 3D glasses, can display the left and right eye images simultaneously in the same frame to achieve 3D display. Therefore, the 3D video frame in this embodiment is the same size as the 2D video signal, so the same transmission bandwidth can be used for transmission.

[0052] As an example, such as Figure 2 As shown, the 3D video frames contain two 3D formats, both arranged in a checkerboard pattern. Figure 2 (a) For example, in L00, L represents the left eye frame, 00 represents the first row and first column, that is, L00 represents the pixel in the first row and first column of the first frame of the left eye, L24 represents the pixel in the fifth row of the third frame of the left eye, R01 represents the pixel in the second row of the first frame of the right eye, and R34 represents the pixel in the fifth row of the fourth frame of the right eye. The 3D video frame is formed by interlacing the pixels of the left eye frame row and the pixels of the right eye frame row.

[0053] As an example, step 206 includes: if the flag bit is a second preset flag, then determining the 3D video signal type of the initial video signal; if the initial video signal belongs to the first 3D video signal type, then performing interleaving processing on the left-eye frame and right-eye frame of the initial video signal in at least two preset memories to obtain a 3D video signal; if the initial video signal belongs to the second 3D video signal type, then performing mask interleaving processing on the left-eye frame and right-eye frame of the initial video signal in at least two preset memories to obtain a 3D video signal; and displaying the 3D video signal through a preset display screen.

[0054] As an example, the first 3D video signal type includes horizontal 3D video type and line-interval 3D video type, and the second 3D video signal type includes vertical 3D video type.

[0055] In the above video display method, the 3D video signal obtained by interleaving the left-eye and right-eye frames of the initial video signal can display the left and right eye images simultaneously in the same frame. In addition, the 3D video signal and the 2D video signal of this embodiment have the same size, so they can be transmitted using the same transmission bandwidth. When performing 2 / 3D compatible display, there is no need to increase the hardware cost of the control system. Furthermore, based on the characteristic that the initial video signal of the 3D video type includes left-eye and right-eye frames, the interleaving process can be performed using at least two preset memories while the initial video signal is being read, which improves the processing efficiency of the initial video and helps to reduce video display latency.

[0056] In one embodiment, at least two preset memories include a first preset memory and a second preset memory, and the 3D video signal consists of multiple 3D frame line information; the left-eye frame and right-eye frame of the initial video signal are interleaved in at least two preset memories to obtain the 3D video signal, including:

[0057] If the initial video signal belongs to the first 3D video signal type, then the writing step is executed: write the current left-eye frame line information of the initial video signal into the first preset memory; select pixel information from the current left-eye frame line information stored in the first preset memory and the current right-eye frame line information of the initial video signal as 3D frame line information and write it into the second preset memory; return to execute the writing step until all the left-eye frame line information of the initial video signal is written into the first preset memory.

[0058] The initial video signal consists of multiple frame lines, and the frame line information of the initial video signal needs to be read in an orderly manner according to the arrangement order of the frame line information of the 3D video signal. The frame line information reading order of the initial video signal of the first 3D video signal type is the alternating reading of the left eye frame line and the right eye frame line. Therefore, when reading the frame line information, the left eye frame line information and the right eye frame line information can be interleaved at the same time. The first preset memory can be random access memory (RAM), and the second preset memory can be double data rate synchronous dynamic random access memory (DDR).

[0059] Specifically, such as Figure 6 and Figure 7As shown, Left Frame Line 1 represents the first frame line of the left eye, and Right Frame Line 1 represents the first frame line of the right eye. If the initial video signal belongs to the first 3D video signal type, the writing step is performed: the current left eye frame line information of the initial video signal is written into RAM; pixel information is interleaved from the current left eye frame line information stored in RAM and the current right eye frame line information of the initial video signal as 3D frame line information and written into DDR; the writing step is returned until all left eye frame line information of the initial video signal is written into RAM. In this embodiment, the left eye frame line is taken first as an example. When the right eye frame line is first, the method of this embodiment can also be used to perform interleaving processing on the original video signal. When the right eye frame line is first, the 3D frame obtained by interleaving processing is shown in Figure (2)b.

[0060] In the above embodiments, two preset memories are used to interleave the left-eye frame line information and the right-eye frame line information of the initial video signal. The interleaving process can be completed at the same time as the left-eye frame line and the right-eye frame line are read, without waiting for the left-eye frame line and the right-eye frame line to be read. The RAM that can store one line of frame information and the DDR memory space that can store the left-eye frame information can realize the interleaving process of the original video signal. Therefore, the storage space of the memory can be saved and the processing efficiency of the initial video can be improved, thereby helping to reduce the video display latency.

[0061] In one embodiment, frame line information is composed of multiple pixels arranged in a row; pixel information is interleaved from the current left-eye frame line information stored in the first preset memory and the current right-eye frame line information of the initial video signal and written as 3D frame line information into the second preset memory, including:

[0062] Pixel identifier reading steps: Obtain the first pixel position identifier and the second pixel position identifier; based on the first pixel position identifier, read the first pixel value from the current left-eye frame line information stored in the first preset memory, and based on the second pixel position identifier, read the second pixel value from the current right-eye frame line information of the initial video signal; write the first pixel value and the second pixel value into the second preset memory according to the preset interleaving order; return to the pixel identifier reading steps until the current left-eye frame line information and the previous right-eye frame line information are read; wherein, the first pixel position identifier is 2N-1, the second pixel position identifier is 2N, N is a positive integer, and the value of N increases with the number of times the pixel position identifier reading steps are executed.

[0063] The preset interleaving order is determined according to the arrangement order of the left-eye frame line and the right-eye frame line of the original video signal. If the left-eye frame line comes first, the preset interleaving order is that the first pixel value is written to the second preset memory before the second pixel value. If the right-eye frame line comes first, the preset interleaving order is that the second pixel value is written to the second preset memory before the first pixel value. The initial value of N can be 1.

[0064] Specifically, the pixel identifier reading steps are as follows: obtain the first pixel position identifier and the second pixel position identifier; according to the first pixel position identifier, read the first pixel value from the current left-eye frame line information stored in RAM, and according to the second pixel position identifier, read the second pixel value from the current right-eye frame line information of the initial video signal; if the initial video signal's left-eye frame line comes first, write the first pixel value and the second pixel value to DDR in sequence; if the initial video signal's right-eye frame line comes first, write the second pixel value and the first pixel value to DDR in sequence; return to the pixel identifier reading steps until the current left-eye frame line information and the previous right-eye frame line information have been read; wherein, the first pixel position identifier is 2N-1, the second pixel position identifier is 2N, N is a positive integer, and the value of N increases with the number of times the pixel position identifier reading steps are executed, and the initial value of N is 1.

[0065] In one embodiment, at least two preset memories include a first preset memory and a second preset memory, and the 3D video signal consists of multiple 3D frame line information; the left-eye frame and right-eye frame of the initial video signal are interleaved in at least two preset memories to obtain the 3D video signal, including:

[0066] If the initial video signal belongs to the second 3D video signal type, then the left eye frame information of the initial video signal is read; the left eye frame information is masked to obtain masked left eye frame information, and the masked left eye frame information is written into the first preset memory; the right eye frame information of the initial video signal is read, and the right eye frame information is masked to obtain masked right eye frame information; the masked left eye frame information and the masked right eye frame information in the first preset memory are interleaved and written into the second preset memory.

[0067] In the second type of 3D video signal, the frame line information of the initial video signal is arranged such that all left-eye frames are arranged before the right-eye frames. Masking refers to the process of masking specified pixels by performing bitwise operations with the target pixels.

[0068] As an example, taking 8-bit RGB color depth and writing 4 pixels at a time, the masking operation is as follows:

[0069]

[0070] Where X represents not written, meaning it does not affect the existing value in RAM.

[0071] Specifically, such as Figure 8As shown, Left Frame represents the left-eye frame line, and Right Frame represents the right-eye frame. If the initial video signal belongs to the second 3D video signal type, the left-eye frame information of the initial video signal is read. According to the first preset mask, the left-eye frame information is masked to obtain masked left-eye frame information, and the masked left-eye frame information is written into RAM. The right-eye frame information of the initial video signal is read, and according to the second preset mask, the right-eye frame information is masked to obtain masked right-eye frame information. The masked left-eye frame information and the masked right-eye frame information in RAM are interleaved and written into DDR, wherein the second preset mask is obtained by bitwise inversion of the first preset mask.

[0072] In this embodiment, based on the left and right frame row arrangement order of the initial video signal of the second 3D video signal type, the left eye frame and the right eye frame are masked respectively to obtain masked left eye frame information and masked right eye frame information. The interleaving processing of the initial video signal is completed based on the masked left eye frame information and masked right eye frame information, which can improve the processing efficiency of the initial video and thus help reduce video display latency.

[0073] In one embodiment, the left-eye frame information includes multiple left-eye frame lines; the left-eye frame information is masked to obtain masked left-eye frame information, and the masked left-eye frame information is written into a first preset memory, including:

[0074] If the current left-eye frame line is an odd number of left-eye frame lines, then the pixel at the first pixel position in the left-eye frame line information is masked to obtain masked left-eye frame information, and the masked left-eye frame information is written into the first preset memory; if the current left-eye frame line is an even number of left-eye frame lines, then the pixel at the second pixel position in the left-eye frame line information is masked to obtain masked left-eye frame information, and the masked left-eye frame information is written into the first preset memory; wherein, the first pixel position is arranged in the left-eye frame line information in the order of 2M, the second pixel position is arranged in the left-eye frame line information in the order of 2M-1, and M is a positive integer.

[0075] In one embodiment, displaying a 2D video signal through a preset display screen includes: adjusting the screen brightness of the preset display screen to a first preset brightness, and displaying the 2D video signal through the preset display screen at the first preset brightness; displaying a 3D video signal through a preset display screen includes: adjusting the screen brightness of the preset display screen to a second preset brightness, and displaying the 3D video signal through the preset display screen at the second preset brightness; wherein the second preset brightness is greater than the first preset brightness.

[0076] Since 3D glasses reduce brightness, the screen brightness needs to be increased when displaying 3D video signals, while the normal display brightness needs to be adjusted when displaying 2D video signals, thus ensuring compatibility with 3D displays.

[0077] In this embodiment, adjusting the screen brightness of the preset display screen according to the type of video signal to be displayed can improve the compatibility of 2D video display and 3D video display.

[0078] In one embodiment, such as Figure 9 As shown, the initial video signal is acquired and the flag bit of the initial video signal is identified; if the flag bit is the first preset flag, the initial video signal is subjected to gamma processing to obtain a 2D video signal, and the screen brightness of the preset display screen is adjusted to the first preset brightness, and the 2D video signal is displayed on the preset display screen at the first preset brightness.

[0079] If the flag is the second preset flag, the video signal type of the initial video signal is identified; if the initial video signal belongs to the first 3D video signal type, the writing step is executed: the current left-eye frame line information of the initial video signal is written to the first preset memory; pixel information is alternately selected from the current left-eye frame line information stored in the first preset memory and the current right-eye frame line information of the initial video signal as 3D frame line information and written to the second preset memory; the writing step is returned until all the left-eye frame line information of the initial video signal is written to the first preset memory.

[0080] If the initial video signal belongs to the second 3D video signal type, the left-eye frame information of the initial video signal is read; the left-eye frame information is masked to obtain masked left-eye frame information, and this masked left-eye frame information is written into the first preset memory; the right-eye frame information of the initial video signal is read, and the right-eye frame information is masked to obtain masked right-eye frame information; the masked left-eye frame information and the masked right-eye frame information in the first preset memory are interleaved and written into the second preset memory. Based on the characteristic that the initial video signal of the 3D video type includes both left-eye and right-eye frames, using at least two preset memories for interleaving processing allows interleaving to be performed simultaneously with the reading of the initial video signal, improving the processing efficiency of the initial video and thus helping to reduce video display latency.

[0081] Finally, the screen brightness of the preset display screen is adjusted to a second preset brightness, and the 3D video signal is displayed on the preset display screen at the second preset brightness. The 3D video signal obtained by interleaving the left-eye and right-eye frames of the initial video signal can simultaneously display left and right-eye images in the same frame. Furthermore, the 3D video signal in this embodiment has the same size as the 2D video signal, so it can be transmitted using the same transmission bandwidth. This eliminates the need to increase the hardware cost of the control system when performing 2D / 3D compatible display. Moreover, different interleaving processing methods are used according to different 3D video signal types, improving the processing efficiency of the initial video and thus helping to reduce video display latency.

[0082] It should be understood that although the steps in the flowcharts of the embodiments described above are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the embodiments described above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages of other steps.

[0083] Based on the same inventive concept, this application also provides a video display device for implementing the video display method described above. The solution provided by this device is similar to the implementation described in the above method; therefore, the specific limitations in one or more video display device embodiments provided below can be found in the limitations of the video display method described above, and will not be repeated here.

[0084] In one embodiment, such as Figure 10 As shown, a video display device is provided, including: a signal source module 302, a 2D video processing module 304, and a 3D video processing module 306, wherein:

[0085] The signal source module 302 acquires the initial video signal and performs flag bit identification on the initial video signal to obtain the flag bit type;

[0086] 2D video processing module 304 is used to perform gamma processing on the initial video signal to obtain a 2D video signal, and to display the 2D video signal through a preset display screen;

[0087] The 3D video processing module 306 is used to interleave the left-eye frame and the right-eye frame of the initial video signal in at least two preset memories to obtain a 3D video signal, and to display the 3D video signal through the preset display screen.

[0088] In one embodiment, the at least two preset memories include a first preset memory and a second preset memory, and the 3D video signal is composed of multiple 3D frame line information; the 3D video processing module 306 is further configured to:

[0089] If the initial video signal belongs to the first 3D video signal type, then the writing step is performed: the current left-eye frame line information of the initial video signal is written to the first preset memory; pixel information is alternately selected from the current left-eye frame line information stored in the first preset memory and the current right-eye frame line information of the initial video signal as 3D frame line information and written to the second preset memory; the writing step is returned to until all the left-eye frame line information of the initial video signal is written to the first preset memory.

[0090] In one embodiment, the frame line information is composed of a plurality of pixels arranged together; the 3D video processing module 306 is further configured to:

[0091] Pixel identifier reading steps: Obtain a first pixel position identifier and a second pixel position identifier; based on the first pixel position identifier, read the first pixel value from the current left-eye frame line information stored in the first preset memory, and based on the second pixel position identifier, read the second pixel value from the current right-eye frame line information of the initial video signal; write the first pixel value and the second pixel value into the second preset memory according to a preset interleaving order; return to the pixel identifier reading steps until the current left-eye frame line information and the previous right-eye frame line information are read; wherein, the first pixel position identifier is 2N-1, the second pixel position identifier is 2N, N is a positive integer, and the value of N increases with the number of times the pixel position identifier reading steps are executed.

[0092] In one embodiment, the at least two preset memories include a first preset memory and a second preset memory, and the 3D video signal is composed of multiple 3D frame line information; the 3D video processing module 306 is further configured to:

[0093] If the initial video signal belongs to the second 3D video signal type, then the left eye frame information of the initial video signal is read; the left eye frame information is masked to obtain masked left eye frame information, and the masked left eye frame information is written into the first preset memory; the right eye frame information of the initial video signal is read, and the right eye frame information is masked to obtain masked right eye frame information; the masked left eye frame information and the masked right eye frame information in the first preset memory are interleaved and written into the second preset memory.

[0094] In one embodiment, the left-eye frame information includes multiple left-eye frame rows; the 3D video processing module 306 is further configured to:

[0095] If the current left-eye frame line is an odd number of left-eye frame lines, then the pixel at the first pixel position in the left-eye frame line information is masked to obtain masked left-eye frame information, and the masked left-eye frame information is written into the first preset memory; if the current left-eye frame line is an even number of left-eye frame lines, then the pixel at the second pixel position in the left-eye frame line information is masked to obtain masked left-eye frame information, and the masked left-eye frame information is written into the first preset memory; wherein, the first pixel position is arranged in the left-eye frame line information in the order of 2M, the second pixel position is arranged in the left-eye frame line information in the order of 2M-1, and M is a positive integer.

[0096] In one embodiment, the 2D video processing module 304 is further configured to: adjust the screen brightness of the preset display screen to a first preset brightness, and display the 2D video signal through the preset display screen at the first preset brightness; the 3D video processing module 306 is further configured to: adjust the screen brightness of the preset display screen to a second preset brightness, and display the 3D video signal through the preset display screen at the second preset brightness; wherein the second preset brightness is greater than the first preset brightness.

[0097] Each module in the aforementioned video display device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device, or stored in the memory of a computer device as software, so that the processor can call and execute the operations corresponding to each module.

[0098] In one embodiment, a computer device is provided, which may be a terminal, and its internal structure diagram may be as follows: Figure 11 As shown, the computer device includes a processor, memory, communication interface, display screen, and input devices connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The communication interface is used for wired or wireless communication with external terminals; wireless communication can be achieved through Wi-Fi, mobile cellular networks, NFC (Near Field Communication), or other technologies. When the computer program is executed by the processor, it implements a video display method. The display screen can be an LCD screen or an e-ink screen.

[0099] Those skilled in the art will understand that Figure 11The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0100] In one embodiment, a computer device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to perform the following steps:

[0101] An initial video signal is acquired, and a flag bit of the initial video signal is identified. If the flag bit is a first preset flag, the initial video signal is subjected to gamma processing to obtain a 2D video signal, and the 2D video signal is displayed through a preset display screen. If the flag bit is a second preset flag, the left-eye frame and the right-eye frame of the initial video signal are interleaved in at least two preset memories to obtain a 3D video signal, and the 3D video signal is displayed through the preset display screen.

[0102] In one embodiment, the processor, when executing a computer program, also performs the following steps:

[0103] If the initial video signal belongs to the first 3D video signal type, then the writing step is performed: the current left-eye frame line information of the initial video signal is written to the first preset memory; pixel information is alternately selected from the current left-eye frame line information stored in the first preset memory and the current right-eye frame line information of the initial video signal as 3D frame line information and written to the second preset memory; the writing step is returned to until all the left-eye frame line information of the initial video signal is written to the first preset memory.

[0104] In one embodiment, the processor, when executing a computer program, also performs the following steps:

[0105] Pixel identifier reading steps: Obtain a first pixel position identifier and a second pixel position identifier; based on the first pixel position identifier, read the first pixel value from the current left-eye frame line information stored in the first preset memory, and based on the second pixel position identifier, read the second pixel value from the current right-eye frame line information of the initial video signal; write the first pixel value and the second pixel value into the second preset memory according to a preset interleaving order; return to the pixel identifier reading steps until the current left-eye frame line information and the previous right-eye frame line information are read; wherein, the first pixel position identifier is 2N-1, the second pixel position identifier is 2N, N is a positive integer, and the value of N increases with the number of times the pixel position identifier reading steps are executed.

[0106] In one embodiment, the processor, when executing a computer program, also performs the following steps:

[0107] If the initial video signal belongs to the second 3D video signal type, then the left eye frame information of the initial video signal is read; the left eye frame information is masked to obtain masked left eye frame information, and the masked left eye frame information is written into the first preset memory; the right eye frame information of the initial video signal is read, and the right eye frame information is masked to obtain masked right eye frame information; the masked left eye frame information and the masked right eye frame information in the first preset memory are interleaved and written into the second preset memory.

[0108] In one embodiment, the processor, when executing a computer program, also performs the following steps:

[0109] If the current left-eye frame line is an odd number of left-eye frame lines, then the pixel at the first pixel position in the left-eye frame line information is masked to obtain masked left-eye frame information, and the masked left-eye frame information is written into the first preset memory; if the current left-eye frame line is an even number of left-eye frame lines, then the pixel at the second pixel position in the left-eye frame line information is masked to obtain masked left-eye frame information, and the masked left-eye frame information is written into the first preset memory; wherein, the first pixel position is arranged in the left-eye frame line information in the order of 2M, the second pixel position is arranged in the left-eye frame line information in the order of 2M-1, and M is a positive integer.

[0110] In one embodiment, the processor, when executing a computer program, also performs the following steps:

[0111] Adjusting the screen brightness of the preset display screen to a first preset brightness, and displaying the 2D video signal through the preset display screen at the first preset brightness; displaying the 3D video signal through the preset display screen includes: adjusting the screen brightness of the preset display screen to a second preset brightness, and displaying the 3D video signal through the preset display screen at the second preset brightness; wherein, the second preset brightness is greater than the first preset brightness.

[0112] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon, the computer program performing the following steps when executed by a processor:

[0113] An initial video signal is acquired, and a flag bit of the initial video signal is identified. If the flag bit is a first preset flag, the initial video signal is subjected to gamma processing to obtain a 2D video signal, and the 2D video signal is displayed through a preset display screen. If the flag bit is a second preset flag, the left-eye frame and the right-eye frame of the initial video signal are interleaved in at least two preset memories to obtain a 3D video signal, and the 3D video signal is displayed through the preset display screen.

[0114] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0115] If the initial video signal belongs to the first 3D video signal type, then the writing step is performed: the current left-eye frame line information of the initial video signal is written to the first preset memory; pixel information is alternately selected from the current left-eye frame line information stored in the first preset memory and the current right-eye frame line information of the initial video signal as 3D frame line information and written to the second preset memory; the writing step is returned to until all the left-eye frame line information of the initial video signal is written to the first preset memory.

[0116] In one embodiment, when the computer program is executed by a processor, it further performs the following steps:

[0117] Pixel identifier reading steps: Obtain a first pixel position identifier and a second pixel position identifier; based on the first pixel position identifier, read the first pixel value from the current left-eye frame line information stored in the first preset memory, and based on the second pixel position identifier, read the second pixel value from the current right-eye frame line information of the initial video signal; write the first pixel value and the second pixel value into the second preset memory according to a preset interleaving order; return to the pixel identifier reading steps until the current left-eye frame line information and the previous right-eye frame line information are read; wherein, the first pixel position identifier is 2N-1, the second pixel position identifier is 2N, N is a positive integer, and the value of N increases with the number of times the pixel position identifier reading steps are executed.

[0118] In one embodiment, when the computer program is executed by a processor, it further performs the following steps:

[0119] If the initial video signal belongs to the second 3D video signal type, then the left eye frame information of the initial video signal is read; the left eye frame information is masked to obtain masked left eye frame information, and the masked left eye frame information is written into the first preset memory; the right eye frame information of the initial video signal is read, and the right eye frame information is masked to obtain masked right eye frame information; the masked left eye frame information and the masked right eye frame information in the first preset memory are interleaved and written into the second preset memory.

[0120] In one embodiment, when the computer program is executed by a processor, it further performs the following steps:

[0121] If the current left-eye frame line is an odd number of left-eye frame lines, then the pixel at the first pixel position in the left-eye frame line information is masked to obtain masked left-eye frame information, and the masked left-eye frame information is written into the first preset memory; if the current left-eye frame line is an even number of left-eye frame lines, then the pixel at the second pixel position in the left-eye frame line information is masked to obtain masked left-eye frame information, and the masked left-eye frame information is written into the first preset memory; wherein, the first pixel position is arranged in the left-eye frame line information in the order of 2M, the second pixel position is arranged in the left-eye frame line information in the order of 2M-1, and M is a positive integer.

[0122] In one embodiment, when the computer program is executed by a processor, it further performs the following steps:

[0123] Adjusting the screen brightness of the preset display screen to a first preset brightness, and displaying the 2D video signal through the preset display screen at the first preset brightness; displaying the 3D video signal through the preset display screen includes: adjusting the screen brightness of the preset display screen to a second preset brightness, and displaying the 3D video signal through the preset display screen at the second preset brightness; wherein, the second preset brightness is greater than the first preset brightness.

[0124] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, performs the following steps:

[0125] An initial video signal is acquired, and a flag bit of the initial video signal is identified. If the flag bit is a first preset flag, the initial video signal is subjected to gamma processing to obtain a 2D video signal, and the 2D video signal is displayed through a preset display screen. If the flag bit is a second preset flag, the left-eye frame and the right-eye frame of the initial video signal are interleaved in at least two preset memories to obtain a 3D video signal, and the 3D video signal is displayed through the preset display screen.

[0126] In one embodiment, when the computer program is executed by a processor, it further performs the following steps:

[0127] If the initial video signal belongs to the first 3D video signal type, then the writing step is performed: the current left-eye frame line information of the initial video signal is written to the first preset memory; pixel information is alternately selected from the current left-eye frame line information stored in the first preset memory and the current right-eye frame line information of the initial video signal as 3D frame line information and written to the second preset memory; the writing step is returned to until all the left-eye frame line information of the initial video signal is written to the first preset memory.

[0128] In one embodiment, when the computer program is executed by a processor, it further performs the following steps:

[0129] Pixel identifier reading steps: Obtain a first pixel position identifier and a second pixel position identifier; based on the first pixel position identifier, read the first pixel value from the current left-eye frame line information stored in the first preset memory, and based on the second pixel position identifier, read the second pixel value from the current right-eye frame line information of the initial video signal; write the first pixel value and the second pixel value into the second preset memory according to a preset interleaving order; return to the pixel identifier reading steps until the current left-eye frame line information and the previous right-eye frame line information are read; wherein, the first pixel position identifier is 2N-1, the second pixel position identifier is 2N, N is a positive integer, and the value of N increases with the number of times the pixel position identifier reading steps are executed.

[0130] In one embodiment, when the computer program is executed by a processor, it further performs the following steps:

[0131] If the initial video signal belongs to the second 3D video signal type, then the left eye frame information of the initial video signal is read; the left eye frame information is masked to obtain masked left eye frame information, and the masked left eye frame information is written into the first preset memory; the right eye frame information of the initial video signal is read, and the right eye frame information is masked to obtain masked right eye frame information; the masked left eye frame information and the masked right eye frame information in the first preset memory are interleaved and written into the second preset memory.

[0132] In one embodiment, when the computer program is executed by a processor, it further performs the following steps:

[0133] If the current left-eye frame line is an odd number of left-eye frame lines, then the pixel at the first pixel position in the left-eye frame line information is masked to obtain masked left-eye frame information, and the masked left-eye frame information is written into the first preset memory; if the current left-eye frame line is an even number of left-eye frame lines, then the pixel at the second pixel position in the left-eye frame line information is masked to obtain masked left-eye frame information, and the masked left-eye frame information is written into the first preset memory; wherein, the first pixel position is arranged in the left-eye frame line information in the order of 2M, the second pixel position is arranged in the left-eye frame line information in the order of 2M-1, and M is a positive integer.

[0134] In one embodiment, when the computer program is executed by a processor, it further performs the following steps:

[0135] Adjusting the screen brightness of the preset display screen to a first preset brightness, and displaying the 2D video signal through the preset display screen at the first preset brightness; displaying the 3D video signal through the preset display screen includes: adjusting the screen brightness of the preset display screen to a second preset brightness, and displaying the 3D video signal through the preset display screen at the second preset brightness; wherein, the second preset brightness is greater than the first preset brightness.

[0136] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, etc., and are not limited to these.

[0137] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0138] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A video signal display method characterized by comprising: The method includes: Acquire the initial video signal and identify the flag bits of the initial video signal; If the flag bit is the first preset flag, then the initial video signal is subjected to gamma processing to obtain a 2D video signal, and the 2D video signal is displayed through a preset display screen; If the flag bit is a second preset flag, then the left eye frame and the right eye frame of the initial video signal are interleaved in at least two preset memories to obtain a 3D video signal, and the 3D video signal is displayed through the preset display screen; The initial video signal includes a first 3D video signal type and a second 3D video signal type; the first 3D video signal type includes a left-right 3D video type and a line-interval 3D video type, and the second 3D video signal type includes a top-bottom 3D video type; the at least two preset memories include a first preset memory and a second preset memory, and the 3D video signal is composed of multiple 3D frame line information; the step of interleaving the left-eye frame and right-eye frame of the initial video signal in the at least two preset memories to obtain the 3D video signal includes: If the initial video signal belongs to the second 3D video signal type, then the left eye frame information of the initial video signal is read; the left eye frame information is masked to obtain masked left eye frame information, and the masked left eye frame information is written into the first preset memory; the right eye frame information of the initial video signal is read, and the right eye frame information is masked to obtain masked right eye frame information; the masked left eye frame information and the masked right eye frame information in the first preset memory are interleaved and written into the second preset memory; The left-eye frame information includes multiple left-eye frame rows; the step of masking the left-eye frame information to obtain masked left-eye frame information and writing the masked left-eye frame information into the first preset memory includes: If the current left-eye frame line is an odd number of left-eye frame lines, then the pixel at the first pixel position in the left-eye frame line information is masked to obtain masked left-eye frame information, and the masked left-eye frame information is written into the first preset memory; if the current left-eye frame line is an even number of left-eye frame lines, then the pixel at the second pixel position in the left-eye frame line information is masked to obtain masked left-eye frame information, and the masked left-eye frame information is written into the first preset memory; wherein, the first pixel position is arranged in the left-eye frame line information in the order of 2M, the second pixel position is arranged in the left-eye frame line information in the order of 2M-1, and M is a positive integer.

2. The method of claim 1, wherein, The step of interleaving the left-eye and right-eye frames of the initial video signal in at least two preset memories to obtain a 3D video signal includes: If the initial video signal belongs to the first 3D video signal type, then the writing step is performed: the current left eye frame line information of the initial video signal is written into the first preset memory; Pixel information is interleaved from the current left-eye frame line information stored in the first preset memory and the current right-eye frame line information of the initial video signal and written as 3D frame line information into the second preset memory. Return to the writing step until all left-eye frame line information of the initial video signal is written to the first preset memory.

3. The method according to claim 2, characterized in that, The frame line information is composed of multiple pixels arranged in a row; the step of interleaving pixel information from the current left-eye frame line information stored in the first preset memory and the current right-eye frame line information of the initial video signal as 3D frame line information and writing it into the second preset memory includes: Pixel identifier reading steps: Obtain the first pixel position identifier and the second pixel position identifier; According to the first pixel position identifier, the first pixel value is read from the current left eye frame line information stored in the first preset memory, and according to the second pixel position identifier, the second pixel value is read from the current right eye frame line information of the initial video signal. The first pixel value and the second pixel value are written into the second preset memory according to the preset interleaving order; Return to the pixel identifier reading step until the current left eye frame line information and the previous right eye frame line information have been read; Wherein, the first pixel position identifier is 2N-1, the second pixel position identifier is 2N, N is a positive integer, and the value of N increases with the number of times the pixel position identifier reading step is executed.

4. The method according to claim 1, characterized in that, The step of displaying the 2D video signal through a preset display screen includes: Adjust the screen brightness of the preset display screen to a first preset brightness, and display the 2D video signal through the preset display screen at the first preset brightness; The step of displaying the 3D video signal through the preset display screen includes: Adjust the screen brightness of the preset display screen to a second preset brightness, and display the 3D video signal through the preset display screen at the second preset brightness; The second preset brightness is greater than the first preset brightness.

5. A passive 3D display device, characterized in that, The device includes: The signal source module acquires the initial video signal and performs flag bit identification on the initial video signal to obtain the flag bit type; The 2D video processing module is used to perform gamma processing on the initial video signal to obtain a 2D video signal, and to display the 2D video signal through a preset display screen; A 3D video processing module is used to interleave the left-eye frame and the right-eye frame of the initial video signal in at least two preset memories to obtain a 3D video signal, and to display the 3D video signal through the preset display screen. The initial video signal includes a first 3D video signal type and a second 3D video signal type; the first 3D video signal type includes a left-right 3D video type and a line-interval 3D video type, and the second 3D video signal type includes a top-bottom 3D video type; the at least two preset memories include a first preset memory and a second preset memory, and the 3D video signal is composed of multiple 3D frame line information; the step of interleaving the left-eye frame and right-eye frame of the initial video signal in the at least two preset memories to obtain the 3D video signal includes: If the initial video signal belongs to the second 3D video signal type, then the left eye frame information of the initial video signal is read; the left eye frame information is masked to obtain masked left eye frame information, and the masked left eye frame information is written into the first preset memory; the right eye frame information of the initial video signal is read, and the right eye frame information is masked to obtain masked right eye frame information; the masked left eye frame information and the masked right eye frame information in the first preset memory are interleaved and written into the second preset memory; The left-eye frame information includes multiple left-eye frame rows; the step of masking the left-eye frame information to obtain masked left-eye frame information and writing the masked left-eye frame information into the first preset memory includes: If the current left-eye frame line is an odd number of left-eye frame lines, then the pixel at the first pixel position in the left-eye frame line information is masked to obtain masked left-eye frame information, and the masked left-eye frame information is written into the first preset memory; if the current left-eye frame line is an even number of left-eye frame lines, then the pixel at the second pixel position in the left-eye frame line information is masked to obtain masked left-eye frame information, and the masked left-eye frame information is written into the first preset memory; wherein, the first pixel position is arranged in the left-eye frame line information in the order of 2M, the second pixel position is arranged in the left-eye frame line information in the order of 2M-1, and M is a positive integer.

6. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 4.

7. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 4.

8. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 4.

Images