A power distribution feeder terminal software and hardware residual voltage intelligent identification method
Patent Information
- Application Number
- CN202311566553.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-11-22
- Publication Date
- 2026-08-18
- Estimated Expiration
- 2043-11-22
AI Technical Summary
现有技术内,只接入电源侧一路线电压和负荷侧一路线电压的判别方式,当接PT(电压互感器,下同)的两相接地或者三相短路且过渡电阻较小时,残压工频量有效值较低,此时会造成残压识别漏判,有较大检测盲区;另外如果线路有永磁开关,整组时间在30ms左右,现有技术内,通过有效值门槛的方法难以识别30ms以内的残压脉冲;同时在线路正常失电过程中,由于电磁谐振等影响,现有技术内,会将此过程误判为残压脉冲
[0025]本发明的有益效果是:针对传统残压识别技术残压识别门槛低,窗口长,导致残压漏判及线路正常失电过程中残压误判问题,通过采集一次开关电源侧及负荷侧的多端模拟量,有效规避残压检测盲区,避免残压漏识别;通过给硬件残压模块增加第二后备电源,延长配电馈线终端失电后硬件残压模块运行时长,有效避免残压误判;通过软件残压识别模块与硬件残压模块相结合的方式,快速可靠完成残压识别,加速故障隔离,避免电器元件由于二次送电带来的大电流冲击,同时可有效保障故障线路区间内运维人员人身安全。
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Figure CN117665376B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of power distribution automation technology, and in particular to a method for intelligent identification of residual voltage in the hardware and software of power distribution feeder terminals. Background Technology
[0002] In Appendix 5: Standardized Design Scheme for 12 kV Primary and Secondary Integrated Pole-Mounted Circuit Breakers and Distribution Automation Terminal Units (FTUs) (2021 Edition), the State Grid Corporation of China requires the following for residual voltage detection: the terminal should have both software and hardware residual voltage detection functions; the software residual voltage detection threshold should be set through a residual voltage setting, and the residual voltage pulse time should be no less than 60 ms; in the power-off state, the terminal should be able to identify and memorize residual voltage pulses with a time of no less than 60 ms and a residual voltage value of no less than 50% Un (rated voltage, the same below); after the terminal is powered on, it should be able to participate in the fault handling logic calculation with the identified residual voltage pulses. In existing technologies, the identification method that only connects the voltage of one line on the power supply side and one line on the load side has limitations. When two phases connected to a PT (voltage transformer) are grounded or three phases are short-circuited and the transition resistance is small, the effective value of the residual voltage power frequency is low. This can lead to missed detections of residual voltage and a large detection blind zone. In addition, if the line has a permanent magnet switch, the entire set time is about 30ms. Existing technologies cannot identify residual voltage pulses within 30ms using the effective value threshold method. At the same time, during normal power outages, due to electromagnetic resonance and other factors, existing technologies may misinterpret this process as a residual voltage pulse. Missed detections of residual voltage increase the probability of circuit breaker tripping when switching power is switched, threatening the personal safety of line maintenance personnel. Misinterpretations of residual voltage affect normal power supply and increase the workload of front-line workers. Therefore, a residual voltage identification method with a lower residual voltage pulse identification voltage threshold, a shorter time window, and prevention of misinterpretations is needed. Summary of the Invention
[0003] To overcome the shortcomings of the above-mentioned residual voltage detection function, this invention discloses a software and hardware intelligent identification method for residual voltage in power distribution feeder terminals, so as to achieve a lower residual voltage pulse identification voltage threshold, a shorter time window, and residual voltage identification that prevents false judgment.
[0004] To achieve the above objectives, the present invention adopts the following technical solution:
[0005] According to a first aspect of the present invention, a method for intelligent identification of residual voltage in the hardware and software of a power distribution feeder terminal is proposed, characterized by comprising the following steps:
[0006] Collect multi-terminal analog quantities from both the switching power supply side and the load side;
[0007] The power distribution feeder terminal is equipped with a first backup power supply, and the hardware residual voltage module is equipped with a second backup power supply. After the power distribution feeder terminal loses power, if the second backup power supply has sufficient power, the first criterion logic is used to identify the hardware residual voltage. If the second backup power supply is depleted, the second criterion logic is used to identify the hardware residual voltage. Based on the hardware residual voltage identification result, the hardware residual voltage flag is set.
[0008] After the power distribution feeder terminal is powered back on and resumes operation, the software residual voltage identification module reads and combines the hardware residual voltage flag bit to perform software residual voltage identification.
[0009] Based on the software residual pressure identification results, output residual pressure interlocking information.
[0010] According to some embodiments, the primary switch is a pole-mounted circuit breaker, a pole-mounted load switch, a pole-mounted sectionalizing switch, a pole-mounted boundary switch, or a pole-mounted tie switch.
[0011] According to some embodiments, the multi-terminal analog quantities on the primary switching power supply side and the load side include the power supply side PT voltage, the load side PT voltage, the power supply side voltage sensor output voltage, and the load side voltage sensor output voltage.
[0012] According to some embodiments, the primary switching power supply side refers to the substation side or the incoming line side; the primary switching load side refers to the user side or the outgoing line side; for active distribution networks, the power supply side and the load side can be interchanged according to the power flow direction.
[0013] According to some embodiments, the voltage sensor is a resistive voltage divider, a resistive-capacitive voltage divider, or a capacitive voltage divider.
[0014] According to some embodiments, the second backup power supply is used to support the continued operation of the hardware residual voltage module in the event of a power failure at the distribution feeder terminal.
[0015] According to some embodiments, the first criterion logic specifically involves calculating the ratio and amplitude of the acquired multi-terminal analog quantities, determining whether the residual voltage threshold is met, and if so, performing waveform comparison verification and determining whether the residual voltage identification delay setting is met.
[0016] According to some embodiments, the second criterion logic specifically involves selecting a low-power microcontroller. After the low-power microcontroller starts up quickly, it determines whether a falling edge of a residual voltage signal pulse is detected within a first time setpoint. The first time setpoint is set by a software program, and the setpoint range is from 40 milliseconds to a Y-time limit value.
[0017] According to some embodiments, after the power distribution feeder terminal is restored to its operating state, the software residual voltage identification module reads and combines the hardware residual voltage flag bit to perform software residual voltage identification. Specifically, after the power distribution feeder terminal is restored to its operating state, the software residual voltage identification module reads the hardware residual voltage flag bit set by the hardware residual voltage module when the power distribution feeder terminal was de-energized, and performs software residual voltage identification according to the first criterion logic; however, the software residual voltage identification module ignores the hardware residual voltage flag bit when the power distribution feeder terminal is in its operating state.
[0018] According to some embodiments, the software residual voltage identification module is further equipped with anti-misoperation logic. Specifically, after the power distribution feeder terminal resumes operation, software residual voltage identification is performed. At the same time, the software residual voltage identification module clears the hardware residual voltage flag bit at regular intervals. After the power distribution feeder terminal resumes operation for more than a second time setting value, the hardware residual voltage identification function is exited, wherein the second time setting value is not less than 5 minutes.
[0019] According to a second aspect of the present invention, a hardware and software residual voltage intelligent identification power distribution feeder terminal is provided, characterized in that it comprises:
[0020] The data acquisition module is used to acquire multi-terminal analog quantities from the primary switching power supply side and the load side;
[0021] The backup power module includes a first backup power supply and a second backup power supply, wherein the first backup power supply is the backup power supply for the power distribution feeder terminal, and the second backup power supply is the backup power supply for the hardware residual voltage module.
[0022] The residual voltage identification module includes a hardware residual voltage module and a software residual voltage identification module. The hardware residual voltage module performs hardware residual voltage identification after the power distribution feeder terminal loses power. If the second backup power supply has sufficient power, a first criterion logic is used for hardware residual voltage identification; if the second backup power supply is depleted, a second criterion logic is used for hardware residual voltage identification. Based on the hardware residual voltage identification result, a hardware residual voltage flag is set. The software residual voltage identification module reads and combines the hardware residual voltage flag to perform software residual voltage identification after the power distribution feeder terminal is powered back on and resumes operation.
[0023] The output module is used to output residual pressure interlocking information based on the software residual pressure identification results.
[0024] According to a third aspect of the present invention, an electronic device is provided, comprising: a processor; and a memory storing computer instructions, which, when executed by the processor, cause the processor to perform the above-described intelligent identification method for residual voltage in power distribution feeder terminal software and hardware.
[0025] The beneficial effects of this invention are as follows: Addressing the problems of low threshold and long window of traditional residual voltage identification technology, leading to missed residual voltage detection and misjudgment of residual voltage during normal power outages, this invention effectively avoids residual voltage detection blind spots and prevents missed residual voltage detection by collecting multi-terminal analog quantities from both the primary switching power supply side and the load side; by adding a second backup power supply to the hardware residual voltage module, the operating time of the hardware residual voltage module is extended after the power distribution feeder terminal loses power, effectively avoiding misjudgment of residual voltage; and by combining the software residual voltage identification module with the hardware residual voltage module, residual voltage identification is completed quickly and reliably, accelerating fault isolation, avoiding large current surges to electrical components due to secondary power supply, and effectively ensuring the personal safety of maintenance personnel within the faulty line section. Attached Figure Description
[0026] Figure 1 This is a schematic flowchart of a method for intelligent identification of residual voltage in the hardware and software of a power distribution feeder terminal, provided as an example embodiment of the present invention.
[0027] Figure 2 This is a schematic diagram illustrating the specific process of step S200 provided in an example embodiment of the present invention;
[0028] Figure 3 This is a schematic diagram of the first criterion logic flow provided in an example embodiment of the present invention;
[0029] Figure 4 This is a schematic diagram of the second criterion logic flow provided in an example embodiment of the present invention;
[0030] Figure 5 This is a schematic diagram illustrating an application case of a method for intelligent identification of residual voltage in the hardware and software of a power distribution feeder terminal, provided in an example embodiment of the present invention.
[0031] Figure 6 This is a schematic diagram of the structure of a hardware and software residual voltage intelligent identification power distribution feeder terminal provided in an example embodiment of the present invention;
[0032] Figure 7 This is a structural diagram of an electronic device provided by the present invention. Detailed Implementation
[0033] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, they are provided so that the invention will be thorough and complete, and the concept of the exemplary embodiments will be fully conveyed to those skilled in the art. The same reference numerals in the drawings denote the same or similar parts, and therefore repeated descriptions of them will be omitted.
[0034] Furthermore, the described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. Numerous specific details are provided in the following description to give a full understanding of embodiments of the invention. However, those skilled in the art will recognize that the technical solutions of the invention can be practiced without one or more of the specific details, or other methods, components, apparatuses, steps, etc., can be employed. In other instances, well-known methods, apparatuses, implementations, or operations are not shown or described in detail to avoid obscuring various aspects of the invention.
[0035] The block diagrams shown in the accompanying drawings are merely functional entities and do not necessarily correspond to physically independent entities. That is, these functional entities can be implemented in software, in one or more hardware modules or integrated circuits, or in different network and / or processor devices and / or microcontroller devices.
[0036] The flowcharts shown in the accompanying drawings are merely illustrative and do not necessarily include all content and operations / steps, nor do they necessarily have to be performed in the described order. For example, some operations / steps can be broken down, while others can be combined or partially combined; therefore, the actual execution order may change depending on the specific circumstances.
[0037] It should be understood that although the terms first, second, third, etc., may be used herein to describe various components, these components should not be limited by these terms. These terms are used to distinguish one component from another. Therefore, the first component discussed below may be referred to as the second component without departing from the teachings of the present invention. As used herein, the term "and / or" includes all combinations of any one and more of the associated listed items.
[0038] Figure 1 This diagram illustrates a flowchart of a method for intelligent identification of residual voltage in the hardware and software of a power distribution feeder terminal, provided by an example embodiment of the present invention. The method includes the following steps:
[0039] Step S100: Collect multi-terminal analog signals from the primary switching power supply side and the load side;
[0040] Step S200: The power distribution feeder terminal is configured with a first backup power supply, and the hardware residual voltage module is configured with a second backup power supply. After the power distribution feeder terminal loses power, if the second backup power supply has sufficient power, the hardware residual voltage is identified using the first criterion logic; if the second backup power supply is depleted, the hardware residual voltage is identified using the second criterion logic. Based on the hardware residual voltage identification result, the hardware residual voltage flag is set. The specific process is as follows: Figure 2 As shown.
[0041] Step S300: After the power distribution feeder terminal is powered back on and resumes operation, the software residual voltage identification module reads and combines the hardware residual voltage flag bit to perform software residual voltage identification.
[0042] Step S400: Output residual pressure interlocking information based on the software residual pressure identification result.
[0043] According to some preferred embodiments of the present invention, the primary switch is a pole-mounted circuit breaker, a pole-mounted load switch, a pole-mounted sectionalizing switch, a pole-mounted boundary switch, or a pole-mounted tie switch.
[0044] According to some preferred embodiments of the present invention, the multi-terminal analog quantities of the primary switching power supply side and the load side include the power supply side PT voltage, the load side PT voltage, the power supply side voltage sensor output voltage, and the load side voltage sensor output voltage.
[0045] According to some preferred embodiments of the present invention, the primary switching power supply side refers to the substation side or the incoming line side; the primary switching load side refers to the user side or the outgoing line side; for active distribution networks, the power supply side and the load side can be interchanged according to the power flow direction.
[0046] According to some preferred embodiments of the present invention, the voltage sensor is a resistive voltage divider, a resistive-capacitive voltage divider, or a capacitive voltage divider.
[0047] According to some preferred embodiments of the present invention, the second backup power supply is used to support the continued operation of the hardware residual voltage module in the event of a power failure at the distribution feeder terminal.
[0048] According to some preferred embodiments of the present invention, the first criterion logic specifically involves calculating the ratio and amplitude of the acquired multi-terminal analog signals, determining whether the residual voltage threshold is met, and if so, performing waveform comparison verification and determining whether the residual voltage identification delay setting is met. The specific logic is as follows: Figure 3 As shown.
[0049] According to some preferred embodiments of the present invention, the second criterion logic specifically involves selecting a low-power microcontroller. After the low-power microcontroller starts up quickly, within a first time setpoint, it is determined whether a falling edge of a residual voltage signal pulse is detected. The first time setpoint is set by a software program, and its range is from 40 milliseconds to a Y-time limit value. The specific logic is as follows: Figure 4 As shown.
[0050] According to some preferred embodiments of the present invention, after the power distribution feeder terminal is restored to its operating state, the software residual voltage identification module reads and combines the hardware residual voltage flag bit to perform software residual voltage identification. Specifically, after the power distribution feeder terminal is restored to its operating state, the software residual voltage identification module reads the hardware residual voltage flag bit set by the hardware residual voltage module when the power distribution feeder terminal was de-energized, and performs software residual voltage identification according to the first criterion logic. However, the software residual voltage identification module ignores the hardware residual voltage flag bit when the power distribution feeder terminal is in its operating state to avoid interfering with the software residual voltage identification result.
[0051] According to some preferred embodiments of the present invention, the software residual voltage identification module is further provided with anti-misoperation logic. Specifically, after the power distribution feeder terminal resumes operation, software residual voltage identification is performed. At the same time, the software residual voltage identification module clears the hardware residual voltage flag bit at regular intervals. After the power distribution feeder terminal resumes operation for more than a second time set value, the hardware residual voltage identification function is exited, wherein the second time set value is not less than 5 minutes.
[0052] The application case diagram of the above-mentioned intelligent residual voltage identification method for power distribution feeder terminals is shown below. Figure 5 As shown.
[0053] Figure 6 This diagram illustrates the structure of a hardware and software residual voltage intelligent identification distribution feeder terminal provided in an example embodiment of the present invention, including:
[0054] The data acquisition module is used to acquire multi-terminal analog quantities from the primary switching power supply side and the load side;
[0055] The backup power module includes a first backup power supply and a second backup power supply, wherein the first backup power supply is the backup power supply for the power distribution feeder terminal, and the second backup power supply is the backup power supply for the hardware residual voltage module.
[0056] The residual voltage identification module includes a hardware residual voltage module and a software residual voltage identification module. The hardware residual voltage module performs hardware residual voltage identification after the power distribution feeder terminal loses power. If the second backup power supply has sufficient power, a first criterion logic is used for hardware residual voltage identification; if the second backup power supply is depleted, a second criterion logic is used for hardware residual voltage identification. Based on the hardware residual voltage identification result, a hardware residual voltage flag is set. The software residual voltage identification module reads and combines the hardware residual voltage flag to perform software residual voltage identification after the power distribution feeder terminal is powered back on and resumes operation.
[0057] The output module is used to output residual pressure interlocking information based on the software residual pressure identification results.
[0058] Figure 6The power distribution feeder terminal shown can execute the aforementioned intelligent residual voltage identification method for power distribution feeder terminals according to an embodiment of the present invention.
[0059] The device performs functions similar to those described above; other functions are described in the preceding descriptions and will not be repeated here.
[0060] Figure 7 The diagram illustrates the structure of an electronic device provided by the present invention, including a processor and a memory. The memory stores computer instructions, which, when executed by the processor, cause the processor to perform the computer instructions to implement the methods described above and their refinements.
[0061] The above description is merely a preferred embodiment of the present invention and is not intended to be applied to the present invention. For those skilled in the art, the present invention can have various modifications and variations. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.
Claims
1. A method for intelligent identification of residual voltage in the hardware and software of a power distribution feeder terminal, characterized in that, Includes the following steps: Collect multi-terminal analog quantities from both the switching power supply side and the load side; The power distribution feeder terminal is equipped with a first backup power supply, and the hardware residual voltage module is equipped with a second backup power supply. After the power distribution feeder terminal loses power, if the second backup power supply has sufficient power, the hardware residual voltage is identified using a first criterion logic; if the second backup power supply is depleted, the hardware residual voltage is identified using a second criterion logic. Based on the hardware residual voltage identification result, the hardware residual voltage flag is set. Specifically, the first criterion logic calculates the ratio and amplitude of the acquired multi-terminal analog signals to determine whether the residual voltage threshold is met. If so, waveform comparison verification is performed, and it is determined whether the residual voltage identification delay setting is met. Specifically, the second criterion logic selects a low-power microcontroller. When the low-power microcontroller starts up quickly, it determines whether a falling edge of the residual voltage signal pulse is detected within a first time setting. The first time setting is set by a software program, and the setting range is from 40 milliseconds to the Y-time limit. After the power distribution feeder terminal is powered back on and resumes operation, the software residual voltage identification module reads and combines the hardware residual voltage flag bit to perform software residual voltage identification. Based on the software residual pressure identification results, output residual pressure interlocking information.
2. The method for intelligent identification of residual voltage in the hardware and software of a power distribution feeder terminal as described in claim 1, characterized in that, The primary switch is a pole-mounted circuit breaker, pole-mounted load switch, pole-mounted sectionalizing switch, pole-mounted boundary switch, or pole-mounted tie switch.
3. The method for intelligent identification of residual voltage in the hardware and software of a power distribution feeder terminal as described in claim 1, characterized in that, The multi-terminal analog quantities on the primary switching power supply side and the load side include the power supply side PT voltage, the load side PT voltage, the power supply side voltage sensor output voltage, and the load side voltage sensor output voltage.
4. The method for intelligent identification of residual voltage in the hardware and software of a power distribution feeder terminal as described in claim 1, characterized in that, The power supply side of the primary switch refers to the substation side or the incoming line side; the load side of the primary switch refers to the user side or the outgoing line side; for active distribution networks, the power supply side and the load side can be interchanged according to the power flow direction.
5. The method for intelligent identification of residual voltage in the hardware and software of a power distribution feeder terminal as described in claim 3, characterized in that, The voltage sensor is a resistive voltage divider, a resistive-capacitive voltage divider, or a capacitive voltage divider.
6. The method for intelligent identification of residual voltage in the hardware and software of a power distribution feeder terminal as described in claim 1, characterized in that, The second backup power supply is used to support the continued operation of the hardware residual voltage module in the event of a power failure at the distribution feeder terminal.
7. The method for intelligent identification of residual voltage in the hardware and software of a power distribution feeder terminal as described in claim 1, characterized in that, After the power distribution feeder terminal is restored to its operating state, the software residual voltage identification module reads and combines the hardware residual voltage flag bit to perform software residual voltage identification. Specifically, after the power distribution feeder terminal is restored to its operating state, the software residual voltage identification module reads the hardware residual voltage flag bit set by the hardware residual voltage module when the power distribution feeder terminal was de-energized, and performs software residual voltage identification according to the first criterion logic; however, the software residual voltage identification module ignores the hardware residual voltage flag bit when the power distribution feeder terminal is in operation.
8. The method for intelligent identification of residual voltage in the hardware and software of a power distribution feeder terminal as described in claim 1, characterized in that, Also includes: The software residual voltage identification module adds anti-misoperation logic. Specifically, after the power distribution feeder terminal resumes operation, software residual voltage identification is performed. At the same time, the software residual voltage identification module clears the hardware residual voltage flag bit at regular intervals. After the power distribution feeder terminal resumes operation for more than a second time set value, the hardware residual voltage identification function is exited, wherein the second time set value is not less than 5 minutes.
9. A hardware and software residual voltage intelligent identification power distribution feeder terminal, characterized in that, include: The data acquisition module is used to acquire multi-terminal analog quantities from the primary switching power supply side and the load side; The backup power module includes a first backup power supply and a second backup power supply, wherein the first backup power supply is the backup power supply for the power distribution feeder terminal, and the second backup power supply is the backup power supply for the hardware residual voltage module. The residual voltage identification module includes a hardware residual voltage module and a software residual voltage identification module. The hardware residual voltage module performs hardware residual voltage identification after the power distribution feeder terminal loses power. If the second backup power supply has sufficient power, a first criterion logic is used for hardware residual voltage identification; if the second backup power supply is depleted, a second criterion logic is used. A hardware residual voltage flag is set based on the hardware residual voltage identification result. The software residual voltage identification module reads and combines the hardware residual voltage flag after the power distribution feeder terminal is restored to its operating state to perform software residual voltage identification. The first criterion logic specifically involves calculating the ratio and amplitude of the collected multi-terminal analog signals to determine if the residual voltage threshold is met. If so, waveform comparison verification is performed, and it is determined whether the residual voltage identification delay setting is met. The second criterion logic specifically involves selecting a low-power microcontroller. When the low-power microcontroller starts quickly, it determines whether a falling edge of the residual voltage signal pulse is detected within a first time setting. The first time setting is set by a software program, and its range is from 40 milliseconds to a Y-time limit value. The output module is used to output residual pressure interlocking information based on the software residual pressure identification results.
10. An electronic device, characterized in that, include: processor; as well as A memory storing computer instructions that, when executed by the processor, cause the processor to perform the method according to any one of claims 1-8.
Citation Information
Patent Citations
Residual voltage locking method and circuit with dual verification
CN110635459A
Combined residual voltage detection protection device
CN112803351A