Semiconductor structure and method of manufacturing the same

Abstract

The embodiment of the present disclosure relates to the technical field of semiconductor, and provides a semiconductor structure and a manufacturing method thereof, the semiconductor structure comprising: a substrate, the substrate comprising a first doped region and a second doped region surrounding the first doped region, a doping type of the first doped region being different from a doping type of the second doped region, the first doped region and the second doped region jointly constituting a photodiode; wherein the second doped region comprises a bottom part, a middle part and a top part, a doping concentration of the middle part being less than a doping concentration of the bottom part and a doping concentration of the top part. The embodiment of the present disclosure is at least beneficial to improving the problem of photogenerated carrier retention when the photodiode performs photogenerated carrier transmission, and reducing the leakage current of the photodiode by using the second doped region surrounding the first doped region, thereby being beneficial to improving the performance of the photodiode and optimizing the micro-light imaging performance of the semiconductor structure.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor technology, and in particular to a semiconductor structure and its manufacturing method. Background Technology

[0002] The low power consumption, low cost, high integration, and high flexibility of CMOS image sensors have enabled them to surpass CCD image sensors in market share, especially in the low-to-mid-range consumer electronics industry.

[0003] In consumer electronics, portability is a key goal for continuous product upgrades. Therefore, to reduce product size while maintaining performance, image sensor pixel sizes are becoming increasingly smaller. However, large photosensitive areas also have crucial applications in specific fields. In low-light conditions at night or in deep-sea areas, image sensors with large pixels are often used to increase the light sensitivity, thereby increasing full-well capacity and improving sensitivity and signal-to-noise ratio. However, increasing the photosensitive area can lead to photogenerated carrier retention and reduced photogenerated carrier transport speed, potentially causing lag in the final image. Summary of the Invention

[0004] This disclosure provides a semiconductor structure and its manufacturing method, which at least helps to improve the problem of photogenerated carrier retention during photogenerated carrier transport in a photodiode, and reduces the leakage current of the photodiode by using a second doped region surrounding the first doped region, thereby improving the performance of the photodiode and optimizing the low-light imaging performance of the semiconductor structure.

[0005] According to some embodiments of this disclosure, one aspect of this disclosure provides a semiconductor structure, including: a substrate, the substrate including a first doped region and a second doped region surrounding the first doped region, the doping type of the first doped region and the doping type of the second doped region being different, the first doped region and the second doped region jointly constituting a photodiode; wherein, the second doped region includes a bottom, a middle and a top, the doping concentration of the middle part being less than the doping concentration of the bottom and the doping concentration of the top.

[0006] In some embodiments, the doping concentration at the bottom is greater than the doping concentration at the top.

[0007] In some embodiments, the doping concentration in the first doped region is 5 × 10⁻⁶. 16 atom / cm 3 ~3×10 17 atom / cm 3 .

[0008] In some embodiments, the doping concentration at the bottom is 1×10⁻⁶. 16 atom / cm 3 ~5×10 16 atom / cm 3 The doping concentration in the middle section is 5 × 10⁻⁶. 15 atom / cm 3 ~1×10 16 atom / cm 3 The doping concentration at the top is 8 × 10⁻⁶. 15 atom / cm 3 ~2×10 16 atom / cm 3 .

[0009] In some embodiments, the thickness of the middle portion is greater than the thickness of the bottom and the top portion in the direction from the bottom to the top.

[0010] In some embodiments, the thickness of the top is less than the thickness of the bottom in the direction from the bottom to the top.

[0011] In some embodiments, along the direction from the bottom to the top, the thickness of the first doped region is 3.9 μm to 4.1 μm, the thickness of the bottom is 0.45 μm to 0.55 μm, the thickness of the middle portion is 3.2 μm to 3.4 μm, and the thickness of the top portion is 0.15 μm to 0.25 μm.

[0012] In some embodiments, the semiconductor structure further includes a third doped region and a transport gate structure, wherein the third doped region is disposed above the first doped region, and the transport gate structure is adjacent to both the first doped region and the third doped region.

[0013] In some embodiments, the doping type of the third doped region is the same as that of the first doped region, and the doping concentration of the third doped region is greater than or equal to the doping concentration of the first doped region.

[0014] According to some embodiments of this disclosure, another aspect of this disclosure provides a method for manufacturing a semiconductor structure, comprising: forming a substrate, the substrate including a first doped region and a second doped region surrounding the first doped region, wherein the doping type of the first doped region is different from the doping type of the second doped region, and the first doped region and the second doped region together constitute a photodiode; wherein the second doped region includes a bottom, a middle and a top, and the doping concentration of the middle part is less than the doping concentration of the bottom and the doping concentration of the top.

[0015] In some embodiments, the step of forming the substrate includes: providing a substrate; forming a first epitaxial layer, a second epitaxial layer, and a third epitaxial layer on the substrate using an epitaxial growth process; performing second-type doping on the first epitaxial layer, the second epitaxial layer, and the third epitaxial layer at different concentrations to form an initial second doped region; performing first-type doping on the central region of the initial second doped region to form the first doped region, and using the remaining initial second doped region as the second doped region.

[0016] In some embodiments, in the step of performing second-type doping with different concentrations on the first epitaxial layer, the second epitaxial layer, and the third epitaxial layer, the doping concentration of the second epitaxial layer is lower than the doping concentrations of the first epitaxial layer and the third epitaxial layer, and the doping concentration of the third epitaxial layer is lower than the doping concentration of the first epitaxial layer.

[0017] In some embodiments, during the step of forming the initial second doped region, the thickness of the second epitaxial layer is greater than the thickness of the first epitaxial layer and the thickness of the third epitaxial layer along the direction from the first epitaxial layer to the third epitaxial layer.

[0018] In some embodiments, the method for manufacturing the semiconductor structure further includes: forming a third doped region located in the second doped region and spaced apart from the first doped region; and forming a transmission gate structure adjacent to both the first doped region and the third doped region.

[0019] In some embodiments, the step of forming the third doped region includes: performing the first type of doping on a portion of the surface of the third epitaxial layer that is remote from the first doped region to convert a portion of the second doped region into the third doped region.

[0020] In some embodiments, the step of forming the transmission gate structure includes: forming a via on the side of the third epitaxial layer away from the second epitaxial layer, the bottom of the via exposing the first doped region, the top sidewall of the via exposing the third doped region, and sequentially forming a dielectric layer and a conductive layer on the inner wall of the via.

[0021] The technical solutions provided in this disclosure have at least the following advantages:

[0022] In a photodiode, the first and second doped regions have different doping types, forming a PN junction for collecting photogenerated carriers. Furthermore, the different doping concentrations in different regions of the second doped region have varying effects on the bandgap of the PN junction. On one hand, the higher doping concentration at the bottom introduces more impurity energy levels, resulting in a smaller bandgap and easier transition of electrons from the valence band to the conduction band, thus facilitating the generation of photogenerated carriers. On the other hand, the lowest doping concentration in the middle is beneficial for storing the collected photogenerated carriers. Moreover, during photogenerated carrier transport, the difference in doping concentration between the bottom and middle regions—that is, the potential difference between the bottom and middle regions—increases the transfer speed of photogenerated carriers and reduces the probability of photogenerated carriers remaining in the first doped region, thereby improving image hysteresis in the semiconductor structure. Additionally, surrounding the first doped region with the second doped region helps to utilize the potential difference between the two regions, reducing the probability of photogenerated carriers leaking from the second doped region, thus helping to reduce the leakage current of the photodiode.

[0023] As can be seen from the above analysis, the first doped region and the second doped region in the embodiments of this disclosure are beneficial to improving the performance of the photodiode and optimizing the low-light imaging performance of the semiconductor structure. Attached Figure Description

[0024] One or more embodiments are illustrated by way of example with corresponding pictures in the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Elements with the same reference numerals in the drawings represent similar elements. Unless otherwise stated, the figures in the drawings do not constitute a limitation on scale. In order to more clearly illustrate the technical solutions in the embodiments of this disclosure or the conventional technology, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0025] Figure 1 A schematic diagram of a semiconductor structure provided in an embodiment of this disclosure;

[0026] Figure 2 A simplified schematic diagram of a photodiode in a semiconductor structure according to an embodiment of the present disclosure performing photogenerated carrier transport;

[0027] Figure 3 A simplified schematic diagram of a photodiode storing photogenerated carriers in a semiconductor structure according to an embodiment of this disclosure;

[0028] Figures 4 to 7 This is a schematic diagram of the structure corresponding to each step of the manufacturing method of a semiconductor structure provided in another embodiment of this disclosure. Detailed Implementation

[0029] As can be seen from the background technology, the retention problem of photogenerated carriers in CMOS image sensors needs to be improved, and the resulting image quality needs to be enhanced.

[0030] Analysis revealed that the pixel portion of a CMOS image sensor typically consists of photodiodes, transmission transistors, floating diffusion nodes, reset transistors, source followers, and select transistors. When light strikes the semiconductor surface, a portion of the incident light is reflected, while the remainder is absorbed. When the energy of photons entering the semiconductor is not less than the bandgap of the semiconductor material, the semiconductor material has a certain probability of absorbing this energy, thereby generating electron-hole pairs, i.e., photogenerated carriers. After illumination integration, the transmission transistor is turned on, and the photogenerated carriers are transferred from the photodiode region to the floating diffusion node under the influence of the electric field, completing the charge-to-voltage information conversion process. Finally, the optical signal stored in the floating diffusion node is read out row by row through row select transistors and column readout circuits.

[0031] However, as the pixel size of image sensors becomes smaller and smaller, in low light conditions at night and in deep sea areas, image sensors with large pixels are often used to increase the amount of light the image sensor can sense. This can increase the full-well capacity, but as the photosensitive area increases, it will reduce the transmission speed of photogenerated carriers and cause photogenerated carrier retention problems, which can easily lead to lag in the final image and reduce the quality of the image.

[0032] This disclosure provides a semiconductor structure and its manufacturing method. The semiconductor structure can be applied to CMOS image sensors. In the semiconductor structure, the doping types of the first and second doped regions are different, which is beneficial for forming a PN junction that collects photogenerated carriers. Furthermore, in the second doped region, the bottom has a higher doping concentration, introducing more impurity energy levels, resulting in a smaller band gap for the PN junction. Electrons in the valence band can more easily transition into the conduction band, making it easier to generate photogenerated carriers. The middle part has the lowest doping concentration, which is beneficial for storing and collecting photogenerated carriers. Moreover, during photogenerated carrier transport, the difference in doping concentration between the bottom and the middle, i.e., the potential difference between the bottom and the middle, increases the transfer speed of photogenerated carriers, thereby reducing the probability of photogenerated carriers remaining in the photodiode, thus improving the retention problem and improving image hysteresis in the semiconductor structure. In addition, surrounding the first doped region with the second doped region helps to reduce the probability of photogenerated carriers leaking from the second doped region by utilizing the potential difference between the two regions, thereby reducing the leakage current of the photodiode.

[0033] As can be seen from the above analysis, the first doped region and the second doped region in the embodiments of this disclosure are beneficial to improving the performance of the photodiode and optimizing the low-light imaging performance of the semiconductor structure.

[0034] The embodiments of this disclosure will now be described in detail with reference to the accompanying drawings. However, those skilled in the art will understand that many technical details have been provided in the embodiments of this disclosure to facilitate a better understanding of the embodiments. However, the technical solutions claimed in the embodiments of this disclosure can be implemented even without these technical details and various variations and modifications based on the following embodiments.

[0035] This disclosure provides a semiconductor structure according to an embodiment. The semiconductor structure provided by this disclosure will be described in detail below with reference to the accompanying drawings. Figure 1 A schematic diagram of a semiconductor structure provided in an embodiment of this disclosure; Figure 2 A simplified schematic diagram of a photodiode in a semiconductor structure according to an embodiment of the present disclosure performing photogenerated carrier transport; Figure 3 This is a simplified schematic diagram of a photodiode storing photogenerated carriers in a semiconductor structure according to an embodiment of the present disclosure.

[0036] refer to Figure 1 and Figure 2 The semiconductor structure includes: a substrate 100, which includes a first doped region 101 and a second doped region 102 surrounding the first doped region 101. The doping type of the first doped region 101 and the doping type of the second doped region 102 are different. The first doped region 101 and the second doped region 102 together constitute a photodiode 103. The second doped region 102 includes a bottom 112, a middle part 122 and a top 132. The doping concentration of the middle part 122 is lower than the doping concentration of the bottom 112 and the top 132.

[0037] It is understandable that the doping concentration in different regions of the second doped region 102 is different, and the ability to generate photogenerated carriers is also different.

[0038] Specifically, due to the higher doping concentration at the bottom 112, more impurity energy levels are introduced, resulting in a smaller band gap of the PN junction. Electrons in the valence band can more easily jump into the conduction band, making it easier to generate photogenerated carriers. The doping concentration in the middle 122 is the lowest, which is beneficial for storing and collecting photogenerated carriers in the first doped region 101 surrounded by the middle 122. Moreover, during photogenerated carrier transport, the difference between the doping concentration at the bottom 112 and the middle 122, i.e., the difference between the potential at the bottom 112 and the potential at the middle 122, is used to increase the transfer speed of photogenerated carriers and reduce the probability of photogenerated carriers remaining in the photodiode 103, thereby improving the image hysteresis problem in the semiconductor structure.

[0039] Understandably, reference Figure 2 During photogenerated carrier transport, the large difference in doping concentration between the bottom 112 and the middle 122 results in a large potential difference between the bottom 112 and the middle 122, which is beneficial for forming... Figure 2 The potential energy gradient shown causes photogenerated carriers to transfer from areas of high potential energy to areas of low potential energy, much like water flows. The height difference in potential energy helps to increase the transfer speed of photogenerated carriers, that is, to increase the probability of photogenerated carriers rushing out of the first doped region 101. This makes it easier for photogenerated carriers to be transported out of the first doped region 101, which helps to reduce the probability of photogenerated carriers remaining in the first doped region 101. This improves the image hysteresis problem in the semiconductor structure and optimizes the low-light imaging performance of the semiconductor structure.

[0040] Furthermore, by using the second doped region 102 to surround the first doped region 101, and by utilizing the potential energy difference between the second doped region 102 and the first doped region 101, the probability of photogenerated carriers leaking from the second doped region 102 is reduced, which helps to reduce the leakage current of the photodiode 103 and improve the photoelectric conversion performance of the photodiode 103.

[0041] In some embodiments, the difference in doping type between the first doped region 101 and the second doped region 102 means that the first doped region 101 is doped with a first type of ion, and the second doped region 102 is doped with a second type of ion. The first type of ion is either an N-type ion or a P-type ion, and the second type of ion is the other of an N-type ion or a P-type ion. Specifically, the N-type ion may include at least one of arsenic ions, phosphorus ions, or antimony ions; the P-type ion may include at least one of boron ions, indium ions, or gallium ions.

[0042] It should be noted that, in the following example, the first doped region 101 is N-type doped, meaning that N-type ions are doped in the first doped region 101, and the second doped region 102 is P-type doped, meaning that P-type ions are doped in the second doped region 102. In practical applications, the first doped region can be P-type doped, and the second doped region can be N-type doped.

[0043] In some embodiments, the doping concentration of the middle portion 122 being less than the doping concentration of the bottom portion 112 and the doping concentration of the top portion 132 means that the doping concentration of the first type of ions in the middle portion 122 is less than the doping concentration in the bottom portion 112, and the doping concentration of the first type of ions in the middle portion 122 is less than the doping concentration in the top portion 132.

[0044] The semiconductor structure provided in one embodiment of this disclosure will be described in more detail below with reference to the accompanying drawings.

[0045] In some embodiments, the doping concentration of the bottom 112 is greater than the doping concentration of the top 132.

[0046] Understandably, reference Figure 2 and Figure 3 Among the bottom 112, middle 122, and top 132, the bottom has the highest doping concentration. This is beneficial because it allows sufficient charge at the bottom 112 to generate a higher potential, thus facilitating the formation of [something] during photogenerated carrier transport. Figure 2 The potential energy gradient shown is used to increase the transfer rate of photogenerated carriers, thereby reducing the probability of photogenerated carriers remaining in the first doped region 101, and thus improving the image hysteresis problem in the semiconductor structure; on the other hand, reference Figure 3 When the first doped region 101 needs to store photogenerated carriers, it is beneficial to make the potential difference between the bottom 112 and the middle 122 larger, which is beneficial to improve the charge storage capacity of the first doped region 101 surrounded by the middle 122, that is, to improve the full-well capacity of the photodiode 103.

[0047] Furthermore, among the bottom 112, middle 122, and top 132, the doping concentration of the top 132 is moderate, which helps to reduce the defect density in the top 132 caused by the doping process. This helps to reduce the probability that photogenerated carriers will be captured and consumed by defects in the top 132 when passing through it. This helps to further improve the collection efficiency of photogenerated carriers, thereby improving the photoelectric conversion efficiency of the photodiode.

[0048] In some embodiments, the doping concentration of the bottom 112 being greater than that of the top 132 means that the doping concentration of the second type of ions in the bottom 112 is greater than that in the top 132.

[0049] In some embodiments, the doping concentration of the bottom 112 can be 1 × 10⁻⁶. 16 atom / cm 3 ~5×10 16 atom / cm 3 The doping concentration of the middle 122 can be 5 × 10⁻⁶. 15 atom / cm 3 ~1×10 16 atom / cm 3 The doping concentration of the top 132 can be 8 × 10⁻⁶. 15 atom / cm 3 ~2×10 16 atom / cm 3 .

[0050] It can be understood that the doping concentration at the bottom 112 refers to the doping concentration of type II ions at the bottom 112; the doping concentration at the middle 122 refers to the doping concentration of type II ions at the middle 122; and the doping concentration at the top 132 refers to the doping concentration of type II ions at the top 132. In one example, the doping concentration at the bottom 112, i.e., the doping concentration of P-type ions at the bottom 112, can be 1 × 10⁻⁶. 16 atom / cm 3 ~5×10 16 atom / cm 3 The doping concentration of the middle section 122, i.e., the doping concentration of P-type ions in the middle section 122, can be 5 × 10⁻⁶. 15 atom / cm 3 ~1×10 16 atom / cm 3 The doping concentration of the top 132, i.e., the doping concentration of P-type ions in the top 132, can be 8 × 10⁻⁶. 15 atom / cm 3 ~2×10 16 atom / cm 3 .

[0051] It should be noted that in practical applications, due to the manufacturing method of the semiconductor structure, the first doped region 101 is doped with not only the first type of ions but also the second type of ions, and the doping concentration of the second type of ions in the first doped region 101 is less than or equal to the doping concentration in the second doped region 102.

[0052] In some embodiments, the doping concentration in the first doped region 101 can be 5 × 10⁻⁶. 16 atom / cm 3 ~3×10 17 atom / cm 3 This facilitates the formation of a compliant PN junction between the first doped region 101 and the second doped region 102, promoting the generation of photogenerated carriers. In practical applications, the doping concentration of the first doped region 101 can be appropriately set according to the number of photogenerated carriers required by the photodiode 103.

[0053] It is understandable that the doping concentration in the first doped region 101 refers to the doping concentration of the first type of ions in the first doped region 101. In one example, the doping concentration in the first doped region 101, that is, the doping concentration of N-type ions in the first doped region 101, can be 5 × 10⁻⁶. 16 atom / cm 3 ~3×10 17 atom / cm 3 .

[0054] In some embodiments, the thickness of the middle portion 122 is greater than the thickness of both the bottom 112 and the top 132 along the direction X from the bottom 112 to the top 132.

[0055] It is understandable that the first doped region 101 surrounded by the middle portion 122 is mainly used to store photogenerated carriers, that is, most of the effective charge is stored in the first doped region 101 surrounded by the middle portion 122. Therefore, in the bottom 112, the middle 122, and the top 132, reference... Figure 3 The thickness of the middle section 122 is the greatest, which is beneficial for increasing the space occupied by the first doped region 101 surrounded by the middle section 122 in the photodiode 103, that is, increasing the effective charge storage space, thereby improving the charge storage capacity of the first doped region 101 surrounded by the middle section 122, and thus improving the full-well capacity of the photodiode 103. In addition, the bottom section 112 and the top section 132 are mainly used to form a higher potential, creating a larger potential difference with the middle section 122, which helps the first doped region 101 surrounded by the middle section 122 to store photogenerated carriers.

[0056] In some embodiments, the thickness of the top 132 is less than the thickness of the bottom 112 along the direction X from the bottom 112 to the top 132.

[0057] Understandably, the bottom 112 and top 132 are mainly used to form a higher potential, and the first doped region 101 surrounded by the middle 122 is mainly used to store photogenerated carriers. Therefore, the thickness of the bottom 112 and the top 132 does not need to be too high; a higher doping concentration is sufficient. This helps to avoid the first doped region 101 surrounded by the bottom 112 and the first doped region 101 surrounded by the top 132 occupying too much area in the photodiode 103, thus reducing the full-well capacity of the photodiode 103. Moreover, making the thickness of the top 132 smaller than the thickness of the bottom 112 is beneficial to achieve a higher doping concentration in the bottom 112 than in the top 132. Furthermore, when photogenerated carrier transport is required, i.e., when the transmission gate structure 105 is turned on, the photogenerated carriers stored in the first doped region 101 surrounded by the middle 122 can more easily pass through the first doped region 101 surrounded by the top 132.

[0058] In some embodiments, along the direction X from the bottom 112 to the top 132, the thickness of the first doped region 101 can be 3.9 μm to 4.1 μm, the thickness of the bottom 112 can be 0.45 μm to 0.55 μm, the thickness of the middle 122 can be 3.2 μm to 3.4 μm, and the thickness of the top 132 can be 0.15 μm to 0.25 μm.

[0059] In one example, along the direction X from the bottom 112 to the top 132, the thickness of the first doped region 101 can be 4.0 μm, the thickness of the bottom 112 can be 0.5 μm, the thickness of the middle 122 can be 3.3 μm, and the thickness of the top 132 can be 0.2 μm.

[0060] In some embodiments, reference Figure 1 The semiconductor structure may also include a third doped region 104 and a transmission gate structure 105. The third doped region 104 is disposed above the first doped region 101 at intervals, and the transmission gate structure 105 is adjacent to both the first doped region 101 and the third doped region 104.

[0061] It should be noted that, in some embodiments, the second doped region 102 may further include a containment region 142, which is located above the top 132, and the third doped region 104 and the transport gate structure 105 are located in the containment region 142. In one example, the doping concentration of the second type of ions in the containment region 142 may be the same as the doping concentration in the top 132.

[0062] In some embodiments, continue to refer to Figure 1 The transmission gate structure 105 and the first doped region 101 are arranged along the X direction, and the transmission gate structure 105 and the third doped region 104 are arranged along a direction perpendicular to the X direction.

[0063] It is understood that the third doped region 104, the transmission gate structure 105, the top of the first doped region 101, and a portion of the second doped region 102 constitute a transistor structure. The top of the third doped region 104 and the top of the first doped region 101 correspond to the source and drain regions of the transistor structure, respectively. The transmission gate structure 105 is configured as: [reference] Figure 2 When photogenerated carrier transport is required, the charge transport path between the third doped region 104 and the top 132 is opened; Reference Figure 3 When the first doped region 101 needs to store photogenerated carriers, the charge transport path between the third doped region 104 and the top 132 is turned off.

[0064] In some embodiments, the doping type of the third doped region 104 is the same as that of the first doped region 101, and the doping concentration of the third doped region 104 is greater than or equal to the doping concentration of the first doped region 101.

[0065] In one example, the doping type of the third doping region 104 is the same as that of the first doping region 101, both being N-type doped.

[0066] In some embodiments, reference Figure 1 The transmission gate structure 105 includes a dielectric layer 115 and a conductive layer 125, with the dielectric layer 115 located between the first doped region 101 and the conductive layer 125.

[0067] In one example, continue to refer to Figure 1 The dielectric layer 115 can be in contact with the top layer 132, and the dielectric layer 115 can be in contact with the third doped region 104. In practical applications, there can be a partial gap between the dielectric layer 115 and the top layer 132, which is filled by the second doped region 102; there can also be a partial gap between the dielectric layer 115 and the third doped region 104, which is filled by the second doped region 102.

[0068] In some embodiments, reference Figure 1 The number of photodiodes 103 can be multiple, the transmission gate structure 105 corresponds one-to-one with the photodiode 103, and the third doped region 104 corresponds one-to-one with the photodiode 103; the semiconductor structure may also include: a deep trench isolation structure 107, located between adjacent photodiodes 103, between adjacent transmission gate structures 105, and between adjacent third doped regions 104.

[0069] It is understood that the photodiode 103, the transmission gate structure 105, and the third doped region 104 constitute a pixel unit. The deep trench isolation structure 107 can be used to achieve isolation between adjacent pixel units, thereby reducing optical and electrical crosstalk between adjacent pixel units, which is beneficial to further improving the photoelectric performance of the semiconductor structure.

[0070] In some embodiments, the semiconductor structure may further include a substrate 110 for supporting the aforementioned plurality of pixel units and the deep trench isolation structure 107.

[0071] In summary, the semiconductor structure provided in one embodiment of this disclosure can be applied to a CMOS image sensor. The different doping types of the first doped region 101 and the second doped region 102 facilitate the formation of a PN junction for collecting photogenerated carriers. Furthermore, in the second doped region 102, the lower doping concentration at the bottom 112 results in a larger potential energy difference between the bottom 112 and the second doped region 102, which is beneficial for collecting photogenerated carriers using this larger potential energy difference. The lower doping concentration at the middle 122 is beneficial for storing the collected photogenerated carriers in the first doped region 101 surrounded by the middle 122. Moreover, during photogenerated carrier transport, the difference in doping concentration between the bottom 112 and the middle 122, i.e., the difference in potential between the bottom 112 and the middle 122, increases the transfer speed of photogenerated carriers, thereby reducing the probability of photogenerated carriers remaining in the photodiode 103, thus improving the retention problem of photogenerated carriers and improving the image hysteresis problem in the semiconductor structure. Furthermore, by using the second doped region 102 to surround the first doped region 101, it is beneficial to utilize the potential energy difference between the second doped region 102 and the first doped region 101 to reduce the probability of photogenerated carriers leaking from the second doped region 102, thereby helping to reduce the leakage current of the photodiode.

[0072] Another embodiment of this disclosure also provides a method for manufacturing a semiconductor structure, used to prepare the semiconductor structure provided in the foregoing embodiments. The following will be combined with... Figures 1 to 7 A method for manufacturing a semiconductor structure according to another embodiment of this disclosure will be described in detail. Figures 4 to 7 This is a schematic diagram of the structure corresponding to each step of a method for manufacturing a semiconductor structure according to another embodiment of this disclosure. It should be noted that parts that are the same as or corresponding to those in the foregoing embodiments will not be described again here.

[0073] refer to Figures 4 to 7 The method for manufacturing a semiconductor structure includes: forming a substrate 100, wherein the substrate 100 includes a first doped region 101 and a second doped region 102 surrounding the first doped region 101, wherein the doping type of the first doped region 101 is different from the doping type of the second doped region 102, and the first doped region 101 and the second doped region 102 together constitute a photodiode 103; wherein the second doped region 102 includes a bottom 112, a middle portion 122 and a top portion 132, and the doping concentration of the middle portion 122 is lower than the doping concentration of the bottom 112 and the top portion 132.

[0074] Understandably, the doping concentration of the middle region 122 is lower than that of the bottom region 112 and the top region 132. During photogenerated carrier transport, this difference in doping concentration between the bottom region 112 and the middle region 122 (i.e., the potential difference between the bottom region 112 and the middle region 122) is advantageous in increasing the transfer speed of photogenerated carriers and reducing the probability of photogenerated carriers remaining in the photodiode 103, thereby improving the image hysteresis problem in the semiconductor structure. Furthermore, the doping type of the first doped region 101 is different from that of the second doped region 102. Surrounding the first doped region 101 with the second doped region 102 allows for the utilization of the potential energy difference between the two regions, reducing the probability of photogenerated carriers leaking from the second doped region 102, thus helping to reduce the leakage current of the photodiode 103.

[0075] In some embodiments, forming the substrate 100 may include the following steps:

[0076] refer to Figure 4 A substrate 110 is provided; a first epitaxial layer 120, a second epitaxial layer 130 and a third epitaxial layer 140 are formed on the substrate 110 using an epitaxial growth process.

[0077] In some embodiments, continue to refer to Figure 4 Along the direction X pointing from the first epitaxial layer 120 to the third epitaxial layer 140, the third epitaxial layer 140 includes a first portion 141 and a accommodating region 142. The first portion 141 is used to form the top of the second doped region, the accommodating region 142 is used to form the third doped region, and the third epitaxial layer 140 as a whole is used to form the transmission gate structure.

[0078] In some embodiments, continue to refer to Figure 1 The final number of photodiodes 103 can be multiple, with each transmission gate structure 105 corresponding to a photodiode 103, and each third doped region 104 corresponding to a photodiode 103. The semiconductor structure manufacturing method may also include the following steps:

[0079] refer to Figure 5 The first epitaxial layer 120, the second epitaxial layer 130, and the third epitaxial layer 140 are patterned to form trenches; continue referencing Figure 5This forms a deep trench isolation structure 107 that fills the trenches. This facilitates the formation of multiple photodiodes, transmission gate structures 105, and a third doped region 104 based on the thickness of the first epitaxial layer 120, the second epitaxial layer 130, and the third epitaxial layer 140. In practical applications, the deep trench isolation structure 107, which isolates the multiple photodiodes, transmission gate structures 105, and the third doped region 104, can also be formed after the multiple photodiodes, transmission gate structures 105, and the third doped region 104 have been formed.

[0080] Continue to refer to Figure 5 Different concentrations of the second type of doping are applied to the first epitaxial layer 120, the second epitaxial layer 130 and the third epitaxial layer 140 to form an initial second doped region 152.

[0081] In some embodiments, in the step of performing second-type doping with different concentrations on the first epitaxial layer 120, the second epitaxial layer 130, and the third epitaxial layer 140, the doping concentration of the second epitaxial layer 130 is lower than the doping concentrations of the first epitaxial layer 120 and the third epitaxial layer 140, and the doping concentration of the third epitaxial layer 140 is lower than the doping concentration of the first epitaxial layer 120. Thus, a second doped region 102 (see reference) is subsequently formed based on the first epitaxial layer 120. Figure 6 The bottom 112 (reference) Figure 6 The middle portion 122 of the second doped region 102 is formed based on the second epitaxial layer 130 (reference). Figure 6 ), and the top 132 of the second doped region 102 formed based on the third epitaxial layer 140 (reference). Figure 6 When ), it is beneficial to form a doping concentration such that the doping concentration of the middle part 122 is less than the doping concentration of the bottom part 112 and the doping concentration of the top part 132, and the doping concentration of the bottom part 112 is greater than the doping concentration of the top part 132.

[0082] In some embodiments, performing second-type doping of the first epitaxial layer 120, the second epitaxial layer 130, and the third epitaxial layer 140 at different concentrations means that the first epitaxial layer 120, the second epitaxial layer 130, and the third epitaxial layer 140 are doped with different concentrations of P-type ions.

[0083] In some embodiments, during the step of forming the initial second doped region 152, the thickness of the second epitaxial layer 130 is greater than the thickness of both the first epitaxial layer 120 and the third epitaxial layer 140 along the direction X from the first epitaxial layer 120 to the third epitaxial layer 140. This facilitates the subsequent formation of a middle portion 122 with a thickness greater than that of the bottom portion 112 and the top portion 132, thereby increasing the space occupied by the first doped region 101 surrounded by the middle portion 122 in the photodiode 103, i.e., increasing the effective charge storage space, thereby improving the charge storage capacity of the first doped region 101 surrounded by the middle portion 122, and thus improving the full-well capacity of the photodiode 103.

[0084] In some embodiments, the thickness of the first portion 141 of the top 132 for subsequent formation of the second doped region 102 in the direction X from the first epitaxial layer 120 to the third epitaxial layer 140 is less than the thickness of the first epitaxial layer 120, which is beneficial for the subsequent formation of the top 132 with a thickness less than the bottom 112.

[0085] refer to Figure 6 The central region of the initial second doped region 152 is doped with a first type to form the first doped region 101, and the remaining initial second doped region 152 is used as the second doped region 102.

[0086] Understandably, the formed second doped region 102 includes a bottom 112, a middle 122, and a top 132. The doping concentration of the middle 122 is lower than that of the bottom 112 and the top 132, and the doping concentration of the bottom 112 is greater than that of the top 132. Thus, during photogenerated carrier transport, due to the significant difference in doping concentration between the bottom 112 and the middle 122, the potential difference between the bottom 112 and the middle 122 is also significant. This facilitates the transfer of photogenerated carriers from areas of high potential energy to areas of low potential energy, much like a water flow. Furthermore, the height difference in potential energy increases the transfer speed of photogenerated carriers, i.e., increases the probability of photogenerated carriers escaping from the first doped region 101. This makes it easier for photogenerated carriers to be transported out of the first doped region 101, reducing the probability of photogenerated carriers remaining in the first doped region 101. This improves the image hysteresis problem in the semiconductor structure and optimizes the low-light imaging performance of the semiconductor structure. Furthermore, the moderate doping concentration at the top 132 helps reduce the defect density in the top 132 caused by the doping process. This reduces the probability that photogenerated carriers will be captured and consumed by defects in the top 132 when passing through it. This, in turn, helps to further improve the collection efficiency of photogenerated carriers, thereby improving the photoelectric conversion efficiency of the photodiode.

[0087] In some embodiments, performing first-type doping on the central region of the initial second doped region 152 means doping N-type ions in the central region of the initial second doped region 152.

[0088] In some embodiments, in conjunction with reference Figure 7 and Figure 1 The method for manufacturing a semiconductor structure may further include: forming a third doped region 104, which is located in the second doped region 102 and spaced apart from the first doped region 101; and forming a transmission gate structure 105, which is adjacent to both the first doped region 101 and the third doped region 104.

[0089] In some embodiments, the third doped region 104 being located in the second doped region 102 means that the third doped region 104 is located in the containment region 142; the transmission gate structure 105 is also located in the containment region 142.

[0090] It is understandable that the third doped region 104, the transmission gate structure 105, the top of the first doped region 101, and part of the second doped region 102 constitute a transistor structure, and the top of the third doped region 104 and the first doped region 101 are equivalent to the source region and the drain region of the transistor structure.

[0091] In some embodiments, the step of forming the third doped region 104 may include: referencing Figure 7 A portion of the surface of the third epitaxial layer 140, which is far from the first doped region 101, is subjected to a first type of doping to transform a portion of the first doped region 101 into the third doped region 104.

[0092] In some embodiments, performing a first type of doping on a portion of the surface of the third epitaxial layer 140 away from the first doped region 101 means performing a first type of doping on a portion of the accommodating region 142 to form a third doped region 104. The doping concentration of the third doped region 104 is greater than or equal to the doping concentration of the first doped region 101.

[0093] In some embodiments, the step of forming the transmission gate structure 105 may include: referring to Figure 7 A via 106 is formed on the side of the third epitaxial layer 140 away from the second epitaxial layer 130. The bottom of the via 106 exposes the first doped region 101, and the top sidewall of the via 106 exposes the third doped region 104. (Reference) Figure 1 A dielectric layer 115 and a conductive layer 125 are sequentially formed on the inner wall of the through hole 106.

[0094] It should be noted that in practical applications, the bottom of the via 106 may not expose the first doped region 101, and the top sidewall of the via 106 may not expose the third doped region 104. That is, there may be a partial gap between the dielectric layer 115 and the top 132, which is filled by the second doped region 102; there may be a partial gap between the dielectric layer 115 and the third doped region 104, which is filled by the second doped region 102.

[0095] In summary, the semiconductor structure manufacturing method provided in another embodiment of this disclosure can be applied to a CMOS image sensor. During photogenerated carrier transport, the difference in doping concentration between the bottom 112 and the middle 122, i.e., the difference in potential between the bottom 112 and the middle 122, increases the transfer speed of photogenerated carriers. This helps reduce the probability of photogenerated carriers remaining in the photodiode 103, thus improving the retention problem of photogenerated carriers and improving the image hysteresis problem in the semiconductor structure. Furthermore, by surrounding the first doped region 101 with the second doped region 102, the potential difference between the second doped region 102 and the first doped region 101 is utilized to reduce the probability of photogenerated carriers leaking from the second doped region 102, thereby reducing the leakage current of the photodiode.

[0096] Those skilled in the art will understand that the above embodiments are specific examples of implementing this disclosure, and in practical applications, various changes in form and detail may be made without departing from the spirit and scope of the embodiments of this disclosure. Any person skilled in the art can make their own modifications and alterations without departing from the spirit and scope of the embodiments of this disclosure; therefore, the scope of protection of the embodiments of this disclosure should be determined by the scope defined in the claims.

Claims

1. A semiconductor structure, characterized in that, include: A substrate, wherein the substrate includes a first doped region and a second doped region surrounding the first doped region, the doping types of the first doped region and the second doped region are different, and the first doped region and the second doped region together constitute a photodiode; The second doped region includes a bottom, a middle, and a top, wherein the doping concentration of the middle region is lower than the doping concentration of the bottom and the top.

2. The semiconductor structure as described in claim 1, characterized in that, The doping concentration at the bottom is greater than that at the top.

3. The semiconductor structure as described in claim 1 or 2, characterized in that, The first doped region has a doping concentration of 5 x 1018 16 atoms / cm 3 . The second doped region has a doping concentration of 3 x 1018 17 atoms / cm 3 .

4. The semiconductor structure as described in claim 1 or 2, characterized in that, The doping concentration at the bottom is 1×10⁻⁶. 16 atom / cm 3 ~5×10 16 atom / cm 3 The doping concentration in the middle section is 5 × 10⁻⁶. 15 atom / cm 3 ~1×10 16 atom / cm 3 The doping concentration at the top is 8 × 10⁻⁶. 15 atom / cm 3 ~2×10 16 atom / cm 3 .

5. The semiconductor structure as described in claim 2, characterized in that, Along the direction from the bottom to the top, the thickness of the middle portion is greater than the thickness of the bottom and the top.

6. The semiconductor structure as described in claim 5, characterized in that, Along the direction from the bottom to the top, the thickness of the top is less than the thickness of the bottom.

7. The semiconductor structure as described in claim 6, characterized in that, Along the direction from the bottom to the top, the thickness of the first doped region is 3.9 μm to 4.1 μm, the thickness of the bottom is 0.45 μm to 0.55 μm, the thickness of the middle part is 3.2 μm to 3.4 μm, and the thickness of the top part is 0.15 μm to 0.25 μm.

8. The semiconductor structure as described in claim 1 or 2, characterized in that, The semiconductor structure further includes a third doped region and a transport gate structure, wherein the third doped region is disposed above the first doped region, and the transport gate structure is adjacent to both the first doped region and the third doped region.

9. The semiconductor structure as described in claim 8, characterized in that, The doping type of the third doping region is the same as that of the first doping region, and the doping concentration of the third doping region is greater than or equal to that of the first doping region.

10. A method for manufacturing a semiconductor structure, characterized in that, include: A substrate is formed, the substrate including a first doped region and a second doped region surrounding the first doped region, the doping type of the first doped region being different from the doping type of the second doped region, and the first doped region and the second doped region together constituting a photodiode; The first doped region includes a bottom, a middle, and a top, wherein the doping concentration of the middle region is less than the doping concentration of the bottom and the top.

11. The manufacturing method as described in claim 10, characterized in that, The steps for forming the substrate include: Provide substrate; A first epitaxial layer, a second epitaxial layer, and a third epitaxial layer are formed on the substrate using an epitaxial growth process, respectively. The first epitaxial layer, the second epitaxial layer, and the third epitaxial layer are respectively subjected to second-type doping with different concentrations to form an initial second doped region; The central region of the initial second doped region is doped with a first type to form the first doped region, and the remaining initial second doped region is used as the second doped region.

12. The manufacturing method as described in claim 11, characterized in that, In the step of performing second-type doping with different concentrations on the first epitaxial layer, the second epitaxial layer, and the third epitaxial layer, the doping concentration of the second epitaxial layer is lower than the doping concentration of the first epitaxial layer and the third epitaxial layer, and the doping concentration of the third epitaxial layer is lower than the doping concentration of the first epitaxial layer.

13. The manufacturing method as described in claim 11, characterized in that, In the step of forming the initial second doped region, the thickness of the second epitaxial layer is greater than the thickness of the first epitaxial layer and the thickness of the third epitaxial layer along the direction from the first epitaxial layer to the third epitaxial layer.

14. The manufacturing method as described in claim 11, characterized in that, Also includes: A third doped region is formed, which is located within the second doped region and spaced apart from the first doped region; A transmission gate structure is formed, which is adjacent to both the first doped region and the third doped region.

15. The manufacturing method as described in claim 14, characterized in that, The step of forming the third doped region includes: performing the first type of doping on a portion of the surface of the third epitaxial layer that is away from the first doped region to convert a portion of the second doped region into the third doped region.

16. The manufacturing method as described in claim 14, characterized in that, The steps of forming the transmission gate structure include: forming a via on the side of the third epitaxial layer away from the second epitaxial layer, exposing the first doped region at the bottom of the via and exposing the third doped region at the top sidewall of the via, and sequentially forming a dielectric layer and a conductive layer on the inner wall of the via.

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