A semiconductor structure and a method of fabricating the same

Abstract

This invention provides a semiconductor structure and its fabrication method. The semiconductor structure includes a substrate, which includes a first region at the center and a second region surrounding the first region; and a composite buffer layer on the substrate. The composite buffer layer includes a first buffer layer containing carbon (C), and the first buffer layer includes at least one set of stacked first sub-buffer layers and second sub-buffer layers. The C concentration of the first sub-buffer layer in the first region is greater than that in the second region; the C concentration of the second sub-buffer layer in the first region is less than that in the second region. This composite buffer layer is fabricated by alternating doping methods, thereby improving the uniformity of C concentration in the composite buffer layer at the substrate edge and center, effectively increasing the resistivity of the composite buffer layer, and thus significantly increasing the breakdown voltage and improving device performance.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a semiconductor structure and its fabrication method. Background Technology

[0002] GaN-based high electron mobility transistors (GaN HEMTs) not only possess the excellent properties of GaN materials, such as a large bandgap, high electron saturation drift velocity, high temperature resistance, radiation resistance, and good chemical stability, but GaN materials can also form two-dimensional electron gas channels with high concentration and high mobility with materials such as AlGaN. Therefore, they are particularly suitable for high voltage, high power, and high temperature applications, and are one of the most promising transistors for power electronics applications.

[0003] However, for ordinary GaN HEMTs, when the device is subjected to breakdown voltage, electrons injected from the source can pass through the buffer layer to the drain, forming a leakage path. Excessive leakage in the buffer layer can cause the device to break down prematurely. In the traditional approach, carbon is usually doped into the buffer layer to increase the buffer layer resistance. However, when carbon is doped using the traditional method, the carbon concentration in the center and edge of the wafer will be uneven, resulting in a carbon concentration that is too high or too low in the center or edge. If the carbon concentration is too high or too low, the resistivity of the region will decrease, thereby significantly reducing the breakdown voltage and affecting the device performance. Summary of the Invention

[0004] The purpose of this invention is to provide a semiconductor structure and its fabrication method to solve the problem of uneven C concentration between the center and the edge of a wafer.

[0005] According to one aspect of the present invention, a semiconductor structure is provided, comprising: a substrate, the substrate including a first region located at a center and a second region located at the periphery of the first region;

[0006] And a composite buffer layer located on the substrate, the composite buffer layer including a first buffer layer, the first buffer layer including a C element, the first buffer layer including at least one set of stacked first sub-buffer layers and second sub-buffer layers;

[0007] Among them, the C concentration of the first sub-buffer layer located in the first region is greater than the C concentration of the first sub-buffer layer located in the second region;

[0008] The C concentration of the second sub-buffer layer located in the first region is less than the C concentration of the second sub-buffer layer located in the second region.

[0009] As an optional embodiment, the C concentration of the first sub-buffer layer located in the first region is greater than the C concentration of the second sub-buffer layer located in the first region.

[0010] As an optional embodiment, the C concentration of the first sub-buffer layer located in the second region is less than the C concentration of the second sub-buffer layer located in the second region.

[0011] As an optional embodiment, the smallest repeating unit of the first buffer layer is a first sub-buffer layer and a second sub-buffer layer, wherein in the smallest repeating unit:

[0012] The first sub-buffer layer is located on the side closest to the substrate;

[0013] Alternatively, the second sub-buffer layer may be located near the substrate.

[0014] As an optional embodiment, the thickness of the first sub-buffer layer and the second sub-buffer layer is less than 5 μm.

[0015] As an optional embodiment, the composite buffer layer includes at least one first buffer layer.

[0016] The composite buffer layer further includes at least one second buffer layer, wherein the at least one second buffer layer and at least one first buffer layer are alternately stacked on one side of the substrate;

[0017] The second buffer layer includes C element, and the average C concentration of the second buffer layer is less than or greater than the average C concentration of the first buffer layer.

[0018] As an optional embodiment, the second buffer layer includes at least one set of stacked third and fourth sub-buffer layers;

[0019] Among them, the C concentration of the third sub-buffer layer located in the first region is greater than the C concentration of the third sub-buffer layer located in the second region;

[0020] The C concentration of the fourth sub-buffer layer located in the first region is less than the C concentration of the fourth sub-buffer layer located in the second region.

[0021] As an optional embodiment, the C concentration of the composite buffer layer is greater than 1E17 and less than 2E20.

[0022] As an optional embodiment, the C concentration in the composite buffer layer gradually increases or first increases and then decreases along the direction from the substrate to the composite buffer layer.

[0023] As an optional embodiment, the composite buffer layer further includes an Al element, and the Al composition is constant, gradually decreases, increases first and then decreases, or is complementary to the C element along the direction from the substrate to the composite buffer layer.

[0024] As an optional embodiment, the shape of the first region can be any shape such as a circle, ellipse, or polygon.

[0025] As an optional embodiment, the area of ​​the first region is less than half the area of ​​the substrate.

[0026] As an optional embodiment, the semiconductor structure further includes a transition layer located between the substrate and the composite buffer layer.

[0027] As an optional embodiment, the semiconductor structure further includes a barrier layer located on the side of the composite buffer layer away from the substrate, and the C concentration of the barrier layer is lower than that of the composite buffer layer.

[0028] On the other hand, the present invention also provides a method for fabricating a semiconductor structure, characterized in that a substrate is provided, the substrate comprising a first region located at the center and a second region located at the periphery of the first region;

[0029] A composite buffer layer is fabricated on the substrate.

[0030] The preparation of the composite buffer layer includes the preparation of a first buffer layer, and the preparation of the first buffer layer includes the preparation of several sets of stacked first sub-buffer layers and second sub-buffer layers.

[0031] The first buffer layer is doped with C element, and the C concentration of the first sub-buffer layer located in the first region is greater than the C concentration of the first sub-buffer layer located in the second region.

[0032] The C concentration of the second sub-buffer layer located in the first region is less than the C concentration of the second sub-buffer layer located in the second region.

[0033] As an optional embodiment, the preparation of the first sub-buffer layer includes preparing the first sub-buffer layer under first conditions, wherein the first conditions include the C element dopant source being an organic compound.

[0034] As an optional embodiment, the preparation of the second sub-buffer layer includes preparing the second sub-buffer layer under second conditions, wherein the C element doping source is a MO source, and the second condition further includes:

[0035] Temperature below 1000℃, or growth rate above 2µm / h.

[0036] As an optional embodiment, fabricating the composite buffer layer on the substrate further includes:

[0037] At least one first buffer layer and at least one second buffer layer are alternately stacked on a substrate;

[0038] The second buffer layer is doped with C, and the average C concentration of the second buffer layer is either less or greater than the average C concentration of the first buffer layer.

[0039] As an optional embodiment, the second buffer layer includes several sets of stacked third and fourth sub-buffer layers;

[0040] Among them, the C concentration of the third sub-buffer layer located in the first region is greater than the C concentration of the third sub-buffer layer located in the second region;

[0041] The C concentration of the fourth sub-buffer layer located in the first region is less than the C concentration of the fourth sub-buffer layer located in the second region.

[0042] As an optional embodiment, after preparing the composite buffer layer on the substrate, the method further includes: preparing a barrier layer on the side of the composite buffer layer away from the substrate, wherein the C concentration of the barrier layer is less than the C concentration of the composite buffer layer.

[0043] The semiconductor and its fabrication method provided by this invention sequentially fabricate a composite buffer layer structure on a substrate using different fabrication methods. The substrate includes a first region at its center and a second region surrounding the first region. The composite buffer layer includes a first buffer layer containing carbon (C) and at least one set of stacked first and second sub-buffer layers. The C concentration of the first sub-buffer layer in the first region is greater than that in the second region, and the C concentration of the second sub-buffer layer in the first region is less than that in the second region. This effectively improves the uniformity of C concentration in the composite buffer layer, effectively avoids excessively high or low C concentrations at the center or edge of the substrate, increases the resistivity of the buffer layer, reduces leakage current, effectively increases the breakdown voltage of the semiconductor structure, and enhances reliability. Attached Figure Description

[0044] Figure 1 This is a schematic diagram of the semiconductor structure provided in Embodiment 1 of the present invention;

[0045] Figure 2 This is a schematic diagram of the semiconductor structure provided in Embodiment 2 of the present invention;

[0046] Figure 3 This is a schematic diagram of the semiconductor structure provided in Embodiment 3 of the present invention;

[0047] Figure 4 This is a schematic diagram of another semiconductor structure provided in Embodiment 3 of the present invention;

[0048] Figure 5 This is a schematic diagram of the semiconductor structure provided in Embodiment 4 of the present invention.

[0049] Explanation of reference numerals in the attached figures: 1-substrate; 11-first region; 12-second region; 2-first buffer layer; 21-first sub-buffer layer; 22-second sub-buffer layer; 3-second buffer layer; 31-third sub-buffer layer; 21-fourth sub-buffer layer; 4-barrier layer; 5-channel layer; 6-barrier layer; 7-transition layer; 8-gate; 9-source; 10-drain. Detailed Implementation

[0050] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present invention. Rather, they are merely examples of apparatuses consistent with some aspects of the invention as detailed in the appended claims.

[0051] Example 1

[0052] Example 1 provides a semiconductor structure, such as Figure 1 As shown, the semiconductor structure includes: a substrate 1, which includes a first region (11) located at the center and a second region (12) located around the first region (11); and a composite buffer layer on the substrate 1, which includes a first buffer layer 2, which includes C element, and includes at least one set of stacked first sub-buffer layers (21) and second sub-buffer layers (22); wherein the C concentration of the first sub-buffer layer 21 located on the first region 11 is greater than the C concentration of the first sub-buffer layer 21 located on the second region 12; and the C concentration of the second sub-buffer layer 22 located on the first region 11 is less than the C concentration of the second sub-buffer layer 22 located on the second region 12. The semiconductor structure provided in this embodiment effectively improves the uniformity of C concentration in the composite buffer layer, effectively avoids excessively high or low C concentration at the center or edge of the substrate, improves the resistivity of the buffer layer, reduces leakage current, effectively improves the breakdown voltage of the semiconductor structure, and enhances reliability.

[0053] In this embodiment, the average C concentration of the first sub-buffer layer 21 and the second sub-buffer layer 22 can be the same or different. Preferably, the C concentration of the first sub-buffer layer 21 located on the first region 11 is greater than the C concentration of the second sub-buffer layer 22 located on the first region 11; and the C concentration of the first sub-buffer layer 21 located on the second region 11 is less than the C concentration of the second sub-buffer layer on the second region. This arrangement ensures that the C concentrations of the first sub-buffer layer 21 and the second sub-buffer layer 22 on the first region 11 and the second region 12 are neither too high nor too low. Preferably, controlling the average C concentration of the first sub-buffer layer 21 and the second sub-buffer layer 22 to be the same allows for the formation of a high-low C concentration stacked structure on both the first region 11 and the second region 12 in the direction from the substrate 1 to the composite buffer layer. When the C concentration is stacked, the energy band of the composite buffer layer is also stacked, and the energy band fluctuations affect electron transport, thereby further improving the breakdown voltage. In other embodiments, the average C concentrations of the first sub-buffer layer 21 and the second sub-buffer layer 22 may be different, provided that the highest C concentration of the first sub-buffer layer 21 and the second sub-buffer layer 22 is less than 2E20, and the lowest C concentration of the first sub-buffer layer 21 and the second sub-buffer layer 22 is greater than 1E17. Optionally, the C concentration of the composite buffer layer is greater than 1E17 and less than 2E20. Preferably, the average C concentration of the composite buffer layer is greater than 1E18 and less than 2E20 to ensure effective resistivity.

[0054] As a preferred technical solution, in this embodiment, the first buffer layer 2 is formed as a superlattice structure, and the combination of the first sub-buffer layer 21 and the second sub-buffer layer 22 forms a minimum repeating unit, wherein the thickness of the first sub-buffer layer 21 and the second sub-buffer layer 22 is less than 5 μm. The superlattice structure of the first buffer layer 2 can effectively release the stress between the substrate 1 and the subsequent epitaxial layer, thereby improving the crystal quality of the subsequent epitaxial structure and improving device performance.

[0055] In an optional embodiment, the thickness of the first sub-buffer layer 21 and the second sub-buffer layer 22 is greater than 5 nm and less than 1 μm.

[0056] In this embodiment, the positions of the first sub-buffer layer 21 and the second sub-buffer layer 22 are not limited, as long as the first buffer layer 2 is a stacked alternating structure of the first sub-buffer layer 21 and the second sub-buffer layer 22. For example, the smallest repeating stacked unit of the first buffer layer 2 is the first sub-buffer layer 21 and the second sub-buffer layer 22, wherein the first sub-buffer layer 21 is located on the side closer to the substrate 1, or the second sub-buffer layer 22 is located on the side closer to the substrate 1.

[0057] In this embodiment, the material of substrate 1 can be Si, SiC, Al2O3 or GaN, etc., and this embodiment does not limit it.

[0058] The composite buffer layer is made of GaN-based material, and the first sub-buffer layer 21 and the second sub-buffer layer 22 can be made of one or more of AlN, AlGaN, GaN, AlInN or AlInGaN.

[0059] In this embodiment, the first region 11 is circular and located in the central region of the substrate 1. The radius of the first region 11 is less than half the radius of the substrate 1. The second region 12 is distributed on the outer periphery of the first region 11 on the substrate 1. In other embodiments, the first region 11 may also be elliptical or polygonal, such as square or hexagonal. It is understood that this embodiment only lists some possible shapes of the first region 11 and is not a limitation on the shape of the first region 11; the area of ​​the first region 11 is less than half the area of ​​the substrate 1.

[0060] Example 2

[0061] Example 2 has a structure that is largely the same as Example 1, with the only difference being that, for example... Figure 2 As shown, the composite buffer layer includes at least one first buffer layer 2 and at least one second buffer layer 3, with the at least one second buffer layer and at least one first buffer layer 2 alternately stacked on the substrate 1. The second buffer layer 3 includes carbon (C) element, and the average C concentration of the second buffer layer 3 is different from the average C concentration of the first buffer layer 2.

[0062] The average C concentration of the second buffer layer 3 is different from that of the first buffer layer 2, so as to further form a composite buffer layer structure with high and low C concentration stacked layer by layer. The energy band is also stacked layer by layer, and the energy band fluctuations affect electron transport, thereby increasing the breakdown voltage.

[0063] Furthermore, the second buffer layer 3 includes at least one set of stacked third sub-buffer layers (31) and fourth sub-buffer layers (32), wherein the C concentration of the third sub-buffer layer 31 located on the first region 11 is greater than the C concentration of the third sub-buffer layer 31 located on the second region 12, and the C concentration of the fourth sub-buffer layer 32 located on the first region 11 is less than the C concentration of the fourth sub-buffer layer 32 located on the second region 12.

[0064] In this embodiment, the positions of the second buffer layer 3 and the first buffer layer 2 are not limited. When there is only one second buffer layer 3 and one first buffer layer 2, the second buffer layer 3 can be formed on the first buffer layer 2 or between the first buffer layer 2 and the substrate 1. When there are multiple second buffer layers 3 and first buffer layers 2, the second buffer layer 3 and the first buffer layer 2 can be stacked and alternately arranged.

[0065] In this embodiment, the material of the second buffer layer 3 is GaN-based, and the materials of the third sub-buffer layer 31 and the fourth sub-buffer layer 32 can be one or more of AlN, AlGaN, GaN, AlInN, or AlInGaN.

[0066] Example 3

[0067] Example 3 is largely the same as Example 1 or Example 2, except that the C concentration in the composite buffer layer gradually increases or initially increases and then decreases. This configuration ensures a lower C concentration in the portion of the composite buffer layer closer to substrate 1, guaranteeing excellent crystallinity of the semiconductor structure. Simultaneously, the C concentration gradually increases along the direction from substrate 1 to the composite buffer layer, significantly reducing the carrier concentration in this region, thus suppressing turn-off leakage current and improving the breakdown voltage. Preferably, as... Figure 3 As shown, the semiconductor structure may also include a transition layer 7, which is located between the substrate 1 and the composite buffer layer. The material of the transition layer 7 is GaN-based, and no C element is doped in the transition layer 7 to further ensure the crystallinity of the semiconductor structure.

[0068] Furthermore, in the portion of the composite buffer layer farther from substrate 1, the C concentration gradually decreases to avoid C doping into the epitaxial structure located on the composite buffer layer, thereby improving the dynamic characteristics of the semiconductor structure. More preferably, as... Figure 4 As shown, the semiconductor structure also includes a barrier layer 4, which is located on the side of the composite buffer layer away from the substrate 1. The C concentration in the barrier layer 4 is lower than that in the composite buffer layer. Furthermore, the barrier layer 4 can be a GaN-based material layer without C doping, ensuring that no impurity doping occurs in the channel layer, thereby ensuring the linearity of the transconductance and avoiding deterioration of the device's dynamic characteristics.

[0069] The transition layer 7 and the barrier layer 4 may be made of the same or different materials. The materials of the transition layer 7 and the barrier layer 4 are group III nitride materials. Preferably, the materials of the transition layer 7 and the barrier layer 4 are AlGaN.

[0070] Example 4

[0071] Example 4 is largely the same as any one of Examples 1 to 3, with the only difference being that... Figure 5 As shown, the semiconductor structure also includes a channel layer 5 and a barrier layer 6, which are sequentially formed on the side of the composite buffer layer away from the substrate 1. The channel layer 5 and the barrier layer 6 are made of group III nitride materials. In this embodiment, the channel layer 5 is made of GaN and the barrier layer 6 is made of AlGaN. In other embodiments, the channel layer 5 and the barrier layer can also be made of materials such as AlN or AlInN, which is not limited in this embodiment.

[0072] Furthermore, the semiconductor structure also includes a gate 8, a source 9, and a drain 10. The gate 8 is located on the surface of the barrier layer 6 away from the substrate 1, and the source 9 and drain 10 are located at the two ends of the gate 8, respectively.

[0073] In this semiconductor structure, the composite buffer layer, as described in the above embodiments, restricts the current above the composite buffer layer, increases the resistivity of the composite buffer layer, reduces leakage current, and increases the breakdown voltage.

[0074] Example 5

[0075] Example 5 provides a method for fabricating the above-mentioned semiconductor structure, such as... Figures 1 to 5 As shown, the fabrication method includes: providing a substrate 1; and fabricating a composite buffer layer on the substrate 1;

[0076] The preparation of the composite buffer layer includes the preparation of a first buffer layer 2, and the preparation of the first buffer layer 2 includes the preparation of several sets of stacked first sub-buffer layers 21 and second sub-buffer layers 22.

[0077] The first buffer layer is doped with C element, and the C concentration of the first sub-buffer layer 21 located on the first region 11 is greater than the C concentration of the first sub-buffer layer 21 located on the second region 12;

[0078] The C concentration of the second sub-buffer layer 22 located on the first region 11 is less than the C concentration of the second sub-buffer layer 22 located on the second region 12.

[0079] The semiconductor structure fabrication method provided in this embodiment can effectively improve the uniformity of C concentration in the composite buffer layer, effectively avoid excessively high or low C concentration at the center or edge of the substrate, improve the resistivity of the buffer layer, reduce leakage current, effectively improve the breakdown voltage of the semiconductor structure, and enhance reliability.

[0080] Further, the preparation of the first sub-buffer layer 21 includes preparing the first sub-buffer layer 21 under first conditions. The first conditions include that the C element doping source is an organic compound. In this embodiment, the C element doping source selected includes any one of materials such as CH4, C2H4, C2H6, and C3H8. The preparation of the second sub-buffer layer 22 includes preparing the second sub-buffer layer 22 under second conditions. The second conditions include that the C element doping source is a MO source, which can be TMGa. The second conditions also include a temperature below 1000℃ or a growth rate above 2µm / h.

[0081] In this embodiment, the fabrication of the composite buffer layer on the substrate 1 further includes: stacking and alternately fabricating at least one first buffer layer 2 and at least one second buffer layer 3 on the substrate 1. The fabrication of the second buffer layer 3 further includes doping it with carbon (C), wherein the average C concentration of the second buffer layer 3 is less than or greater than the average C concentration of the first buffer layer 2.

[0082] The second buffer layer 3 includes several sets of stacked third sub-buffer layers 31 and fourth sub-buffer layers 32. The C concentration of the third sub-buffer layer 31 located in the first region 11 is greater than that of the third sub-buffer layer 31 located in the second region 12, and the C concentration of the fourth sub-buffer layer 32 located in the first region 11 is less than that of the fourth sub-buffer layer 32 located in the second region 12.

[0083] After the composite buffer layer is prepared on the substrate 1, the method further includes: preparing a barrier layer 4 on the side of the composite buffer layer away from the substrate 1, wherein the C concentration of the barrier layer is less than the C concentration of the composite buffer layer.

[0084] Before fabricating the composite buffer layer on the substrate 1, the method further includes fabricating a transition layer 7 on the substrate 1 first, and then fabricating the composite buffer layer on the transition layer 7; after fabricating the composite buffer layer on the substrate 1, the method further includes fabricating a channel layer 5 and a barrier layer 6 sequentially on the side of the composite buffer layer away from the substrate 1.

[0085] In this embodiment, after the composite buffer layer is prepared on the substrate 1, and before the channel layer 5 and the barrier layer 6 are prepared sequentially on the side of the composite buffer layer away from the substrate 1, the method may further include: preparing a barrier layer 4 on the composite buffer layer, wherein the C concentration of the barrier layer 4 is less than the C concentration of the composite buffer layer.

[0086] Furthermore, after fabricating the channel layer 5 and the barrier layer 6, a gate 8, a source 9, and a drain 10 are fabricated on the side of the barrier layer 6 away from the substrate 1, wherein the source 9 and the drain 10 are located at the two ends of the gate 8, respectively.

[0087] Example 6

[0088] Example 6 is largely the same as Examples 1 to 5, except that the composite buffer layer also includes Al elements. Along the direction from the substrate 1 to the composite buffer layer, the Al element content in the composite buffer layer can be constant, gradually decreased, or first increased and then decreased. The addition of Al elements increases the bandgap of the composite buffer layer, thereby improving resistivity, reducing leakage current, and ultimately increasing the breakdown voltage. In an optional embodiment, the composite buffer layer includes several sublayers. The Al element composition in the composite buffer layer can be complementary to the C element composition; that is, sublayers with low C content have high Al content, and sublayers with high C content have low Al content, to balance the average resistivity between the sublayers of the composite buffer layer and further improve the breakdown voltage.

[0089] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the technical solution of the present invention. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention shall still fall within the scope of the technical solution of the present invention.

Claims

1. A semiconductor structure, characterized in that, include: The substrate (1) includes a first region (11) located at the center and a second region (12) located around the first region (11). And a composite buffer layer located on the substrate (1), the composite buffer layer including a first buffer layer (2), the first buffer layer (2) including a C element, the first buffer layer (2) including at least one set of stacked first sub-buffer layers (21) and second sub-buffer layers (22). The C concentration of the first sub-buffer layer (21) located in the first region (11) is greater than the C concentration of the first sub-buffer layer (21) located in the second region (12); The C concentration of the second sub-buffer layer (22) located in the first region (11) is less than the C concentration of the second sub-buffer layer (22) located in the second region (12).

2. The semiconductor structure according to claim 1, characterized in that, The C concentration of the first sub-buffer layer (21) located in the first region (11) is greater than the C concentration of the second sub-buffer layer (22) located in the first region (11).

3. The semiconductor structure according to claim 1, characterized in that, The C concentration of the first sub-buffer layer (21) located in the second region (12) is less than the C concentration of the second sub-buffer layer (22) located in the second region (12).

4. The semiconductor structure according to claim 1, characterized in that, The smallest repeating unit of the first buffer layer (2) is the first sub-buffer layer (21) and the second sub-buffer layer (22), wherein in the smallest repeating unit: The first sub-buffer layer (21) is located on the side close to the substrate (1); Alternatively, the second sub-buffer layer (22) may be located near the substrate (1).

5. The semiconductor structure according to claim 1, characterized in that, The thickness of the first sub-buffer layer (21) and the second sub-buffer layer (22) is less than 5 μm.

6. The semiconductor structure according to claim 1, characterized in that, The composite buffer layer includes at least one first buffer layer (2). The composite buffer layer further includes at least one second buffer layer (3), and the at least one second buffer layer (3) and the at least one first buffer layer (2) are alternately stacked on one side of the substrate (1); The second buffer layer (3) includes C element, and the average C concentration of the second buffer layer (3) is less than or greater than the average C concentration of the first buffer layer (2).

7. The semiconductor structure according to claim 6, characterized in that, The second buffer layer (3) includes at least one set of stacked third sub-buffer layers (31) and fourth sub-buffer layers (32); The C concentration of the third sub-buffer layer (31) located in the first region (11) is greater than the C concentration of the third sub-buffer layer (31) located in the second region (12); The C concentration of the fourth sub-buffer layer (32) located in the first region (11) is less than the C concentration of the fourth sub-buffer layer (32) located in the second region (12).

8. The semiconductor structure according to claim 1, characterized in that, The C concentration of the composite buffer layer is greater than 1E17 cm⁻³ and less than 2E20 cm⁻³. 3 .

9. The semiconductor structure according to claim 1, characterized in that, Along the direction from the substrate (1) to the composite buffer layer, the C concentration in the composite buffer layer gradually increases or first increases and then decreases.

10. The semiconductor structure according to claim 1, characterized in that, The composite buffer layer also includes an Al element. Along the direction from the substrate (1) to the composite buffer layer, the Al component remains constant, gradually decreases, increases first and then decreases, or is complementary to the C element.

11. The semiconductor structure according to claim 1, characterized in that, The shape of the first region (11) is any one of a circle, an ellipse or a polygon.

12. The semiconductor structure according to claim 1, characterized in that, The area of ​​the first region (11) is less than half the area of ​​the substrate (1).

13. The semiconductor structure according to claim 1, characterized in that, The semiconductor structure further includes a transition layer (7) located between the substrate (1) and the composite buffer layer.

14. The semiconductor structure according to any one of claims 1-13, characterized in that, The semiconductor structure further includes a barrier layer (4), which is located on the side of the composite buffer layer away from the substrate (1), and the C concentration of the barrier layer (4) is less than the C concentration of the composite buffer layer.

15. A method for fabricating a semiconductor structure, characterized in that, A substrate (1) is provided, the substrate (1) including a first region (11) located at the center and a second region (12) located around the first region (11). A composite buffer layer is prepared on the substrate (1). The preparation of the composite buffer layer includes the preparation of a first buffer layer (2), and the preparation of the first buffer layer (2) includes the preparation of several sets of stacked first sub-buffer layers (21) and second sub-buffer layers (22). C element is doped in the first buffer layer (2), and the C concentration of the first sub-buffer layer (21) located on the first region (11) is greater than the C concentration of the first sub-buffer layer (21) located on the second region (12); The C concentration of the second sub-buffer layer (22) located in the first region (11) is less than the C concentration of the second sub-buffer layer (22) located in the second region (12).

16. The method for preparing a semiconductor structure according to claim 15, characterized in that, The preparation of the first sub-buffer layer (21) includes preparing the first sub-buffer layer (21) under a first condition, wherein the first condition includes the C element dopant source being an organic compound.

17. The method for preparing a semiconductor structure according to claim 15, characterized in that, The preparation of the second sub-buffer layer (22) includes preparing the second sub-buffer layer (22) under a second condition, wherein the C element doping source is a MO source, and the second condition further includes: Temperature below 1000℃, or growth rate above 2µm / h.

18. The method for preparing a semiconductor structure according to claim 15, characterized in that, The preparation of the composite buffer layer on the substrate (1) further includes: At least one first buffer layer (2) and at least one second buffer layer (3) are alternately stacked on the substrate (1). The second buffer layer (3) is doped with C element, and the average C concentration of the second buffer layer (3) is less than or greater than the average C concentration of the first buffer layer (2).

19. The method for preparing a semiconductor structure according to claim 18, characterized in that, The second buffer layer (3) includes several sets of stacked third sub-buffer layers (31) and fourth sub-buffer layers (32); The C concentration of the third sub-buffer layer (31) located in the first region (11) is greater than the C concentration of the third sub-buffer layer (31) located in the second region (12); The C concentration of the fourth sub-buffer layer (32) located in the first region (11) is less than the C concentration of the fourth sub-buffer layer (32) located in the second region (12).

20. The method for preparing a semiconductor structure according to any one of claims 15-19, characterized in that, After the composite buffer layer is prepared on the substrate (1), the method further includes: preparing a barrier layer (4) on the side of the composite buffer layer away from the substrate (1), wherein the C concentration of the barrier layer (4) is less than the C concentration of the composite buffer layer.

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