SiC device four-level split output inverter single carrier modulation method and system

CN117674560BActive Publication Date: 2026-08-18CHINA UNIV OF PETROLEUM (EAST CHINA)
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
CN202311654361.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-12-04
Publication Date
2026-08-18
Estimated Expiration
2043-12-04

AI Technical Summary

Technical Problem

若SiC器件四电平分裂输出逆变器采用传统调制方法,在直流母线电压波动时,无法满足冲量等效原理,会使输出电流严重畸变,谐波含量大大增加

Benefits of technology

[0056]与现有技术相比,本发明的优点和积极效果在于:

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN117674560B_ABST
    Figure CN117674560B_ABST
Patent Text Reader

Abstract

The application belongs to the technical field of power electronics, and relates to a SiC device four-level split output inverter single carrier modulation method and system. According to the voltage of two controlled voltage sources with analog bus change, the voltage of a DC bus capacitor, and original carrier, three laminated carriers following the voltage change of the capacitor are obtained. According to the voltage of the controlled voltage source and the DC bus capacitor and the three laminated carriers, a single carrier is obtained. According to the generation mode of the single carrier, a modulation wave changing with the DC power supply is obtained. According to the size comparison of the modulation wave, the modulation wave compared with the single carrier is selected, and a driving signal is generated according to the size comparison of the modulation wave and the single carrier. The application can make the modulation strategy still satisfy the impulse equivalence principle under the condition of bus voltage fluctuation, so as to output a current waveform with good waveform. On the other hand, only one single carrier with a fixed amplitude is used, so that the implementation difficulty in the digital controller is effectively simplified.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention belongs to the field of power electronics technology, and relates to inverter modulation technology. Specifically, it relates to a single-carrier modulation method and system for a SiC device four-level split output inverter. Background Technology

[0002] With increasing environmental awareness, the scale of new energy power generation such as photovoltaic and wind power is constantly expanding. Inverters, as the core of new energy power generation systems, directly affect power quality and system reliability. However, with growing industry demands, power switching devices based on silicon (Si) materials are no longer suitable for some applications. For example, silicon insulated gate bipolar transistors (Si IGBTs) suffer from high switching losses and slow switching speeds. Therefore, metal-oxide-semiconductor field-effect transistors (SiC MOSFETs) have emerged, characterized by fast switching speeds and low switching losses. Applying SiC MOSFETs to four-level split-output inverters can effectively improve efficiency and power density.

[0003] The DC bus of the SiC device four-level split-output inverter forms three power supplies through a DC source or capacitor. See [link / reference] Figure 1 DC voltage source V dc To provide the overall voltage to the DC bus, controlled voltage sources simulating bus variations are connected in series from top to bottom on the DC bus. DC bus capacitor C dc Controlled voltage source simulating bus changes When the inverter is operating, the power supply voltage will fluctuate. If a SiC device four-level split-output inverter uses a traditional modulation method, the impulse equivalence principle cannot be satisfied when the DC bus voltage fluctuates, resulting in severe distortion of the output current and a significant increase in harmonic content. In addition, the traditional modulation method uses stacked three carriers, which is very complex to implement in the digital controller. Summary of the Invention

[0004] This invention addresses the problems existing in the prior art by providing a single-carrier modulation method and system for a four-level split-output inverter using SiC devices. It uses only a single carrier with a fixed amplitude, which effectively simplifies the implementation difficulty in digital controllers and can still satisfy the impulse equivalence principle under bus voltage fluctuation conditions, thereby outputting a current waveform with good waveform.

[0005] In a first aspect, the present invention provides a single-carrier modulation method for a four-level split-output inverter using SiC devices, the specific steps of which are as follows:

[0006] Carrier generation steps: Based on the controlled voltage source Voltage u1, DC bus capacitance C dcvoltage u2, controlled voltage source Voltage u3, original carrier u c Obtain the stacked carrier u that follows the change in capacitor voltage. c1 Based on voltage u2, voltage u3, and the original carrier u c Obtain the stacked carrier u that follows the change in capacitor voltage. c2 Based on voltage u3 and original carrier u c Obtain the stacked carrier u that follows the change in capacitor voltage. c3 ;

[0007] Single carrier generation steps: Based on voltage u1, voltage u2, voltage u3, and stacked carrier u... c1 Obtain the stacked carrier u c1 The corresponding single carrier u c1 * Based on voltage u2, voltage u3, and stacked carrier u c2 Obtain the stacked carrier u c2 The corresponding single carrier u c2 * Based on voltage u3 and stacked carrier u c3 Obtain the stacked carrier u c3 The corresponding single carrier u c3 * ; will single carrier u c1 * Single carrier u c2 * Single carrier u c3 * Add them together and divide by 3 to get the single-carrier u. c * ;

[0008] Modulation wave generation steps: Based on voltage u1, voltage u2, voltage u3, and the original modulation wave u of phase i. i Obtain the superimposed carrier u c1 Modulated wave u that changes together i1 Based on voltage u2, voltage u3, and the original modulation wave u of phase i i Obtain the superimposed carrier u c2 Modulated wave u that changes together i2 Based on voltage u3 and the original modulation wave u of phase i i Obtain the superimposed carrier u c3 Modulated wave u that changes together i3 i = A, B, C;

[0009] Modulation wave selection steps: i-phase original modulation wave u i Add 300 and subtract the sum of voltages u2 and u3 to obtain the first comparison signal u. sel_1 The original modulated wave u iAdd 300 and subtract voltage u3 to obtain the second comparison signal u. sel_2 ;u sel_1 If >0, then the first modulated wave is u i1 -200; if u sel_1 If <0, then the first modulated wave is u i2 ; if u sel_2 If >0, then the second modulated wave u m * Equal to the first modulated wave; if u sel_2 If <0, then the second modulated wave u m * For u i3 Add 200; Drive signal generation steps: Voltage u3 minus u a The sum of 300 and 300 yields the third comparison signal u. sel_3 The first comparison signal u sel_1 Comparison with the third signal u sel_3 ANDing yields the fourth comparison signal u sel_4 According to the first comparison signal u sel_1 The third comparison signal u sel_3 Fourth comparison signal u sel_4 Single carrier u c * Modulated wave u m * The size generates the i-phase drive signal S i1 -S i6 .

[0010] In some embodiments, during the carrier generation step, a stacked carrier u is obtained. c1 , stacked carrier u c2 , stacked carrier u c3 The method is as follows:

[0011] 0.5 times the voltage u1 and the original carrier u c Multiply these values, then add them to 0.5 times voltage u1, voltage u2, and voltage u3, and subtract 300 to obtain the stacked carrier u. c1 ;

[0012] 0.5 times the voltage u2 and the original carrier u c Multiply by the product, then add to 0.5 times voltage u2 and voltage u3, and subtract 300 to obtain the stacked carrier u. c2 ;

[0013] Voltage u3 and original carrier u c Multiply by 300 and then subtract 300 to get the stacked carrier u. c3 .

[0014] In some embodiments, during the single-carrier generation step, a single carrier u is obtained. c1* Single carrier u c2 * Single carrier u c3 * The method is as follows:

[0015] Stacked carrier u c1 Add 300, subtract 0.5 times voltage u1, the sum of voltage u2 and voltage u3, multiply by 200, divide by voltage u1, and then add 200 to obtain the single-carrier u. c1 * ;

[0016] Stacked carrier u c2 Add 300, subtract 0.5 times the voltage u2 and the sum of voltage u3, multiply by 200 and divide by voltage u2 to obtain single-carrier u. c2 * ;

[0017] Stacked carrier u c3 Add 300, multiply by 200 and divide by voltage u3, then subtract 300 to get single-carrier u. c3 * .

[0018] In some embodiments, in the modulation wave generation step, a modulation wave u is obtained. i1 Modulated wave u i2 Modulated wave u i3 The method is as follows:

[0019] The original modulation wave of phase i, u i Add 300, subtract 0.5 times the voltage u1, add the sum of voltage u2 and voltage u3, multiply by 200, divide by voltage u1, and then add 200 to obtain the modulated wave u. i1 ;

[0020] The original modulation wave of phase i, u i Add 300, subtract 0.5 times the voltage u2 and the sum of voltage u3, multiply by 200 and divide by voltage u2 to obtain the modulated wave u. i2 ;

[0021] The original modulation wave of phase i, u i Add 300, multiply by 200 and divide by voltage u3, then subtract 300 to obtain the modulation wave u. i3 In some embodiments, during the drive signal generation step, the first comparison signal u is used as the basis for the calculation. sel_1 The third comparison signal u sel_3 Fourth comparison signal u sel_4 Single carrier u c * Modulated wave u m * The size generates the i-phase drive signal Si1 -S i6 The method is as follows:

[0022] When u sel_1 When <0, S i1 S is low level. i2 It is high level; when u sel_1 When >0, S i1 S i2 For u m * with u c * The value obtained by performing logical operations using ">", when u m * >u c * At that time, S i1 S is a high level. i2 When u is low level m * ≤u c * At that time, S i1 S is low level. i2 High level;

[0023] When u sel_2 When <0, S i3 S is low level. i4 It is high level; when u sel_2 When >0, S i3 S i4 For u m * with u c * The value obtained by performing logical operations using ">", when u m * >u c * At that time, S i3 S is a high level. i4 When u is low level m * ≤u c * At that time, S i3 S is low level. i4 High level;

[0024] When u sel_3 When <0, S i5 S is low level. i6 It is high level; when u sel_3 When >0, S i5 S i6 For u m * with u c* The value obtained by performing logical operations using ">", when u m * >u c * At that time, S i5 S is a high level. i6 When u is low level m * ≤u c * At that time, S i5 S is low level. i6 It is a high level.

[0025] In a second aspect, the present invention provides a single-carrier modulation system for a SiC device four-level split-output inverter, comprising:

[0026] The carrier generation module, based on the controlled voltage source Voltage u1, DC bus capacitance C dc voltage u2, controlled voltage source Voltage u3, original carrier u c Obtain the stacked carrier u that follows the change in capacitor voltage. c1 Based on voltage u2, voltage u3, and the original carrier u c Obtain the stacked carrier u that follows the change in capacitor voltage. c2 Based on voltage u3 and original carrier u c Obtain the stacked carrier u that follows the change in capacitor voltage. c3 ;

[0027] The single-carrier generation module generates voltages u1, u2, u3, and stacked carriers u. c1 Obtain the stacked carrier u c1 The corresponding single carrier u c1 * Based on voltage u2, voltage u3, and stacked carrier u c2 Obtain the stacked carrier u c2 The corresponding single carrier u c2 * Based on voltage u3 and stacked carrier u c3 Obtain the stacked carrier u c3 The corresponding single carrier u c3 * ; will single carrier u c1 * Single carrier u c2 * Single carrier u c3 * Add them together and divide by 3 to get the single-carrier u. c * ;

[0028] The modulation wave generation module generates the modulation wave based on voltage u1, voltage u2, voltage u3, and the original modulation wave u of phase i. i Obtain the superimposed carrier u c1 Modulated wave u that changes together i1 Based on voltage u2, voltage u3, and the original modulation wave u of phase i i Obtain the superimposed carrier u c2 Modulated wave u that changes together i2 Based on voltage u3 and the original modulation wave u of phase i i Obtain the superimposed carrier u c3 Modulated wave u that changes together i3 i = A, B, C;

[0029] The modulation wave selection module selects the original modulation wave u of phase i. i Add 300 and subtract the sum of voltages u2 and u3 to obtain the first comparison signal u. sel_1 The original modulated wave u i Add 300 and subtract voltage u3 to obtain the second comparison signal u. sel_2 ; if u sel_1 If >0, then the first modulated wave is u i1 -200; if u sel_1 If <0, then the first modulated wave is u i2 ; if u sel_2 If >0, then the second modulated wave u m * Equal to the first modulated wave; if u sel_2 If <0, then the second modulated wave u m * For u i3 Add 200;

[0030] The drive signal generation module subtracts u from the voltage u3. a The sum of 300 and 300 yields the third comparison signal u. sel_3 The first comparison signal u sel_1 Comparison with the third signal u sel_3 ANDing yields the fourth comparison signal u sel_4 According to the first comparison signal u sel_1 The third comparison signal u sel_3 Fourth comparison signal u sel_4 Single carrier u c * Modulated wave u m * The size generates the i-phase drive signal S i1 -S i6 .

[0031] In some embodiments, the carrier generation module includes:

[0032] Carrier generation module I combines 0.5 times the voltage u1 with the original carrier u c Multiply these values, then add them to 0.5 times voltage u1, voltage u2, and voltage u3, and subtract 300 to obtain the stacked carrier u. c1 ;

[0033] Carrier generation module II combines 0.5 times the voltage u2 with the original carrier u. c Multiply by the product, then add to 0.5 times voltage u2 and voltage u3, and subtract 300 to obtain the stacked carrier u. c2 ;

[0034] Carrier generation module III combines voltage u3 with the original carrier u c Multiply by 300 and then subtract 300 to get the stacked carrier u. c3 In some embodiments, the single-carrier generation module includes:

[0035] Single carrier generation module I generates stacked carrier u c1 Add 300, subtract 0.5 times voltage u1, the sum of voltage u2 and voltage u3, multiply by 200, divide by voltage u1, and then add 200 to obtain the single-carrier u. c1 * ;

[0036] Single-carrier generation module II generates stacked carrier u c2 Add 300, subtract 0.5 times the voltage u2 and the sum of voltage u3, multiply by 200 and divide by voltage u2 to obtain single-carrier u. c2 * ;

[0037] Single-carrier generation module III generates stacked carrier u c3 Add 300, multiply by 200 and divide by voltage u3, then subtract 300 to get single-carrier u. c3 * ;

[0038] The single-carrier calculation module calculates the single-carrier u c1 * Single carrier u c2 * Single carrier u c3 * Add them together and divide by 3 to get the single-carrier u. c * .

[0039] In some embodiments, the modulation wave generation module includes:

[0040] Modulation wave generation module I generates the original i-phase modulation wave u iAdd 300, subtract 0.5 times the voltage u1, add the sum of voltage u2 and voltage u3, multiply by 200, divide by voltage u1, and then add 200 to obtain the modulated wave u. i1 ;

[0041] Modulation wave generation module II generates the original i-phase modulation wave u i Add 300, subtract 0.5 times the voltage u2 and the sum of voltage u3, multiply by 200 and divide by voltage u2 to obtain the modulated wave u. i2 ;

[0042] Modulation wave generation module III generates the original i-phase modulation wave u i Add 300, multiply by 200 and divide by voltage u3, then subtract 300 to obtain the modulation wave u. i3 .

[0043] In some embodiments, the modulation wave selection module includes:

[0044] Comparison signal generation module I, converts the i-phase original modulation wave u i Add 300 and subtract the sum of voltages u2 and u3 to obtain the first comparison signal u. sel_1 ;

[0045] Compare the signal generation module II, which generates the original modulated wave u i Add 300 and subtract voltage u3 to obtain the second comparison signal u. sel_ 2;

[0046] Compare module I, when u sel_1 When >0, the first modulated wave output is u. i1 -200; when u sel_1 <0, the first modulated wave is output as u. i2 ;

[0047] Compare module II, when u sel_2 When >0, the second modulation wave u is output. m * For the first modulated wave; when u sel_2 When <0, the second modulation wave u is output. m * For u i3 Add 200.

[0048] In some embodiments, the drive signal generation module includes:

[0049] Comparison signal generation module I, converts the original i-phase modulation wave u i Add 300 and subtract the sum of voltages u2 and u3 to obtain the first comparison signal u. sel_1 ;

[0050] Compare signal generation module III, subtract u from voltage u3i The sum of 300 and 300 yields the third comparison signal u. sel_3 ;

[0051] Comparison signal generation module IV generates the first comparison signal u sel_1 Comparison with the third signal u sel_3 ANDing yields the fourth comparison signal u sel_4 ;

[0052] Compare module III, when u sel_1 When <0, output S i1 S is low level. i2 It is high level; when u sel_1 When >0, S i1 S i2 For u m * with u c * The value obtained by performing logical operations using ">", when u m * >u c * When, output S i1

[0053] S is a high level. i2 When u is low level m * ≤u c * When, output S i1 S is low level. i2 High level;

[0054] Compare module IV, when u sel_2 When <0, output S i3 S is low level. i4 It is high level; when u sel_2 When >0, S i3 S i4 For u m * with u c * The value obtained by performing logical operations using ">", when u m * >u c * When, output S i3 S is a high level. i4 When u is low level m * ≤u c * When, output S i3 S is low level. i4 High level;

[0055] Compare module V, when u sel_3 When <0, output S i5 S is low level. i6 It is high level; when u sel_3 When >0, S i5 S i6 For u m * with u c * The value obtained by performing logical operations using ">", when u m * >u c * When, output S i5 S is a high level. i6 When u is low level m * ≤u c * When, output S i5 S is low level. i6 It is a high level.

[0056] Compared with the prior art, the advantages and positive effects of the present invention are as follows:

[0057] The present invention provides a single-carrier modulation method and system for a four-level split-output inverter using SiC devices. Based on the voltages of two controlled voltage sources simulating bus changes, the voltage of the DC bus capacitor, and the original carrier, three stacked carriers following the capacitor voltage changes are obtained. A single carrier is obtained based on the controlled voltage sources, the DC bus capacitor voltage, and the three stacked carriers. A modulation wave that changes along with the DC power supply is obtained according to the single carrier generation method. The modulation wave is selected for comparison with the single carrier based on the magnitude comparison of the modulation wave and the single carrier. A drive signal is generated based on the magnitude comparison of the modulation wave and the single carrier. This invention, on the one hand, enables the modulation strategy to still satisfy the impulse equivalence principle under bus voltage fluctuation conditions, thereby outputting a current waveform with good waveform quality; on the other hand, it effectively simplifies the implementation difficulty in digital controllers by using only a single carrier with a fixed amplitude. Attached Figure Description

[0058] Figure 1 This is a circuit diagram of the four-level split-output inverter with SiC device on the fluctuating bus described in an embodiment of the present invention;

[0059] Figure 2 This is a schematic diagram of the single-carrier modulation method for a four-level split-output inverter of SiC devices according to an embodiment of the present invention;

[0060] Figure 3 This is a schematic diagram of the A-phase carrier generation stage according to an embodiment of the present invention;

[0061] Figure 4This is a schematic diagram of the A-phase single-carrier generation stage according to an embodiment of the present invention;

[0062] Figure 5 This is a schematic diagram of the A-phase modulation wave generation stage according to an embodiment of the present invention;

[0063] Figure 6 This is a schematic diagram of the A-phase modulation wave selection stage according to an embodiment of the present invention;

[0064] Figure 7 This is a schematic diagram of the A-phase drive signal generation stage according to an embodiment of the present invention;

[0065] Figure 8 This is a schematic diagram comparing the original modulation wave of phase A and the carrier waveform generated by the carrier generation stage according to an embodiment of the present invention;

[0066] Figure 9 This is a waveform diagram showing the comparison between the modulated wave and the single carrier wave in the driving signal generation step of the present invention.

[0067] Figure 10 This is a block diagram of the single-carrier modulation system structure of the SiC device four-level split output inverter according to an embodiment of the present invention;

[0068] Figure 11 The waveform diagram of the three-phase load side current using the traditional stacked carrier modulation method is shown.

[0069] Figure 12 The diagram shows the three-phase load-side current waveform of the single-carrier modulation method and system for a four-level split-output inverter using SiC devices as described in this embodiment of the invention.

[0070] In the diagram, 1 is the carrier generation module, 2 is the single carrier generation module, 3 is the modulation wave generation module, 4 is the modulation wave selection module, and 5 is the drive signal generation module. Detailed Implementation

[0071] The present invention will now be described in detail with reference to the accompanying drawings through exemplary embodiments. However, it should be understood that, without further description, elements, structures, and features in one embodiment may be advantageously incorporated into other embodiments.

[0072] Figure 1 The main topology circuit of the four-level split-output inverter with SiC device on the fluctuating bus shown is as follows: V dc As a DC voltage source, C dc For DC bus capacitors, A controlled voltage source to simulate bus changes; S A1 S A2 S A3 S A4 S A5S A6 For phase A, SiC MOSFET power switching device, D A1 D A6 For phase A, a SiC Schottky diode, L A1 L A2 For phase A, the isolation inductor; S B1 S B2 S B3 S B4 S B5 S B6 For phase B, there are six SiC MOSFET power switching devices, D B1 D B6 For phase B, SiC Schottky diode, L B1 L B2 For phase B, the isolation inductor; S C1 S C2 S C3 S C4 S C5 S C6 For the C-phase six SiC MOSFET power switching devices, D C1 D C6 For C-phase SiC Schottky diodes, L C1 L C2 For phase C, the isolation inductor; L A L B L C For a three-phase load inductor, R A R B R C This is the resistance of the three-phase load.

[0073] See also Figure 1 Since the three phases ABC of the bridge are completely symmetrical, the connection method of the main circuit will be explained using phase A as an example. DC voltage source V dc To provide the overall voltage to the DC bus, controlled voltage sources simulating bus variations are connected in series from top to bottom on the DC bus. DC bus capacitor C dc Controlled voltage source simulating bus changes and C dc Connect at point O1, C dc and Connect at point O2; Q A1 One end is connected to point P, the positive terminal of the DC bus, and the other end is connected to point D. A6 Through X A1 Point connection, D A6 The other end is connected to the negative terminal N of the DC bus, and point O1 is connected through Q. A2 Q A3 With XA1 Point connection; D A1 One end is connected to the positive terminal P of the DC bus, and the other end is connected to Q. A6 Through X A2 Dot connection, Q A6 The other end is connected to the negative N point of the DC bus, and point O2 is connected through Q. A4 Q A5 With X A2 Point connection; X A1 Point through L A1 With X A3 Connection, X A2 Point through L A2 With X A3 Connection, X A3 Point through L A R A With load neutral point O * Connections. The connection methods for phase B and phase C main circuits are the same as those for phase A, and will not be repeated here.

[0074] For the aforementioned four-level split-output inverter with SiC devices and fluctuating bus voltage, this invention provides a single-carrier modulation method and system for a four-level split-output inverter with SiC devices. The method involves obtaining three stacked carrier waves that follow the capacitor voltage change based on the voltages of two controlled voltage sources simulating bus voltage fluctuations, the DC bus capacitor voltage, and the original carrier wave; obtaining a single carrier wave based on the controlled voltage sources, the DC bus capacitor voltage, and the three stacked carrier waves; obtaining a modulation wave that changes along with the DC power supply based on the single carrier wave generation method; selecting the modulation wave to compare with the single carrier wave based on the magnitude comparison of the modulation wave and the single carrier wave; and generating a drive signal based on the magnitude comparison of the modulation wave and the single carrier wave. This invention, on the one hand, enables the modulation strategy to still satisfy the impulse equivalence principle under bus voltage fluctuation conditions, thereby outputting a current waveform with good waveform quality; on the other hand, it effectively simplifies the implementation difficulty in digital controllers by using only a single carrier wave with a fixed amplitude.

[0075] The following describes in detail the single-carrier modulation method and system for the four-level split-output inverter of SiC device of the present invention with reference to the accompanying drawings and embodiments.

[0076] See Figure 2 The first aspect of this invention provides a single-carrier modulation method for a four-level split-output inverter using SiC devices, the specific steps of which are as follows:

[0077] S1, Carrier Generation Steps: See [link / details] Figure 3 According to the controlled voltage source Voltage u1, DC bus capacitor C dc voltage u2, controlled voltage source Voltage u3, original carrier u cObtain the stacked carrier u that follows the change in capacitor voltage. c1 Based on voltage u2, voltage u3, and the original carrier u c Obtain the stacked carrier u that follows the change in capacitor voltage. c2 Based on voltage u3 and original carrier u c Obtain the stacked carrier u that follows the change in capacitor voltage. c3 .

[0078] Specifically, see [link to relevant documentation] Figure 3 Based on voltage u1, voltage u2, voltage u3, and the original carrier u c Obtain the stacked carrier u c1 The method is as follows: 0.5 times the voltage u1 and the original carrier u c Multiply these values, then add them to 0.5 times voltage u1, voltage u2, and voltage u3, and subtract 300 to obtain the stacked carrier u. c1 .

[0079] Specifically, see [link to relevant documentation] Figure 3 Based on voltage u2, voltage u3, and the original carrier u c Obtain the stacked carrier u c2 The method is as follows: 0.5 times the voltage u2 and the original carrier u c Multiply by the product, then add to 0.5 times voltage u2 and voltage u3, and subtract 300 to obtain the stacked carrier u. c2 .

[0080] Specifically, see [link to relevant documentation] Figure 3 Based on voltage u3 and original carrier u c Obtain the stacked carrier u c3 The method is as follows: voltage u3 and original carrier u c Multiply by 300 and then subtract 300 to get the stacked carrier u. c3 .

[0081] S2, Single-carrier generation steps: See [link / details] Figure 4 Based on voltage u1, voltage u2, voltage u3, and stacked carrier u c1 Obtain the stacked carrier u c1 The corresponding single carrier u c1 * Based on voltage u2, voltage u3, and stacked carrier u c2 Obtain the stacked carrier u c2 The corresponding single carrier u c2 * Based on voltage u3 and stacked carrier u c3 Obtain the stacked carrier u c3 The corresponding single carrier u c3 * ; will single carrier u c1 *Single carrier u c2 * Single carrier u c3 * Add them together and divide by 3 to get the single-carrier u. c * .

[0082] Specifically, see [link to relevant documentation] Figure 4 Based on voltage u1, voltage u2, voltage u3, and stacked carrier u c1 Obtain single carrier u c1 * The method is as follows: stacked carrier u c1 Add 300, subtract 0.5 times voltage u1, the sum of voltage u2 and voltage u3, multiply by 200, divide by voltage u1, and then add 200 to obtain the single-carrier u. c1 * .

[0083] Specifically, see [link to relevant documentation] Figure 4 Based on voltage u2, voltage u3, and stacked carrier u c2 Obtain single carrier u c2 * The method is as follows: stacked carrier u c2 Add 300, subtract 0.5 times the voltage u2 and the sum of voltage u3, multiply by 200 and divide by voltage u2 to obtain single-carrier u. c2 * ;

[0084] Specifically, see [link to relevant documentation] Figure 4 Based on voltage u3 and stacked carrier u c3 Obtain single carrier u c3 * The method is as follows: stacked carrier u c3 Add 300, multiply by 200 and divide by voltage u3, then subtract 300 to get single-carrier u. c3 * .

[0085] S3. Modulation wave generation steps: Based on voltage u1, voltage u2, voltage u3, and the original modulation wave u of phase i. i Obtain the superimposed carrier u c1 Modulated wave u that changes together i1 Based on voltage u2, voltage u3, and the original modulation wave u of phase i i Obtain the superimposed carrier u c2 Modulated wave u that changes together i2 Based on voltage u3 and the original modulation wave u of phase i i Obtain the superimposed carrier u c3 Modulated wave u that changes together i3 , i = A, B, C.

[0086] Specifically, based on voltage u1, voltage u2, voltage u3, and the original modulation wave u of phase i... i The modulated wave u is obtained i1 The method is as follows: The original modulation wave u of phase i... i Add 300, subtract 0.5 times the voltage u1, add the sum of voltage u2 and voltage u3, multiply by 200, divide by voltage u1, and then add 200 to obtain the modulated wave u. i1 .

[0087] Specifically, based on voltage u2, voltage u3, and the original modulation wave u of phase i... i The modulated wave u is obtained i2 The method is as follows: The original modulation wave u of phase i... i Add 300, subtract 0.5 times the voltage u2 and the sum of voltage u3, multiply by 200 and divide by voltage u2 to obtain the modulated wave u. i2 .

[0088] Specifically, based on voltage u3 and the original modulation wave u of phase i... i The modulated wave u is obtained i3 The method is as follows: The original modulation wave u of phase i... i Add 300, multiply by 200 and divide by voltage u3, then subtract 300 to obtain the modulation wave u. i3 .

[0089] S4. Modulation wave selection steps: i-phase original modulation wave u i Add 300 and subtract the sum of voltages u2 and u3 to obtain the first comparison signal u. sel_1 The original modulated wave u i Add 300 and subtract voltage u3 to obtain the second comparison signal u. sel_2 ;u sel_1 If >0, then the first modulated wave is u i1 -200; if u sel_1 If <0, then the first modulated wave is u i2 ; if u sel_2 If >0, then the second modulated wave u m * Equal to the first modulated wave; if u sel_2 If <0, then the second modulated wave u m * For u i3 Add 200. S5. Drive signal generation steps: Voltage u3 minus u a The sum of 300 and 300 yields the third comparison signal u. sel_3 The first comparison signal u sel_1 Comparison with the third signal u sel_3 ANDing yields the fourth comparison signal u sel_4 According to the first comparison signal usel_1 The third comparison signal u sel_3 Fourth comparison signal u sel_4 Single carrier u c * Modulated wave u m * The size generates the i-phase drive signal S i1 -S i6 .

[0090] Specifically, according to the first comparison signal u sel_1 The third comparison signal u sel_3 Fourth comparison signal u sel_4 Single carrier u c * Modulated wave u m * The size generates the i-phase drive signal S i1 -S i6 The method is as follows:

[0091] When u sel_1 When <0, S i1 S is low level. i2 It is high level; when u sel_1 When >0, S i1 S i2 For u m * with u c * The value obtained by performing logical operations using ">", when u m * >u c * At that time, S i1 S is a high level. i2 When u is low level m * ≤u c * At that time, S i1 S is low level. i2 High level;

[0092] When u sel_2 When <0, S i3 S is low level. i4 It is high level; when u sel_2 When >0, S i3 S i4 For u m * with u c * The value obtained by performing logical operations using ">", when u m * >u c* At that time, S i3 S is a high level. i4 When u is low level m * ≤u c * At that time, S i3 S is low level. i4 High level;

[0093] When u sel_3 When <0, S i5 S is low level. i6 It is high level; when u sel_3 When >0, S i5 S i6 For u m * with u c * The value obtained by performing logical operations using ">", when u m * >u c * At that time, S i5 S is a high level. i6 When u is low level m * ≤u c * At that time, S i5 S is low level. i6 It is a high level.

[0094] See also Figure 2 In the principle block diagram of the single-carrier modulation method for a four-level split-output inverter of SiC devices, the A-phase single-carrier modulation includes the A-phase carrier generation stage, the A-phase single-carrier generation stage, the A-phase modulation wave generation stage, the A-phase modulation wave selection stage, and the A-phase drive signal generation stage. A For phase A, the original modulation wave, U c For the original carrier, u c1 u c2 u c3 Three stacked carrier waves follow the changes in capacitor voltage; u c * For single carrier; u A1 For u c1 Modulated waves that change together, u A2 For u c2 Modulated waves that change together, u A3 For u c3 Modulated waves that change together; u m * To be compatible with single carrier u c * Comparison of modulated waves; SA1 S A2 S A3 S A4 S A5 S A6 This is the drive signal for the A-phase power switching device. The following section will elaborate on each of these steps. Figures 3-7 In each of the illustrated steps, a switch is used to determine and select signals. The switch is divided into an input side and an output side. The input side has three signal inputs: terminals "+" and "-" are signal input terminals, terminal 1 is the comparison signal input terminal, and terminal 0 is the signal output terminal. When the signal at comparison signal terminal 1 is greater than 0, terminal 0 outputs the signal received at the "+" terminal; when the comparison signal received at terminal 1 is less than 0, terminal 0 outputs the signal received at the "-" terminal.

[0095] See also Figure 3 In the A-phase carrier generation stage, half of the voltage u1 is first combined with the original carrier u c Multiply these values, then add them to half of voltage u1, voltage u2, and voltage u3, and finally subtract 300 to obtain the carrier wave u that follows the voltage change. c1 Half of voltage u2 is first combined with the original carrier u. c Multiply by this, then add to half of voltage u2 and voltage u3, and finally subtract 300 to obtain the carrier wave u that follows the voltage change. c2 Voltage u3 first interacts with the original carrier u c Multiplying the components and then subtracting 300 yields the carrier wave u that follows the voltage change. c3 .

[0096] See also Figure 4 In the A-phase single-carrier generation stage, carrier u c1 Add 300, subtract 0.5 times u1, the sum of voltage u2 and voltage u3, multiply the resulting value by 200 and divide by voltage u1, then add 200 to obtain the carrier wave u. c1 The corresponding single carrier u c1 * ;Carrier u c2 Add 300, subtract 0.5 times the voltage u2 and the sum of voltage u3, multiply the resulting value by 200 and divide by voltage u2 to get u. c2 The corresponding single carrier u c2 * ;Carrier u c3 Add 300, multiply the resulting value by 200 and divide by the voltage u3, then subtract 300 to obtain the carrier wave u. c3 The corresponding single carrier u c3 * Finally, u c1 * u c2* u c3 * Add and divide by 3 to get single carrier u c * .

[0097] See also Figure 5 Referring to the process of restoring a carrier wave that follows the capacitor voltage change to a single carrier wave, in the A-phase modulation wave generation stage, the original A-phase modulation wave u... A The process of performing the equivalent transformation is as follows. Original modulated wave u A Add 300, subtract 0.5 times voltage u1, the sum of voltage u2 and voltage u3, multiply the resulting value by 200 and divide by voltage u1, then add 200 to obtain the carrier wave u. c1 Modulated wave u that changes together A1 ; original modulated wave u A Add 300, subtract 0.5 times the voltage u2 from the sum of voltage u3 and the sum of the two, multiply the resulting value by 200 and divide by voltage u2 to obtain the carrier wave u. c2 Modulated wave u that changes together A2 ; original modulated wave u A Add 300, multiply the resulting value by 200 and divide by the voltage u3, then subtract 300 to obtain the carrier wave u. c3 Modulated wave u that changes together A3 .

[0098] See also Figure 6 In the A-phase modulation wave selection stage, the original A-phase modulation wave u A Add 300 and subtract the sum of voltages u2 and u3 to obtain the comparison signal u of Switch1. sel_1 ; original modulated wave u A Add 300 and subtract voltage u3 to obtain the comparison signal u of Switch2. sel_2 . If u sel_1 If >0, then the signal output by Switch1 is u A1 -200; if u sel_1 If <0, then the signal output by Switch1 is u A2 . If u sel_2 If >0, then the signal u output by Switch2 m * Equal to the signal output by Switch1; if u sel_2 If <0, then the signal u output by Switch2 m * For u A3 Add 200.

[0099] See also Figure 7 In the A-phase drive signal generation stage, u AAdd 300 and subtract the sum of u2 and u3 to obtain the comparison signal u of Switch3. sel_1 ;u3 minus u A The sum of 300 and 300 yields the comparison signal u for Switch4. sel_3 ;u sel_1 with u sel_3 The comparison signal u of Switch5 is obtained by ANDing. sel_2 Generates phase A drive signal S A1 ~S A6 The process is as follows:

[0100] When u sel_1 When <0, S A1 S is low level. A2 It is high level; when u sel_1 When >0, S A1 S A2 For u m * with u c * The value obtained by performing logical operations using ">", when u m * >u c * At that time, S A1 S is a high level. A2 When u is low level m * ≤u c * At that time, S A1 S is low level. A2 High level;

[0101] When u sel_2 When <0, S A3 S is low level. A4 It is high level; when u sel_2 When >0, S A3 S A4 For u m * with u c * The value obtained by performing logical operations using ">", when u m * >u c * At that time, S A3 S is a high level. A4 When u is low level m * ≤u c * At that time, S A3 S is low level. A4 High level;

[0102] When u sel_3 When <0, S A5 S is low level. A6 It is high level; when u sel_3 When >0, S A5 S A6 For u m * with u c * The value obtained by performing logical operations using ">", when u m * >u c * At that time, S A5 S is a high level. A6 When u is low level m * ≤u c * At that time, S A5 S is low level. A6 It is a high level.

[0103] To more intuitively demonstrate the basic principle of the single-carrier modulation method for a four-level split-output inverter using SiC devices, Figure 8 The waveforms shown are a comparison between the carrier waveform output from the carrier generation step and the original modulated wave of phase A. It can be seen that the original modulated wave of phase A... A For an ideal sine wave, u c1 u c2 u c3 The amplitude of the voltage changes with the capacitor voltage, and the three are stacked and connected. Figure 9 The waveforms of the modulated wave and single carrier wave compared during the drive signal generation step are shown. It can be seen that u c * For a single carrier with a fixed amplitude, u m * It is a modulated wave with varying amplitude, used to generate a drive signal by comparing it with a single carrier wave.

[0104] The above details the A-phase drive signal S. A1 S A2 S A3 S A4 S A5 S A6 The generation process of phase B and phase C is the same, and the generation methods of the driving signals are the same, so they will not be described again here.

[0105] See Figure 10A second aspect of the present invention provides a single-carrier modulation system for a four-level split-output inverter of SiC devices, including a three-phase single-carrier modulation module consisting of an A-phase single-carrier modulation module, a B-phase single-carrier modulation module, and a C-phase single-carrier modulation module. Each phase single-carrier modulation module includes:

[0106] Carrier generation module 1, based on the controlled voltage source Voltage u1, DC bus capacitance C dc voltage u2, controlled voltage source Voltage u3, original carrier u c Obtain the stacked carrier u that follows the change in capacitor voltage. c1 Based on voltage u2, voltage u3, and the original carrier u c Obtain the stacked carrier u that follows the change in capacitor voltage. c2 Based on voltage u3 and original carrier u c Obtain the stacked carrier u that follows the change in capacitor voltage. c3 ;

[0107] Single-carrier generation module 2, based on voltage u1, voltage u2, voltage u3, and stacked carrier u... c1 Obtain the stacked carrier u c1 The corresponding single carrier u c1 * Based on voltage u2, voltage u3, and stacked carrier u c2 Obtain the stacked carrier u c2 The corresponding single carrier u c2 * Based on voltage u3 and stacked carrier u c3 Obtain the stacked carrier u c3 The corresponding single carrier u c3 * ; will single carrier u c1 * Single carrier u c2 * Single carrier u c3 * Add them together and divide by 3 to get the single-carrier u. c * ;

[0108] Modulation wave generation module 3, based on voltage u1, voltage u2, voltage u3, and the original modulation wave u of phase i. i Obtain the superimposed carrier u c1 Modulated wave u that changes together i1 Based on voltage u2, voltage u3, and the original modulation wave u of phase i i Obtain the superimposed carrier u c2 Modulated wave u that changes together i2 Based on voltage u3 and the original modulation wave u of phase ii Obtain the superimposed carrier u c3 Modulated wave u that changes together i3 i = A, B, C;

[0109] Modulation wave selection module 4 selects the original modulation wave u of phase i. i Add 300 and subtract the sum of voltages u2 and u3 to obtain the first comparison signal u. sel_1 The original modulated wave u i Add 300 and subtract voltage u3 to obtain the second comparison signal u. sel_2 ; if u sel_1 If >0, then the first modulated wave is u i1 -200; if u sel_1 If <0, then the first modulated wave is u i2 ; if u sel_2 If >0, then the second modulated wave u m * Equal to the first modulated wave; if u sel_2 If <0, then the second modulated wave u m * For u i3 Add 200;

[0110] Drive signal generation module 5, subtracts u from voltage u3 a The sum of 300 and 300 yields the third comparison signal u. sel_3 The first comparison signal u sel_1 Comparison with the third signal u sel_3 ANDing yields the fourth comparison signal u sel_4 According to the first comparison signal u sel_1 The third comparison signal u sel_3 Fourth comparison signal u sel_4 Single carrier u c * Modulated wave u m * The size generates the i-phase drive signal S i1 -S i6 .

[0111] Specifically, in some embodiments, the carrier generation module includes:

[0112] Carrier generation module I combines 0.5 times the voltage u1 with the original carrier u c Multiply these values, then add them to 0.5 times voltage u1, voltage u2, and voltage u3, and subtract 300 to obtain the stacked carrier u. c1 ;

[0113] Carrier generation module II combines 0.5 times the voltage u2 with the original carrier u. cMultiply by the product, then add to 0.5 times voltage u2 and voltage u3, and subtract 300 to obtain the stacked carrier u. c2 ;

[0114] Carrier generation module III, voltage u3 and original carrier u c Multiply by 300 and then subtract 300 to get the stacked carrier u. c3 Specifically, in some embodiments, the single-carrier generation module includes:

[0115] Single carrier generation module I generates stacked carrier u c1 Add 300, subtract 0.5 times voltage u1, the sum of voltage u2 and voltage u3, multiply by 200, divide by voltage u1, and then add 200 to obtain the single-carrier u. c1 * ;

[0116] Single-carrier generation module II generates stacked carrier u c2 Add 300, subtract 0.5 times the voltage u2 and the sum of voltage u3, multiply by 200 and divide by voltage u2 to obtain single-carrier u. c2 * ;

[0117] Single-carrier generation module III generates stacked carrier u c3 Add 300, multiply by 200 and divide by voltage u3, then subtract 300 to get single-carrier u. c3 * ;

[0118] The single-carrier calculation module calculates the single-carrier u c1 * Single carrier u c2 * Single carrier u c3 * Add them together and divide by 3 to get the single-carrier u. c * .

[0119] Specifically, in some embodiments, the modulation wave generation module includes:

[0120] Modulation wave generation module I generates the original i-phase modulation wave u i Add 300, subtract 0.5 times the voltage u1, add the sum of voltage u2 and voltage u3, multiply by 200, divide by voltage u1, and then add 200 to obtain the modulated wave u. i1 ;

[0121] Modulation wave generation module II generates the original i-phase modulation wave u i Add 300, subtract 0.5 times the voltage u2 and the sum of voltage u3, multiply by 200 and divide by voltage u2 to obtain the modulated wave u. i2 ;

[0122] Modulation wave generation module III generates the original i-phase modulation wave u i Add 300, multiply by 200 and divide by voltage u3, then subtract 300 to obtain the modulation wave u. i3 .

[0123] Specifically, in some embodiments, the modulation wave selection module includes:

[0124] Comparison signal generation module I, converts the original i-phase modulation wave u i Add 300 and subtract the sum of voltages u2 and u3 to obtain the first comparison signal u. sel_1 ;

[0125] Compare the signal generation module II, which generates the original modulated wave u i Add 300 and subtract voltage u3 to obtain the second comparison signal u. se l _ 2;

[0126] Compare module I, when u sel_1 When >0, the first modulated wave output is u. i1 -200; when u sel_1 <0, the first modulated wave is output as u. i2 ;

[0127] Compare module II, when u sel_2 When >0, the second modulation wave u is output. m * For the first modulated wave; when u sel_2 When <0, the second modulation wave u is output. m * For u i3 Add 200.

[0128] Specifically, in some embodiments, the drive signal generation module includes:

[0129] Comparison signal generation module I, converts the original i-phase modulation wave u i Add 300 and subtract the sum of voltages u2 and u3 to obtain the first comparison signal u. sel_1 ;

[0130] Compare signal generation module III, subtract u from voltage u3 i The sum of 300 and 300 yields the third comparison signal u. sel_3 ;

[0131] Comparison signal generation module IV generates the first comparison signal u sel_1 Comparison with the third signal u sel_3 ANDing yields the fourth comparison signal u sel_4 ;

[0132] Compare module III, when u sel_1 When <0, output S i1 S is low level. i2 It is high level; when u sel_1 When >0, S i1 S i2 For u m * with u c * The value obtained by performing logical operations using ">", when u m * >u c * When, output S i1

[0133] S is a high level. i2 When u is low level m * ≤u c * When, output S i1 S is low level. i2 High level;

[0134] Compare module IV, when u sel_2 When <0, output S i3 S is low level. i4 It is high level; when u sel_2 When >0, S i3 S i4 For u m * with u c * The value obtained by performing logical operations using ">", when u m * >u c * When, output S i3 S is a high level. i4 When u is low level m * ≤u c * When, output S i3 S is low level. i4 High level;

[0135] Compare module V, when u sel_3 When <0, output S i5 S is low level. i6 It is high level; when u sel_3 When >0, S i5 S i6 For u m * with u c* The value obtained by performing logical operations using ">", when u m * >u c * When, output S i5 S is a high level. i6 When u is low level m * ≤u c * When, output S i5 S is low level. i6 It is a high level.

[0136] Specifically, in some embodiments, comparison modules I, II, III, IV, and V are compared and judged using a selector switch. The switch is divided into an input side and an output side. On the input side, there are three signal inputs: terminals "+" and "-" are signal input terminals, terminal I is the comparison signal input terminal, and terminal O is the signal output terminal. When the signal at comparison signal terminal I is greater than 0, terminal O outputs the signal received at the "+" terminal; when the comparison signal received at terminal I is less than 0, terminal O outputs the signal received at the "-" terminal.

[0137] To verify the effectiveness of the single-carrier modulation method and system for the four-level split-output inverter of SiC devices described in this invention, simulation verification was performed in MATLAB / Simulink. The DC bus voltage was 600V, simulating a voltage source of DC bus fluctuation. The load resistance is 40Ω and the load inductance is 3mH. In the simulation model, the traditional fixed-layer triangular carrier modulation method and the single-carrier modulation method and system proposed in this invention are used for the four-level split-output inverter of SiC device. Figure 11 The output current using the traditional fixed-layer triangular carrier modulation method is presented. Fourier analysis shows that the THDs of the three-phase currents A, B, and C are 10.44%, 11.43%, and 11.43%, respectively. Figure 12 In the study, the positive limit of the three-phase current waveform is significantly improved after adopting the single-carrier modulation method and system proposed in this invention. Fourier analysis shows that the THD of the three-phase currents A, B, and C are 4.07%, 3.42%, and 3.42%, respectively. (Comparison) Figure 11 and Figure 12 This effectively demonstrates that the present invention has good adaptability to bus voltage fluctuation conditions, enabling the SiC device four-level split output inverter to still output a good current waveform and effectively reduce output current harmonics.

[0138] The above embodiments are used to explain the present invention, but not to limit the present invention. Any modifications and changes made to the present invention within the spirit and scope of the claims shall fall within the protection scope of the present invention.

Claims

1. A single-carrier modulation method for a SiC device four-level split-output inverter, characterized in that, The specific steps are as follows: Carrier generation steps: Based on the controlled voltage source voltage u 1. DC bus capacitor C dc voltage u 2. Controlled voltage source voltage u 3. Original carrier wave u c Obtain the stacked carrier wave that follows the change in capacitor voltage. u c1 According to voltage u 2. Voltage u 3. Original carrier wave u c Obtain the stacked carrier wave that follows the change in capacitor voltage. u c2 According to voltage u 3. Original carrier wave u c Obtain the stacked carrier wave that follows the change in capacitor voltage. u c3 ; Single carrier generation steps: Based on voltage u 1. Voltage u 2. Voltage u 3. Stacked carrier u c1 Obtain stacked carrier u c1 Corresponding single carrier u c1 * According to voltage u 2. Voltage u 3. Stacked carrier u c2 Obtain stacked carrier u c2 Corresponding single carrier u c2 * According to voltage u 3. Stacked carrier u c3 Obtain stacked carrier u c3 Corresponding single carrier u c3 * ; Single carrier u c1 * Single carrier u c2 * Single carrier u c3 * Add them together and divide by 3 to get a single carrier. u c * ; Modulation wave generation steps: Based on voltage u 1. Voltage u 2. Voltage u 3. i-phase original modulation wave u i Obtain and stacked carrier u c1 Modulated waves that change together u i1 According to voltage u 2. Voltage u 3. i-phase original modulation wave u i Obtaining the superimposed carrier u c2 Modulated waves that change together u i2 According to voltage u 3. i-phase original modulation wave u i Obtaining the superimposed carrier u c3 Modulated waves that change together u i3 i = A, B, C; Modulation wave selection steps: i-phase original modulation wave u i Add 300 minus voltage u 2 and voltage u The sum of the three is used to obtain the first comparison signal. u sel_1 Original modulated wave u i Add 300 minus voltage u 3. Obtain the second comparison signal u sel_2 ; u sel_1 If >0, then the first modulated wave is u i1 -200; like u sel_1 If <0, then the first modulated wave is u i2 ; like u sel_2 >0, then the second modulation wave u m * Equal to the first modulated wave; like u sel_2 <0, then the second modulated wave u m * for u i3 Add 200; Drive signal generation steps: voltage u 3 minus u i The sum of 300 yields the third comparison signal. u sel_3 First comparison signal u sel_1 Comparison with the third signal u sel_3 AND operation yields the fourth comparison signal. u sel_4 According to the first comparison signal u sel_1 Third comparison signal u sel_3 Fourth comparison signal u sel_4 Single carrier u c * Modulated wave u m * The size generates the i-phase drive signal S i1 -S i6 ; In the SiC device four-level split-output inverter: DC voltage source V dc To provide the overall voltage to the DC bus, controlled voltage sources simulating bus variations are connected in series from top to bottom along the DC bus. DC bus capacitor C dc Controlled voltage source simulating bus changes ; and DC bus capacitor C dc DC bus capacitor connected to point O1 C dc and Connected at point O2; the ABC three-phase bridge arms are completely symmetrical, and the connection method of phase A bridge arm is: SiC MOSFET power switching device Q A1 One end is connected to the positive terminal P of the DC bus, and the other end is connected to the SiC Schottky diode D. A6 Through X A1 Point connection, SiC Schottky diode D A6 The other end is connected to the negative N point of the DC bus, and point O1 is connected to the SiC MOSFET power switch Q. A2 SiC MOSFET power switching device Q A3 With X A1 Point connection; SiC Schottky diode D A1 One end is connected to the positive terminal P of the DC bus, and the other end is connected to the SiC MOSFET power switch Q. A6 Through X A2 Point connection, SiC MOSFET power switching device Q A6 The other end is connected to the negative N point of the DC bus, and point O2 is connected to the SiC MOSFET power switch Q. A4 SiC MOSFET power switching device Q A5 With X A2 Point connection; X A1 Point through isolation inductor L A1 With X A3 Connection, X A2 Point through isolation inductor L A2 With X A3 Connection, X A3 Point through load inductance L A load resistance R A With load neutral point O * connect.

2. The single-carrier modulation method for a four-level split-output inverter of SiC devices as described in claim 1, characterized in that, In the carrier generation step, stacked carriers are obtained. u c1 Stacked carrier u c2 Stacked carrier u c3 The method is as follows: Voltage u 1 times 0.5 times the original carrier u c Multiply, then multiply by voltage u 0.5 times 1, voltage u 2. Voltage u After adding the three phases, subtracting 300 yields the stacked carrier wave. u c1 ; Voltage u 2 times 0.5 times the original carrier u c Multiply, then multiply by voltage u 0.5 times 2, voltage u After adding the three phases, subtracting 300 yields the stacked carrier wave. u c2 ; Voltage u 3 with the original carrier u c Multiply by 300 and then subtract 300 to obtain the stacked carrier wave. u c3 .

3. The single-carrier modulation method for a four-level split-output inverter of SiC devices as described in claim 1, characterized in that, In the single-carrier generation step, a single carrier is obtained. u c1 * Single carrier u c2 * Single carrier u c3 * The method is as follows: stacked carrier u c1 Add 300 minus voltage u 0.5 times 1, voltage u 2. Voltage u The sum of the three phases is multiplied by 200 and divided by the voltage. u 1, then add 200 to get a single carrier. u c1 * ; stacked carrier u c2 Add 300 minus voltage u 0.5 times 2 and voltage u The sum of the three phases is multiplied by 200 and divided by the voltage. u 2. Obtain a single carrier u c2 * ; stacked carrier u c3 Add 300, multiply by 200, and divide by the voltage. u 3. Subtract 300 to get a single carrier. u c3 * .

4. The single-carrier modulation method for a four-level split-output inverter of SiC devices as described in claim 1, characterized in that, In the modulation wave generation step, a modulation wave is obtained. u i1 Modulated wave u i2 Modulated wave u i3 The method is as follows: The original modulation wave of phase i u i Add 300 minus voltage u 0.5 times 1, voltage u 2. Voltage u The sum of the three phases, multiplied by 200, and divided by the voltage. u 1. Add 200 to get the modulated wave. u i1 ; The original modulation wave of phase i u i Add 300 minus voltage u 0.5 times 2 and voltage u The sum of the three phases is multiplied by 200 and divided by the voltage. u 2. Obtain the modulated wave u i2 ; The original modulation wave of phase i u i Add 300, multiply by 200, and divide by the voltage. u 3. Subtract 300 to obtain the modulated wave. u i3 .

5. The single-carrier modulation method for a four-level split-output inverter of SiC devices as described in claim 4, characterized in that, In the drive signal generation step, based on the first comparison signal u sel_1 Third comparison signal u sel_3 Fourth comparison signal u sel_4 Single carrier u c * Modulated wave u m * The size generates the i-phase drive signal S i1 -S i6 The method is as follows: when u sel_1 When <0, S i1 Low level, S i2 High level; when u sel_1 When >0, S i1 , S i2 for u m * and u c * The value obtained by performing a logical operation using ">", when u m * > u c * hour, S i1 High level S i2 When it is low level, u m * ≤ u c * hour, S i1 Low level, S i2 High level; when u sel_2 When <0, S i3 Low level, S i4 High level; when u sel_2 When >0, S i3 , S i4 for u m * and u c * The value obtained by performing a logical operation using ">", when u m * > u c * hour, S i3 High level S i4 When it is low level, u m * ≤ u c * hour, S i3 Low level, S i4 High level; when u sel_3 When <0, S i5 Low level, S i6 High level; when u sel_3 When >0, S i5 , S i6 for u m * and u c * The value obtained by performing a logical operation using ">", when u m * > u c * hour, S i5 High level S i6 When it is low level, u m * ≤ u c * hour, S i5 Low level, S i6 It is a high level.

6. A single-carrier modulation system for a SiC device four-level split-output inverter, used to implement the single-carrier modulation method for a SiC device four-level split-output inverter as described in any one of claims 1 to 5, characterized in that, include: The carrier generation module, based on the controlled voltage source voltage u 1. DC bus capacitor C dc voltage u 2. Controlled voltage source voltage u 3. Original carrier wave u c Obtain the stacked carrier wave that follows the change in capacitor voltage. u c1 According to voltage u 2. Voltage u 3. Original carrier wave u c Obtain the stacked carrier wave that follows the change in capacitor voltage. u c2 According to voltage u 3. Original carrier wave u c Obtain the stacked carrier wave that follows the change in capacitor voltage. u c3 ; The single-carrier generation module, based on voltage u 1. Voltage u 2. Voltage u 3. Stacked carrier u c1 Obtain stacked carrier u c1 Corresponding single carrier u c1 * According to voltage u 2. Voltage u 3. Stacked carrier u c2 Obtain stacked carrier u c2 Corresponding single carrier u c2 * According to voltage u 3. Stacked carrier u c3 Obtain stacked carrier u c3 Corresponding single carrier u c3 * ; Single carrier u c1 * Single carrier u c2 * Single carrier u c3 * Add them together and divide by 3 to get a single carrier. u c * ; The modulation wave generation module, based on voltage u 1. Voltage u 2. Voltage u 3. i-phase original modulation wave u i Obtaining the superimposed carrier u c1 Modulated waves that change together u i1 According to voltage u 2. Voltage u 3. i-phase original modulation wave u i Obtaining the superimposed carrier u c2 Modulated waves that change together u i2 According to voltage u 3. i-phase original modulation wave u i Obtaining the superimposed carrier u c3 Modulated waves that change together u i3 i = A, B, C; The modulation wave selection module selects the original modulation wave of phase i. u i Add 300 minus voltage u 2 and voltage u The sum of the three is used to obtain the first comparison signal. u sel_1 The original modulated wave u i Add 300 minus voltage u 3. Obtain the second comparison signal u sel_2 ; like u sel_1 If >0, then the first modulated wave is u i1 -200; like u sel_1 If <0, then the first modulated wave is u i2 ; like u sel_2 >0, then the second modulation wave u m * Equal to the first modulated wave; like u sel_2 <0, then the second modulated wave u m * for u i3 Add 200; The drive signal generation module converts the voltage u 3 minus u i The sum of 300 yields the third comparison signal. u sel_3 The first comparison signal u sel_1 Comparison with the third signal u sel_3 AND operation yields the fourth comparison signal. u sel_4 According to the first comparison signal u sel_1 Third comparison signal u sel_3 Fourth comparison signal u sel_4 Single carrier u c * Modulated wave u m * The size generates the i-phase drive signal S i1 -S i6 .

7. The single-carrier modulation system for a SiC device four-level split-output inverter as described in claim 6, characterized in that, The carrier generation module includes: Carrier generation module I converts voltage u 1 times 0.5 times the original carrier u c Multiply, then multiply by voltage u 0.5 times 1, voltage u 2. Voltage u After adding the three phases, subtracting 300 yields the stacked carrier wave. u c1 ; Carrier generation module II converts the voltage u 2 times 0.5 times the original carrier u c Multiply, then multiply by voltage u 0.5 times 2, voltage u After adding the three phases, subtracting 300 yields the stacked carrier wave. u c2 ; Carrier generation module III, voltage u 3 with the original carrier u c Multiply by 300 and then subtract 300 to obtain the stacked carrier wave. u c3 ; The single-carrier generation module includes: Single carrier generation module I generates stacked carriers. u c1 Add 300 minus voltage u 0.5 times 1, voltage u 2. Voltage u The sum of the three phases is multiplied by 200 and divided by the voltage. u 1, then add 200 to get a single carrier. u c1 * ; Single-carrier generation module II generates stacked carriers. u c2 Add 300 minus voltage u 0.5 times 2 and voltage u The sum of the three phases is multiplied by 200 and divided by the voltage. u 2. Obtain a single carrier u c2 * ; Single carrier generation module III generates stacked carriers. u c3 Add 300, multiply by 200, and divide by the voltage. u 3. Subtract 300 to get a single carrier. u c3 * ; The single-carrier calculation module will calculate the single carrier. u c1 * Single carrier u c2 * Single carrier u c3 * Add them together and divide by 3 to get a single carrier. u c * .

8. The single-carrier modulation system for a SiC device four-level split-output inverter as described in claim 6, characterized in that, The modulation wave generation module includes: Modulation wave generation module I generates the original i-phase modulation wave. u i Add 300 minus voltage u 0.5 times 1, voltage u 2. Voltage u The sum of the three phases, multiplied by 200, and divided by the voltage. u 1. Add 200 to get the modulated wave. u i1 ; Modulation wave generation module II generates the original modulation wave of phase i. u i Add 300 minus voltage u 0.5 times 2 and voltage u The sum of the three phases is multiplied by 200 and divided by the voltage. u 2. Obtain the modulated wave u i2 ; Modulation wave generation module III generates the original modulation wave of phase i. u i Add 300, multiply by 200, and divide by the voltage. u 3. Subtract 300 to obtain the modulated wave. u i3 .

9. The single-carrier modulation system of the SiC device four-level split-output inverter as described in claim 6, characterized in that, The modulation wave selection module includes: Comparison signal generation module I, converts the original i-phase modulation wave u i Add 300 minus voltage u 2 and voltage u The sum of the three is used to obtain the first comparison signal. u sel_1 ; Compare signal generation module II, which converts the original modulated wave u i Add 300 minus voltage u 3. Obtain the second comparison signal u sel_2 ; Compare Module I, when u sel_1 When >0, the first modulated wave is output as u i1 -200; when u sel_1 <0, the first modulated wave is output as u i2 ; Compare Module II, when u sel_2 When >0, output the second modulation wave. u m * For the first modulated wave; when u sel_2 When <0, output the second modulation wave. u m * for u i3 Add 200.

10. The single-carrier modulation system of the SiC device four-level split-output inverter as described in claim 6, characterized in that, The drive signal generation module includes: Comparison signal generation module I, converts the original i-phase modulation wave u i Add 300 minus voltage u 2 and voltage u The sum of the three is used to obtain the first comparison signal. u sel_1 ; Comparison signal generation module III, converts the voltage u 3 minus u i The sum of 300 yields the third comparison signal. u sel_3 ; Comparison signal generation module IV generates the first comparison signal. u sel_1 Comparison with the third signal u sel_3 AND operation yields the fourth comparison signal. u sel_4 ; Compare Module III, when u sel_1 When <0, output S i1 Low level, S i2 High level; when u sel_1 When >0, S i1 , S i2 for u m * and u c * The value obtained by performing a logical operation using ">", when u m * > u c * When, output S i1 High level S i2 When it is low level, u m * ≤ u c * When, output S i1 Low level, S i2 High level; Compare module IV, when u sel_2 When <0, output S i3 Low level, S i4 High level; when u sel_2 When >0, S i3 , S i4 for u m * and u c * The value obtained by performing a logical operation using ">", when u m * > u c * When, output S i3 High level S i4 When it is low level, u m * ≤ u c * When, output S i3 Low level, S i4 High level; Compare module V, when u sel_3 When <0, output S i5 Low level, S i6 High level; when u sel_3 When >0, S i5 , S i6 for u m * and u c * The value obtained by performing a logical operation using ">", when u m * > u c * When, output S i5 High level S i6 When it is low level, u m * ≤ u c * When, output S i5 Low level, S i6 It is a high level.

Citation Information

Patent Citations

  • Modulation wave superposition direct current bias modulation method for asymmetric split bus four-level inverter

    CN114726243A

  • KR20230032481A