A fast phase-locked loop method and system based on zero crossings

Abstract

This invention relates to a fast phase-locked loop (PLL) method and system based on zero-crossing, belonging to the field of PLL technology. It solves the problem that existing PLLs require adjustment of PID parameters and are not universally applicable. The method includes initializing the sine function table and step size calculation table upon power-on, setting the count value, decimal step size, and PLL value to zero. Upon periodic interruption, the following steps are executed: when the target waveform amplitude is not greater than a threshold, the current decimal step size and integer step size are cleared to zero; when the target waveform amplitude is greater than the threshold, it is determined whether the target waveform has crossed the zero point normally based on the current count value. If it has crossed the zero point normally, the current decimal step size and integer step size are obtained based on the current PLL value and / or the step size calculation table; otherwise, the current decimal step size is updated after obtaining the integer step size from the current decimal step size; the phase-locked loop step size to be accumulated is obtained from the sum of the fixed step size and the integer step size and accumulated to the current PLL value; the sine function value is obtained from the accumulated current PLL value and the sine function table. This achieves fast and universal PLL.

Description

Technical Field

[0001] This invention relates to the field of phase-locked loop (PLL) technology, and in particular to a fast PLL method and system based on zero-crossing points. Background Technology

[0002] Accurately obtaining the phase angle and frequency of the fundamental voltage of the power grid is of great significance in power electronic devices such as frequency converters and active filters.

[0003] In existing technologies, phase-locked loops (PLLs) are commonly used. The general approach involves zero-crossing detection or transforming the signal into the DQ coordinate system to achieve phase locking. Zero-crossing PLL is simple in principle and easy to implement, and remains a widely used PLL technology in engineering practice. The DQ PLL offers strong real-time performance and does not require zero-crossing comparisons, but it requires complex coordinate transformations and extensive mathematical calculations. When the power grid experiences distortion or imbalance, its speed and accuracy are affected, and this method is not suitable for single-phase power grid PLLs.

[0004] Both of the above phase-locked loop (PLL) methods generally use PID controllers for closed-loop regulation. Therefore, when used in different systems, the PID parameters need to be readjusted. The quality of parameter tuning directly affects the effectiveness of the PLL, but parameter tuning requires a lot of experience, which affects the versatility and convenience of the algorithm. Summary of the Invention

[0005] Based on the above analysis, the embodiments of the present invention aim to provide a fast phase-locked loop method and system based on zero crossings, in order to solve the problem that existing phase-locked loops require adjustment of PID parameters and are not universal.

[0006] On one hand, embodiments of the present invention provide a fast phase-locked loop method based on zero crossings, comprising the following steps:

[0007] Each time power is applied, the sine function table and step size calculation table are initialized, and the count value, decimal step size, and phase-locked value are set to zero;

[0008] The following steps are executed whenever the PWM wave cycle is interrupted:

[0009] When the target waveform amplitude is not greater than the threshold, the current fractional step and integer step are cleared to zero; when the target waveform amplitude is greater than the threshold, it is determined whether the target waveform has crossed the zero point normally based on the current count value. If the target waveform has crossed the zero point normally, the current fractional step and integer step are obtained according to the current phase-locked loop value and / or step calculation table; otherwise, the current fractional step is updated after obtaining the integer step directly from the current fractional step.

[0010] The phase-locked loop step size to be accumulated is obtained by summing the fixed step size and the integer step size, and then accumulated to the current phase-locked value; the sine function value is obtained based on the accumulated current phase-locked value and the sine function table; and a PWM wave is generated based on the sine function value.

[0011] Based on a further improvement to the above method, the current fractional step size and integer step size are obtained according to the current phase-locked loop value and / or step size calculation table, including:

[0012] Determine whether the current phase-locked value exceeds the phase-locked error range. If it does not exceed the range, the phase-locking is successful, and the current fractional step and integer step are cleared to zero. If it exceeds the range, obtain the fractional step to be accumulated based on the current phase-locked value and step calculation table, and accumulate it to the current fractional step. After obtaining the integer step based on the current fractional step, update the current fractional step.

[0013] Based on a further improvement of the above method, the sine function table is a one-dimensional array with n elements. The sine function value is obtained by using the current phase-locked loop value as the index of the sine function table. The sine function table is initialized using the following formula:

[0014] mySin[i]=sin(2.0×π×i / n)

[0015] Where n is the number of elements in the sine function table, mySin[i] is the i-th sine function value in the sine function table, and i is an integer between [0, n).

[0016] Based on a further improvement of the above method, the step size calculation table is a one-dimensional array with m elements, and is initialized using the following formula:

[0017] stepCoeff[k]=1.0 / [(k+1)×n / m]

[0018] Where n is the number of elements in the sine function table, m is the number of elements in the step calculation table, stepCoeff[k] is the k-th step calculation coefficient in the step calculation table, and k is an integer between [0, m).

[0019] Further improvements to the above method include determining whether the target waveform has crossed zero normally based on the current count value, including:

[0020] The current count value is incremented by 1;

[0021] When the target waveform crosses zero, it is determined whether the current count value is within the set range. If it is within the set range, the target waveform has crossed zero normally, and the current count value is cleared to zero; otherwise, the target waveform has crossed zero abnormally.

[0022] The set range is calculated based on the periodic interruption frequency, the fundamental frequency of the target waveform, and its preset fluctuation ratio.

[0023] Based on further improvements to the above method, the zero-crossing point includes positive and negative zero-crossing points; according to the current phase-locked loop value and step size calculation table, the fractional step size to be accumulated is obtained, including:

[0024] When the target waveform is a positive zero-crossing point, determine whether the current phase-locked value is greater than n / 2. If it is, subtract n from the current phase-locked value to obtain the first phase-locked value. Otherwise, assign the current phase-locked value to the first phase-locked value. When the target waveform is a negative zero-crossing point, subtract n / 2 from the current phase-locked value to obtain the first phase-locked value.

[0025] Multiply the first phase-locked value by the first element of the step length calculation table, and take the integer part of the absolute value as the step length element index; based on the step length calculation table, obtain the step length calculation coefficient according to the step length element index; multiply the first phase-locked value by the step length calculation coefficient to obtain the decimal step length to be accumulated.

[0026] Further improvements to the above method, including updating the current fractional step size after obtaining the integer step size from the current fractional step size, include:

[0027] Take the integer part of the current decimal step as the integer step;

[0028] Update the value obtained by subtracting the integer step size from the current decimal step size to the current decimal step size.

[0029] Based on a further improvement of the above method, the fixed step size is determined according to the periodic interrupt frequency f. T The fundamental frequency f of the target waveform B The number of elements n in the sine function table is calculated using the following formula:

[0030] stepFixed = n / (f T / f B ).

[0031] Based on the further improvement of the above method, the current phase-locked value is an integer between [0, n), corresponding to the phase-locked angle between [0, 360°); when the accumulated current phase-locked value exceeds n, it is reset to zero.

[0032] On the other hand, embodiments of the present invention provide a fast phase-locked loop system based on zero crossings, comprising: an initialization unit and a phase-locked loop unit, wherein,

[0033] The initialization unit is used to initialize the sine function table and step calculation table each time power is applied, and to set the count value, decimal step size and phase-locked value to zero.

[0034] The phase-locked unit (PLU), including a zero-crossing detection module, a fractional step acquisition module, and a sine function value acquisition module, performs the following steps whenever the PWM wave cycle is interrupted: When the target waveform amplitude is not greater than a threshold, the current fractional and integer step sizes are cleared to zero; when the target waveform amplitude is greater than the threshold, the zero-crossing detection module determines whether the target waveform has crossed zero normally based on the current count value. If the target waveform has crossed zero normally, the fractional step module obtains the current fractional and integer step sizes based on the current PLL value and / or a step size calculation table; otherwise, the fractional step module directly obtains the integer step size based on the current fractional step size and updates the current fractional step size. The sine function value acquisition module obtains the PLL step size to be accumulated based on the sum of the fixed step size and the integer step size, and accumulates it to the current PLL value; it obtains the sine function value based on the accumulated current PLL value and the sine function table; and it generates a PWM wave based on the sine function value.

[0035] Compared with the prior art, the present invention can achieve at least one of the following beneficial effects:

[0036] 1. By detecting the zero-crossing point of the waveform (including positive and negative directions) and using a lookup table method instead of PID control to achieve phase locking, the phase locking method in this invention can control the phase locking speed, eliminating the tedious process of adjusting PID control parameters and improving the speed, versatility and convenience of phase locking.

[0037] 2. Only the zero-crossing information of the target waveform is used in the phase-locking process, supporting phase-locking of single-phase and multi-phase waveforms. At the same time, the judgment of abnormal zero-crossing points is added, which enhances the anti-interference capability.

[0038] In this invention, the above-described technical solutions can be combined with each other to achieve more preferred combinations. Other features and advantages of this invention will be set forth in the following description, and some advantages may become apparent from the description or be learned by practicing the invention. The objects and other advantages of this invention can be realized and obtained from what is particularly pointed out in the description and drawings. Attached Figure Description

[0039] The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Throughout the drawings, the same reference numerals denote the same parts.

[0040] Figure 1 This is a flowchart of a fast phase-locked loop method based on zero crossings in Embodiment 1 of the present invention;

[0041] Figure 2 This is a flowchart of the phase-locked loop process executed during a periodic interruption in Embodiment 1 of the present invention;

[0042] Figure 3This is a flowchart illustrating the process of determining whether the target waveform has crossed zero normally in Embodiment 1 of the present invention;

[0043] Figure 4 This is a flowchart of the calculation of the decimal step size to be accumulated in Embodiment 1 of the present invention. Detailed Implementation

[0044] Preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings, which form part of this application and are used together with the embodiments of the present invention to illustrate the principles of the present invention, but are not intended to limit the scope of the present invention.

[0045] Example 1

[0046] A specific embodiment of the present invention discloses a fast phase-locked loop method based on zero crossings, such as... Figure 1 As shown, it includes the following steps:

[0047] S1: Initialize the sine function table and step size calculation table each time power is applied, and set the count value, decimal step size and phase-locked value to zero.

[0048] It should be noted that this embodiment achieves phase-locked loop by detecting the zero-crossing information of the target waveform and using a lookup table. Therefore, whenever the controller is powered on, the global information stored in the controller memory is initialized, including: initializing the sine function table and the step size calculation table, and setting the count value, decimal step size and phase-locked loop value to zero.

[0049] Specifically, ① the sine function table is a one-dimensional array with n elements. The sine function value is obtained by using the current phase-locked loop value as the index of the sine function table. The sine function table is initialized using the following formula:

[0050] nySin[i]=sin(2.0×π×i / n) Formula (1)

[0051] Where n is the number of elements in the sine function table, mySin[i] is the i-th sine function value in the sine function table, and i is an integer between [0, n).

[0052] For example, during initialization, when n = 1000, i takes an integer between [0, 1000), that is, 1000 integer values ​​from 0 to 999. The values ​​of n and i are substituted into the formula to obtain 1000 sine values, which are stored in the array corresponding to the sine function table. For example, when i = 0, mySin[0] = sin0 = 0; when i = 1, mySin[1] = sin(2.0 × π × 1 / 1000) = 0.00010966227;

[0053] It should be noted that the phase-locked loop (PLL) precision is 360° / n; when n = 1000, the PLL precision is 0.36°. Based on the PLL precision, the integer PLL values ​​correspond to the PLL angles between [0, 360°).

[0054] ② The step size calculation table is a one-dimensional array with m elements. Initialize the step size calculation table using the following formula:

[0055] stepCoeff[k]=1.0 / [(k+1)×n / m] Formula (2)

[0056] Where n is the number of elements in the sine function table, m is the number of elements in the step calculation table, stepCoeff[k] is the k-th step calculation coefficient in the step calculation table, k is an integer between [0, m), and the angle corresponding to the k-th element is: 1.0 / ((k+1)×360° / m).

[0057] For example, when n=1000 and m=5, the initial step size calculation table is stepCoeff[]={0.005,0.0025,0.00167,0.00125,0.001}.

[0058] ③ The count value, fractional step size, and phase-locked value are used as global variables. During the phase-locking process of each cycle interruption, the current count value, current fractional step size, and current phase-locked value are taken as the latest values ​​of each global variable, and their respective accumulation or clearing operations are performed based on the zero-crossing information obtained in the current cycle interruption.

[0059] S2: Whenever the PWM wave cycle is interrupted, execute the following steps, such as... Figure 2 As shown:

[0060] S21: When the target waveform amplitude is not greater than the threshold, the current fractional step and integer step are cleared to zero; when the target waveform amplitude is greater than the threshold, it is determined whether the target waveform has crossed the zero point normally based on the current count value. If the target waveform has crossed the zero point normally, the current fractional step and integer step are obtained according to the current phase-locked value and / or step calculation table; otherwise, the current fractional step is updated after obtaining the integer step directly from the current fractional step.

[0061] It should be noted that when the target waveform amplitude is less than or equal to the threshold, the determination of the zero-crossing point will be inaccurate, affecting the phase-locked loop accuracy. Therefore, when the target waveform amplitude is not greater than the threshold, the current fractional step and integer step are cleared to zero.

[0062] For example, when the target waveform is the mains voltage, the threshold is set to 10V.

[0063] When the target waveform amplitude is greater than the threshold, determine whether the target waveform has crossed zero normally based on the current count value, such as... Figure 3As shown, it includes the following steps:

[0064] The current count value c is incremented by 1;

[0065] When the target waveform crosses zero, determine whether the current count value is within the set range [C]. L C U If the target waveform is within the set range, it is a normal zero-crossing point, and the current count value is cleared to zero; otherwise, the target waveform is an abnormal zero-crossing point.

[0066] It should be noted that the target waveform zero-crossing points include positive zero-crossing points from negative to positive values ​​and negative zero-crossing points from positive to negative values. The phase-locked angle is set to 0° when the positive zero-crossing point is set to 180° when the negative zero-crossing point is set to 180°.

[0067] For example, if it is found that the values ​​of 5 consecutive points of the target waveform are all greater than zero, and then it is found that the values ​​of 5 consecutive points are all less than zero, then it is judged as a negative zero crossing point; conversely, if it is found that the values ​​of 5 consecutive points of the target waveform are all less than zero, and then it is found that the values ​​of 5 consecutive points are all greater than zero, then it is judged as a positive zero crossing point.

[0068] Further, it is determined whether the current count value is within the set range, wherein the set range is calculated based on the periodic interruption frequency, the fundamental frequency of the target waveform, and its preset fluctuation ratio.

[0069] Specifically, the periodic interrupt frequency f T Divide by the fundamental frequency f of the target waveform B The counting standard value is obtained. The counting standard value is multiplied by the preset fluctuation ratio to obtain the fluctuation value. The fluctuation value is added or subtracted from the counting standard value to obtain the set range.

[0070] For example, when the periodic interrupt frequency is 10kHz, the target waveform is the mains voltage, and the fundamental frequency of the target waveform is 50Hz, then the standard counting value is 10kHz / 50Hz = 200; when the preset fluctuation ratio of the fundamental frequency of the target waveform is 2%, the fluctuation value is 200 × 2% = 4. Based on the standard counting value, the fluctuation value is added to or subtracted to obtain the set range [C]. L C U [200-4, 200+4].

[0071] If the current count value is within the set range, the target waveform is at a normal zero-crossing point, and the current count value is reset to zero; otherwise, the target waveform is at an abnormal zero-crossing point. This embodiment adds the judgment of abnormal zero-crossing points, enhancing the anti-interference capability.

[0072] Next, (1) if the target waveform passes through the zero point normally, obtain the current fractional step and integer step according to the current phase-locked value and / or step calculation table; (2) otherwise, directly obtain the integer step according to the current fractional step and update the current fractional step.

[0073] Specifically, in (1), the current fractional step size and integer step size are obtained based on the current phase-locked loop value and / or step size calculation table, including:

[0074] Determine whether the current phase-locked value exceeds the phase-locked error range. If it does not exceed the range, the phase-locking is successful, and the current fractional step and integer step are cleared to zero. If it exceeds the range, obtain the fractional step to be accumulated based on the current phase-locked value and step calculation table, and accumulate it to the current fractional step. After obtaining the integer step based on the current fractional step, update the current fractional step.

[0075] It should be noted that the phase-locked loop (PLL) error range is set according to the PLL accuracy. For example, when the PLL accuracy is 0.36°, the PLL error range is set to [-3×0.36°, 3×0.36°].

[0076] Based on the current phase-locked loop value and the step size calculation table, the decimal step size to be accumulated is obtained, such as... Figure 4 As shown, it includes the following steps:

[0077] When the target waveform is a positive zero-crossing point, determine whether the current phase-locked value is greater than n / 2. If it is, subtract n from the current phase-locked value to obtain the first phase-locked value. Otherwise, assign the current phase-locked value to the first phase-locked value. When the target waveform is a negative zero-crossing point, subtract n / 2 from the current phase-locked value to obtain the first phase-locked value.

[0078] After multiplying the first phase-locked value by the first element value stepCoeff[0] of the step length calculation table, take the integer part of the absolute value as the step length element index k; based on the step length calculation table, obtain the step length calculation coefficient stepCoeff[k] according to the step length element index k; multiply the first phase-locked value by the step length calculation coefficient to obtain the decimal step length to be accumulated.

[0079] For example, the number of elements in the sine function table is set to n = 1000, and the number of elements in the step size calculation table is set to m = 5. When the target waveform is a positive zero-crossing point and the current phase-locked value is greater than n / 2, the current phase-locked value is subtracted from n, and the range of the first phase-locked value is an integer between -n / 2 and n / 2, i.e. [-500, 500], corresponding to a phase-locked angle of [-180°, 180°]. The first element stepCoeff[0] in the step size calculation table is initialized to 1.0 / (1000 / 5), and the corresponding angle is 1.0 / (360° / 5). At this time, the first phase-locked value is multiplied by the first element value of the step size calculation table and the integer part of the absolute value is taken. This is equivalent to dividing the phase-locked angle corresponding to the first phase-locked value by (360° / 5) and taking the integer part of the absolute value, which is to calculate how many 72° are in the phase-locked angle corresponding to the first phase-locked value. If the absolute value of the corresponding phase-locked angle is less than 72°, the integer part obtained is 0, then the fractional step to be accumulated = first phase-locked value × stepCoeff[0] = first phase-locked value / 200.

[0080] Accumulate the decimal step size to be accumulated to the current decimal step size. After obtaining the integer step size based on the current decimal step size, update the current decimal step size, including:

[0081] Take the integer part of the current decimal step as the integer step;

[0082] Update the value obtained by subtracting the integer step size from the current decimal step size to the current decimal step size.

[0083] It should be noted that the integer step size is obtained by accumulating the fractional step size at each cycle interruption. The integer part of the accumulated fractional step size (i.e., the value after adding the current fractional step size and the fractional step size to be accumulated) is taken as the integer step size. This integer part is then subtracted from the accumulated value, and the remaining accumulated value continues to be accumulated using the fractional step size. If the absolute value of the accumulated fractional step size is less than 1, the integer part is 0.

[0084] For example, when calculating the integer step size, if the current decimal step size is -1.6 and the integer part is -1, then the integer step size is -1 and the current decimal step size is updated to -0.6; if the current decimal step size is 3.2 and the integer part is 3, then the integer step size is 3 and the current decimal step size is updated to 0.2.

[0085] In (2), there is no need to obtain the step size to be accumulated. Instead, the integer step size is obtained directly from the decimal step size in the global variable (i.e., the current decimal step size), and then the current decimal step size is updated.

[0086] S22: Obtain the phase-locked loop step size to be accumulated based on the sum of the fixed step size and the integer step size, and accumulate it to the current phase-locked value; obtain the sine function value based on the current phase-locked value after accumulation and the sine function table; generate a PWM wave based on the sine function value.

[0087] It should be noted that the fixed step size is based on the periodic interrupt frequency f. T The fundamental frequency f of the target waveform B The number of elements n in the sine function table is calculated using the following formula:

[0088] stepFixed = n / (f T / f B ) Formula (3)

[0089] The integer step size can be a positive integer, a negative integer, or zero. When the integer step size is zero, the phase-locked value will continuously accumulate in a fixed step size (e.g., 5). When it accumulates to n, it is reset to zero. That is, the phase-locked value changes uniformly between 0 and n (corresponding to the phase-locked angle between 0° and 360°). When the integer step size is not zero, the integer step size is added to the fixed step size to obtain the phase-locked step size to be accumulated, and then added to the current phase-locked value to obtain the accumulated phase-locked value. At this time, the change of the phase-locked value is no longer uniform due to the addition of the integer step size. This non-uniform change is the phase-locking process.

[0090] Based on the sine function table, the sine function value is obtained by indexing the current phase-locked value after accumulation. This sine function value can be used by the vector control algorithm (FOC) to generate PWM waves, thereby controlling the inverter and completing a phase-locked process with a periodic interruption.

[0091] Compared with existing technologies, this embodiment provides a fast phase-locked loop (PLL) method based on zero-crossing points. During the phase-locking process, it only uses the zero-crossing information of the target waveform, supports phase-locking of single-phase and multi-phase waveforms, and adds the judgment of abnormal zero-crossing points, enhancing anti-interference capabilities. By detecting the zero-crossing points of the waveform (including positive and negative), and using a lookup table method instead of PID control to achieve phase-locking, the PLL method in this invention can control the speed of phase-locking, eliminating the cumbersome process of adjusting PID control parameters, and improving the speed, versatility, and convenience of phase-locking.

[0092] Example 2

[0093] Another embodiment of the present invention discloses a fast phase-locked loop system based on zero-crossing points, thereby implementing the phase-locked loop method in Embodiment 1. The specific implementation of each module is described in the corresponding description in Embodiment 1. The system includes: an initialization unit and a phase-locked loop unit, wherein...

[0094] The initialization unit is used to initialize the sine function table and step calculation table each time power is applied, and to set the count value, decimal step size and phase-locked value to zero.

[0095] The phase-locked unit (PLU), including a zero-crossing detection module, a fractional step acquisition module, and a sine function value acquisition module, performs the following steps whenever the PWM wave cycle is interrupted: When the target waveform amplitude is not greater than a threshold, the current fractional and integer step sizes are cleared to zero; when the target waveform amplitude is greater than the threshold, the zero-crossing detection module determines whether the target waveform has crossed zero normally based on the current count value. If the target waveform has crossed zero normally, the fractional step module obtains the current fractional and integer step sizes based on the current PLL value and / or a step size calculation table; otherwise, the fractional step module directly obtains the integer step size based on the current fractional step size and updates the current fractional step size. The sine function value acquisition module obtains the PLL step size to be accumulated based on the sum of the fixed step size and the integer step size, and accumulates it to the current PLL value; it obtains the sine function value based on the accumulated current PLL value and the sine function table; and it generates a PWM wave based on the sine function value.

[0096] Since the fast phase-locked loop system based on zero-crossing points disclosed in this embodiment can be mutually referenced with the aforementioned fast phase-locked loop method based on zero-crossing points, and this description is redundant, it will not be repeated here. Because this system embodiment shares the same principle as the aforementioned method embodiment, it also possesses the corresponding technical effects of the aforementioned method embodiment.

[0097] Those skilled in the art will understand that all or part of the processes of the methods described in the above embodiments can be implemented by a computer program instructing related hardware, and the program can be stored in a computer-readable storage medium. The computer-readable storage medium may be a disk, optical disk, read-only memory, or random access memory, etc.

[0098] The above description is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention.

Claims

1. A fast phase-locked loop method based on zero-crossing points, characterized in that, Includes the following steps: Upon power-on, the sine function table and step size calculation table are initialized, setting the count value, decimal step size, and phase-locked value to zero; the sine function table is a one-dimensional array with a number of elements. The sine function value is obtained by using the current phase-locked loop value as the index of the sine function table. The sine function table is initialized using the following formula: ,in, The first in the sine function table A sine function value, for Integers between [a certain value] and [a certain value]; the step size calculation table is a one-dimensional array with the number of elements [a certain value]. Initialize the step size calculation table using the following formula: ,in, For the step size calculation table, the first... Calculate the coefficient for each step size. for Integers between; The following steps are executed whenever the PWM wave cycle is interrupted: When the target waveform amplitude is not greater than the threshold, the current fractional step and integer step are cleared to zero; when the target waveform amplitude is greater than the threshold, it is determined whether the target waveform has crossed the zero point normally based on the current count value. If the target waveform has crossed the zero point normally, the current fractional step and integer step are obtained according to the current phase-locked loop value and / or step calculation table; otherwise, the current fractional step is updated after obtaining the integer step directly from the current fractional step. The phase-locked loop (PLL) step size to be accumulated is obtained by summing a fixed step size and an integer step size, and then accumulated to the current PLL value. A sine function value is obtained based on the accumulated current PLL value and a sine function table. A PWM wave is generated based on the sine function value. The fixed step size is based on the periodic interrupt frequency. Target waveform fundamental frequency The number of elements in the sine function table The following formula is used to calculate: .

2. The fast phase-locked loop method based on zero-crossing points according to claim 1, characterized in that, The step of obtaining the current decimal step size and integer step size based on the current phase-locked loop value and / or step size calculation table includes: Determine whether the current phase-locked value exceeds the phase-locked error range. If it does not exceed the range, the phase-locking is successful, and the current fractional step and integer step are cleared to zero. If it exceeds the range, obtain the fractional step to be accumulated based on the current phase-locked value and step calculation table, and accumulate it to the current fractional step. After obtaining the integer step based on the current fractional step, update the current fractional step.

3. The fast phase-locked loop method based on zero-crossing points according to claim 1, characterized in that, The step of determining whether the target waveform has crossed zero normally based on the current count value includes: The current count value is incremented by 1; When the target waveform crosses zero, it is determined whether the current count value is within the set range. If it is within the set range, the target waveform has crossed zero normally, and the current count value is cleared to zero; otherwise, the target waveform has crossed zero abnormally. The set range is calculated based on the periodic interruption frequency, the fundamental frequency of the target waveform, and its preset fluctuation ratio.

4. The fast phase-locked loop method based on zero-crossing points according to claim 2, characterized in that, The zero-crossing points include positive zero-crossing points and negative zero-crossing points; The step of obtaining the decimal step size to be accumulated based on the current phase-locked loop value and the step size calculation table includes: When the target waveform is at a positive zero-crossing point, determine whether the current phase-locked loop value is greater than 1. If it is greater than, then subtract the current phase-locked loop value. If the first phase-locked loop (PLL) value is obtained, otherwise, the current PLL value is assigned to the first PLL value; when the target waveform is a negative zero-crossing point, the current PLL value is subtracted. The first phase-locked value is obtained; After multiplying the first phase-locked value by the first element of the step length calculation table, take the integer part of the absolute value as the step length element index; based on the step length calculation table, obtain the step length calculation coefficient according to the step length element index; multiply the first phase-locked value by the step length calculation coefficient to obtain the fractional step length to be accumulated.

5. The fast phase-locked loop method based on zero-crossing points according to claim 1 or 2, characterized in that, The step of updating the current fractional step size after obtaining the integer step size based on the current fractional step size includes: Take the integer part of the current decimal step as the integer step; Update the value obtained by subtracting the integer step size from the current decimal step size to the current decimal step size.

6. The fast phase-locked loop method based on zero-crossing points according to claim 1, characterized in that, The current phase-locked value is Integers between [0, 360°) correspond to phase-locked angles between [0, 360°); the accumulated current phase-locked value exceeds When the time is right, reset to zero.

7. A fast phase-locked loop system based on zero-crossing points, characterized in that, include: Initialization unit and phase-locked unit, wherein, An initialization unit is used to initialize the sine function table and step size calculation table upon power-on, setting the count value, decimal step size, and phase-locked value to zero; the sine function table is a one-dimensional array with a number of elements. The sine function value is obtained by using the current phase-locked loop value as the index of the sine function table. The sine function table is initialized using the following formula: ,in, The first in the sine function table A sine function value, for Integers between [a certain value] and [a certain value]; the step size calculation table is a one-dimensional array with the number of elements [a certain value]. Initialize the step size calculation table using the following formula: ,in, For the step size calculation table, the first... Calculate the coefficient for each step size. for Integers between; The phase-locked unit (PLU), including a zero-crossing detection module, a fractional step size acquisition module, and a sine function value acquisition module, performs the following steps whenever the PWM wave period is interrupted: When the target waveform amplitude is not greater than a threshold, the current fractional and integer step sizes are cleared to zero; when the target waveform amplitude is greater than the threshold, the zero-crossing detection module determines whether the target waveform has crossed zero normally based on the current count value. If the target waveform has crossed zero normally, the fractional step size module acquires the current fractional and integer step sizes based on the current PLL value and / or a step size calculation table; otherwise, the fractional step size module directly obtains the integer step size based on the current fractional step size and updates the current fractional step size. The sine function value acquisition module obtains the PLL step size to be accumulated based on the sum of the fixed step size and the integer step size, and accumulates it to the current PLL value; it obtains the sine function value based on the accumulated current PLL value and the sine function table; and it generates a PWM wave based on the sine function value. The fixed step size is determined according to the periodic interruption frequency. Target waveform fundamental frequency The number of elements in the sine function table The following formula is used to calculate: .

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