Input impedance network with power recovery

Abstract

Input impedance networks and associated methods are disclosed. An input impedance network includes a source terminal pair configured to be coupled to a power source, a recovered power terminal pair configured to be coupled to a power dissipator, a transmission line coupled to the source terminal pair including M segments, and N clamping circuits. Each of the N clamping circuits is configured to clamp at least one of a voltage or a current in one of the M segments, and a power recovery circuit is coupled to the N clamping circuits to enable application of recovered energy to the recovered power terminal pair.

Description

[0001] Priority claim according to 35 USC §119

[0002] This patent application claims priority to provisional application No. 63 / 009,049, filed on April 13, 2020, entitled "Input Impedance Network with Power Recovery," which is assigned to the assignee of this application and is hereby expressly incorporated herein by reference. Technical Field

[0003] The embodiments disclosed herein generally relate to electrical power, and more specifically, to input impedance networks. Background Technology

[0004] Designing a power source to deliver power to a known load (e.g., 50W) is relatively straightforward. In the context of a plasma load, the plasma load impedance can vary based on the applied power, gas properties, etc. Therefore, a generator (e.g., an RF generator) that applies power to a plasma load (e.g., to ignite and sustain the plasma) needs to deliver power to a varying impedance.

[0005] Furthermore, the altered plasma impedance due to changes in the power entering the plasma system can lead to generator-plasma system instability. Additionally, modulation of the plasma load by other sources results in significant power reflection back at the generator. This necessitates a generator design with substantial overmargin to address this issue. Summary of the Invention

[0006] On one hand, it can be characterized as an input impedance network comprising a source terminal pair configured to be coupled to a power source, a recovery power terminal pair configured to be coupled to a power sink, a transmission line comprising M segments coupled to the source terminal pair, and N clamping circuits configured to clamp at least one of the voltage or current in one of the M segments. The input impedance network also includes a power recovery circuit coupled to the N clamping circuits, which uses energy recovered from the clamping circuits to apply power to the recovery power terminal pair.

[0007] On the other hand, it can be characterized as a power system comprising a power source and an input impedance network coupled to the power source. The input impedance network includes a transmission line and a distributed clamping circuit. The transmission line comprises M segments, and the distributed clamping circuit is configured to clamp at least one of the voltages or currents in N of the M segments. The power system also includes a power recovery circuit to apply power to a power dissipator using energy recovered from the distributed clamping circuit.

[0008] Alternatively, it can be characterized as a power system comprising a power source and an input impedance network coupled to the power source. The input impedance network includes a module for providing a substantially constant impedance to the power source and a power recovery circuit coupled to the power source to apply power to a power dissipator using energy recovered from the module for providing the substantially constant impedance. Attached Figure Description

[0009] Figure 1A This is a block diagram showing a power system including an input impedance network.

[0010] Figure 1B This is a block diagram showing the power system, where, Figure 1A The load shown includes a matching network and plasma in the plasma chamber.

[0011] Figure 2 This is a block diagram showing a system in which the input impedance network recovers power and applies power to the generator via an inverter.

[0012] Figure 3 This is a block diagram showing a system in which the input impedance network recovers power and applies power to the DC bus of the generator.

[0013] Figure 4 This is a diagram illustrating an example of an input impedance network.

[0014] Figure 5 This is a schematic diagram illustrating an example of a current amplitude measurement circuit.

[0015] Figure 6 This is a schematic diagram illustrating an example of a voltage amplitude measurement circuit.

[0016] Figure 7 This is a schematic diagram showing various aspects of the input impedance circuit.

[0017] Figure 8 This is a diagram showing a system including a coupled input impedance network used in conjunction with a circulator.

[0018] Figure 9 This is a diagram illustrating another system that includes an input impedance network used in conjunction with a circulator.

[0019] Figure 10 This is a schematic diagram illustrating another input impedance network.

[0020] Figure 11A-11F This is a schematic diagram illustrating another example of an input impedance network.

[0021] Figure 12 This shows a device with a resistive load. Figure 11A-11FThe Smith chart and curves for the operation of the circuit, where the load resistance is less than the real part of the characteristic impedance of the lumped element equivalent transmission line segment.

[0022] Figure 13 This shows a device with a resistive load. Figure 11A-11F The Smith chart and curves for the operation of the circuit, where the load resistance is greater than the real part of the characteristic impedance of the lumped element equivalent transmission line segment.

[0023] Figure 14 This illustrates a reactive load with positive load reactance. Figure 11A-11F Smith charts and graphs showing the operation of the circuits.

[0024] Figure 15 This shows a reactive load with negative load reactance. Figure 11A-11F Smith charts and graphs showing the operation of the circuits.

[0025] Figure 16 This shows a device with a resistive load. Figure 11A-11F The Smith chart and curves of the circuit's operation show that, for two different voltage and current clamping levels, the load resistance is less than the real part of the characteristic impedance of the lumped element equivalent transmission line segment.

[0026] Figure 17 This shows a device with a resistive load. Figure 11A-11F The Smith chart and curves of the circuit's operation show that, for two different voltage and current clamping levels, the load resistance is greater than the real part of the characteristic impedance of the lumped element equivalent transmission line segment.

[0027] Figure 18 This shows a load with reactance. Figure 11A-11F The Smith chart and graph of the circuit operation are shown, where the load reactance is positive for two different voltage and current clamping levels.

[0028] Figure 19 This shows a load with reactance. Figure 11A-11F The Smith chart and graph of the circuit operation are shown, where the load reactance is negative for two different voltage and current clamping levels.

[0029] Figure 20A and Figure 20B This is a schematic diagram illustrating an example of a power recovery circuit.

[0030] Figure 21 This includes showing what happens when the voltage to be clamped is less than the clamping voltage. Figure 20A and Figure 20B The power, voltage, and current curves of the power recovery circuit.

[0031] Figure 22 This includes showing what happens when the voltage to be clamped is greater than the clamping voltage. Figure 20A and Figure 20B The power, voltage, and current curves of the power recovery circuit.

[0032] Figure 23A and Figure 23B This is a schematic diagram illustrating another example of a power recovery circuit.

[0033] Figure 24 This includes showing what happens when the current to be clamped is less than the clamping current. Figure 23A and Figure 23B The power, voltage, and current curves of the power recovery circuit.

[0034] Figure 25 This includes showing what happens when the current to be clamped is greater than the clamping current. Figure 23A and Figure 23B The power, voltage, and current curves of the power recovery circuit.

[0035] Figure 26 This is a block diagram illustrating an example of a computing component that can be used in conjunction with the embodiments disclosed herein. Detailed Implementation

[0036] By placing a circulator between the generator and the plasma, all the problems listed above can be solved or significantly reduced. However, low-frequency (e.g., below 60 MHz) circulators are bulky, expensive, and often difficult to construct. Additionally, when using a circulator, reflected power is typically dissipated as heat in the energy transfer load.

[0037] The Lorentz reciprocity clearly demonstrates that in order to construct a circuit with circulator characteristics, an isotropic medium (e.g., ferrite subjected to a DC magnetic field or plasma), nonlinear components, and / or time-varying components are required.

[0038] Various circuits have been proposed that are constructed entirely from isotropic media with similar circulator characteristics (and therefore contain nonlinear or time-varying components), but these circuits are not suitable for low-frequency, high-power applications in which significant incident power is reflected back from the load.

[0039] Among the many circuit variations described herein, this disclosure describes a class of circuits with circulator-like characteristics, wherein the source sees a nearly constant impedance regardless of the load impedance, and wherein essentially all power delivered to the circuit, rather than to the load, is recovered. The term "exemplary" in this disclosure is used herein to mean "serving as an example, instance, or illustration." Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments.

[0040] To better understand the various circuits described in this article, it is helpful to understand the problem of coupling power from a source to a load using a transmission line. If the transmission line is a lossless transmission line (or its lumped-element equivalent) connecting the RF power source and the load, and if the load impedance matches the characteristic impedance of the transmission line, the magnitudes of the voltage and current along the line are constant. However, if the load impedance differs from the characteristic impedance of the transmission line, standing waves are formed along the length of the transmission line, and the magnitudes of the voltage and current vary along the length of the transmission line.

[0041] The applicant has discovered that if a quarter-wavelength transmission line (at the frequency of the applied power) is divided into segments, a distributed voltage clamping circuit, including a voltage clamp at the interface of each segment, clamps the peak voltage amplitude to the amplitude of the voltage generated at the source side of the transmission line. This substantially solves part of the aforementioned problem, provided a sufficient number of segments are used. More specifically, if the load impedance is resistive and greater than the real part of the characteristic impedance of the transmission line, such a distributed voltage clamping circuit provides a nearly constant impedance to the generator. (The characteristic impedance of a lossy transmission line may be complex, but for low-loss transmission lines, the real part is typically significantly larger than the imaginary part, and the imaginary part can usually be ignored.) In this case, the power obtained from the voltage clamp is essentially equal to the portion of the power supplied by the source that is not delivered to the load; therefore, in this sense, the distributed voltage clamping circuit is essentially lossless. For example, if the transmission line is open-circuited at the load side, the distributed voltage clamping circuit can provide the source with an impedance substantially equal to the characteristic impedance of the transmission line. Similarly, if the load is resistive and less than the real part of the characteristic impedance of the transmission line, a half-wavelength transmission line provides a nearly constant impedance to the generator. For example, if the half-wavelength line is short-circuited on the load side, a distributed voltage clamping circuit can provide the source with an impedance substantially equal to the characteristic impedance of the transmission line.

[0042] However, if, for example, the line is a quarter wavelength long, the load is resistive, and the load resistance is less than the real part of the characteristic impedance of the transmission line, the distributed voltage clamping circuit stops working in the same way. More specifically, the voltage amplitude will be greatest at the source and smaller elsewhere along the transmission line. In this case, the aforementioned distributed voltage clamping circuit is essentially ineffective, and the impedance seen by the source is equal to the load impedance transformed by the transmission line. Similarly, if the load is resistive and the load resistance is greater than the real part of the characteristic impedance of the transmission line, a half-wavelength voltage clamping transmission line cannot provide a substantially constant impedance to the source. In this case, the voltage is highest at both the source and load ends of the transmission line, and the voltage clamping circuit is essentially ineffective.

[0043] Continuing with the case of a quarter-wavelength transmission line, where the load is resistive and the load resistance is less than the real part of the characteristic impedance of the transmission line, the current is minimum at the source end of the transmission line and higher elsewhere along the length of the transmission line. In this case, standing waves along the length of the line can be suppressed by limiting the current along the length of the line to the current at the source side of the line. For example, the transmission line can be divided into segments, and a distributed current clamping circuit including a current clamp at the interface of each segment can be used. Each current clamp can clamp the peak current amplitude to the current amplitude at the source side of the transmission line. Advantageously, in many embodiments, nothing needs to be done at the source end of the transmission line.

[0044] By combining distributed voltage clamping and distributed current clamping techniques (often referred to as distributed clamping circuits), the impedance seen by the source can be limited to a very small deviation from the characteristic impedance of the line, regardless of the load impedance. Furthermore, several clamping circuits disclosed herein enable the recovery from the clamping circuit of any power delivered by the source that was not delivered to the load, resulting in a substantially lossless circuit.

[0045] Besides providing a nearly constant impedance to the RF power source (e.g., the power amplifier (PA) of an RF generator), the fraction of power delivered to the load as a function of the load reflection coefficient magnitude (when the source delivers constant power) is very close to (1-x), where x is the load reflection coefficient magnitude. For x values ​​of about 0.5, this matches the standard power curve required by industrial generators used in semiconductor applications. For lower values ​​of x, the power to the load decreases abruptly instead of remaining approximately constant until x is about 0.2. This can be remedied by clamping the voltage and current to values ​​slightly above the source side of the circuit, but this does allow for more variation in the impedance seen by the source.

[0046] One aspect of many, but not all, of the circuit variations described herein is the ability to provide both a substantially constant impedance to a power source (e.g., RF power) and power recovery of most of the power delivered by the source but not delivered to the load. In the ideal case where the circuit is constructed of lossless components (e.g., diodes with zero voltage drop, lossless switches, and lossless passive components) and uses an infinite number of transmission line segments, the circuit is indeed lossless and provides a substantially constant impedance to the source. In the real world, most, but not all, of the power delivered by the source but not delivered to the load is recovered, and the impedance seen by the source changes slightly if the load impedance changes. In the following text, the type of circuit described herein is referred to as a Low-Loss Input Impedance Network (LLIIN).

[0047] First refer to Figure 1A and Figure 1BAn exemplary environment including a power system is shown, in which several implementations of the LLIIN 100 can be utilized. As shown, the LLIIN 100 includes a source terminal pair 102 configured to be coupled to a source 104, and a power dissipator (…). Figure 1A and Figure 1B The LLIIN 100 includes a recovery power terminal pair 106 (not shown) and an optional load terminal pair 108 that can be coupled to an optional load 110. It should be understood that the LLIIN 100 can be manufactured and sold as a separate device, distinct from the source 104, the optional load 110, and the power dissipator. It is also conceivable that the LLIIN 100 can be optionally integrated with the source and power dissipator to form a monolithic device as discussed further herein. Figure 1B As shown, optional load 110 may include a matching network 112 coupled to plasma chamber 114, which is configured to contain plasma 116.

[0048] Many variations of the LLIIN 100 operate to provide a nearly constant load impedance to source 104 while applying power to the recovery power terminal pair 106 so that energy can be recovered (e.g., to do work) rather than dissipated as heat (e.g., via an energy transfer resistor). Some variations of the LLIIN 100 allow impedance variations seen by source 104 while protecting the source from destructive power conditions such as high voltage and / or high current conditions, and in these variations, power can also be recovered and applied to the recovery power terminal pair 106.

[0049] LLIIN 100 may include a transmission line divided into M segments, and distributed voltage clamping circuitry and / or distributed current clamping circuitry may clamp the voltage and / or current at the interface of each segment. In many embodiments, the total length of the transmission line is a quarter wavelength or half wavelength of the power applied to the transmission line. If source 104 is capable of providing a frequency range (and therefore a wavelength range), the total length of the transmission line may be at least a quarter wavelength of the lowest frequency of the power applied by source 104. The segments of the transmission line may be of equal length, but this is not required, and in some embodiments, the length of each segment is not the same.

[0050] If a distributed voltage clamping circuit is used, then in many embodiments, the voltage at each segment can be clamped to the voltage applied by the source. However, it is also conceivable that the voltage at each segment can be clamped to a fixed voltage. If a distributed current clamping circuit is used, then in many embodiments, the current at each segment can be clamped to the current level provided by the source. However, it is also conceivable that the current at each segment can be clamped to a fixed current.

[0051] Source 104 is typically a power supply, which can be implemented, for example, via an isolated port of a generator or a circulator as part of a larger system. When implemented by a generator, the generator can apply power at a range of frequencies. In many embodiments, the generator can apply power at frequencies greater than 100 kHz, and in other embodiments, LLIIN is particularly useful at frequencies less than 100 MHz, which are difficult for circulators to implement. However, it is also conceivable that generators operating at much lower frequencies (e.g., 5 kHz) or much higher frequencies (e.g., 5 GHz) can be utilized.

[0052] In some applications, the LLIIN 100 is not coupled to the load at all (e.g., by removing the load terminal pair by short-circuiting the load terminal pair inside the LLIIN). In other applications, such as reference... Figure 2 , Figure 3 and Figure 4 As described, LLIIN can be coupled to fixed or dynamic nonlinear loads, such as plasma loads (e.g., Figure 1B (As shown).

[0053] refer to Figure 2 The diagram illustrates an LLIIN 200 (which can be used to implement LLIIN 100), positioned to couple power from a source to a load 210, where the source is generator 204. Advantageously, LLIIN 200 also enables power to be applied from generator 204 to load 210 in a substantially lossless manner. More specifically, LLIIN 200 recovers power from generator 204 that was not effectively applied to load 210. Figure 2 In the illustrated embodiment, the power not applied to load 210 is restored to direct current (DC) power applied to inverter 220, which in turn converts the DC power into AC power applied to the AC trunk coupled to the AC input of generator 204. Figure 2 In the diagram, inverter 220 is shown as a separate component, but inverter 220 may be included as part of LLIIN 200 (e.g., in the same housing and / or the same circuit board as LLIIN 200).

[0054] like Figure 3 As shown, LLIIN 300 (which can be used to implement LLIIN 100) can be configured to apply DC power to DC bus 326, which couples DC power from DC supply source 328 (within generator 304) to power amplifier 330 (e.g., RF power amplifier 330 within generator 304). In operation, LLIIN 300 converts the recovered power into a level applied across DC bus 326. Figure 3The LLIIN 300 shown can be used with Figure 2 The LLIIN 200 is the same, except that it is composed of... Figure 2 The restored DC power output of the LLIIN 200 does not require a DC voltage level matching the voltage level applied to both ends of the DC bus 326. Figure 2 and Figure 3 In the embodiments shown, LLIINS 200, 300 include a transmission line that couples a source (implemented as a generator) to a load.

[0055] refer to Figure 4 This demonstrates that it can be implemented to achieve Figure 2 and Figure 3 The exemplary LLIINs 200 and 300 are shown in the figure. As shown, LLIIN 400 includes a transmission line comprising a source terminal pair 402 configured to be coupled to a source and a load terminal pair 408 configured to be coupled to a load. It is also conceivable that in some applications, the load terminal pair may be short-circuited or remain open.

[0056] As shown in the figure, the transmission line is divided into M segments, where M is equal to two or more, and each of the M segments is clamped by a voltage clamping circuit 432 for voltage and by a current clamping circuit 434 for current. The transmission line is characterized by its characteristic impedance (Z). 01 To Z 0m ) and electrical delay (t) d1 to t dMThe electrical length is related to the electrical delay of the RF power at frequency f, such that a quarter-wavelength electrical length corresponds to a delay equal to one-quarter (1 / f) of the period of the RF power. A total of M voltage clamping circuits 432 (forming a distributed voltage clamping circuit) and M current clamping circuits 434 (forming a distributed current clamping circuit) exist. In some applications, there may be more voltage clamping circuits than current clamping circuits, or more current clamping circuits 434 than voltage clamping circuits 432. The current amplitude measurement circuit 440 is positioned along one of the conductors of the transmission line on the generator side (source terminal opposite side), and the voltage amplitude measurement circuit 442 is positioned across the source terminal pair 402. Alternatively, instead of using the current amplitude measurement circuit 440 and voltage amplitude measurement circuit 442, control of the distributed clamping circuit can be achieved by obtaining the voltage and current amplitudes through a measurement system based on couplers (e.g., directional couplers) or VI sensors. In some applications, the current clamping circuit 434 clamps the peak current amplitude in each segment to a current level equal to, or proportional to, the current amplitude measured by the current amplitude measuring circuit 440 at the generator side of the transmission line. In some applications, the voltage clamping circuit 432 clamps the peak voltage amplitude in each segment to a voltage level equal to, or proportional to, the voltage amplitude measured by the voltage amplitude measuring circuit at the generator side of the transmission line. The transmission line can be, for example, a segment of a coaxial transmission line or an equivalent lumped circuit.

[0057] Each of the M segments can be of equal length, such that the impedance and delay of each segment can be identical. However, it is envisioned that the impedance and delay of each segment do not need to be identical. In many implementations, the total delay of the M segments is greater than or equal to one-quarter of the period of the lowest frequency of the generator.

[0058] The length of each segment can be adapted to suit the frequency of the power applied by the generator. In an exemplary implementation, eight (M=8) segments were found to result in acceptable performance for the LLIIN 400, where each segment has an electrical delay equal to 1 / 32 of the period of the applied power (a total delay of one-quarter of the period of the applied power) or 1 / 16 of the period of the applied power (a total delay of half the period of the applied power). The desired impedance could be 50 ohms, but other impedance values ​​may be expected for each segment.

[0059] In operation, the current amplitude measurement circuit 440 provides an output indicating the current level at the source side of the transmission line, and the voltage amplitude measurement circuit 442 provides an output indicating the power supply level at both ends of the source terminal pair at the source side of the transmission line. In response to the measured current and voltage, each current clamping circuit 434 can be controlled to clamp the current level at the interface between the M segments to the current level at the source side of the transmission line, and each voltage clamping circuit 432 can be controlled to clamp the voltage level at both ends of each of the M segments to the voltage level at both ends of the source terminal pair 402 at the source side of the transmission line.

[0060] When operated in this manner, the LLIIN 400 limits the impedance seen by the generator to a very small offset from the characteristic impedance of the transmission line, regardless of the load impedance, and furthermore, power not delivered to the load by the generator can be recovered from the voltage clamping circuit 432 and / or the current clamping circuit 434 using the power recovery circuit 444. The power recovery circuit 444 is coupled to M clamping circuits and is configured to use the energy recovered from the clamping circuits to apply power to the recovery power terminal pair 406.

[0061] refer to Figure 5 This shows what can be used to implement Figure 4 An exemplary current amplitude measurement circuit 540 is shown in the figure, which is a current amplitude measurement circuit 440. As shown, the current amplitude measurement circuit may include a current path for sensing the current, which includes a series arrangement of resistive and inductive elements between the nodes of an all-diode bridge. Figure 6 It can be used to achieve Figure 4 An exemplary voltage amplitude measurement circuit 542 is shown in the figure, comprising a voltage amplitude measurement circuit 442. As shown, a potential difference Vsense is established across a capacitor arranged in parallel with a resistive element, and the parallel combination of the capacitor and the resistive element is located between two nodes of a diode bridge.

[0062] Figure 7 It shows what can be used for implementation Figure 4 The image shows a portion of the LLIIN 700 from the LLIIN 400. Specifically, Figure 7A specific implementation of the current clamping circuit 734 and the voltage clamping circuit 732 is shown. As illustrated, each current clamping circuit 734 includes a current path IclampM between the nodes of the all-diode bridge fed through the power recovery circuit 444, which allows control of the current through each current clamping circuit 734. And each voltage clamping circuit 732 includes a capacitor located between the nodes of the all-diode bridge, so that the voltage VclampM can be controlled by the power recovery circuit 444. Therefore, the voltage of each of the M segments can be controlled. More specifically, the voltage magnitude of a segment of the transmission line is the voltage VclampM plus the voltage drop across the two diodes. While M clamping circuits are used to clamp the voltage and / or current of M transmission line segments, it is also possible to use N clamping circuits, where N is less than M. For example, a feasible input impedance network can be constructed by clamping fewer than all M segments. As an example, N could be equal to M minus 1, or N could be equal to M minus 2, but these are merely examples.

[0063] refer to Figure 8 The diagram illustrates the LLIIN 800, where the source terminal pair 802 of the LLIIN 800 is coupled to a circulator 804 instead of a displacer resistor that would normally be coupled to the displacer port (isolation port) of the circulator 804. Power that would normally be dissipated as heat in the displacer resistor is instead recovered as DC power at the recovery power terminal pair 806 of the LLIIN 800 and fed to an inverter 220, which in turn converts the DC power into AC power applied to the AC trunk. A DC-to-AC inverter may also be part of the LLIIN 800.

[0064] like Figure 9 As shown, LLIIN 900 (which can be used to implement LLIIN 100) can be configured to apply DC power to DC bus 326, which couples DC power from DC source 328 (within generator 304) to power amplifier 330 (e.g., RF power amplifier 330 within the generator). In operation, LLIIN 900 converts the power recovered from circulator 804 into a level applied across DC bus 326. Figure 9 The LLIIN 900 shown can be used with Figure 8 The LLIIN 800 is the same, except that it is made by Figure 8 The restored DC power output of the LLIIN 800 does not require the application of a DC voltage level that matches the voltage level applied across the DC bus.

[0065] Next reference Figure 10 This shows what can be used to implement Figure 8 LLIIN 800 and Figure 9An exemplary LLIIN 1000 is an example of LLIIN 900. LLIIN 1000 is similar to LLIIN 400, except that the terminals of load terminal pair 1008 are short-circuited and no current clamping circuitry is used. Short-circuiting the terminals of load terminal pair 1008 presents a resistance (0 Ω) less than the real part of the characteristic impedance of the transmission line to the load terminals; therefore, a distributed voltage clamping circuit that clamps the voltage of each segment to the peak voltage generated at the source side of the transmission line provides a substantially constant impedance to circulator 804 without using current clamping circuitry, provided the total electrical delay is equal to half the period of the applied power. Alternatively, the load terminal pair can be open-circuited, and the total electrical delay is equal to one-quarter of the period of the applied power. Therefore, Figure 10 LLIIN 1000 compared to reference Figure 4 The LLIIN 400 described is easier to implement.

[0066] Next reference Figure 11A-11F A schematic diagram of the circuit used to verify the performance of LLIIN using simulation is shown. For clarity, Figure 11A-11F A single circuit shown across multiple pages is illustrated. Figure 11A-11F In this context, nodes with the same label are considered the same node. For example, Figure 11A The nodes marked "n1a" and "n1" are related to... Figure 11C The nodes with "n1a" and "n1" are the same. (See reference...) Figure 11A-11F At the same time, refer to Figure 12 ,Test Figure 12 It shows a resistive load. Figure 11A-11F The simulation results of the circuit show that, for a resistive load, the load resistance is less than the real part of the characteristic impedance of the equivalent transmission line segment of the lumped element. Table 1 below provides information on... Figure 11A-11F Additional details on the circuit's operational setup are shown below. This is achieved by replacing the load with different impedances ( Figure 11A R2 in the source ( Figure 11A The impedance seen in V1, as well as the power delivered from the source, the power delivered to the load, and the power recovered by the voltage clamp and current clamp (return to) Figure 11E B1 to B8 and Figure 11B To obtain the power of BI2 to BI9) Figure 12 The result in the middle. Figure 12 The Smith chart on the left shows that even as the load impedance varies along the negative real axis of the Smith chart, the impedance seen from the source changes very little. Figure 12The graph on the right shows the power supplied by the source but not delivered to the load being restored to DC power. This is achieved when the peak voltage and peak current amplitudes are clamped to the voltage and current amplitudes at the source, respectively; that is, when both current and voltage (parameters Iscl and Vscl in the table below) are set to 1.0. Figure 12 The results. Sources B1 to B8 and BI2 to BI9 respectively represent those derived from, for example... Figures 20A-20B as well as Figure 23A and Figure 23B The circuits shown provide constant voltage and constant current to the voltage clamp and current clamp, respectively.

[0067]

[0068] Table 1

[0069] Next reference Figure 13 This shows a structure with a resistive load. Figure 11A-11F The simulation results of the circuit show that, for a resistive load, the load resistance is greater than the real part of the characteristic impedance of the equivalent transmission line segment of the lumped element. This can be further explained by replacing the load with different impedances. Figure 11A R2 in the source ( Figure 11A The impedance seen in V1, as well as the power delivered from the source, the power delivered to the load, and the power recovered by the voltage clamp and current clamp (the power returned to B1 to B8 and BI2 to BI9) are used to obtain the power. Figure 13 The result in the middle. Figure 13 The Smith chart on the left shows that even as the load impedance varies along the positive real axis of the Smith chart, the impedance seen from the source changes very little. Figure 13 The graph on the right shows the power supplied by the source but not delivered to the load being restored to DC power. With the peak voltage and peak current amplitudes clamped to the voltage and current amplitudes at the source, respectively—that is, with parameters Iscl and Vscl both set to 1.0—the following is obtained: Figure 13 The result.

[0070] Next reference Figure 14 This illustrates a reactive load with positive load reactance. Figure 11A-11F The simulation results of the circuit. By replacing the load with different impedances ( Figure 11A R2 in the source ( Figure 11A The impedance seen in V1, as well as the power delivered from the source, the power delivered to the load, and the power recovered by the voltage clamp and current clamp (the power returned to B1 to B8 and BI2 to BI9) are used to obtain the power. Figure 14 The result in the middle. Figure 14 The Smith chart on the left shows that even as the load impedance varies along the positive imaginary axis of the Smith chart, the impedance seen from the source changes very little. Figure 14The graph on the right shows the power supplied by the source but not delivered to the load being restored to DC power. With the peak voltage and peak current amplitudes clamped to the voltage and current amplitudes at the source, respectively—that is, with parameters Iscl and Vscl both set to 1.0—the following is obtained: Figure 14 The result.

[0071] Next reference Figure 15 This illustrates a reactive load with negative load reactance. Figure 11A-11F The simulation results of the circuit. By replacing the load with different impedances ( Figure 11A R2 in the source ( Figure 11A The impedance seen in V1, as well as the power delivered from the source, the power delivered to the load, and the power recovered by the voltage clamp and current clamp (the power returned to B1 to B8 and BI2 to BI9) are used to obtain the power. Figure 15 The result in the middle. Figure 15 The Smith chart on the left shows that even as the load impedance varies along the negative imaginary axis of the Smith chart, the impedance seen from the source changes very little. Figure 15 The graph on the right shows the power supplied by the source but not delivered to the load being restored to DC power. With the peak voltage and peak current amplitudes clamped to the voltage and current amplitudes at the source, respectively—that is, with parameters Iscl and Vscl both set to 1.0—the following is obtained: Figure 15 The result.

[0072] Next reference Figure 16 , Figure 16 It has a resistive load. Figure 11A-11F The simulation results of the circuit show that, for two different voltage and current clamping levels, the load resistance of the resistive load is less than the real part of the characteristic impedance of the lumped element equivalent transmission line segment. Figure 16 The two figures in the top row are Figure 12 The results shown are repeated, but with more data points. Figure 16 The two figures in the bottom row illustrate the effect of clamping the peak voltage and current amplitudes to 1.2 times the voltage and current amplitudes at the source side of the circuit, respectively (i.e., parameters Iscl and Vscl are both set to equal 1.2). Figure 16 The comparison of the two right-hand figures shows that this is desirable in some applications to allow a larger portion of the source power to go to the load for a small value of the load reflection coefficient amplitude. Figure 16 The two figures on the left show that this is done at the cost of more variation in the impedance presented to the source.

[0073] Next reference Figure 17 This shows a structure with a resistive load. Figure 11A-11FThe simulation results of the circuit show that, for two different voltage and current clamping levels, the load resistance of the resistive load is greater than the real part of the characteristic impedance of the lumped element equivalent transmission line segment. Figure 17 The two figures in the top row are Figure 13 The results shown are repeated, but with more data points. Figure 17 The two figures in the bottom row illustrate the effect of clamping the peak voltage and current amplitudes to 1.2 times the voltage and current amplitudes at the source side of the circuit, respectively (i.e., parameters Iscl and Vscl are both set to equal 1.2). Figure 17 The comparison of the two right-hand figures shows that this is desirable in some applications to allow a larger portion of the source power to go to the load for a small value of the load reflection coefficient amplitude. Figure 17 The two figures on the left show that this is done at the cost of more variation in the impedance presented to the source.

[0074] Next reference Figure 18 This shows a load with reactive load. Figure 11A-11F The simulation results of the circuit show that for two different voltage and current clamping levels, the load reactance of the reactive load is positive. Figure 18 The two figures in the top row are Figure 14 The results shown are repeated, but with more data points. Figure 18 The two figures in the bottom row illustrate the effect of clamping the peak voltage and current amplitudes to 1.2 times the voltage and current amplitudes at the source side of the circuit, respectively (i.e., parameters Iscl and Vscl are both set to equal 1.2). Figure 18 The comparison of the two right-hand figures shows that this is desirable in some applications to allow a larger portion of the source power to go to the load for a small value of the load reflection coefficient amplitude. Figure 18 The two figures on the left show that this is done at the cost of more variation in the impedance presented to the source.

[0075] Next reference Figure 19 , Figure 19 It is a reactive load Figure 11A-11F The simulation results of the circuit show that for two different voltage and current clamping levels, the load reactance of the reactive load is negative. Figure 19 The two figures in the top row are Figure 15 The results shown are repeated, but with more data points. Figure 19 The two figures in the bottom row illustrate the effect of clamping the peak voltage and current amplitudes to 1.2 times the voltage and current amplitudes at the source side of the circuit, respectively (i.e., parameters Iscl and Vscl are both set to equal 1.2). Figure 19The comparison of the two right-hand figures shows that this is desirable in some applications to allow a larger portion of the source power to go to the load for a small value of the load reflection coefficient amplitude. Figure 19 The two figures on the left show that this is done at the cost of more variation in the impedance presented to the source.

[0076] Next reference Figure 20A and Figure 20B This shows the method for verifying the ability to maintain at 100V ( Figure 20A and 20B A schematic diagram of the circuit for the power recovery of the voltage clamp of the DC power dissipator (Vdc1) in the circuit. Figure 20A and Figure 20B Nodes with the same label are the same node. For example, Figure 20A The node tags "decr_v" and "incr_v" in the text are related to... Figure 20B The nodes “decr_v” and “incr_v” are the same. During operation, the top bridge formed by S5, S6, S7, and S8 and the bottom bridge formed by S9, S10, S11, and S12 operate alternately. When the top bridge operates, it completes one cycle, where S5 and S6 are turned on first, and then S7 and S8 are turned on. This operation of the top bridge results in a voltage across the windings of the transformer formed by the coupled inductors L3 and L4. During this cycle, if the voltage across C2 is greater than the voltage of the constant voltage source Vdc1, power is transferred from C2 to Vdc1 through the rectification effect of the bottom diodes D17, D18, D19, and D20. If the voltage across C2 is less than the voltage of the constant voltage source Vdc1, no power is transferred between the upper and lower halves of the circuit during this cycle. The upper half of the circuit is the half connected directly or via other circuit elements to L3. The lower half of the circuit is the half connected directly or via other circuit elements to L4. When the bottom bridge operates, it completes one cycle, where S9 and S10 are first turned on, and then S11 and S12 are turned on. This operation of the bottom bridge results in a voltage across the windings of the transformer formed by the coupled inductors L3 and L4. If the voltage across C2 is less than the voltage of the constant voltage source Vdc1, power is transferred from Vdc1 to C2 through the rectification action of the top diodes D9, D10, D11, and D12. If the voltage across C2 is greater than the voltage of the constant voltage source Vdc1, no power transfer occurs between the upper and lower halves of the circuit during this cycle. Both cycles together maintain a voltage across C2 that is substantially equal to the voltage of the constant voltage source Vdc1, allowing bidirectional power flow between C2 and Vdc1 to maintain this relationship.

[0077] exist Figure 20A and Figure 20BIn the circuit, the bridge formed by S1, S2, S3, and S4 maintains the desired clamping voltage minus the voltage drop across the two diodes on C5. This is achieved by switching on S3 and S4 when the voltage across C5 is too low and switching on S1 and S2 when the voltage is too high. Furthermore, the voltage between nodes rf1 and rf2 is clamped to the voltage across C5 plus the two voltage drops through diodes D1, D2, D3, and D4. Table 2 below provides additional details regarding the setup used for the simulation.

[0078]

[0079] Table 2

[0080] Next reference Figure 21 This shows the voltage to be clamped ( Figure 20A When Vrf is less than the clamping voltage (50V in this simulation), it affects... Figure 20A and Figure 20B The results of circuit simulation. Figure 21 The bottom plot shows that the peak current through the voltage clamp is only 100 μA when the voltage amplitude is 10V. The second plot from the bottom shows the voltage on the voltage clamp. The third plot from the bottom shows that the voltage clamp draws 4.5W from the DC power dissipator due to losses in the non-ideal diode. The top plot shows that almost no power is drawn from the voltage source connected to the voltage clamp.

[0081] Next reference Figure 22 This shows the voltage to be clamped ( Figure 20A When Vrf is greater than the clamping voltage (50V in this simulation), it affects... Figure 20A and Figure 20B The results of circuit simulation. Figure 22 The bottom diagram shows a peak current of 10A through the voltage clamp to achieve a voltage drop of 10V across the 1Ω internal resistance of the source. Figure 20A The figure shows the voltage clamped to 50V (Vrf) and clamps the peak voltage on the voltage clamp to 50V. The second figure from the bottom shows the voltage clamped to 50V as intended. The third figure from the bottom shows the voltage clamp restoring 117 watts to the DC power dissipator. The top figure shows 122 watts being drawn from the voltage source connected to the voltage clamp.

[0082] Next reference Figure 23A and Figure 23B This shows the method for verifying the ability to maintain at 100V ( Figure 23A A schematic diagram of the circuit for the power recovery current clamp of the DC power dissipator (Vdc1) in the circuit. Figure 23A and Figure 23B Nodes with the same label are the same node. For example, Figure 23A The node tags "decr_v" and "incr_v" in the text are related to... Figure 23B The nodes with "decr_v" and "incr_v" are the same. Figure 23A In this circuit, the top bridge formed by S5, S6, S7, and S8 and the bottom bridge formed by S9, S10, S11, and S12 operate alternately. When the top bridge operates, it completes one cycle, where S5 and S6 are turned on first, and then S7 and S8 are turned on. This operation of the top bridge results in a voltage being generated on the windings of the transformer formed by the coupled inductors L3 and L4. During this cycle, if the voltage across C2 is greater than the voltage of the constant voltage source Vdc1, power is transferred from C2 to Vdc1 through the rectification effect of the bottom diodes D17, D18, D19, and D20. If the voltage across C2 is less than the voltage of the constant voltage source Vdc1, no power is transferred between the upper and lower halves of the circuit during this cycle. The upper half of the circuit is the half directly or indirectly connected to L3 via other circuit elements. The lower half of the circuit is the half directly or indirectly connected to L4 via other circuit elements. When the bottom bridge operates, it completes one cycle, where S9 and S10 are first turned on, and then S11 and S12 are turned on. This operation of the bottom bridge results in a voltage being generated on the windings of the transformer formed by the coupled inductors L3 and L4. If the voltage across C2 is less than the voltage of the constant voltage source Vdc1, power is transferred from Vdc1 to C2 through the rectification action of the top diodes D9, D10, D11, and D12. If the voltage across C2 is greater than the voltage of the constant voltage source Vdc1, no power transfer occurs between the upper and lower halves of the circuit during this cycle. Both cycles together maintain the voltage across C2 at approximately equal levels to the voltage of the constant voltage source Vdc1, allowing bidirectional power flow between C2 and Vdc1 to maintain this relationship. Figure 23A In this configuration, a bridge formed by S1, S2, S3, and S4 maintains the desired clamping current through inductors L1 and L2. This is achieved by switching S1 and S2 on when the current through L1 is too low and switching S3 and S4 on when the current is too high. Figure 23A In the process, the magnitude of the current through the diode bridge between nodes rf1 and rf2 is clamped to the current through L1.

[0083]

[0084] Table 3

[0085] Next reference Figure 24 This shows the current to be clamped (by...) Figure 23A When the Vrf supply in the simulation is less than the clamping current (5A in this simulation), it affects... Figure 23A and Figure 23B The results of circuit simulation. Figure 24The bottom diagram shows the peak current through the current clamp. Figure 24 The second figure from the bottom shows that when the current through the clamp is 1.8A, the voltage on the clamp is only 18mV. Figure 24 The third figure from the bottom shows the current clamp drawing 7.1W from the DC power dissipator due to losses in the non-ideal diode. The top figure shows almost no power drawn from the connection to the current clamp ( Figure 23A The source of power is obtained from Vrf in the middle.

[0086] Next reference Figure 25 This shows the current to be clamped (by...) Figure 23A When the Vrf supply in the circuit is greater than the clamping current (5A in this simulation), it affects... Figure 23A and Figure 23B The results of circuit simulation. Figure 22 The bottom diagram shows the peak current clamped at 5A as expected by the current clamp. The second diagram from the bottom shows the peak voltage on the current clamp, which is 9.5V, to clamp the current at 5A. The third diagram from the bottom shows the voltage clamp returning to 21.2W from the DC power dissipator. The top diagram shows 29.4W being drawn from the voltage source connected to the current clamp.

[0087] Those skilled in the art will further understand that the various illustrative logic blocks, modules, circuits, and algorithm steps described in conjunction with the embodiments disclosed herein can be implemented as electronic hardware, computer software, or a combination of both. To clearly illustrate this interchangeability between hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above in general terms of their functionality. Whether this functionality is implemented as hardware or software depends on the specific application and the design constraints imposed on the system as a whole. Those skilled in the art may implement the described functionality in different ways for each specific application, but such implementation decisions should not be construed as departing from the scope of the invention.

[0088] The various illustrative logic blocks, modules, and circuits described in conjunction with the embodiments disclosed herein may be implemented or performed using a general-purpose processor, digital signal processor (DSP), application-specific integrated circuit (ASIC), field-programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof, designed to perform the functions described herein. The general-purpose processor may be a microprocessor, but alternatively, the processor may be any conventional processor, controller, microcontroller, or state machine. The processor may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors combined with a DSP core, or any other such configuration.

[0089] refer to Figure 26 The diagram illustrates a block diagram showing physical components that can be used to implement one or more aspects of the impedance network disclosed herein. As shown, in this embodiment, a display 1412 and non-volatile memory 1420 are coupled to a bus 1422, which is also coupled to random access memory (“RAM”) 1424, a processing section (which includes N processing units) 1426, a field-programmable gate array (FPGA) 1427, and a transceiver section 1428 including N transceivers. Although... Figure 26 The components shown represent physical components, but Figure 26 It is not intended to be a detailed hardware diagram; therefore, Figure 26 Many of the components shown can be implemented through a common construction or distributed among additional physical components. Furthermore, it is conceivable that the reference design can be implemented using other existing and yet-to-be-developed physical components and architectures. Figure 26 The described functional components.

[0090] Display 1412 typically operates to provide a user interface, and in some embodiments, display 1412 is implemented as a touchscreen display. For example, display 1412 can be used to control and interact with the components described herein. Typically, non-volatile memory 1420 is non-transitory memory used to store (e.g., persistently store) data and machine-readable (e.g., processor-executable) code, including executable code associated with implementing the methods described herein. In some embodiments, for example, non-volatile memory 1420 includes bootloader code, operating system code, file system code, and non-transitory processor-executable code to facilitate the execution of the methods described herein.

[0091] In many implementations, the non-volatile memory 1420 is implemented using flash memory (e.g., NAND or ONENAND memory), but it is contemplated that other memory types may also be utilized. Although code from the non-volatile memory 1420 can be executed, the executable code in the non-volatile memory is typically loaded into RAM 1424 and executed by one or more of the N processing units in the processing section 1426.

[0092] In operation, the N processing units connected to RAM 1424 are typically operable to execute instructions stored in non-volatile memory 1420 to implement the functions of the power recovery circuit described herein. For example, non-transitory processor-executable instructions for implementing the methods described herein may be persistently stored in non-volatile memory 1420 and executed by the N processing units connected to RAM 1424. As will be understood by those skilled in the art, processing section 1426 may include a video processor, a digital signal processor (DSP), a graphics processing unit (GPU), and other processing units.

[0093] Alternatively, the field-programmable gate array (FPGA) 1427 may be configured to implement one or more aspects of the methods described herein. For example, non-transitory FPGA configuration instructions may be persistently stored in non-volatile memory 1420 and accessed by the FPGA 1427 (e.g., during startup) to configure the FPGA 1427.

[0094] The input components are operable to receive signals indicating voltage and / or current (e.g., from voltage amplitude measurement circuit 442 and / or current amplitude measurement circuit 440). The output components are generally operable to provide one or more analog or digital signals (e.g., to provide drive signals to one or more switches in the buck converter of the power recovery circuit (444)) to enable the operation of the power recovery circuit.

[0095] The transceiver component 1428 shown includes N transceiver chains that can be used to communicate with external devices (e.g., external controllers) via wireless or wired networks. Each of the N transceiver chains can represent a transceiver associated with a specific communication scheme (e.g., WiFi, Ethernet, Profibus, etc.).

[0096] As used herein, the phrase "at least one of A, B, and C" is intended to mean "A, B, C, or any combination of A, B, and C". The prior description of the disclosed embodiments is provided to enable those skilled in the art to make or use this disclosure. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be applied to other embodiments without departing from the spirit or scope of this disclosure. Therefore, this disclosure is not intended to be limited to the embodiments shown herein, but should be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An impedance network, comprising: The transmission line comprises multiple segments; Multiple clamping circuits, each of the multiple clamping circuits being configured to clamp at least one of the voltage or current in one of the multiple segments; as well as A power recovery circuit is provided for applying power to a power dissipator using energy recovered from the plurality of clamping circuits.

2. The impedance network according to claim 1, wherein, The power dissipator includes a DC bus.

3. The impedance network according to claim 1, wherein, The power dissipator includes a power transfer resistor.

4. The impedance network according to claim 1, wherein, One or more of the plurality of clamping circuits include an all-diode bridge coupled to at least one of the plurality of segments.

5. The impedance network according to claim 4, wherein, At least one of the plurality of clamping circuits includes a current clamping circuit, the current clamping circuit including an inductor located between the nodes of the all-diode bridge to control the current passing through the current clamping circuit.

6. The impedance network according to claim 5, wherein, At least one of the plurality of clamping circuits includes a voltage clamping circuit, the voltage clamping circuit including capacitors located between the nodes of the all-diode bridge to control the voltage at the voltage clamping circuit.

7. An impedance circuit, comprising: Transmission lines; A circuit system configured to clamp at least one of the voltages or currents in multiple segments of the transmission line; as well as A power recovery circuit coupled to the circuit system to apply power to the terminals of the impedance circuit using energy recovered from the circuit system.

8. The impedance circuit of claim 7, comprising a power dissipator coupled to the terminal.

9. The impedance circuit of claim 7, comprising an energy-shifting resistor coupled to the terminal.

10. The impedance circuit of claim 7, further comprising a measurement circuit coupled to the circuit system, wherein, The measurement circuit is configured to measure either voltage or current.

11. A power system, comprising: Power source; as well as An impedance network coupled to the power source, wherein the impedance network comprises: A transmission line coupled to the power source; A circuit system configured to clamp at least one of the voltages or currents in multiple segments of the transmission line; and A power recovery circuit coupled to the circuit system to apply power to the terminals of the impedance network using energy recovered from the circuit system.

12. The power system according to claim 11, wherein, The power source includes the isolation port of the circulator.

13. The power system according to claim 11, wherein, The power source includes a generator.

14. The power system according to claim 13, wherein, The generator is configured to operate at frequencies less than 100 MHz.

15. The power system according to claim 11, wherein, The power source is coupled to the terminal.

16. The power system of claim 15, comprising: An inverter, coupled between the circuit and the AC input of the power source, converts the recovered DC power into AC power applied to the AC input of the power source.

17. The power system according to claim 11, wherein, The circuit is coupled to the DC bus of the power source to apply the recovered DC power to the DC bus of the power source.

18. The power system of claim 11, comprising an energy-shifting resistor coupled to the terminal of the impedance network.

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