Processor and slicing method thereof, electronic device and computer readable storage medium

By actually running the compilation instructions of each slicing scheme in the processor and obtaining performance data to select the optimal scheme, the problem of relying on software modeling for slicing schemes in existing neural network processors is solved, and a more efficient and lower-cost slicing process is achieved.

CN117688979BActive Publication Date: 2026-07-21VERISILICON MICROELECTRONICS (SHANGHAI) CO LTD +4
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
VERISILICON MICROELECTRONICS (SHANGHAI) CO LTD
Filing Date
2023-12-21
Publication Date
2026-07-21

AI Technical Summary

Technical Problem

In existing technologies, the slicing schemes for neural network processors rely on software modeling, which leads to high development difficulty, high cost, and difficulty in adapting to hardware updates. Furthermore, the quality of the slicing scheme depends on the accuracy of the modeling.

Method used

By actually running the compilation instructions of each slicing scheme in the processor, performance data is obtained, thereby selecting the optimal slicing scheme, reducing the dependence on modeling and improving slicing efficiency.

Benefits of technology

It improves the processor's computing performance, reduces slicing costs, decreases the need for modeling, and improves the accuracy of slicing scheme selection.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application provides a processor and a slicing method thereof, an electronic device and a computer readable storage medium, and relates to the field of chips. The slicing method of the processor comprises: sequentially taking each neural network layer as a target neural network layer, obtaining a plurality of slicing schemes of the target neural network layer; generating a compilation instruction corresponding to each slicing scheme; running the compilation instruction in the processor, obtaining performance data corresponding to the processor and the compilation instruction; obtaining a target slicing scheme from the plurality of slicing schemes according to the performance data; and slicing the target neural network layer according to the target slicing scheme. The processor and the slicing method thereof, the electronic device and the computer readable storage medium provided in the application have the advantages of reducing the slicing cost of the processor and improving the performance of the processor.
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