Packet distribution method and distributed routing device

Abstract

The application relates to the technical field of network communication, and provides a message distribution method and a distributed routing device, wherein a line card of the distributed routing device comprises a switching chip, a network card and a multi-core CPU, the line card is configured with an equal-cost multi-path (ECMP) group, the ECMP group comprises ECMP members corresponding to CPU queues of the network card on the corresponding line card in one-to-one mode, and the method comprises the following steps: the switching chip of a first line card receives a to-be-processed message through a panel port; the switching chip of the first line card selects an ECMP member for forwarding and processing the to-be-processed message from a plurality of ECMP groups, and sends the processed to-be-processed message to the network card of the first line card; and the network card of the first line card sends the to-be-processed message to the corresponding CPU queue according to information carried by the processed to-be-processed message, so that the corresponding CPU core processes. The application improves the message processing capacity of the distributed routing device with the multi-core CPU.

Description

Technical Field

[0001] This invention relates to the field of network communication technology, and more specifically, to a message splitting method and a distributed routing device. Background Technology

[0002] In distributed devices, line cards typically need to handle traffic within their own line card and traffic between line cards. In distributed high-end routing devices, most packets need to be processed by the CPU, which usually connects to the network card and the switching chip. For packets transmitted from the switching chip to the network card, the network card sends the packets to the queue buffers requested by different CPU cores based on the characteristics of the packets so that specific CPUs can process them.

[0003] With increasing demands for CPU performance and advancements in manufacturing processes, modern CPUs typically feature multi-core processors. To fully utilize the multi-core processing capabilities of CPUs, modern network interface cards (NICs) generally support multiple queues. Packets are queued using hash algorithms, and each CPU core processes packets from its associated queue. However, in distributed devices, there are often multiple line cards, and the NICs for each type of line card may differ, resulting in variations in the fields of the packets they can recognize. Traditionally, control information such as ACLs (Access Control Lists) is used to add different information based on port / packet details. Packets are then hashed and queued by the NIC upon arrival. However, this method is heavily influenced by port and packet type, wastes significant switch chip resources, and increases complexity. Summary of the Invention

[0004] The purpose of this invention is to provide a packet splitting method and a distributed routing device, which enables packets to be evenly distributed to each CPU core for processing, thereby significantly improving the packet processing capability of multi-core CPUs.

[0005] The embodiments of the present invention can be implemented as follows:

[0006] In a first aspect, the present invention provides a packet splitting method applied to a distributed routing device, the distributed routing device including at least one line card, each line card including a switching chip, a network card, and a multi-core CPU, each line card being configured with an Equal Cost Multipath (ECMP) group, each ECMP group including ECMP members corresponding one-to-one with the CPU queues of the network card of the corresponding line card, each ECMP member being a local next hop pre-configured by the switching chip of the line card, the method comprising:

[0007] The switching chip of the first line card receives messages to be processed through the panel port; the first line card can be any line card of the distributed routing device.

[0008] The switching chip of the first line card selects an ECMP member from the ECMP group to forward the packet to be processed, and sends the processed packet to the network card of the first line card.

[0009] The network card of the first line card sends the message to be processed to the corresponding CPU queue according to the information carried in the processed message so that the corresponding CPU core can process it.

[0010] In an optional implementation, the step of the switching chip of the first line card selecting an ECMP member from the ECMP group to forward the packet to be processed, and sending the processed packet to the network card of the first line card includes:

[0011] The switching chip of the first line card selects an ECMP member from the ECMP group to forward the packet to be processed, adds a traffic splitting configuration to the packet to be processed according to the selected ECMP member, and sends the packet with the added traffic splitting configuration to the network card of the first line card. The traffic splitting configuration is used to indicate the CPU queue for processing the packet to be processed.

[0012] In an optional implementation, the step of the switching chip of the first line card adding a traffic offloading configuration to the message to be processed includes:

[0013] The switching chip of the first line card adds a VLAN tag to the packet to be processed;

[0014] If the network card of the first line card is a network card that can recognize the Ethernet type field, then the switching chip of the first line card assigns a value to the VLAN TAG in the packet to be processed according to the specified CPU core and the preset mapping relationship. The preset mapping relationship represents the relationship between each CPU queue of the first line card and the value of the corresponding VLAN TAG.

[0015] In an optional implementation, the step of the switching chip of the first line card adding a traffic offloading configuration to the message to be processed includes:

[0016] The switching chip of the first line card adds a VLAN tag to the packet to be processed;

[0017] If the network card of the first line card is a network card that can recognize the VLAN ID field in the VLAN TAG, then the switching chip of the first line card adds a new VLAN TAG to the unprocessed packet that has already been added with the VLAN TAG;

[0018] The network card of the first line card assigns a value to the new VLAN TAG according to the specified CPU core and the preset mapping relationship. The preset mapping relationship represents the relationship between each CPU core of the first line card and the value of the corresponding VLAN TAG.

[0019] In an optional implementation, the distributed routing device includes multiple line cards, including a second line card in addition to the first line card. Both the switching chip of the first line card and the switching chip of the second line card are configured with a global next hop. The method further includes:

[0020] The CPU of the second line card receives the message to be sent to the first line card and adds a VLAN tag to the message to be sent;

[0021] The CPU of the second line card assigns a value to the VLAN TAG added to the message to be sent according to a preset mapping relationship, so as to specify the CPU core of the first line card that processes the message to be sent. The preset mapping relationship represents the relationship between each CPU core of the first line card and the value of the corresponding VLAN TAG.

[0022] The CPU of the second line card sends the global next hop of the line card and the message to be sent to the stacking port of the switching chip of the first line card through the stacking port of the switching chip of the second line card;

[0023] The switching chip of the first line card receives the message to be sent through the stacking port and sends the received message to the network card of the first line card according to the received global next hop;

[0024] The network card of the first line card sends the received packet to the corresponding CPU core for processing according to the VLAN TAG in the received packet.

[0025] In an optional implementation, the step of the switching chip of the first line card receiving the message to be sent through the stacking port and sending the received message to the network card of the first line card according to the received global next hop includes:

[0026] If the network interface card (NIC) of the first line card is a NIC that can recognize the Ethernet type field, then the switching chip of the first line card will directly send the received message to the NIC of the first line card.

[0027] In an optional implementation, the step of the switching chip of the first line card receiving the message to be sent through the stacking port and sending the received message to the network card of the first line card according to the received global next hop includes:

[0028] If the network card of the first line card is a network card that can recognize the VLAN ID field in the VLAN TAG, then the switching chip of the first line card will replace the TPID in the VLAN TAG of the received packet with a preset standard value;

[0029] The switching chip of the first line card sends the replaced message to the network card of the first line card.

[0030] In an optional implementation, the step of the switching chip of the first line card selecting an ECMP member from the ECMP group to forward the message to be processed includes:

[0031] The switching chip of the first line card selects an ECMP member from the ECMP group to forward the message to be processed according to a round-robin allocation strategy.

[0032] In a second aspect, the present invention provides a distributed routing device, the distributed routing device including at least one line card, each line card including a switching chip, a network card and a multi-core CPU, each line card being configured with an Equal Cost Multipath (ECMP) group, the ECMP group including ECMP members corresponding one-to-one with the CPU queues of the network card of the corresponding line card, each ECMP member being a local next hop pre-configured by the switching chip of the line card.

[0033] The switching chip of the first line card is used to receive messages to be processed through the panel port; the first line card can be any line card of the distributed routing device.

[0034] The switching chip of the first line card is used to select an ECMP member from the ECMP group for forwarding the packet to be processed, and send the processed packet to the network card of the first line card.

[0035] The network interface card of the first line card is used to send the message to be processed to the corresponding CPU queue according to the information carried by the processed message so that the corresponding CPU core can process it.

[0036] In an optional implementation, the switching chip of the first line card is further configured to select an ECMP member from the ECMP group to forward the packet to be processed, add a traffic splitting configuration to the packet to be processed according to the selected ECMP member, and send the packet with the added traffic splitting configuration to the network card of the first line card. The traffic splitting configuration is used to indicate the CPU queue for processing the packet to be processed.

[0037] Compared with the prior art, in this embodiment of the invention, after the switching chip of the first line card in the distributed routing device receives the packet to be processed through the panel port, the switching chip selects an ECMP member from the ECMP group to forward the packet. Since the ECMP member corresponds one-to-one with the CPU queue of the network card of the first line card, the network card of the first line card sends the packet to be processed to the CPU queue corresponding to the selected ECMP member, so that the corresponding CPU core can process it. By mapping the CPU core to the ECMP member one-to-one, and selecting the ECMP member, the CPU for processing the packet is selected. This allows the packet to be evenly distributed to each CPU core of the first line card for processing, which greatly improves the packet processing capability of the multi-core CPU of the distributed routing device. Attached Figure Description

[0038] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0039] Figure 1 This is a structural example diagram of the distributed routing device provided in this embodiment.

[0040] Figure 2 This is an example diagram of message forwarding between line cards provided in this embodiment.

[0041] Figure 3 This is a flowchart illustrating the message routing method provided in this embodiment.

[0042] Figure 4 This is an example diagram illustrating the interaction of message forwarding between two line cards of type 1 provided in this embodiment.

[0043] Figure 5 This is an example diagram illustrating the message forwarding interaction between line card type 1 (transmitter) and line card type 2 (receiver) provided in this embodiment.

[0044] Figure 6 This is an example diagram illustrating the interaction of message forwarding for type 2 line card and type 1 line card provided in this embodiment.

[0045] Figure 7 This is an example diagram illustrating the interaction of message forwarding between two line cards of type 2 provided in this embodiment.

[0046] Icons: 10 - Distributed routing device; 11 - Line card; 111 - Switching chip of line card; 112 - Network card; 113 - CPU; 12 - Switching card; 121 - Switching chip of forwarding card. Detailed Implementation

[0047] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0048] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0049] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0050] In the description of this invention, it should be noted that if terms such as "upper," "lower," "inner," or "outer" are used to indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship in which the product of this invention is usually placed, they are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this invention.

[0051] Furthermore, the terms "first" and "second" are used only to distinguish descriptions and should not be interpreted as indicating or implying relative importance.

[0052] It should be noted that, where there is no conflict, the features in the embodiments of the present invention can be combined with each other.

[0053] Please refer to Figure 1 , Figure 1 This is a structural example diagram of the distributed routing device provided in this embodiment. Figure 1 In the distributed routing device 10, there are at least one line card 11 and a switch card 12. Each line card 11 includes a switch chip 111, a network card 112, and a CPU 113.

[0054] The Distributed Routing Device 10 is a router device that improves routing performance and scalability by distributing routing functionality across multiple physical or virtual devices.

[0055] The distributed routing device 10 includes one or more line cards 11. The line cards 11 mainly provide functions such as packet forwarding, ping response and packet fragmentation for the distributed routing device 10.

[0056] The switching chip 111 of line card 11 is an integrated chip used to provide data switching and routing functions.

[0057] The network card 112 of line card 11 provides functions such as Ethernet frame encapsulation, decapsulation, and media control.

[0058] The CPU113 of line card 11 is the central processing unit of line card 11, which is the final execution unit for information processing and program execution.

[0059] Switch card 12 is used for message forwarding between line cards 11. Switch card 12 contains switching chip 121.

[0060] In the distributed routing device 10, the switching chips 111 of line card 11 are stacked together, and the switching chips 121 of switching card 12 and the switching chips 111 of line card 11 are connected together to form a small system. The connection port between two switching chips 111, or between switching chips 111 and switching chip 121, is usually called a stack port. Packets passing through the stack port usually have header information added for cross-chip identification and processing.

[0061] based on Figure 1 This embodiment also provides an example diagram of message forwarding between line cards, please refer to it. Figure 2 , Figure 2 This is an example diagram of message forwarding between line cards provided in this embodiment. Figure 2 In the middle, the switching chip of line card 1 is connected to the panel port (e.g., Figure 2 (As shown in the hollow circle) After receiving the message, it is sent to the CPU of line card 1 for processing. When the CPU of line card 1 detects that the message exit is on line card 2, it will send the message to the switching chip of this line card through the network card of line card 1. The switching chip of this line card will then forward the message through the stacking port of the switching chip by looking up the forwarding table (the stacking port of the switching chip on each line card is connected to the switching card, such as...). Figure 2 (As shown in the solid black circle in the middle) The forwarding card sends the data to line card 2, and then through the connection port between the network card and the switching chip of line card 2, it reaches the CPU of line card 2 for processing.

[0062] It should be noted that, Figure 2 The panel port and stacking port on the switching chip of line card 2 are not shown in the figure. In fact, line card 2, like line card 1, also has a panel port and a stacking port.

[0063] Line cards typically have Ethernet ports or other network interface card (NIC) ports (such as WAN interfaces) on their switching chips to receive traffic from user terminals. Packets connect the switching chip and CPU via the NIC. Packets received through the NIC are placed in a multi-queue buffer, from which the CPU retrieves and processes them. To fully utilize the multi-core performance of the CPU, each CPU core is usually bound to a queue. The NIC enqueues packets using a hash method (other methods exist, such as per-packet load balancing). Each CPU core then retrieves and processes packets from its corresponding queue. To fully utilize the multi-core performance of the CPU, packets arriving at the NIC should be recognizable and hashed into each queue. Thus, multiple packets are evenly distributed across queues and processed simultaneously by different CPU cores. However, distributed routing devices often have multiple line cards, each with different NICs and CPUs, and the information supporting hashed packets may also differ.

[0064] To make the packets entering the network interface card more evenly distributed and improve the performance of the CPU in processing packets, this embodiment provides a packet splitting method and a distributed routing device, which will be described in detail below.

[0065] Please refer to Figure 3 , Figure 3 This is a flowchart illustrating the message routing method provided in this embodiment, which is applied to... Figure 1 or Figure 2 The distributed routing device 10 in the system has a distributed routing device 10. Each line card in the distributed routing device 10 is configured with an ECMP (Equal-cost Multipath Routing) group. The ECMP group includes ECMP members that correspond one-to-one with the CPU cores of the corresponding line card. Each ECMP member is a pre-configured next hop. The destination exit is the connection port of the switching chip and the network card of the line card. The forwarding table or ACL of the switching chip of each line card is configured to set the next hop of the packet that enters through the front panel port of the switching chip and needs to be sent out through the switching chip as the ECMP group. Therefore, the packet that enters through the front panel port of the switching chip will select one of the multiple ECMP members in the ECMP group and send the packet out through the selected ECMP member. The method includes the following steps:

[0066] Step S101: The switching chip of the first line card receives the message to be processed through the panel port; the first line card is any line card of the distributed routing device.

[0067] In this embodiment, the first line card is a line card that receives and processes messages. Any line card in the distributed routing device 10 can be used as the first line card. The panel port is the interface used by the distributed routing device to communicate with external devices. For example, the distributed routing device receives messages sent by the terminal through the panel port of the switching chip, and the message to be processed is the message that enters the first line card through the panel port of the switching chip.

[0068] In step S102, the switching chip of the first line card selects an ECMP member from the ECMP group to forward the packet to be processed, and sends the processed packet to the network card of the first line card.

[0069] In this embodiment, the method for selecting the ECMP member for forwarding the packet to be processed can be random selection, hash algorithm related selection, or per-packet load balancing. Random selection means randomly selecting one member from multiple ECMP members. Pre-specification means specifying one of multiple ECMP members by pre-configuring the traffic distribution. Per-packet load balancing means selecting ECMP members sequentially when each packet to be processed reaches the switching chip of the first line card.

[0070] In step S103, the network card of the first line card sends the message to be processed to the corresponding CPU queue according to the information carried by the processed message so that the corresponding CPU core can process it.

[0071] In this embodiment, the number of ECMP members is the same as the number of CPU queues on the network card of the first line card, and there is a correspondence between CPU queues and CPU cores. Selecting an ECMP member means determining the CPU core of the first line card to process the packet to be processed. The information carried by the packet to be processed is used to characterize the CPU queue to which the packet to be processed needs to be sent.

[0072] The method provided in this embodiment maps CPU queues to ECMP members one by one. By selecting an ECMP member, the CPU queue corresponding to the packet to be processed is selected. Since there is a correspondence between CPU queues and CPU cores, the packets can be evenly distributed to the CPU cores of the first line card for processing, which greatly improves the packet processing capability of the multi-core CPU of the distributed routing device.

[0073] In this embodiment, one method for selecting an ECMP member to forward a packet is as follows:

[0074] The switching chip of the first line card selects ECMP members from the ECMP group to forward packets according to a round-robin allocation strategy.

[0075] In this embodiment, for example, there are 8 ECMP members, numbered 1-8. The first message to be processed selects ECMP number 1, the second message to be processed selects ECMP number 2, and so on. When the ninth message to be processed arrives, ECMP number 1 is selected again, thereby ensuring that the messages are evenly distributed to each CPU core for processing.

[0076] Besides the round-robin allocation strategy, a traffic splitting configuration can also be used for selection. The following describes how to select ECMP members for forwarding packets using traffic splitting configuration:

[0077] The switching chip of the first line card selects the ECMP member to forward the packet to be processed from the ECMP group, adds a traffic splitting configuration to the packet to be processed according to the selected ECMP member, and sends the packet with the added traffic splitting configuration to the network card of the first line card. The traffic splitting configuration is used to specify the CPU core of the first line card to process the packet to be processed.

[0078] In this embodiment, after the packet to be processed enters the switching chip of the first line card, a VLAN TAG (Virtual Local Area Network TAG) is added to the packet according to the port. Then, it is matched with Layer 2 (Layer 2 is the second layer of the OSI reference model, i.e., the data link layer; matching Layer 2 means matching the MAC address), multicast, ACL, etc., to specify the next hop of the packet to be processed as an ECMP group. Through the ECMP group, the TPID (Tag Protocol Identifier) ​​of the outer VLAN of the packet can be modified packet by packet or by using hash members and sent to the network card of the first line card. Specifically, the correspondence between the typical information in the packet to be processed and the CPU core of the first line card can be predetermined, and the CPU core of the first line card can be specified to process the packet by setting the typical information in the packet to be processed. Since the line cards of distributed routing devices usually add VLAN TAGs to packets entering from the panel port of the line card to identify the port of the line card into which the packet enters, based on this, VLANs can be matched with the next hop of the packet to be processed. The CPU core can be specified by assigning a value to the VLAN tag. For example, the assigned VLAN tag can be hashed, and the CPU core can be specified based on the hash result. Since distributed routing devices typically have multiple line cards, the number of CPU cores and the type of network card may differ between different line cards. This embodiment provides implementation methods for adding traffic splitting configurations for two different types of network cards.

[0079] For network interface cards (NICs) that can identify the Ethernet type field, the implementation method is as follows:

[0080] If the network card of the first line card is a network card that can recognize the Ethernet type field, then the VLAN TAG in the packet to be processed is assigned a value according to the specified CPU core and the preset mapping relationship. The preset mapping relationship represents the relationship between each CPU core of the first line card and the value of the corresponding VLAN TAG.

[0081] In this embodiment, the Ethernet type field is the Type field in the Ethernet frame header, used to indicate the protocol type of the data field in the Ethernet frame. The VLAN TAG is a tag used to identify a Virtual Local Area Network (VLAN). The VLAN TAG includes a VLAN ID (Virtual Local Area Network Identifier) ​​field and a TPID field. This embodiment uses an 8-core network interface card (NIC) capable of recognizing the Ethernet type field as an example, with TPID starting from 0x5100 and VLAN ID starting from 1, to illustrate the preset mapping relationship, as shown in Table 1.

[0082] Table 1

[0083]

[0084] For network cards that can recognize the VLAN ID field in the VLAN TAG, the implementation method is as follows:

[0085] First, if the network card of the first line card is a network card that can recognize the VLAN ID field in the VLAN TAG, then add a new VLAN TAG to the pending packets that have already had a VLAN TAG added;

[0086] Secondly, the network card of the first line card assigns a new VLAN TAG value according to the specified CPU core and the preset mapping relationship. The preset mapping relationship represents the relationship between each CPU core of the first line card and the corresponding VLAN TAG value.

[0087] This embodiment takes a 64-core network card that can recognize the VLAN ID field as an example. The TPID starts from 0x5100 and the VLAN ID starts from 1 to illustrate the preset mapping relationship, as shown in Table 2.

[0088] Table 2

[0089]

[0090]

[0091] It should be noted that although this embodiment only provides implementation methods for two types of network cards, those skilled in the art can adapt it to more types of network cards without creative effort.

[0092] In this embodiment, the packets forwarded between the source line card and the destination line card are sent from the source line card to the forwarding card through the stacking port, and then the forwarding card sends the packets to the destination line card through the stacking port. This embodiment also provides a packet splitting method for this scenario. This embodiment first configures a global next hop for each line card. There can be multiple global next hops, and the exit configurations of different global next hops are different. Each global next hop can have a unique identifier. Global next hops with the same unique identifier have the same routing configuration. For example, to facilitate the description of the packet forwarding process between two line cards, this embodiment refers to the line card that sends the packet as the second line card and the line card that receives the packet as the first line card. Based on the global next hop configuration, the implementation of the packet splitting method for forwarding packets between the second line card and the first line card is as follows:

[0093] (1) The CPU of the second line card receives the message to be sent to the first line card and adds a VLAN TAG to the message to be sent;

[0094] In this embodiment, the message to be sent may be sent from the switching chip of the second line card to the CPU of the second line card, or it may be sent from other line cards to the second line card and need to be processed by the CPU of the second line card. This embodiment takes the receipt of this message by the CPU of the second line card as the starting point to explain the message diversion method used for forwarding messages between the second line card and the first line card.

[0095] (2) The CPU of the second line card assigns a value to the VLAN TAG added in the message to be sent according to the preset mapping relationship, so as to specify the CPU core of the first line card to process the message to be sent. The preset mapping relationship represents the relationship between each CPU core of the first line card and the value of the corresponding VLAN TAG.

[0096] In this embodiment, if the network card of the first line card is a network card that can recognize the Ethernet type field, the preset mapping relationship can be as shown in Table 1. If the network card of the first line card is a network card that can recognize the VLAN ID field in the VLAN TAG, the preset mapping relationship can be as shown in Table 2.

[0097] (3) The CPU of the second line card sends the global next hop of this line card and the message to be sent to the first line card through the stacking port of the switching chip of the second line card;

[0098] In this embodiment, the second line card sends the message to be sent according to the global next hop configuration of the first line card. When sending the message to be sent through the stacking port of the switching chip of the second line card, the global next hop of the second line card is also sent to the stacking port of the switching chip of the first line card through the stacking header. As one implementation method, the global next hop identifier can be sent to the first line card, and the first line card can find the corresponding global next hop of the second line card according to the global next hop identifier.

[0099] In this embodiment, the global next-hop exit of the second line card is configured as the first line card.

[0100] (4) The switching chip of the first line card receives the message to be sent through the stacking port and sends the received message to the network card of the first line card according to the received global next hop;

[0101] In this embodiment, the processing of received packets by different types of network interface cards (NICs) differs depending on the global next hop received, and the NIC then sends the received packets to the first-line NIC:

[0102] If the network card of the first line card is a network card that can recognize the Ethernet type field, the processing method is as follows:

[0103] The received message is sent directly to the network card of the first line card.

[0104] If the network card of the first line card is capable of recognizing the VLAN ID field in the VLAN TAG, the processing method is as follows:

[0105] The switching chip of the first line card replaces the TPID in the VLAN TAG of the received message with a preset standard value;

[0106] The switching chip of the first line card sends the replaced message to the network card of the first line card.

[0107] In this embodiment, the preset standard value is related to the network card protocol. For example, the IEEE 802.1Q protocol specifies that the preset standard value is 0x8100. The preset standard value of the inner VLAN TAG in the QinQ configured message is 0x8100. However, the preset standard value of the outer VLAN TAG may be different for different manufacturers. For example, it may be 0x9100, 0x88a8, etc.

[0108] (5) The network card of the first line card sends the received message to the corresponding CPU core for processing according to the VLAN TAG in the received message.

[0109] In this embodiment, each CPU core of the first line card corresponds to a queue. The CPU core retrieves the packet from the corresponding queue and processes it. The network card of the first line card performs hash processing based on the VLAN TAG in the packet, and puts the packet into the queue corresponding to the hash value according to the hash value. The CPU core corresponding to the queue retrieves the packet from the queue and processes it.

[0110] In this embodiment, in order to more clearly illustrate the process of message splitting when sending messages between different types of line cards, this embodiment takes a line card that can identify the Ethernet type field as line card type 1 and a line card that can identify the VLAN ID field in the VLAN TAG as line card type 2 as an example, and explains the following different situations respectively.

[0111] Scenario 1: The second line card is of type 1, and the first line card is also of type 1.

[0112] For scenario one, please refer to Figure 4 , Figure 4 This is an example diagram illustrating the message forwarding interaction between two line cards of type 1 provided in this embodiment. Line card a is the second line card, and its CPU, switching chip, and network card are respectively the first CPU, first switching chip, and first network card. Line card b is the first line card, and its CPU, switching chip, and network card are respectively the second CPU, second switching chip, and second network card. The preset mapping relationship represents the relationship between each CPU core of line card b and the value of the corresponding VLAN TAG. Both line cards a and b are configured with a global next hop, identified as ID1, and its exit is the connection port of the switching chip and network card of this line card. The transmission process is as follows:

[0113] S11: The first CPU adds a VLAN TAG to the packet and assigns a value to the VLAN TAG according to the preset mapping relationship;

[0114] S12: The first CPU sends the message and ID1 to the second switching chip through the first switching chip according to the global next hop;

[0115] S13: The second switching chip finds the local global next hop based on ID1 and sends the packet to the second network card for processing based on the local global next hop;

[0116] S14: The second network interface card (NIC) uses the TLAN TAG hash to place the packet into the corresponding queue based on the hash result.

[0117] S15: The corresponding CPU core of the second CPU retrieves the message from the corresponding queue and processes it.

[0118] Scenario 2: The second line card is line card type 1, and the first line card is line card type 2.

[0119] For scenario two, please refer to Figure 5 , Figure 5This is an example diagram illustrating the packet forwarding interaction between line card 1 (transmitter) and line card 2 (receiver) in this embodiment. Line card a is the second line card and includes a first CPU, a first switching chip, and a first network interface card (NIC). Line card b is the first line card and includes a second CPU, a second switching chip, and a second NIC. A preset mapping relationship represents the relationship between each CPU core of line card b and the corresponding VLAN TAG value. Line cards a and b are configured with a global next hop, identified by ID2 respectively. The exit point is the connection port of the switching chip and NIC of line card b. An editable action is configured to replace the TPID in the packet with a preset standard value. The sending process is as follows:

[0120] S21: The first CPU adds a VLAN tag to the packet and assigns a value to the VLAN tag according to the preset mapping relationship;

[0121] S22: The first CPU sends the packet and ID2 to the second switching chip through the first switching chip according to the global next hop;

[0122] S23: The second switching chip finds the local global next hop based on ID2, and replaces the TPID in the packet with a preset standard value based on the local global next hop;

[0123] S24: The second switching chip sends the message with the replaced TPID to the second network card.

[0124] S25: The second network interface card (NIC) uses the TLAN TAG hash to place the packet into the corresponding queue based on the hash result.

[0125] S26: The corresponding CPU core of the second CPU retrieves the message from the corresponding queue and processes it.

[0126] Scenario 3: The second line card is line card type 2, and the first line card is line card type 1.

[0127] For scenario three, please refer to... Figure 6 , Figure 6 This is an example diagram illustrating the packet forwarding interaction between line card type 2 (send) and line card type 1 (receive) provided in this embodiment. Line card a is the second line card, and its CPU, switching chip, and network card are respectively the first CPU, first switching chip, and first network card. Line card b is the first line card, and its CPU, switching chip, and network card are respectively the second CPU, second switching chip, and second network card. A preset mapping relationship represents the relationship between each CPU core of line card b and the corresponding VLAN TAG value. Line cards a and b are configured with a global next hop, with ID1 as their identifier. The exit point is the connection port of the switching chip and network card of line card b. The sending process is as follows:

[0128] S31: The first CPU adds a VLAN tag to the packet and assigns a value to the VLAN tag according to the preset mapping relationship;

[0129] S32: The first CPU sends the message and ID1 to the second switching chip through the first switching chip according to the global next hop;

[0130] S33: The second switching chip finds the local global next hop based on ID1, and sends the packet to the second network card for processing based on the local global next hop;

[0131] S34: The second network interface card sends the packet to the corresponding queue according to the TLAN TAG hash;

[0132] S35: The corresponding CPU core of the second CPU retrieves the message from the corresponding queue and processes it.

[0133] Scenario 4: The second line card is line card type 2, and the first line card is line card type 2.

[0134] For scenario four, please refer to... Figure 7 , Figure 7 This is an example diagram illustrating the interaction of packet forwarding between two line cards of type 2 provided in this embodiment. Line card a is the second line card, and its CPU, switching chip, and network card are respectively the first CPU, first switching chip, and first network card. Line card b is the first line card, and its CPU, switching chip, and network card are respectively the second CPU, second switching chip, and second network card. The preset mapping relationship represents the relationship between each CPU core of line card b and the value of the corresponding VLAN TAG. Line cards a and b are configured with a global next hop, identified by ID2 respectively. The exit point is the connection port of the switching chip and network card of line card b. An editable action is configured to replace the TPID in the packet with a preset standard value. The sending process is as follows:

[0135] S41: The first CPU adds a VLAN tag to the packet and assigns a value to the VLAN tag according to the preset mapping relationship;

[0136] S42: The first CPU sends the message and ID2 to the second switching chip through the first switching chip according to the global next hop;

[0137] S43: The second switching chip finds the local global next hop based on ID2, and replaces the TPID in the packet with a preset standard value based on the local global next hop;

[0138] S44: The second switching chip sends the message with the replaced TPID to the second network card.

[0139] S45: The second network interface card sends the packet to the corresponding queue according to the TLAN TAG hash;

[0140] S46: The corresponding CPU core of the second CPU retrieves the message from the corresponding queue and processes it.

[0141] This invention also provides a distributed routing device, which includes at least one line card. Each line card includes a switching chip, a network card, and a multi-core CPU. Each line card is configured with an Equal Cost Multipath (ECMP) group. The ECMP group includes ECMP members that correspond one-to-one with the CPU cores of the corresponding line card. The switching chip of each line card is pre-configured with a local next hop, and the route of the local next hop is configured as an ECMP group.

[0142] At least one line card in the first line card has a switching chip for receiving messages to be processed through a panel port;

[0143] The switching chip of the first line card is used to select the ECMP member from multiple ECMP members for routing the packets to be processed;

[0144] The network interface card (NIC) of the first line is used to send the packets to be processed to the CPU core corresponding to the selected ECMP member for processing, based on the selected ECMP member.

[0145] In an optional implementation, the switching chip of the first line card is also used to add a flow splitting configuration to the message to be processed and send the message with the added flow splitting configuration to the network card of the first line card. The flow splitting configuration is used to specify the CPU core of the first line card that processes the message to be processed.

[0146] The network card of the first line card is also used to send the packets to be processed to the designated CPU core for processing according to the traffic distribution configuration.

[0147] In an optional implementation, the switching chip of the first line card adds a VLAN tag to the packet to be processed:

[0148] If the network card of the first line card is a network card that can recognize the Ethernet type field, the network card of the first line card is also used to assign values ​​to the VLAN TAG in the packet to be processed according to the specified CPU core and the preset mapping relationship. The preset mapping relationship represents the relationship between each CPU core of the first line card and the corresponding VLAN TAG value.

[0149] In an optional implementation, the switching chip of the first line card adds a VLAN tag to the packet to be processed. If the network card of the first line card is a network card that can recognize the VLAN ID field in the VLAN tag, the switching chip of the first line card is also used to add a new VLAN tag to the packet to be processed that has already had a VLAN tag added. The network card of the first line card is also used to assign a value to the new VLAN tag according to the specified CPU core and the preset mapping relationship. The preset mapping relationship represents the relationship between each CPU core of the first line card and the value of the corresponding VLAN tag.

[0150] In an optional implementation, there are multiple line cards, including a second line card for transmitting messages across cards. The switching chips of the first and second line cards are both configured with a global next hop.

[0151] The CPU of the second line card is also used to receive the message to be sent to the first line card and add VLAN TAG to the message to be sent.

[0152] The CPU of the second line card is also used to assign values ​​to the VLAN TAG added to the message to be sent according to the preset mapping relationship, so as to specify the CPU core of the first line card that processes the message to be sent. The preset mapping relationship represents the relationship between each CPU core of the first line card and the value of the corresponding VLAN TAG.

[0153] The CPU of the second line card is also used to send the global next hop of this line card and the message to be sent to the first line card through the stacking port of the switching chip of the second line card.

[0154] The switching chip of the first line card is also used to receive the message to be sent through the stacking port and send the received message to the network card of the first line card according to the received global next hop.

[0155] The network card of the first line card is also used to send the received packet to the corresponding CPU core for processing based on the VLAN TAG in the received packet.

[0156] In an optional implementation, if the network card of the first line card is a network card that can recognize the Ethernet type field, then the switching chip of the first line card is also used to directly send the received message to the network card of the first line card.

[0157] In an optional implementation, if the network card of the first line card is a network card that can recognize the VLAN ID field in the VLAN TAG, then the switching chip of the first line card is also used to replace the TPID in the VLAN TAG of the received packet with a preset standard value.

[0158] The switching chip of the first line card is also used to send the replaced message to the network card of the first line card.

[0159] In an optional implementation, the switching chip of the first line card is also used to select an ECMP member from multiple ECMP members for forwarding the packets to be processed according to a round-robin allocation strategy.

[0160] In summary, this invention provides a packet splitting method and a distributed routing device. The method is applied to a distributed routing device, which includes at least one line card. Each line card includes a switching chip, a network interface card (NIC), and a multi-core CPU. The line card is configured with an Equal Cost Multipath (ECMP) group. The ECMP group includes ECMP members that correspond one-to-one with the CPU queues of the NICs of the corresponding line card. Each ECMP member is a local next hop pre-configured by the switching chip of the line card. The method includes: the switching chip of the first line card receives packets to be processed through a panel port; the first line card is any line card of the distributed routing device; the switching chip of the first line card selects an ECMP member from the ECMP group for forwarding the packets to be processed and sends the processed packets to the NIC of the first line card; the NIC of the first line card sends the packets to be processed to the corresponding CPU queue according to the information carried by the processed packets so that the corresponding CPU core can process them. Compared with the prior art, the embodiments of the present invention have at least the following advantages: (1) It enables the packets to be evenly distributed to each CPU core for processing, which fully improves the packet processing capability of the multi-core CPU; (2) Based on the inherent function of the switching chip, the VLAN TAG information of the packet is modified by the switching chip to shield the differences caused by different network cards; (3) It can be flexibly applied according to the packet field type that the network card can hash, which is relatively simple to implement.

[0161] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A message splitting method, characterized in that, The method is applied to a distributed routing device, which includes at least one line card. Each line card includes a switching chip, a network interface card (NIC), and a multi-core CPU. The line card is configured with an Equal Cost Multipath (ECMP) group, where each ECMP group includes ECMP members that correspond one-to-one with the CPU queues of the NIC. Each ECMP member is a pre-configured local next hop for the switching chip of the line card. The switching chip of the first line card receives messages to be processed through the panel port; the first line card can be any line card of the distributed routing device. The switching chip of the first line card selects an ECMP member from the ECMP group to forward the packet to be processed, and sends the processed packet to the network card of the first line card. The network card of the first line card sends the message to be processed to the corresponding CPU queue according to the information carried in the processed message so that the corresponding CPU core can process it.

2. The message routing method as described in claim 1, characterized in that, The step of the switching chip of the first line card selecting an ECMP member from the ECMP group to forward the packet to be processed, and sending the processed packet to the network card of the first line card includes: The switching chip of the first line card selects an ECMP member from the ECMP group to forward the packet to be processed, adds a traffic splitting configuration to the packet to be processed according to the selected ECMP member, and sends the packet with the added traffic splitting configuration to the network card of the first line card. The traffic splitting configuration is used to indicate the CPU queue for processing the packet to be processed.

3. The message routing method as described in claim 2, characterized in that, The step of the first line card's switching chip adding a traffic offloading configuration to the message to be processed includes: The switching chip of the first line card adds a VLAN tag to the packet to be processed; If the network card of the first line card is a network card that can recognize the Ethernet type field, then the switching chip of the first line card assigns a value to the VLAN TAG in the packet to be processed according to the specified CPU core and the preset mapping relationship. The preset mapping relationship represents the relationship between each CPU queue of the first line card and the value of the corresponding VLAN TAG.

4. The message routing method as described in claim 2, characterized in that, The step of the first line card's switching chip adding a traffic offloading configuration to the message to be processed includes: The switching chip of the first line card adds a VLAN tag to the packet to be processed; If the network card of the first line card is a network card that can recognize the VLAN ID field in the VLAN TAG, then the switching chip of the first line card adds a new VLAN TAG to the unprocessed packet that has already been added with the VLAN TAG; The network card of the first line card assigns a value to the new VLAN TAG according to the specified CPU core and the preset mapping relationship. The preset mapping relationship represents the relationship between each CPU core of the first line card and the value of the corresponding VLAN TAG.

5. The message routing method as described in claim 1, characterized in that, The distributed routing device comprises multiple line cards, including a second line card in addition to the first line card. Both the switching chips of the first and second line cards are configured with a global next hop. The method further includes: The CPU of the second line card receives the message to be sent to the first line card and adds a VLAN tag to the message to be sent; The CPU of the second line card assigns a value to the VLAN TAG added to the message to be sent according to a preset mapping relationship, so as to specify the CPU core of the first line card that processes the message to be sent. The preset mapping relationship represents the relationship between each CPU core of the first line card and the value of the corresponding VLAN TAG. The CPU of the second line card sends the global next hop of the line card and the message to be sent to the stacking port of the switching chip of the first line card through the stacking port of the switching chip of the second line card; The switching chip of the first line card receives the message to be sent through the stacking port and sends the received message to the network card of the first line card according to the received global next hop; The network card of the first line card sends the received packet to the corresponding CPU core for processing according to the VLAN TAG in the received packet.

6. The message routing method as described in claim 5, characterized in that, The steps of the switching chip of the first line card receiving the message to be sent through the stacking port and sending the received message to the network card of the first line card according to the received global next hop include: If the network interface card (NIC) of the first line card is a NIC that can recognize the Ethernet type field, then the switching chip of the first line card will directly send the received message to the NIC of the first line card.

7. The message routing method as described in claim 5, characterized in that, The steps of the switching chip of the first line card receiving the message to be sent through the stacking port and sending the received message to the network card of the first line card according to the received global next hop include: If the network card of the first line card is a network card that can recognize the VLAN ID field in the VLAN TAG, then the switching chip of the first line card will replace the TPID in the VLAN TAG of the received packet with a preset standard value; The switching chip of the first line card sends the replaced message to the network card of the first line card.

8. The message routing method as described in claim 1, characterized in that, The step of the switching chip of the first line card selecting an ECMP member from the ECMP member group to forward the message to be processed includes: The switching chip of the first line card selects an ECMP member from the ECMP group to forward the message to be processed according to a round-robin allocation strategy.

9. A distributed routing device, characterized in that, The distributed routing device includes at least one line card, which includes a switching chip, a network card, and a multi-core CPU. Each line card is configured with an Equal Cost Multipath (ECMP) group. The ECMP group includes ECMP members that correspond one-to-one with the CPU queues of the network card of the corresponding line card. Each ECMP member is a local next hop pre-configured by the switching chip of the line card. The switching chip of the first line card is used to receive messages to be processed through the panel port; The first line card can be any line card of the distributed routing device; The switching chip of the first line card is used to select an ECMP member from the ECMP group for forwarding the packet to be processed, and send the processed packet to the network card of the first line card. The network interface card of the first line card is used to send the message to be processed to the corresponding CPU queue according to the information carried by the processed message so that the corresponding CPU core can process it.

10. The distributed routing device as described in claim 9, characterized in that: The switching chip of the first line card is also used to select an ECMP member from the ECMP group to forward the packet to be processed, add a traffic splitting configuration to the packet to be processed according to the selected ECMP member, and send the packet with the added traffic splitting configuration to the network card of the first line card. The traffic splitting configuration is used to indicate the CPU queue for processing the packet to be processed.

Images