Current to voltage conversion circuit

Abstract

This disclosure provides a current-to-voltage circuit, comprising: an operational amplifier module, a common-mode control circuit, and an offset calibration module. The operational amplifier module is configured to convert an input current into a differential voltage output via a first operational amplifier and a second operational amplifier. The common-mode control circuit is configured to provide common-mode bias voltages to the first and second operational amplifiers, respectively. The offset calibration module is configured to perform zero-adjustment calibration of the operational amplifier offset voltage based on a current-driven digital-to-analog converter. This addresses the problem of reducing the impact of common-mode voltage and operational amplifier input offset voltage on output voltage accuracy.

Description

Technical Field

[0001] Embodiments of this disclosure relate to the field of integrated circuit technology, and more specifically, to current-to-voltage circuits. Background Technology

[0002] In control systems, current is frequently measured and monitored. By converting current signals into voltage signals, it becomes easier to amplify, filter, and regulate the signals.

[0003] Traditional current-to-voltage conversion circuits are implemented using a transimpedance amplifier, such as... Figure 1 As shown, the positive input terminal of the op-amp is connected to the common-mode voltage Vcom, and the current Iin is input from the negative input terminal. The output voltage Vout = Vcom - Iin * Rcs - Vos, where Rcs is the switching resistor and Vos is the input offset voltage of the op-amp. From the above expression, it can be seen that Vout is related to the common-mode voltage Vcom and the op-amp input offset voltage Vos. In practical applications, maintaining a stable Vcom voltage is difficult. Furthermore, due to manufacturing process errors, op-amps from the same batch may have different input offset voltages Vos. Therefore, the accuracy of the output voltage is affected by both the common-mode voltage Vcom and the op-amp input offset voltage Vos.

[0004] In summary, in current-to-voltage circuits, reducing the impact of common-mode voltage and op-amp input offset voltage on output voltage accuracy is a problem that urgently needs to be solved. Summary of the Invention

[0005] The embodiments described herein provide a current-to-voltage circuit to address the problem of how to reduce the impact of common-mode voltage and op-amp input offset voltage on output voltage accuracy.

[0006] According to a first aspect of this disclosure, a current-to-voltage circuit is provided, comprising: an operational amplifier module, a common-mode control circuit, and an offset calibration module, wherein the operational amplifier module is configured to convert an input current into a differential voltage output through a first operational amplifier and a second operational amplifier; the common-mode control circuit is configured to provide common-mode bias voltages to the first operational amplifier and the second operational amplifier respectively; and the offset calibration module is configured to perform zero-adjustment calibration of the operational amplifier offset voltage of the operational amplifier module according to a current-driven digital-to-analog converter.

[0007] Optionally, the operational amplifier module includes: a first operational amplifier, a second operational amplifier, a switching resistor, a first resistor, and a second resistor. The positive input terminals of both the first and second operational amplifiers are coupled to a first common-mode bias voltage. The negative input terminal of the first operational amplifier is coupled to one end of the first resistor and one end of the second resistor, respectively. The negative input terminal of the second operational amplifier is coupled to the input current, one end of the switching resistor, and the second common-mode bias voltage, respectively. The output terminal of the first operational amplifier is coupled to the other end of the first resistor, and the output terminal of the second operational amplifier is coupled to the other end of the second resistor and the other end of the switching resistor, respectively. The common-mode bias voltage includes the first common-mode bias voltage and the second common-mode bias voltage. The output terminal of the first operational amplifier outputs a first output voltage, and the output terminal of the second operational amplifier outputs a second output voltage. The differential voltage is the difference between the first output voltage and the second output voltage. The resistance values ​​of the first resistor and the second resistor are equal.

[0008] Optionally, the common-mode control circuit includes: a common-mode current generation module, a third resistor, and a fourth resistor, wherein the common-mode current generation module is configured to output a first current and a second current according to a current mirror, the first current and the second current being a set of common-mode currents; the third resistor is configured to generate a first common-mode bias voltage with the first current; and the fourth resistor is configured to generate a second common-mode bias voltage with the second current.

[0009] Optionally, the common-mode current generating module includes: a current source, a first transistor, a second transistor, and a third transistor, wherein the source of the first transistor, the source of the second transistor, and the source of the third transistor are all coupled to a power supply voltage, the control electrode of the first transistor, the control electrode of the second transistor, and the control electrode of the third transistor are all coupled to the drain of the first transistor, the drain of the first transistor is also coupled to one end of the current source, the other end of the current source is coupled to a ground terminal, the drain of the second transistor generates the first current, the drain of the third transistor generates the second current, and both the first current and the second current are equal to the current value of the current source.

[0010] Optionally, one end of the third resistor is coupled to the drain of the second transistor, the positive input terminal of the first operational amplifier, and the positive input terminal of the second operational amplifier, respectively, and the other end of the third resistor is coupled to the ground terminal; one end of the fourth resistor is coupled to the drain of the third transistor and the negative input terminal of the second operational amplifier, respectively, and the other end of the fourth resistor is coupled to the ground terminal.

[0011] Optionally, the offset calibration module includes the current-steering digital-to-analog converter (DAC), the input of which is a calibration signal. The first output terminal of the DAC is coupled to the negative input terminal of the second operational amplifier, and the second output terminal is coupled to the positive input terminal of the first operational amplifier and the positive input terminal of the second operational amplifier, respectively. The first output terminal outputs a third current, and the second output terminal outputs a fourth current. The third current and the fourth current form a differential current.

[0012] Optionally, the differential voltage is calculated according to the following formula: Vop-Von=2*Iin*Rcs, where Vop-Von is the differential voltage, Iin is the input current, and Rcs is the conversion resistor.

[0013] Optionally, the calibration signal is adjusted based on the comparison result between the op-amp offset voltage and zero voltage, wherein the op-amp offset voltage is equal to the voltage value of the differential voltage when the input current is zero.

[0014] Optionally, adjusting the calibration signal based on the comparison result of the op-amp offset voltage and zero voltage includes: decreasing the calibration signal if the op-amp offset voltage is greater than zero voltage; increasing the calibration signal if the op-amp offset voltage is less than zero voltage; and keeping the calibration signal unchanged if the op-amp offset voltage is equal to zero voltage.

[0015] Optionally, the resistance values ​​of the third resistor and the fourth resistor are equal.

[0016] In the current-to-voltage circuit of this disclosure, the input current is converted into a differential voltage output by an operational amplifier module, which eliminates the influence of common-mode voltage on the output voltage. Furthermore, the offset calibration module performs zero-adjustment calibration on the input offset voltage of the operational amplifier in the operational amplifier module, eliminating the influence of the operational amplifier input offset voltage on the output voltage. In summary, compared to existing current-to-voltage circuits, the current-to-voltage circuit of this disclosure is unaffected by common-mode voltage and operational amplifier input offset voltage, thereby ensuring the accuracy of the output voltage. Attached Figure Description

[0017] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings of the embodiments will be briefly described below. It should be understood that the drawings described below only relate to some embodiments of this disclosure and are not intended to limit this disclosure, wherein:

[0018] Figure 1 A schematic block diagram of an existing current-to-voltage circuit is shown.

[0019] Figure 2A schematic block diagram of a current-to-voltage circuit according to an embodiment of the present disclosure is shown;

[0020] Figure 3 A schematic circuit diagram of a current-to-voltage conversion circuit according to an embodiment of the present disclosure is shown;

[0021] The elements in the attached diagram are schematic and not drawn to scale. Detailed Implementation

[0022] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are also within the scope of protection of this disclosure.

[0023] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this subject matter pertains. It will be further understood that terms such as those defined in commonly used dictionaries shall be interpreted as having a meaning consistent with their meaning in the context of the specification and in the related art, and shall not be interpreted in an idealized or overly formal form unless otherwise explicitly defined herein. As used herein, statements that “connect” or “couple” two or more parts together shall mean that these parts are directly joined together or joined through one or more intermediate components. Furthermore, terms such as “first” and “second” are used only to distinguish one component (or part of a component) from another component (or another part of a component).

[0024] To address the issue of reducing the impact of common-mode voltage and operational amplifier input offset voltage on output voltage accuracy, a novel current-to-voltage circuit structure is proposed. The current-to-voltage circuit of this disclosure converts the input current into a differential voltage output, eliminating the influence of common-mode voltage on the output voltage. Simultaneously, it adds an operational amplifier offset voltage calibration function to calibrate the operational amplifier's input offset voltage, thereby eliminating its influence on the output voltage. The current-to-voltage circuit of this disclosure will be described in detail below.

[0025] Figure 2 A schematic block diagram of a current-to-voltage circuit 100 according to an embodiment of the present disclosure is shown. The current-to-voltage circuit 100 includes an operational amplifier module 110, a common-mode control circuit 120, and an offset calibration module 130.

[0026] The operational amplifier module 110 is coupled to the common-mode control circuit 120 and the offset calibration module 130, respectively. The operational amplifier module 110 is configured to convert the input current Iin into a differential voltage Vop-Von output through a first operational amplifier and a second operational amplifier. The first and second operational amplifiers are operational amplifiers with identical parameters and performance. In this embodiment, the operational amplifier module 110 converts the input current Iin into a differential voltage Vop-Von. Compared to existing methods where the output voltage is a single-channel output voltage, this eliminates the influence of Vcom on the output voltage, thereby ensuring the accuracy of the current-to-voltage circuit.

[0027] The common-mode control circuit 120 is coupled to the operational amplifier module 110. The common-mode control circuit 120 is configured to provide common-mode bias voltages to the first operational amplifier and the second operational amplifier, respectively. In this embodiment, the common-mode control circuit 120 provides a fixed voltage bias to the operational amplifiers (first operational amplifier and second operational amplifier) ​​in the operational amplifier module 110, so that they operate at an intermediate voltage between the power supply voltage and the ground terminal, thereby ensuring that the gain and linearity of the operational amplifiers are in a good state.

[0028] The offset calibration module 130 is coupled to the operational amplifier module 110. The offset calibration module 130 is configured to zero-calibrate the operational amplifier offset voltage of the operational amplifier module 110 according to the current-driven digital-to-analog converter 131. Here, the operational amplifier offset voltage is the operational amplifier input offset voltage. Typically, operational amplifiers have an operational amplifier input offset voltage; therefore, the first and second operational amplifiers in the operational amplifier module 110 also have operational amplifier input offset voltages. The presence of these operational amplifier input offset voltages affects the current-to-voltage output. In this embodiment, the offset calibration module 130 calibrates the operational amplifier input offset voltages of the first and second operational amplifiers in the operational amplifier module 110 to zero, thus not affecting the current-to-voltage output and ensuring the accuracy of the current-to-voltage circuit. Furthermore, the input of the offset calibration module 130 is a calibration signal, and the output is a differential current related to the calibration signal.

[0029] In the current-to-voltage circuit of this disclosure, the input current Iin is converted into a differential voltage Vop-Von output by the operational amplifier module 110, which can eliminate the influence of common-mode voltage on the output voltage. Furthermore, the offset calibration module 130 performs zero-adjustment calibration on the input offset voltage of the operational amplifier in the operational amplifier module 110, eliminating the influence of the operational amplifier input offset voltage on the output voltage. In summary, compared to existing current-to-voltage circuits, the current-to-voltage circuit of this disclosure is unaffected by common-mode voltage and operational amplifier input offset voltage, thereby ensuring the accuracy of the output voltage.

[0030] Furthermore, such as Figure 3 As shown, the operational amplifier module 110 includes: a first operational amplifier 111, a second operational amplifier 112, a switching resistor Rcs, a first resistor 113, and a second resistor 114. The positive input terminals of both the first operational amplifier 111 and the second operational amplifier 112 are coupled to a first common-mode bias voltage. The negative input terminal of the first operational amplifier 111 is coupled to one end of the first resistor 113 and one end of the second resistor 114, respectively. The negative input terminal of the second operational amplifier 112 is coupled to the input current Iin, one end of the switching resistor Rcs, and the second common-mode bias voltage, respectively. The first operational amplifier 111... The output terminal of the first operational amplifier 111 is coupled to the other end of the first resistor 113, and the output terminal of the second operational amplifier 112 is coupled to the other end of the second resistor 114 and the other end of the conversion resistor Rcs, respectively. The common-mode bias voltage includes the first common-mode bias voltage and the second common-mode bias voltage. The output terminal of the first operational amplifier 111 outputs a first output voltage Vop, and the output terminal of the second operational amplifier 112 outputs a second output voltage Von. The differential voltage is the difference between the first output voltage Vop and the second output voltage Von, Vop-Von. The resistance values ​​of the first resistor 113 and the second resistor 114 are equal. Figure 3 As shown, the resistance value is RL. The first resistor 113 and the second resistor 114 are to ensure that the common-mode bias voltage output by the common-mode control circuit 120 is stable. Figure 3 In the diagram, the voltage at the positive input terminal of the first operational amplifier 111 is denoted as V1, the voltage at the negative input terminal of the first operational amplifier 111 is denoted as V2, the voltage at the positive input terminal of the second operational amplifier 112 is the same as the voltage at the positive input terminal of the first operational amplifier 111, and the voltage at the negative input terminal of the second operational amplifier 112 is denoted as V3.

[0031] like Figure 3 As shown, the common-mode control circuit 120 includes: a third resistor 121, a fourth resistor 122, and a common-mode current generation module 123. The common-mode current generation module 123 is configured to output a first current I1 and a second current I2 based on a current mirror, where the first current I1 and the second current I2 constitute a set of common-mode currents. The third resistor 121 is configured to generate a first common-mode bias voltage with the first current I1. The fourth resistor 122 is configured to generate a second common-mode bias voltage with the second current I2. The first common-mode bias voltage is the voltage at node A, and the second common-mode bias voltage is the voltage at node B.

[0032] Furthermore, such as Figure 3As shown, the common-mode current generating module 123 includes: a current source 123, a first transistor M1, a second transistor M2, and a third transistor M3. The sources of the first transistor M1, the second transistor M2, and the third transistor M3 are all coupled to the power supply voltage VDD. The control terminals of the first transistor M1, the second transistor M2, and the third transistor M3 are all coupled to the drain of the first transistor M1. The drain of the first transistor M1 is also coupled to one end of the current source 123, and the other end of the current source 123 is coupled to ground. The drain of the second transistor M2 generates the first current I1, and the drain of the third transistor M3 generates the second current I2. M2 and M3 are current mirrors with a current mirror ratio of 1, and M1 and M3 are also current mirrors with a current mirror ratio of 1. I1 and I2 both mirror the current of the current source 1231. Therefore, the first current I1 and the second current I2 are both equal to the current value Icom of the current source 1231. One end of the third resistor 121 is coupled to the drain of the second transistor M2, the positive input terminal of the first operational amplifier 111, and the positive input terminal of the second operational amplifier 112, respectively; the other end of the third resistor 121 is coupled to the ground terminal. One end of the fourth resistor 122 is coupled to the drain of the third transistor M3 and the negative input terminal of the second operational amplifier 112, respectively; the other end of the fourth resistor 122 is coupled to the ground terminal. The resistance values ​​of the third resistor 121 and the fourth resistor 122 are equal. Figure 3 As shown, all are equal to Rcom.

[0033] like Figure 3 As shown, the offset calibration module 130 includes a current-steering digital-to-analog converter 131. The input of the current-steering digital-to-analog converter 131 is the calibration signal Trim. The first output terminal of the current-steering digital-to-analog converter 131 is coupled to the negative input terminal of the second operational amplifier 112. The second output terminal of the current-steering digital-to-analog converter 131 is coupled to the positive input terminal of the first operational amplifier 111 and the positive input terminal of the second operational amplifier 112, respectively. The first output terminal outputs a third current Itrp, and the second output terminal outputs a fourth current Itrn. The third current Itrp and the fourth current Itrn form a differential current.

[0034] Combination Figure 3 The circuit principle of the current-to-voltage circuit 100 according to an embodiment of this disclosure will be explained as follows:

[0035] The first operational amplifier 111 and the second operational amplifier 112 operate in negative feedback mode. After the circuit is stable, V1 = V2 + Vos1 can be obtained for the first operational amplifier 111, and V1 = V3 + Vos2 can be obtained for the second operational amplifier 112, where Vos1 and Vos2 are the input offset voltages of the first operational amplifier 111 and the second operational amplifier 112, respectively.

[0036] According to Kirchhoff's current law, the sum of all currents flowing into node V3 (the negative input terminal of the second operational amplifier 112) is zero, and I2 = Icom. Therefore, the following equation can be obtained:

[0037] Icom+Itrp+Iin+(0-V3) / Rcom+(Von-V3) / Rcs=0, (1)

[0038] Since V3 = V1 - Vos2, after replacing V3, the above equation becomes:

[0039] Icom+Itrp+Iin+(Vos2-V1) / Rcom+(Von-V1+Vos2) / Rcs=0, (2)

[0040] V1 is the voltage across Rcom (i.e., the first common-mode bias voltage), and I1 = Icom, so we can get V1 = (Icom + Itrn) * Rcom. After replacing the first V1 in the above equation (2), we can get:

[0041] Icom+Itrp+Iin+[Vos2-(Icom+Itrn)*Rcom] / Rcom+(Von-V1+Vos2) / Rcs=0, (3)

[0042] The above equation (3) can be simplified to obtain:

[0043] Itrp-Itrn+Iin+Vos2 / Rcom+(Von-V1+Vos2) / Rcs=0, (4)

[0044] Replacing V1 with V2+Vos1 in equation (4) yields:

[0045] Itrp-Itrn+Iin+Vos2 / Rcom+(Von-V2-Vos1+Vos2) / Rcs=0, (5)

[0046] According to Kirchhoff's current law, the total current flowing into node V2 (the negative input terminal of the first operational amplifier 111) is zero, therefore:

[0047] (Vop-V2) / RL+(Von-V2) / RL=0, so V2=0.5*(Vop+Von). Substituting this into the aforementioned equation (5), we get:

[0048] Itrp-Itrn+Iin+Vos2 / Rcom+[Von-0.5*(Vop+Von)-Vos1+Vos2] / Rcs=0, (6)

[0049] The above equation (6) can be simplified to obtain:

[0050] Itrp-Itrn+Iin+Vos2 / Rcom+[0.5*(Von-Vop)-Vos1+Vos2] / Rcs=0, (7)

[0051] Multiplying both sides of equation (7) by 2*Rcs and simplifying, we get:

[0052] Vop-Von=2*Iin*Rcs+2*[(Itrp-Itrn)*Rcs+(Rcs / Rcom+1)*Vos2-Vos1], (8)

[0053] Total offset voltage (the input offset voltage jointly generated by the first operational amplifier 111 and the second operational amplifier 112) Vos = 2 * [(Itrp - Itrn) * Rcs + (Rcs / Rcom + 1) * Vos2 - Vos1],

[0054] Then equation (8) becomes Vop-Von=2*Iin*Rcs+Vos;(9)

[0055] To eliminate the influence of the input offset voltage generated by the first operational amplifier 111 and the second operational amplifier 112 on the output voltage, Vos needs to be calibrated to 0. Calibrating Vos to 0 only requires adjusting the Trim signal to output a suitable offset calibration differential current (Itrp-Itrn) so that Vos is 0. Specifically, during calibration, the calibration signal Trim is adjusted based on the comparison between the operational amplifier offset voltage Vos and zero voltage. The operational amplifier offset voltage Vos is equal to the differential voltage Vop-Von when the input current Iin is zero. Specifically, the adjustment of the calibration signal Trim based on the comparison between the operational amplifier offset voltage Vos and zero voltage is as follows: if the operational amplifier offset voltage Vos is greater than zero voltage, decrease the calibration signal Trim; if the operational amplifier offset voltage Vos is less than zero voltage, increase the calibration signal Trim; if the operational amplifier offset voltage Vos is equal to zero voltage, the calibration signal Trim remains unchanged. The calibration process described above is as follows: Set the input current Iin to 0, then measure the value of the differential voltage Vop-Von, which is the total offset voltage Vos. If Vos > 0, decrease the Trim value to decrease Itrp-Itrn until Vos is measured to be 0. If Vos < 0, increase the Trim value to increase Itrp-Itrn until Vos is measured to be 0.

[0056] After calibrating Vos to 0, the influence of the op-amp input offset voltage on the output voltage is eliminated. Furthermore, after Vos is calibrated to 0, the output differential voltage Vop-Von is: Vop-Von = 2 * Iin * Rcs, meaning the output voltage of the current-to-voltage circuit is 2 * Iin * Rcs. This demonstrates that the output voltage of the current-to-voltage circuit is unaffected by the common-mode voltage.

[0057] In summary, the current-to-voltage circuit in this embodiment converts the input current into a differential voltage output. Compared with existing current-to-voltage circuits, it eliminates the influence of common-mode voltage and adds an operational amplifier offset voltage calibration function to calibrate the input offset voltage of the operational amplifier, thereby eliminating its influence on the output voltage and ensuring the accuracy of the current-to-voltage circuit.

[0058] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of apparatuses and methods according to various embodiments of the present disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of an instruction, which contains one or more executable instructions for implementing a specified logical function. In some alternative implementations, the functions marked in the blocks may occur in a different order than those marked in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0059] Unless otherwise expressly indicated by the context, the singular form of words used herein and in the appended claims includes the plural form, and vice versa. Thus, when referring to the singular, the plural form of the corresponding term is generally included. Similarly, the terms “comprising” and “including” shall be interpreted as including rather than exclusively. Likewise, the terms “including” and “or” shall be interpreted as including unless such interpretation is expressly prohibited herein. Where the term “example” is used herein, particularly when it follows a set of terms, “example” is merely exemplary and illustrative and should not be considered exclusive or extensive.

[0060] Further aspects and scope of adaptation become apparent from the description provided herein. It should be understood that various aspects of this disclosure may be implemented individually or in combination with one or more other aspects. It should also be understood that the descriptions and specific embodiments herein are for illustrative purposes only and are not intended to limit the scope of this disclosure.

[0061] Several embodiments of this disclosure have been described in detail above. However, it is obvious that those skilled in the art can make various modifications and variations to the embodiments of this disclosure without departing from the spirit and scope of this disclosure. The scope of protection of this disclosure is defined by the appended claims.

Claims

1. A current-to-voltage circuit, characterized in that, The current-to-voltage conversion circuit includes: an operational amplifier module, a common-mode control circuit, and an offset calibration module. The operational amplifier module is configured to convert the input current into a differential voltage output through a first operational amplifier and a second operational amplifier, thereby eliminating the influence of common-mode voltage on the output voltage. The operational amplifier module includes: a first operational amplifier, a second operational amplifier, a switching resistor, a first resistor, and a second resistor. The positive input terminals of both the first and second operational amplifiers are coupled to a first common-mode bias voltage. The negative input terminal of the first operational amplifier is coupled to one end of the first resistor and one end of the second resistor, respectively. The negative input terminal of the second operational amplifier is coupled to the input current, one end of the switching resistor, and the second common-mode bias voltage, respectively. The output terminal of the first operational amplifier is coupled to the other end of the first resistor, and the output terminal of the second operational amplifier is coupled to the other end of the second resistor and the other end of the switching resistor, respectively. The common-mode bias voltage includes the first common-mode bias voltage and the second common-mode bias voltage. The output terminal of the first operational amplifier outputs a first output voltage, and the output terminal of the second operational amplifier outputs a second output voltage. The differential voltage is the difference between the first output voltage and the second output voltage. The resistance values ​​of the first resistor and the second resistor are equal. The common-mode control circuit is configured to provide common-mode bias voltages to the first operational amplifier and the second operational amplifier respectively, so that the first operational amplifier and the second operational amplifier operate at a fixed intermediate voltage between the power supply voltage and the ground terminal; The offset calibration module is configured to perform zero-adjustment calibration of the operational amplifier offset voltage of the operational amplifier module according to the current-driven digital-to-analog converter. The offset calibration module includes the current-steering digital-to-analog converter (DAC). The input of the current-steering DAC is a calibration signal. The first output terminal of the current-steering DAC is coupled to the negative input terminal of the second operational amplifier. The second output terminal of the current-steering DAC is coupled to the positive input terminal of the first operational amplifier and the positive input terminal of the second operational amplifier, respectively. The first output terminal outputs a third current, and the second output terminal outputs a fourth current. The third current and the fourth current form a differential current. Vop-Von=2 Iin Rcs+2 [(Itrp-Itrn) Rcs+(Rcs / Rcom+1) Vos2-Vos1]; Wherein, Vop-Von is the differential voltage, Iin is the input current, Itrp-Itrn is the differential current, Rcs is the conversion resistor, Rcom is the resistance value of the third resistor and the fourth resistor, and Vos1 and Vos2 are the input offset voltages of the first operational amplifier and the second operational amplifier, respectively. The calibration process of adjusting the calibration signal based on the comparison result of the op-amp offset voltage and zero voltage is as follows: set the input current to zero, measure the value of the differential voltage to obtain the total offset voltage. If the total offset voltage is greater than zero, decrease the value of the calibration signal to decrease the differential current until the measured total offset voltage is zero. If the total offset voltage is less than zero, increase the value of the calibration signal to increase the differential current until the measured total offset voltage is zero.

2. The current-to-voltage circuit according to claim 1, characterized in that, The common-mode control circuit includes: a common-mode current generation module, a third resistor, and a fourth resistor. The common-mode current generation module is configured to output a first current and a second current based on a current mirror, wherein the first current and the second current constitute a set of common-mode currents. The third resistor is configured to generate the first common-mode bias voltage with the first current; The fourth resistor is configured to generate the second common-mode bias voltage with the second current.

3. The current-to-voltage circuit according to claim 2, characterized in that, The common-mode current generation module includes: a current source, a first transistor, a second transistor, and a third transistor. In this configuration, the source of the first transistor, the source of the second transistor, and the source of the third transistor are all coupled to a power supply voltage. The control terminals of the first transistor, the second transistor, and the third transistor are all coupled to the drain of the first transistor. The drain of the first transistor is also coupled to one end of the current source, and the other end of the current source is coupled to a ground terminal. The drain of the second transistor generates the first current, and the drain of the third transistor generates the second current. Both the first current and the second current are equal to the current value of the current source.

4. The current-to-voltage circuit according to claim 3, characterized in that, One end of the third resistor is coupled to the drain of the second transistor, the positive input terminal of the first operational amplifier, and the positive input terminal of the second operational amplifier, respectively, and the other end of the third resistor is coupled to the ground terminal; One end of the fourth resistor is coupled to the drain of the third transistor and the negative input terminal of the second operational amplifier, respectively, and the other end of the fourth resistor is coupled to the ground terminal.

5. The current-to-voltage circuit according to claim 1, characterized in that, The differential voltage is calculated according to the following formula: Vop-From=2 Iin RCS Wherein, Vop-Von is the differential voltage, Iin is the input current, and Rcs is the conversion resistor.

6. The current-to-voltage circuit according to claim 4, characterized in that, The resistance values ​​of the third resistor and the fourth resistor are equal.

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