Power converter and method of controlling the same

Abstract

The application relates to the technical field of power electronics, in particular to a power converter and a control method thereof. The power converter comprises a power conversion circuit, which comprises at least one pair of switching tubes, and the first end of one switching tube in each pair of switching tubes is connected with the second end of the other switching tube; a control circuit is connected with the power conversion circuit and is used for controlling the power conversion circuit, obtaining an integral charge value representing the total amount of charge variation of one pair of switching tubes after one switching tube in the pair of switching tubes is turned off, and controlling the other switching tube in the pair of switching tubes to be turned on when the integral charge value reaches a corresponding charge threshold value. The application realizes zero-voltage turn-on of the switching tube, avoids the conduction loss of the parasitic diode of the switching tube, and improves the conversion efficiency of the power converter.

Description

Technical Field

[0001] This application relates to the field of power electronics technology, and in particular to a power converter and its control method. Background Technology

[0002] In half-bridge or bridge converters, a dead zone is typically set to prevent bridge arm shoot-through. During the dead zone of the bridge arm commutation process, there is a commutation process from the originally conducting switching device to the parasitic diode of the complementary transistor.

[0003] If the dead time is too short, zero-voltage turn-on cannot be achieved, resulting in additional turn-on losses. If the dead time is set too long, the freewheeling time of the parasitic diode increases. Since the parasitic diodes of switching devices such as MOSFETs, SiC transistors, and GaN transistors typically have large forward voltage drops, this leads to a significant increase in the conduction losses of the switching devices. In practical applications, the commutation time from the previously conducting switching device to its complementary transistor's parasitic diode will vary depending on the current and bus voltage conditions. Therefore, to achieve zero-voltage turn-on under all operating conditions, related technologies often set a large fixed value for the dead time, resulting in an excessively long dead time in most operating conditions and increased conduction losses of the parasitic diodes of the switching devices. Summary of the Invention

[0004] Therefore, it is necessary to provide a power converter and its control method to address the aforementioned technical problems.

[0005] In a first aspect, embodiments of the present invention provide a power converter, the power converter comprising:

[0006] A power conversion circuit includes at least one pair of switching transistors, wherein the first terminal of one switching transistor in each pair is connected to the second terminal of the other switching transistor.

[0007] A control circuit, connected to the power conversion circuit, is used to control the power conversion circuit to obtain an integral charge value representing the total charge change of the pair of switching transistors after one of the switching transistors is turned off, and to control the other switching transistor in the pair to be turned on when the integral charge value reaches the corresponding charge threshold.

[0008] In one embodiment, the control circuit includes:

[0009] The sampling circuit samples the electrical signals of a pair of switching transistors to obtain a sampled signal;

[0010] An integration module, connected to the sampling circuit, integrates the sampled signal to obtain the integrated charge value;

[0011] A controller, connected to the integration module, includes a control module. The control module provides a dead-time signal for controlling the integration module and a control signal for controlling the at least one pair of switching transistors. When one of the switching transistors in the pair is turned off, the dead-time signal controls the integration module to start integrating the sampled signal. When the integrated charge value reaches a charge threshold, the control signal controls the other switching transistor in the pair to turn on.

[0012] In one embodiment, the electrical signal is a current signal that characterizes the magnitude of the current flowing out of and into the connection point of the pair of switching transistors.

[0013] In one embodiment, the control circuit further includes:

[0014] The detection module is used to detect the turn-off time of the switching transistor and provide a detection signal to the control module.

[0015] The comparison module is used to compare the integrated charge value with the charge threshold and output the comparison result to the control module.

[0016] In one embodiment, the control circuit further includes:

[0017] A rectifier circuit, connected between the sampling circuit and the integration module, is used to rectify the sampling signal and output it to the integration module. The integration module integrates the rectified sampling signal to obtain the integrated charge value.

[0018] In one embodiment, the control circuit further includes:

[0019] A rectification selection circuit, connected between the sampling circuit and the integration module, rectifies the sampling signal and selects to output either a first polarity sampling signal corresponding to the current flowing out of the connection point or a second polarity sampling signal corresponding to the current flowing into the connection point, according to the selection signal provided by the controller. The integration module integrates the first polarity sampling signal and the second polarity sampling signal after rectification to obtain the integrated charge value.

[0020] In one embodiment, when the voltage across a pair of switching transistors is a DC voltage, at the moment the high-side switching transistor in the pair is turned off, the selection signal controls the output of the rectifier selection circuit to switch to a rectified sampling signal of the first polarity; and / or

[0021] When the switch on the lower side of the pair of switches is turned off, the selection signal controls the output of the rectifier selection circuit to switch to a rectified sampling signal of the second polarity.

[0022] In one embodiment, when the voltage across a pair of switching transistors is an AC voltage, during the positive half-cycle of its power frequency, at the moment when the high-side switching transistor in the pair of switching transistors is turned off, the selection signal controls the output of the rectifier selection circuit to switch to a rectified sampling signal of the first polarity.

[0023] When the low-side switch in the pair of switches is turned off, the selection signal controls the output of the rectifier selection circuit to switch to a rectified sampling signal of the second polarity.

[0024] In one embodiment, the rectifier selection circuit includes:

[0025] The separation unit is used to separate the positive and negative polarities of the sampling signal output by the sampling circuit to obtain a sampling signal of the first polarity corresponding to the current flowing out of the connection point and a sampling signal of the second polarity corresponding to the current flowing into the connection point.

[0026] A rectification unit is used to rectify the sampling signal of the first polarity and the sampling signal of the second polarity, respectively;

[0027] The selection unit is used to select, based on the selection signal, the first polarity of the rectified sampled signal or the second polarity of the sampled signal to be output.

[0028] In one embodiment, the power conversion circuit includes:

[0029] An inverter circuit for converting direct current (DC) into alternating current (AC);

[0030] A resonant circuit is connected to the inverter circuit.

[0031] A frequency conversion circuit, connected to the resonant circuit, includes two pairs of switching transistors connected in opposite directions for performing cross-conversion;

[0032] After one of the switching transistors in the frequency conversion circuit is turned off, the integration module obtains a first integrated charge value that represents the total charge change of the pair of switching transistors, and when the first integrated charge value reaches a first charge threshold, the control module controls the other switching transistor in the pair to turn on.

[0033] In one embodiment, during the positive half-cycle of the power frequency of the output voltage of the frequency conversion circuit, at the time when the high-side switch of one of the two pairs of switches is turned off, the integration module begins to integrate the sampled signal corresponding to the current flowing out of the connection point of the rectified pair of switches; at the time when the low-side switch of the pair of switches is turned off, the integration module begins to integrate the sampled signal corresponding to the current flowing into the connection point of the rectified pair of switches.

[0034] During the negative half-cycle of the power frequency of the output voltage of the frequency conversion circuit, at the time when the high-side switch of the other pair of switches is turned off, the integration module begins to integrate the sampled signal corresponding to the current flowing into the connection point of the rectified switch pair; at the time when the low-side switch of the other pair of switches is turned off, the integration module begins to integrate the sampled signal corresponding to the current flowing out of the connection point of the rectified switch pair.

[0035] In one embodiment, when the integrated charge value reaches the corresponding charge threshold, the control module controls the integration module to discharge until the integrated charge value drops to 0.

[0036] In one embodiment, the inverter circuit includes at least one pair of switching transistors. After one of the switching transistors in the pair is turned off, the integration module obtains a second integrated charge value that characterizes the total charge change of the pair of switching transistors. When the second integrated charge value reaches a second charge threshold, the control module controls the other switching transistor in the pair to be turned on.

[0037] In one embodiment, the integration module includes:

[0038] The first integrating circuit is used to integrate the rectified sampled signal based on the first dead zone signal to obtain the first integrated charge value. The first dead zone signal is generated by the control module based on the turn-off time of the switching transistor in the frequency conversion circuit and the comparison result between the first integrated charge value and the first charge threshold.

[0039] The second integrator circuit is used to integrate the rectified sampled signal based on the second dead-time signal to obtain the second integrated charge value. The second dead-time signal is generated by the control module based on the turn-off time of the switching transistor in the inverter circuit and the comparison result between the second integrated charge value and the second charge threshold.

[0040] In one embodiment, the power conversion circuit further includes a transformer connected between the inverter circuit and the frequency conversion circuit;

[0041] The first charge threshold is determined based on the output voltage of the frequency conversion circuit and / or the parasitic capacitance of the switching transistor in the frequency conversion circuit and the external parallel capacitance.

[0042] The second charge threshold is determined based on the input voltage of the inverter circuit, the turns ratio of the transformer, and / or the parasitic capacitance of the switching transistor in the inverter circuit and the external parallel capacitance.

[0043] In one embodiment, when the first integrated charge value reaches the first charge threshold, the control module controls the first integrating circuit to discharge until the first integrated charge value drops to 0;

[0044] When the second integrated charge value reaches the second charge threshold, the control module controls the second integrating circuit to discharge until the second integrated charge value drops to 0.

[0045] In one embodiment, the power conversion circuit is one of the following: BUCK type conversion circuit, BOOST type conversion circuit, LLC type conversion circuit, dual active bridge conversion circuit, Hz conversion circuit, half-bridge circuit, and full-bridge circuit.

[0046] In one embodiment, the power converter is a DC-DC type power converter, a DC-AC type power converter, an AC-AC type power converter, or an AC-DC type power converter.

[0047] In a second aspect, embodiments of the present invention provide a control method for a power converter, used in the power converter described in the first aspect, the method comprising:

[0048] After one of the switching transistors in a pair is turned off, the integral charge value representing the total charge change of the pair of switching transistors is obtained.

[0049] When the integrated charge value reaches the corresponding charge threshold, the other switch in the pair of switches is turned on.

[0050] In one embodiment, the electrical signals of a pair of switching transistors are sampled to obtain a sampled signal;

[0051] The sampled signal is integrated to obtain the integrated charge value.

[0052] In one embodiment, the electrical signal is a current signal that characterizes the magnitude of the current flowing out of and into the connection point of the pair of switching transistors.

[0053] In one embodiment, the method further includes:

[0054] The turn-off time of the switching transistors is detected. When the turn-off of one of the switching transistors is detected, the integration of the sampled signal begins.

[0055] In one embodiment, the method further includes:

[0056] The sampled signal is rectified, and the rectified sampled signal is integrated to obtain the integrated charge value.

[0057] In one embodiment, the method further includes:

[0058] The sampled signal is rectified, and the sampled signal corresponding to the current flowing out of the connection point or the sampled signal corresponding to the current flowing into the connection point is integrated according to the voltage polarity across the pair of switching transistors and the turn-off time of the switching transistors to obtain the integrated charge value.

[0059] In one embodiment, when the voltage across a pair of switching transistors is positive, at the moment the high-side switching transistor in the pair is turned off, the sampled signal corresponding to the current flowing out of the connection point is integrated; and / or

[0060] At the moment when the switch on the lower side of the pair of switches is turned off, the sampled signal corresponding to the current flowing into the connection point is integrated.

[0061] In one embodiment, the method further includes:

[0062] When the integrated charge value reaches the corresponding charge threshold, discharge begins until the integrated charge value drops to 0.

[0063] Compared to related technologies, this solution achieves zero-voltage turn-on of the switching transistors by obtaining the integrated charge value, which characterizes the total charge change of the pair of switching transistors, after one of the switching transistors is turned off. When the integrated charge value reaches a charge threshold, the other switching transistor in the pair is then turned on. This avoids the conduction losses of the parasitic diodes in the switching transistors and improves the conversion efficiency of the power converter.

[0064] Furthermore, adaptive control of dead time has been implemented, which can be applied to different operating conditions. Attached Figure Description

[0065] Figure 1 This is a schematic diagram of the commutation process in a power conversion circuit in the prior art;

[0066] Figure 2 This is a schematic diagram of the control signal and voltage waveform in a power conversion circuit in the prior art;

[0067] Figure 3 This is a schematic diagram of the power converter in the first embodiment provided in this application;

[0068] Figure 4 A schematic diagram of the driving waveform and voltage waveform provided in one embodiment of this application;

[0069] Figure 5 This is a schematic diagram of the power converter in the second embodiment provided in this application;

[0070] Figure 6 This is a schematic diagram of the power converter in the third embodiment provided in this application;

[0071] Figure 7 This is a schematic diagram of the power converter in the fourth embodiment provided in this application;

[0072] Figure 8 A schematic diagram of the rectifier selection circuit in one embodiment provided in this application;

[0073] Figure 9 A schematic diagram of the circuit structure of the power converter in the first example embodiment provided in this application;

[0074] Figure 10 This application provides a schematic diagram of the relevant waveforms of the power converter in the first example embodiment.

[0075] Figure 11 This is a schematic diagram of the circuit structure of the power converter in the second example embodiment provided in this application;

[0076] Figure 12 A schematic diagram of the power conversion circuit in the third example embodiment provided in this application;

[0077] Figure 13 A schematic diagram of the circuit structure of the control circuit in the third example embodiment provided in this application;

[0078] Figure 14 The relevant waveform diagram of the power converter in the third example embodiment provided in this application;

[0079] Figure 15 A schematic diagram of the relevant waveforms of the power converter in the fourth example embodiment provided in this application;

[0080] Figure 16 A schematic diagram of the circuit structure of the control circuit in the fourth example embodiment provided in this application.

[0081] Figure 17 This is a flowchart illustrating a control method for a power converter provided in this application. Detailed Implementation

[0082] To make the objectives, technical solutions, and advantages of this application clearer, the application is described and illustrated below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the application. All other embodiments obtained by those skilled in the art based on the embodiments provided in this application without inventive effort are within the scope of protection of this application. Furthermore, it is understood that although the efforts made in such a development process may be complex and lengthy, for those skilled in the art related to the content disclosed in this application, modifications to design, manufacturing, or production based on the technical content disclosed in this application are merely conventional technical means and should not be construed as insufficient disclosure of the content of this application.

[0083] In this application, the reference to "embodiment" means that a specific feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment that is mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described in this application may be combined with other embodiments without conflict.

[0084] Unless otherwise defined, the technical or scientific terms used in this application shall have the ordinary meaning understood by one of ordinary skill in the art to which this application pertains. The terms “a,” “an,” “an,” “the,” and similar words used in this application do not indicate quantity limitation and may indicate singular or plural. The terms “comprising,” “including,” “having,” and any variations thereof used in this application are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or device that includes a series of steps or modules (units) is not limited to the listed steps or units, but may also include steps or units not listed, or may include other steps or units inherent to these processes, methods, products, or devices. The terms “connected,” “linked,” “coupled,” and similar words used in this application are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. “Multiple” used in this application means two or more. “And / or” describes the relationship between related objects, indicating that three relationships may exist; for example, “A and / or B” can represent: A alone, A and B simultaneously, and B alone. The terms “first,” “second,” “third,” etc., used in this application are merely to distinguish similar objects and do not represent a specific ordering of the objects.

[0085] Figure 1 This is a schematic diagram of the commutation process in a power conversion circuit in the prior art. The power conversion circuit includes a capacitor C.bus and connected to capacitor C bus The complementary conducting switches Q1 and Q2 at their ends, with the output current i at the midpoint of their connection. L Capacitors C1 and C2 are the parasitic capacitances of switching transistors Q1 and Q2, respectively.

[0086] The waveforms of the control signal for the corresponding switching transistor and the voltage waveform across the switching transistor Q2 in the above power conversion circuit are as follows: Figure 2 As shown. Where, v c2 Vg1 is the voltage across the drain and source of the switching transistor Q2, and Vg2 is the control signal for the switching transistor Q1. After the control signal Vg1 changes from high to low, the control signal Vg2 remains low. Capacitor C... bus Voltage V on bus The parasitic capacitance C1 of the switching transistor Q1 begins to charge, and at the same time, the current i L Discharge the parasitic capacitance C2 of the switching transistor Q2, such as Figure 1 As shown in (b), corresponding Figure 2 The time period t0 to t1; when the voltage across the parasitic capacitor C1 rises to V bus Simultaneously, after the voltage across the parasitic capacitor C2 drops to zero, the parasitic diode of the switching transistor Q2 begins to conduct, as... Figure 1 As shown in (c), corresponding to Figure 2 During the time period t1 to t2; when the control signal Vg2 of the switching transistor Q2 goes high, the current of the switching transistor Q2 switches from the parasitic diode to the channel, such as Figure 1 As shown in (d), corresponding to Figure 2 After time t2, the entire commutation process ends.

[0087] Related technologies set the time period t0 to t2 as a fixed dead time, which cannot reduce the conduction loss of parasitic diodes to near zero under all operating conditions. Therefore, the increased loss will lead to a decrease in the conversion efficiency of the power converter.

[0088] exist Figure 1 and Figure 2 In the diagram, when switch Q1 is turned off, the ideal commutation time is t0-t1. During this stage, parasitic capacitance C1 charges and parasitic capacitance C2 discharges. When switch Q2 is turned off, the ideal commutation time is t3-t4. During this stage, parasitic capacitance C1 discharges and parasitic capacitance C2 charges. The total change in charge on parasitic capacitances C1 and C2, that is, the total change in charge on switch Q1 and switch Q2, satisfies the following relationship:

[0089]

[0090]

[0091] Among them, v c1 V is the voltage across the drain and source of the switching transistor Q1. c2 The voltage across the drain and source of the switching transistor Q2 is C1(v). c1 The value of parasitic capacitance C1 is related to the voltage v across the drain and source of switching transistor Q1. c1 The function, C2(v c2 The capacitance of parasitic capacitor C2 is related to the voltage v across the drain and source of switching transistor Q2. c2 The function, where i1 is the current flowing through switch Q1, i2 is the current flowing through switch Q2, and i... L This refers to the current flowing into and out of the connection point between switching transistors Q1 and Q2.

[0092] Based on this, embodiments of the present invention propose a power converter, such as... Figure 3 As shown, the power converter includes: a power conversion circuit 10, which includes at least one pair of switching transistors, wherein the first terminal of one switching transistor in each pair is connected to the second terminal of the other switching transistor; and a control circuit 20, which is connected to the power conversion circuit 10 and is used to control the power conversion circuit 10 to obtain an integral charge value characterizing the total charge change of the pair of switching transistors after one switching transistor in the pair is turned off, and to control the other switching transistor in the pair to be turned on when the integral charge value reaches a charge threshold.

[0093] The aforementioned switching transistors can be MOSFETs, SiC transistors, GaN transistors, or IGBT modules with parallel Schottky diodes, etc.

[0094] It should be noted that when the switching transistor is a MOSFET, the first terminal of the switching transistor described in this application is the drain of the switching transistor and the first terminal of the switching transistor is the source of the switching transistor. When the switching transistor is an IGBT module with a parallel Schottky diode, the first terminal of the switching transistor described in this application is the collector of the switching transistor and the first terminal of the switching transistor is the emitter of the switching transistor.

[0095] Among them, the power conversion circuit is used to perform power conversion, such as inversion, rectification, DC-DC conversion, or AC-AC conversion. It can be any of the following: BUCK type conversion circuit, BOOST type conversion circuit, LLC type conversion circuit, dual active bridge conversion circuit, cyclotron conversion circuit, half-bridge circuit, full-bridge circuit, etc.

[0096] The power converter can be a DC-DC type power converter, a DC-AC type power converter, an AC-AC type power converter, or an AC-DC type power converter, etc.

[0097] In this embodiment, after one switch in a pair of switches is turned off, the integrated charge value, which represents the total charge change of the pair of switches, is obtained. When the integrated charge value reaches the charge threshold, the other switch in the pair is turned on, thereby achieving zero-voltage turn-on of the switches, avoiding the conduction loss of the parasitic diodes of the switches, and improving the conversion efficiency of the power converter.

[0098] Since the charge threshold characterizes the total charge change ΔQ of a pair of switches during the ideal commutation time t0-t1, it can be determined based on the voltage V across the pair of switches. bus The dead time can be adaptively adjusted by adjusting the voltage between the first terminal of one switching transistor and the second terminal of another switching transistor.

[0099] Specifically, the value of the total charge change ΔQ during the ideal commutation time period t0-t1 is related to the voltage V across the pair of switching transistors. bus This is related to the parasitic capacitance of the switching transistor and its additional parallel capacitance (if there is an additional parallel capacitance). Given the values ​​of the switching transistor and its parallel capacitance, the total charge change ΔQ and voltage V during the ideal commutation period can be fitted. bus The relationship. Therefore, by considering the current i L Integrating, we obtain the integrated charge value, which characterizes the total real-time charge change of a pair of switches. This integrated charge value is then compared with a known voltage V. bus When the total charge change ΔQ during the corresponding ideal commutation time period is equal, the switching commutation is just completed. At this time, the zero-voltage turn-on of the switching transistor can be achieved, and the conduction loss of the parasitic diode of the switching transistor can be avoided.

[0100] Using the control circuit of this embodiment to Figure 1 The result of controlling the power conversion circuit is as follows Figure 4 As shown, at the moment when switch Q1 is turned off, the outflowing current i begins to be monitored. L Integrate the charge until the integrated charge value reaches the corresponding voltage V. bus When the total charge change ΔQ during the ideal commutation time period t0-t1 is reached, that is, at time t1, the switching commutation is just completed, and the switch Q2 is triggered to turn on to achieve zero-voltage turn-on; similarly, at the moment when the switch Q2 turns off, the current i flowing in begins to be regulated. L Integrating, when the integrated charge value reaches the total charge change ΔQ, that is, at time t3, the switching commutation is just completed. At this time, the switch Q1 is triggered to turn on to achieve zero-voltage turn-on.

[0101] The above analysis shows that at the moment a switch is turned off, the integrated charge value, representing the total charge change of the pair of switches, is obtained. Based on the integrated charge value and a known charge threshold, the completion time of switching commutation is determined. Immediately after the commutation of the parasitic diode of the switch to its complementary conducting switch is completed, the complementary conducting switch is turned on, which can eliminate… Figure 2 The time periods t1~t2 or t4~t5 shown in the figure avoid the conduction losses caused by the parasitic diode conduction, improve the efficiency of the power converter, and achieve zero-voltage turn-on.

[0102] In one embodiment, such as Figure 5 As shown, the control circuit 20 includes: a sampling circuit 201, which samples the electrical signals of a pair of switching transistors to obtain a sampling signal; an integration module 202, connected to the sampling circuit 201, which integrates the sampling signal to obtain the integrated charge value; and a controller 203, connected to the integration module 202, which includes a control module. The control module provides a dead-time signal for controlling the integration module and a control signal for controlling the at least one pair of switching transistors. When one of the switching transistors in the pair is turned off, the dead-time signal controls the integration module 202 to start integrating the sampling signal, and when the integrated charge value reaches a charge threshold, the control signal controls the other switching transistor in the pair to turn on.

[0103] The electrical signal is a current signal that characterizes the magnitude of the current flowing out of and into the connection point of the pair of switching transistors. It can be the current output from the connection point of the pair of switching transistors, or the current flowing through each of the switching transistors in the pair, but is not limited to this.

[0104] The sampling circuit 201 can be a current transformer or a sampling resistor, as well as other current sampling devices or equipment. If the sampling circuit is a current transformer, the sampling circuit 201 also includes a conversion circuit that converts the current signal into a voltage signal.

[0105] The integration module 202 can be constructed from components such as integrating capacitors, switching devices, and amplifiers to realize its integration function.

[0106] The controller 203 can be an MCU (Microcontroller Unit), a DSP (Digital Signal Processor), or the like.

[0107] In practical applications, the charge threshold is related to the voltage V across a pair of switching transistors. bus The correspondence can be represented by a table or function and stored in the controller 203. The controller 203 determines the relationship based on the voltage V across a pair of switching transistors. bus By determining the corresponding charge threshold, the dead time can be adaptively adjusted.

[0108] Furthermore, the control circuit 20 also includes a detection module for detecting the turn-off time of the switching transistor and providing a detection signal to the control module.

[0109] The detection module can be a signal detection circuit inside the controller, for example, it can determine the turn-off time by detecting the falling edge of the control signal of the switching transistor.

[0110] In an alternative embodiment, the detection module can also be located outside the controller to detect the turn-off time of the switching transistor.

[0111] In one embodiment, the control circuit 20 further includes a comparison module for comparing the integrated charge value with the charge threshold and outputting the comparison result to the control module.

[0112] It should be noted that the comparison module can be integrated inside the controller or set outside the controller.

[0113] The comparison module can use comparators or similar devices to implement its comparison function.

[0114] For some power converters, when the electrical signal is a current signal, the sampling circuit can only sample and process positive current signals. When the actual current signal is a bipolar current signal, it cannot properly sample the negative current signal.

[0115] To solve the above-mentioned technical problems, in one embodiment, such as Figure 6 As shown, the control circuit 20 further includes a rectifier circuit 204 connected between the sampling circuit 201 and the integration module 202, used to rectify the sampled signal and output it to the integration module 202, and the integration module 202 integrates the rectified sampled signal to obtain the integrated charge value.

[0116] After passing through the rectifier circuit 204, the negative polarity sampling signal is flipped into a positive polarity sampling signal, at which point the integration module 202 can integrate the sampling signal.

[0117] The rectifier circuit 204 can be composed of rectifier diodes, such as a rectifier bridge.

[0118] For some power converters, under certain operating conditions, when the electrical signal is a bipolar current signal, one polarity of the current signal has no effect on the commutation of the switching transistor and is an ineffective current.

[0119] To solve the above-mentioned technical problems, in one embodiment, such as Figure 7As shown, the control circuit 20 further includes a rectification selection circuit 205, connected between the sampling circuit 201 and the integration module 202, for rectifying the sampling signal and selecting, according to the selection signal provided by the controller 203, to output a rectified sampling signal of the first polarity corresponding to the current flowing out of the connection point or a sampling signal of the second polarity corresponding to the current flowing into the connection point. The integration module 202 integrates the rectified sampling signal of the first polarity and the sampling signal of the second polarity to obtain the integrated charge value.

[0120] The selection signal is generated by the controller based on the voltage polarity across the pair of switching transistors and the turn-off time of the switching transistors.

[0121] In this embodiment, after a pair of switching transistors are turned off, the rectifier selection circuit 205 selects the sampling signal corresponding to the current that has an effect on commutation and integrates it, thereby ensuring that the power converter can achieve zero-voltage turn-on of the pair of switching transistors even under special operating conditions, avoiding the conduction loss of the parasitic diodes of the switching transistors and improving the conversion efficiency of the power converter.

[0122] It should be noted that the first polarity here can be positive and the corresponding second polarity can be negative; or the first polarity can be negative and the corresponding second polarity can be positive.

[0123] Specifically, when the voltage V across a pair of switching transistors bus When the voltage is DC, at the time the high-side switch in the pair of switches is turned off, the selection signal controls the output of the rectifier selection circuit 205 to switch to a rectified sampling signal of the first polarity; and / or at the time the low-side switch in the pair of switches is turned off, the selection signal controls the output of the rectifier selection circuit 205 to switch to a rectified sampling signal of the second polarity.

[0124] The voltage V across a pair of switching transistors bus When the voltage is AC, during its positive half-cycle at the power frequency, that is, the voltage V across a pair of switching transistors... bus When the high-side switch in the pair of switches is off, the selection signal controls the output of the rectifier selection circuit 205 to switch to a rectified sampling signal of the first polarity. When the low-side switch in the pair of switches is off, the selection signal controls the output of the rectifier selection circuit 205 to switch to a rectified sampling signal of the second polarity.

[0125] It should be noted that, in the pair of switching transistors described in this application, the switching transistor located on the high side refers to the switching transistor at a high potential in the pair of switching transistors; and the switching transistor located on the low side in the pair of switching transistors described in this application refers to the switching transistor at a low potential in the pair of switching transistors.

[0126] Among them, such as Figure 8 As shown, the rectifier selection circuit 205 includes: a separation unit 2051, used to separate the sampled signal i cs The positive and negative polarities are separated to obtain a first polarity sampling signal corresponding to the current flowing out of the connection point and a second polarity sampling signal corresponding to the current flowing into the connection point; a rectifier unit 2052 is used to rectify the first polarity sampling signal and the second polarity sampling signal respectively; a selection unit 2053 is used to select the first polarity sampling signal or the second polarity sampling signal after rectification according to the selection signal to obtain the rectified sampling signal i. rec .

[0127] Specifically, the separation unit 2051 can be composed of multiple diodes, resistors and other components; the rectifier unit 2052 can be composed of rectifier diodes and other components; and the selection unit 2053 can be composed of selectors, resistors, capacitors and other components.

[0128] In the first example embodiment, the power converter is a BUCK or BOOST converter. For example... Figure 9 As shown, the power converter includes a power conversion circuit 10 and a control circuit 20. The power conversion circuit 10 includes a pair of switching transistors and a capacitor C. dc The pair of switches includes capacitor C4 and inductor L. The switch pair consists of a high-side switch S1 and a low-side switch S2, which are complementary in conduction. The second terminal of switch S1 is connected to the first terminal of switch S2, and the voltage between the first terminal of switch S1 and the second terminal of switch S2 is V. dc The connection point of switching transistors S1 and S2 is connected to one end of inductor L, and the output current i L Capacitors C1 and C2 are the parasitic capacitances of switching transistors S1 and S2, respectively, and capacitor C4 is connected between the other end of inductor L and the common ground.

[0129] The control circuit 20 includes a sampling circuit 201, an integration module 202, and a controller 203. The controller 203 includes a control module 2031, a comparison module 206, and a detection module 207. When the capacitor C... dc When the input side is capacitor C4 and the output side is capacitor C4, this power converter is a BUCK converter; when capacitor C4 is capacitor C5, the output side is capacitor C6. dc When the output side is the side with capacitor C4 as the input side, this power converter is a BOOST converter. When it is a BUCK converter, the current i... L The flow direction is to the right, that is, outflow from the connection point of switching transistors S1 and S2, such as... Figure 9 As shown by the arrow, during the BOOST converter, the current i L direction and Figure 9 The arrows indicate the opposite direction, which is the connection point between switch S1 and switch S2.

[0130] Among them, the sampling circuit 201 pairs the current i L Sampling is performed to obtain the sampled signal i cs .

[0131] Integrator module 202 samples signal i cs Integrating the integral yields the integrated charge value Q. int .

[0132] Specifically, the integration module 202 includes a selection switch ST, resistors R1 to R5, an integrating capacitor C3, and an operational amplifier OP. Resistor R1 is connected between the sampling circuit 201 and point a of the selection switch ST. One end of resistor R2 is connected to point b of the selection switch ST, and the other end is connected to one end of the integrating capacitor C3 and connected to the reference ground. The other end of the integrating capacitor C3 is connected to the fixed terminal of the selection switch ST and the non-inverting input terminal of the operational amplifier OP. Resistor R5 is connected between the common ground and the inverting input terminal of the operational amplifier OP. Resistor R4 is connected between the inverting input terminal and the output terminal of the operational amplifier OP. Resistor R3 is connected between the non-inverting input terminal and the output terminal of the operational amplifier OP.

[0133] In this system, resistor R2 serves as the discharge unit, while resistors R1, R3-R5, integrating capacitor C3, and operational amplifier OP are connected to form the integration unit. The selector switch ST is a single-pole double-throw switch, controlling the switch contact to connect to point a or point b based on the dead-time signal DS. When the switch contact is connected to point a, the integration unit performs integration; when the switch contact is connected to point b, the integration unit does not perform integration, and the discharge unit begins discharging.

[0134] The detection module 207 is used to detect the turn-off time of switch S1 or switch S2 and provide a detection signal to the control module 2031. For example, this is achieved by detecting the turn-off edge of the control signal Vg1 of switch S1 and the turn-off edge of the control signal Vg2 of switch S2. The detection module 207 can be a signal detection circuit inside the controller 203 or an independently configured external circuit. This embodiment uses an example of a circuit configured within the controller 203.

[0135] Comparison module 206 includes a comparator Comp for converting the integrated charge value Q int and charge threshold Q ref The comparison is performed and the comparison result is output to the control module 2031. The comparator Comp can be implemented using a comparator inside the controller or a discrete analog comparator. This embodiment illustrates the example where the comparison module 206 is located in the controller 203.

[0136] The control module 2031 generates a dead zone signal DS based on the comparison result and the detection signal, and generates control signals Vg1 and Vg2 containing the dead time based on the dead zone signal and the reference control signal.

[0137] When the power converter is a BUCK converter, the switching transistor S1 is a hard switch, and the control module 2031 performs soft turn-on control on the switching transistor S2. The specific control method is as follows: the sampling circuit 201 samples the current i L Real-time sampling, at any voltage V dc When the detection module 207 detects the turn-off edge of the control signal Vg1 of the switching transistor S1, such as... Figure 10 At time t6 corresponding to the control signal Vg1, the control module 2031 provides a high-level dead-time signal DS based on the detection signal output by the detection module 207, and controls the switch contact of the selection switch ST to connect to terminal a. The integration module 202 immediately begins integration, and when the integrated charge value Q... int Reaching the charge threshold Q ref At times, such as Figure 10 At time t7, corresponding to the control signal Vg1, that is, when equation (1) is satisfied, the voltage across the parasitic capacitance C2 of the switching transistor S2 drops to 0V. Figure 10 As shown in the waveform of "VS-Synchronization", the control signal Vg2 controls the switch S2 to turn on, achieving zero-voltage turn-on. Simultaneously, the parasitic diode of switch S2 will not conduct, thus avoiding the significant losses caused by parasitic diode conduction. At this time, the comparator Comp in comparator module 206 immediately outputs a high-level signal. Control module 2031 provides a low-level dead-time signal DS based on the output signal of comparator Comp, controlling the switch contact of selector switch ST to connect to terminal b, discharging the charge on integrating capacitor C3 through resistor R2. Based on the above control method for the BUCK converter, the conduction loss of the parasitic diode of switch S2 is eliminated, the loss of switch S2 is reduced, and the conversion efficiency of the BUCK converter is improved.

[0138] When the power converter is a BOOST converter, switch S2 is a hard switch, and control module 2031 performs soft turn-on control on switch S1. The control principle is the same as the adaptive control of switch S2 in the BUCK converter. The difference is that detection module 207 detects the turn-off edge of the control signal Vg2 of switch S2. When the integrated charge value Q... int Reaching the charge threshold Q ref When the switching transistor S1 is turned on, the above control method for the BOOST converter eliminates the conduction loss of the parasitic diode of the switching transistor S1, reduces the loss of the switching transistor S1, and improves the conversion efficiency of the BOOST converter.

[0139] When the power converter is a BUCK converter, switch S1 is an active switch and switch S2 is a synchronous switch; when the power converter is a BOOST converter, switch S1 is a synchronous switch and switch S2 is an active switch. Figure 10 In the PWM signal, "PWM-Active" is the reference control signal for the active switching transistor without dead time, and "PWM-Synchronous" is the reference control signal for the synchronous switching transistor. A dead time is set between the falling edge of the synchronous switching transistor and the reference control signal of the active switching transistor, as shown in the t8-t9 time period. The reference control signal can be generated by the control module 2031 according to the specific control requirements of the power conversion circuit; current i L and sampled signal i cs The waveforms are consistent, and the sampled signal i cs DS is the input signal of the integration module 202; DS is the dead time signal including the dead time; "Vg-active" and "Vg-synchronous" are the control signals of the active switch and the synchronous switch, respectively, which are generated by the control module 2031 according to the reference control signal and the dead time; "VS-active" and "VS-synchronous" are the voltage stress waveforms of the active switch and the synchronous switch, respectively.

[0140] It should be noted that when the power converter is in steady state, due to the voltage V across the switching transistors S1 and S2... dc Since the dead time remains unchanged, there is no need for adaptive adjustment of the dead time in each cycle. The dead time when the system just enters steady state can be used as the dead time for each subsequent cycle. There is no need for integration and comparison control in each cycle, which further reduces losses.

[0141] When the integrated charge value Q int Reaching the corresponding charge threshold Q ref At that time, the control module 2031 controls the integrator module 202 to discharge until the integrated charge value Q is reached. int It dropped to 0.

[0142] In the second example embodiment, the power converter is an LLC converter. For example... Figure 11 As shown, the power conversion circuit in this power converter includes a pair of switching transistors and a capacitor C. dc Output capacitor C out Inductance L, Magnetizing inductance L m The system includes a resonant capacitor C5, a transformer T with a center tap, and rectifier diodes D1 and D2. The pair of switching transistors includes a high-side transistor S1 and a low-side transistor S2. The second terminal of transistor S1 is connected to the first terminal of transistor S2, and the voltage between the first terminal of S1 and the second terminal of S2 is V. dc The connection point of switching transistors S1 and S2 is connected to one end of inductor L via resonant capacitor C5, and the output current i LThe other end of inductor L is connected to the same-named terminal of the primary winding of transformer T, and the magnetizing inductance L... m The primary winding of transformer T is connected to the secondary winding, and the same-named and opposite-named terminals of transformer T are connected to rectifier diodes D1 and D2 respectively. Rectifier diodes D1 and D2 are connected to a common output terminal, and the output capacitor C is connected to the primary winding. out It is connected between the center tap of the secondary winding and another output terminal.

[0143] The control circuit includes a sampling circuit 201, an integration module 202, a rectifier circuit 204, and a controller 203. The controller 203 includes a control module 2031, a comparison module 206, and a detection module 207. The inductor L can be the leakage inductance of the transformer T or an independent inductor. m Let be the magnetizing inductance of transformer T.

[0144] The similarities with the first example embodiment will not be repeated here; only the differences will be described below.

[0145] In this example embodiment, both switch S1 and switch S2 are soft-turn-on. The controller 203 performs soft-turn-on control on switch S1 and switch S2, and the corresponding detection module 207 is used to detect the turn-off time of switch S1 and switch S2.

[0146] The rectifier circuit 204 is connected between the sampling circuit 201 and the integration module 202. It is used to rectify the sampling signal to obtain the rectified sampling signal and output it to the integration module 202. The integration module 202 integrates the rectified sampling signal to obtain the integrated charge value.

[0147] The specific control method is as follows: the sampling circuit 201 controls the current i L The sampled signal is obtained through real-time sampling, and the rectifier circuit 204 rectifies the sampled signal in real time. Assume that... Figure 11 The current i in L When the current flows to the right, that is, the current flowing out of the connection point between switching transistors S1 and S2 is positive, under any voltage V... dc When the detection module 207 detects the falling edge of the control signal of the switching transistor S1, such as Figure 4 At time t0, corresponding to the control signal Vg1, the dead-time signal DS controls the switch contact of the selector switch ST to connect to terminal a, at which time the current i L Under steady-state operation, such as Figure 11 The middle arrow indicates a positive current. The integrator module 202 immediately begins integrating the rectified sampled signal. When the integrated charge value reaches the charge threshold Q... refWhen equation (1) is satisfied, the voltage across the parasitic capacitor C2 of the switching transistor S2 drops to 0V. The control signal Vg2 controls the switching transistor S2 to turn on, achieving zero-voltage turn-on. The parasitic diode of the switching transistor S2 will not conduct, thus avoiding the large losses caused by the conduction of the parasitic diode. At this time, the dead-time signal DS controls the switch contact of the selection switch ST to connect to terminal b, and discharges the integrated charge on the integrating capacitor C3 through resistor R2.

[0148] When the detection module 207 detects the falling edge of the control signal Vg2 of the switching transistor S2, such as Figure 4 At time t3, corresponding to the control signal Vg2, the dead-time signal DS controls the switch contact of the selector switch ST to connect to terminal a. At this time, the current i L Under steady-state operation and such Figure 11 The middle arrows point in opposite directions, indicating negative current. Sampling circuit 201 samples current i. L A negative polarity sampling signal is obtained. After the negative polarity sampling signal passes through the rectifier circuit 204, the integrator module 202 immediately begins to integrate the rectified sampling signal. When the integrated charge value reaches the charge threshold Q... ref When equation (2) is satisfied, the voltage across the parasitic capacitor C1 of the switching transistor S1 drops to 0V. At this time, the control signal Vg1 controls the switching transistor S1 to turn on, realizing soft switching. The parasitic diode of the switching transistor S1 will not conduct, thus avoiding the large losses caused by the conduction of the parasitic diode. At this time, the dead zone signal DS controls the switching contact of the selection switch ST to connect to terminal b, and discharges the charge on the integrating capacitor C3 through resistor R2.

[0149] Figure 11 The half-bridge LLC converter in the design avoids the parasitic diode conduction losses of switching transistors S1 and S2, thus improving the overall converter efficiency.

[0150] This second example embodiment uses a half-bridge LLC converter as an example only, but is not limited thereto. It can be a DAB converter, a half-bridge DC-DC converter, a full-bridge DC-DC converter, an active PFC circuit, a three-phase inverter bridge, or a three-phase active rectifier bridge circuit, etc.

[0151] In the third example embodiment, the power converter is an inverter, and its input terminal can be connected to a photovoltaic DC power source or an energy storage battery, etc., to invert the DC power provided by the photovoltaic DC power source or energy storage battery into AC power, which can then supply power to the grid or a load. The photovoltaic DC power source can be, for example, a single photovoltaic module, a single photovoltaic cell string, multiple photovoltaic modules connected in series and / or parallel, or multiple photovoltaic cell strings connected in series and / or parallel. Taking the connection of the input terminal to a photovoltaic DC power source and the supply of power to the grid as an example, such as... Figure 12As shown, the power converter includes a power conversion circuit 10 and a control circuit 20.

[0152] The power conversion circuit 10 includes an inverter circuit 101 for converting direct current (DC) to alternating current (AC); a transformer T connected to the inverter circuit 101 for step-up / step-down voltage conversion; a resonant circuit 103 connected to the secondary winding of the transformer T for soft switching; and a frequency conversion circuit 102 connected to the resonant circuit 103, comprising two pairs of reverse-connected switching transistors for alternating-alternating voltage conversion. A filter circuit 104 connected to the output of the frequency conversion circuit 102 is used for filtering to obtain an AC voltage V that can be supplied to the power grid. grid .

[0153] After one of the switching transistors in the frequency conversion circuit 102 is turned off, the integration module 202 obtains a first integrated charge value that represents the total charge change of the pair of switching transistors, and when the first integrated charge value reaches a first charge threshold, the control module controls the other switching transistor in the pair to be turned on.

[0154] During the positive half-cycle of the power frequency of the output voltage of the frequency conversion circuit 102, at the time when the high-side switch of one of the two pairs of switches is turned off, the integration module 202 begins to integrate the sampled signal corresponding to the current flowing out of the connection point of the rectified pair of switches; at the time when the low-side switch of the two pairs of switches is turned off, the integration module 202 begins to integrate the sampled signal corresponding to the current flowing into the connection point of the rectified pair of switches.

[0155] During the negative half-cycle of the power frequency of the output voltage of the frequency conversion circuit 102, at the time when the high-side switch of the other pair of switches is turned off, the integration module 202 begins to integrate the sampled signal corresponding to the current flowing into the connection point of the rectified switch pair; at the time when the low-side switch of the other pair of switches is turned off, the integration module 202 begins to integrate the sampled signal corresponding to the current flowing out of the connection point of the rectified switch pair.

[0156] Specifically, the resonant circuit 103 is connected to one end of the secondary winding of the transformer T, including an inductor L and a resonant capacitor C5 connected in series. The inductor L can be the leakage inductance of the transformer T or an independent inductor.

[0157] The turns ratio of the primary and secondary windings of transformer T is 1:N.

[0158] The frequency converter circuit 102 is a half-bridge frequency converter, including two pairs of switches connected in opposite directions. Specifically, one pair of switches includes a switch S3 on the high side and a switch S5 on the low side, with switches S3 and S5 conducting complementaryly. The other pair of switches includes a switch S4 on the low side and a switch S6 on the high side, with switches S4 and S6 conducting complementaryly. The second terminal of switch S3 is connected to the first terminal of switch S5 via switch S4, and the second terminal of switch S6 is connected to the first terminals of switch S5 and switch S4. Switches S3 and S5 are connected in opposite directions to switches S4 and S6. Switches S4 and S5 are connected at point A and connected to the resonant circuit 103. The connection point A between switches S4 and S5 is also the connection point between switches S3 and S5, and also the connection point between switches S4 and S6. Therefore, the current signal characterizing the magnitude of the current flowing out of and into the connection point between switches S3 and S5 is the current i flowing through the resonant circuit 103. L The current signal characterizing the magnitude of the current flowing out of and into the connection point of switching transistors S4 and S6 is also the current i flowing through the resonant circuit 103. L .

[0159] The filter circuit 104 includes an inverter-side filter capacitor C. f and inverter-side filter inductor L f Filter inductor L f The high-frequency switching current is filtered to obtain a clean power frequency AC output current.

[0160] Furthermore, the inverter circuit 101 includes at least one pair of switching transistors. After one of the switching transistors in the pair of switching transistors in the inverter circuit 101 is turned off, the integration module 202 obtains a second integrated charge value that characterizes the total charge change of the pair of switching transistors, and when the second integrated charge value reaches a second charge threshold, it controls the other switching transistor in the pair of switching transistors to be turned on.

[0161] Specifically, the inverter circuit can be a full-bridge circuit or a half-bridge inverter circuit; taking a full-bridge circuit as an example, the inverter circuit 101 includes two pairs of switching transistors. One pair includes a high-side switching transistor S7 and a low-side switching transistor S8, with the second terminal of switching transistor S7 connected to the first terminal of switching transistor S8. The other pair includes a high-side switching transistor S9 and a low-side switching transistor S10, with the second terminal of switching transistor S9 connected to the first terminal of switching transistor S10. Switches S7 and S8 are complementary in conduction; switches S9 and S10 are complementary in conduction. The intermediate connection points of switches S7 and S8 and switches S9 and S10 are respectively connected to the two ends of the primary winding of transformer T. The current signal characterizing the magnitude of the current flowing out of and into the connection point of switches S7 and S8 is the current i flowing through the resonant circuit 103. LThe current signal characterizing the magnitude of the current flowing out of and into the connection point of switching transistors S9 and S10 is also the current i flowing through the resonant circuit 103. L .

[0162] The input voltage of the inverter circuit 101, that is, the voltage across the two pairs of switching transistors, is V. dc The voltage is DC. Switches S3 to S6 and switches S7 to S10 have parasitic capacitances C30, C40, C50, C60, C70, C80, C90, and C100, respectively.

[0163] like Figure 13 As shown, the control circuit 20 includes a sampling circuit (not shown in the figure), an integration module 202, a control module 2031, a detection module 207, a comparison module 206, and a rectifier circuit 204.

[0164] Sampling circuit 201 is used to sample the resonant current i L Sample signal i is obtained by sampling. cs .

[0165] The rectifier circuit 204 samples the signal i provided by the sampling circuit 201. cs The rectified sampled signal i is obtained by rectification. rec And provide it to the points module 202.

[0166] Integrator module 202 samples the rectified signal i rec Integrate to obtain the first integrated charge value Q, which characterizes the total charge change of each pair of switches in the 102 Hz converter circuit. int1 And obtain the second integral charge value Q, which characterizes the total charge change of each pair of switches in the inverter circuit 101. int2 .

[0167] Comparison module 206 is used to compare the first integrated charge value Q int1 and the first charge threshold Q ref1 The comparison is performed and the comparison result is output to the control module 2031, and the second integrated charge value Q is... int2 and the second charge threshold Q ref2 The comparison is performed and the comparison result is output to the control module 2031.

[0168] The detection module 207 is used to detect the turn-off time of switching transistors S3 to S6 and S7 to S10, for example, by detecting the turn-off edges of the control signals Vg3 to Vg6 of switching transistors S3 to S6 and the control signals Vg7 to Vg10 of switching transistors S7 to S10.

[0169] The control module 2031 is used to generate control signals Vg3 to Vg6 for controlling the switching transistors S3 to S6 and control signals Vg7 to Vg10 for controlling the switching transistors S7 to S10, and to generate a first dead zone signal DS1 and a second dead zone signal DS2 based on the outputs of the detection module 206 and the comparison module 206.

[0170] The integration module 202 includes a first integration circuit 2021, used to integrate the rectified sampling signal i based on the first dead-time signal DS1 provided by the control module 2031. rec The first integrated charge value Q is obtained by integration. int1 The first dead-time signal DS1 is generated by the control module 2031 based on the turn-off time of the switching transistor in the frequency conversion circuit 102 and the first integrated charge value Q. int1 With the first charge threshold Q ref1 The comparison result is generated; the second integrating circuit 2022 is used to integrate the rectified sampling signal i based on the second dead-time signal DS2 provided by the control module 2031. rec Integrating the components yields the second integrated charge value Q. int2 The second dead-time signal DS2 is generated by the control module 2031 based on the turn-off time of the switching transistor in the inverter circuit 101 and the second integrated charge value Q. int2 With the second charge threshold Q ref2 The comparison results are generated.

[0171] The comparison module 206 includes: a first comparison unit 2061, used to compare the first integrated charge value Q. int1 and the first charge threshold Q ref1 The comparison is performed and the comparison result is output to the control module 2031. The control module 2031 generates a first dead zone signal DS1 based on the detection signal corresponding to the switching transistor in the frequency conversion circuit 102 and the comparison result output by the first comparison unit 2061, and provides it to the first integration circuit 2021 in the integration module 202; the second comparison unit 2062 is used to compare the second integrated charge value Q. int2 and the second charge threshold Q ref2 The comparison is performed and the comparison result is output to the control module 2031. The control module 2031 generates a second dead zone signal DS2 based on the detection signal corresponding to the switching transistor in the inverter circuit 101 and the comparison result of the second comparison unit output 2062, and provides it to the second integration circuit 2022 in the integration module 202.

[0172] Since the inverter provides AC output, at AC voltage V grid In each power frequency cycle, the output voltage of the frequency converter circuit 102 (i.e., the filter capacitor C) is... fThe voltage (on the circuit) has a positive half-cycle and a negative half-cycle at the power frequency. Taking the control of the frequency converter circuit 102 as an example, during the positive half-cycle of the output voltage of the frequency converter circuit 102 at the power frequency, that is, the AC voltage V... grid During the positive half-cycle, control module 2031 controls switches S4 and S6 to remain on, and the corresponding control signals Vg4 and Vg6 are high-level signals. A high-level signal indicates that the switches are turned on. At this time, switches S3 and S5 are connected in series and bear a positive AC voltage V. grid The voltage between the first terminal of switch S3 and the second terminal of switch S5 is V. grid During the negative half-cycle of the power frequency of the output voltage of the frequency converter circuit 102, i.e., the AC voltage V... grid During the negative half-cycle, control module 2031 controls switches S3 and S5 to remain on, and the corresponding control signals Vg3 and Vg5 are high-level signals. At this time, switches S4 and S6 are connected in series and bear the negative AC voltage V. grid The voltage between the first terminal of switch S6 and the second terminal of switch S4 is -V. grid .

[0173] Figure 14 This is a schematic diagram of the relevant waveforms of the power converter in the positive half-cycle of the third example embodiment. PWM-S3 and PWM-S5 are the reference control signals without dead time for switches S3 and S5 inside the control module 2031, respectively. They do not participate in the direct control of the corresponding switches and can be generated by the control module 2031 according to the specific control requirements of the power conversion circuit. In the control module 2031, the control signals Vg3 and Vg5 for switches S3 and S5 are obtained by logically converting or programmatically converting the reference control signals PWM-S3 and PWM-S5 with the dead time signal DS1. VS3 and VS5 are the voltage stress waveforms borne by switches S3 and S5, respectively. Since the control signals Vg4 and Vg6 for switches S4 and S6 provided by the control module 2031 are constant high-level signals during the positive half-cycle, keeping switches S4 and S6 in a normally closed state, the relevant waveforms are not... Figure 14 As shown in the image.

[0174] When the output voltage of the frequency converter circuit 102 is in the positive half-cycle of the power frequency, assuming that... Figure 12 The current signal i in L When the current flows to the right, that is, when the current flows into the connection point of switching transistors S3 and S5 is positive, the AC voltage V during any positive half-cycle is positive. gridWhen the detection module 207 detects the turn-off edge of the control signal Vg5 of the switching transistor S5, the dead-time signal DS1 output by the control module 2031 controls the switching contact of the selection switch ST to connect to terminal a. At this time, the current i L Under steady-state operation, such as Figure 12 The middle arrow indicates the positive current. The first integrator circuit 2021 immediately samples the rectified current corresponding to the current flowing into the connection point of switches S3 and S5, i. rec Start integration, when the first integration charge value is Q int1 Reaching the first charge threshold Q ref1 (first charge threshold Q) ref1 The first charge threshold Q is determined based on the output voltage of the frequency converter circuit and / or the parasitic capacitance of the switching transistor in the frequency converter circuit and the external parallel capacitance. ref1 With alternating voltage V grid When the voltage across the parasitic capacitor C30 of the switching transistor S3 drops to 0V, the control signal Vg3 turns on the switching transistor S3, achieving soft switching. The parasitic diode of the switching transistor S3 will not conduct, thus avoiding significant losses caused by the parasitic diode's conduction. At this time, the comparator module 206 immediately outputs a high-level signal. The control module 2031, based on the dead-time signal DS1 provided by the output signal of the comparator module 206, controls the switch contact of the selection switch ST in the first integrating circuit 2021 to connect to terminal b, discharging the charge on the integrating capacitor C3 through resistor R2.

[0175] When the detection module 207 detects the turn-off edge of the control signal Vg3 of the switching transistor S3, the dead-time signal DS1 output by the control module 2031 controls the switching contact of the selection switch ST to connect to terminal a. At this time, the current i L Directional steady-state operation and Figure 12 The middle arrow indicates the opposite, representing a negative current. That is, the current flowing out of the connection point between switches S3 and S5 is negative. The first integrator circuit 2021 immediately samples the rectified current corresponding to the current flowing out of the connection point between switches S3 and S5, i. rec Start integration, when the first integration charge value is Q int1 Reaching the first charge threshold Q ref1At this time, the voltage across the parasitic capacitor C50 of the switching transistor S5 drops to 0V. The control signal Vg5 then turns on the switching transistor S5, achieving zero-voltage turn-on. The parasitic diode of the switching transistor S5 will not conduct, thus avoiding the significant losses caused by the parasitic diode's conduction. Immediately, the comparator module 206 outputs a high-level signal. The control module 2031, based on the dead-time signal DS1 provided by the output signal of the comparator module 206, controls the switch contact of the selector switch ST in the first integrator circuit 2021 to connect to terminal b, discharging the charge on the integrating capacitor C3 through resistor R2.

[0176] When in the negative half-cycle of the power frequency, the control principle is the same as that in the positive half-cycle of the power frequency. The difference is that the detection module 207 detects the control signal turn-off edge of the switch S4 or the switch S6. After control, the control signals of the switch S4 and the switch S6 with adaptive dead time are obtained.

[0177] For inverter circuit 101, switching transistors S7 and S10 can have a conduction phase shift angle. The adaptive dead-time control of switching transistors S7 to S10 follows the same principle as the control of secondary switching transistors S3 to S6. It should be noted that the sampling circuit 201 samples the current i... L This refers to the secondary current of transformer T. Therefore, for switching transistors S7 to S10, the turns ratio of transformer T (1:N) needs to be taken into account before calculating the integrated charge value. The second charge threshold Q... ref2 and the input voltage V of inverter circuit 101 dc Related, second charge threshold Q ref2 According to the input voltage V of the inverter circuit 101 dc The turns ratio of transformer T and / or the parasitic capacitance of the switching transistor in inverter circuit 101 and the external parallel capacitance are determined. For example, when the turn-off edge of the control signal Vg7 of switching transistor S7 is detected, the dead-time signal DS2 controls the second integrator circuit 2022 to start sampling the rectified sampling signal i. rec Integrating the two charges yields the second integrated charge value Q. int2 When the second integral charge value Q int2 Reaching the second charge threshold Q ref2 At this time, the control signal Vg8 controls the switch S8 to turn on, achieving zero-voltage turn-on of the switch S8 without parasitic diode conduction losses. The specific control principle is as follows: Figure 12 The adaptive dead-time control principle of the switching transistors S3 to S6 in the circuit is similar and will not be elaborated further. However, due to V dc Since it is a DC voltage, there is no distinction between the positive and negative half-cycles in the control.

[0178] Figure 12The switching transistors S3 to S6 and S7 to S10 in the converter all adopt adaptive dead-time control, which realizes zero-voltage turn-on of all switching transistors and zero conduction loss of parasitic diodes, thereby reducing the losses of all switching transistors and improving the efficiency of the overall converter.

[0179] When the first integral charge value Q int1 Reaching the first charge threshold Q ref1 At that time, the control module 2031 controls the first integrating circuit 2021 to discharge until the first integrated charge value Q is reached. int1 The charge value drops to 0; when the second integral charge value Q... int2 Reaching the second charge threshold Q ref2 At that time, the control module 2031 controls the second integrator circuit 2022 to discharge until the second charge threshold Q is reached. ref2 It dropped to 0.

[0180] Figure 13 and Figure 14 This example embodiment shows a control circuit and related waveforms for a common steady-state operating condition. However, in actual operation, a special state may exist. Taking the switching transistor of the frequency converter circuit 102 as an example, and taking it as the positive half-cycle, when the switching transistor S3 or S5 is turned off, the current i... L Direction or positive / negative polarity and Figure 14 i in L The opposite direction, such as Figure 15 As shown, that is, t6~t7, t8~t9, t 10 ~t 11 Current i corresponding to the time period L At this point, the current has no effect on the commutation of switches S3 and S5; it is an ineffective current and cannot participate in integration or dead-time control. The actual commutation begins only after... Figure 15 t6, t8, t 10 The moments when the absolute value of the current drops to 0 at the turn-off time, i.e., t7, t9, t... 11 time.

[0181] Figure 16 The diagram below shows the structure of the control circuit in the fourth example embodiment, where the rectifier circuit 204 in the third example embodiment is replaced with the rectifier selection circuit 205.

[0182] During the positive half-cycle of the output voltage of the frequency converter circuit 102, at the turn-off time of the high-side switch in one of the two pairs of switching transistors (switching transistors S3 and S5), the selection signal controls the output of the rectifier selection circuit 205 to switch to a rectified sampling signal of the first polarity; at the turn-off time of the low-side switch in the same pair of switching transistors, the selection signal controls the output of the rectifier selection circuit 205 to switch to a rectified sampling signal of the second polarity; during the negative half-cycle of the output voltage of the frequency converter circuit 102, at the turn-off time of the high-side switch in the other pair of switching transistors (switching transistors S4 and S6), the selection signal controls the output of the rectifier selection circuit 205 to switch to a rectified sampling signal of the second polarity; at the turn-off time of the low-side switch in the same pair of switching transistors, the selection signal controls the output of the rectifier selection circuit 205 to switch to a rectified sampling signal of the first polarity.

[0183] The waveform of the output signal of the rectifier selection circuit 205 is as follows: Figure 15 medium waveform i rec As shown. The rectified sampling signal i obtained after control by the control module 2031. rec The value is 0 during the invalid current time, so it does not affect the control of the integral value and dead time.

[0184] In the fourth example embodiment, the control principle during the negative half-cycle of the power frequency output voltage of the frequency converter circuit 102 is the same as that during the positive half-cycle. Taking the positive half-cycle as an example, when the detection module 207 detects the turn-off edge of the control signal Vg3 of the switch S3 or the control signal Vg5 of the switch S5, the integration module 202 starts to integrate. When the corresponding charge threshold is reached, the integration ends, and the complementary conducting pairs of transistors are turned on with zero voltage.

[0185] When the switching transistors S7 to S10 of the inverter circuit 101 are working, the current waveform also exists. Figure 15 The special working conditions in it, so it also requires Figure 16 The control circuit and control method are the same as those of the switching transistors S3 to S6, and will not be described again.

[0186] The control method for the power converter in a special operating state in the fourth example embodiment is also suitable for the power converter in a normal operating state in the third example embodiment.

[0187] The third and fourth example embodiments only use a half-bridge type frequency conversion module as an example, but are not limited thereto. The frequency conversion module 103 can be replaced with a full-bridge type, and the adaptive dead-time control of the present invention can be applied in both cases.

[0188] Based on the above hardware embodiments, this invention also proposes a control method for a power converter, such as... Figure 17 As shown, the method includes:

[0189] S1702: After one of the switching transistors in a pair is turned off, obtain the integrated charge value that characterizes the total charge change of the pair of switching transistors.

[0190] S1704: When the integrated charge value reaches the charge threshold, control the other switch in the pair of switches to turn on.

[0191] In this embodiment, after one switch in a pair of switches is turned off, the integrated charge value, representing the total charge change of the pair of switches, is obtained. When the integrated charge value reaches a charge threshold, the other switch in the pair is turned on. This application achieves zero-voltage turn-on of the switches, avoids the conduction losses of the parasitic diodes of the switches, and improves the conversion efficiency of the power converter.

[0192] In one embodiment, the electrical signals of a pair of switching transistors are sampled to obtain a sampled signal;

[0193] The sampled signal is integrated to obtain the integrated charge value.

[0194] In one embodiment, the electrical signal is a current signal that characterizes the magnitude of the current flowing out of and into the connection point of the pair of switching transistors.

[0195] In one embodiment, the method further includes:

[0196] The turn-off time of the switching transistors is detected. When the turn-off of one of the switching transistors is detected, the integration of the sampled signal begins.

[0197] In one embodiment, the method further includes:

[0198] The sampled signal is rectified, and the rectified sampled signal is integrated to obtain the integrated charge value.

[0199] In one embodiment, the method further includes:

[0200] The sampled signal is rectified, and the sampled signal corresponding to the current flowing out of the connection point or the sampled signal corresponding to the current flowing into the connection point is integrated according to the voltage polarity across the pair of switching transistors and the turn-off time of the switching transistors to obtain the integrated charge value.

[0201] In one embodiment, when the voltage across a pair of switching transistors is positive, at the moment the high-side switching transistor in the pair is turned off, the sampled signal corresponding to the current flowing out of the connection point is integrated; and / or

[0202] At the moment when the switch on the lower side of the pair of switches is turned off, the sampled signal corresponding to the current flowing into the connection point is integrated.

[0203] In one embodiment, the method further includes:

[0204] When the integrated charge value reaches the corresponding charge threshold, discharge begins until the integrated charge value drops to 0.

[0205] The control principle of this method embodiment can be referred to the description in the above embodiments, and therefore will not be repeated.

[0206] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0207] The above embodiments merely illustrate several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A power converter, characterized in that, The power converter includes: A power conversion circuit includes at least one pair of switching transistors, wherein the first terminal of one switching transistor in each pair is connected to the second terminal of the other switching transistor. A control circuit, connected to the power conversion circuit, is used to control the power conversion circuit. After one of the switching transistors in a pair is turned off, the electrical signals of the pair of switching transistors are sampled to obtain a sampled signal. The sampled signal is integrated to obtain an integrated charge value that represents the total charge change of the pair of switching transistors. When the integrated charge value reaches the corresponding charge threshold, the other switching transistor in the pair is turned on. The sampled signal is a current signal.

2. The power converter according to claim 1, characterized in that, The control circuit includes: The sampling circuit samples the electrical signals of a pair of switching transistors to obtain a sampled signal; An integration module, connected to the sampling circuit, integrates the sampled signal to obtain the integrated charge value; A controller, connected to the integration module, includes a control module. The control module provides a dead-time signal for controlling the integration module and a control signal for controlling the at least one pair of switching transistors. When one of the switching transistors in the pair is turned off, the dead-time signal controls the integration module to start integrating the sampled signal. When the integrated charge value reaches a charge threshold, the control signal controls the other switching transistor in the pair to turn on.

3. The power converter according to claim 2, characterized in that, The electrical signal is a current signal that characterizes the magnitude of the current flowing out of and into the connection point of the pair of switching transistors.

4. The power converter according to claim 3, characterized in that, The control circuit also includes: The detection module is used to detect the turn-off time of the switching transistor and provide a detection signal to the control module. The comparison module is used to compare the integrated charge value with the charge threshold and output the comparison result to the control module.

5. The power converter according to claim 3, characterized in that, The control circuit also includes: A rectifier circuit, connected between the sampling circuit and the integration module, is used to rectify the sampling signal and output it to the integration module. The integration module integrates the rectified sampling signal to obtain the integrated charge value.

6. The power converter according to claim 3, characterized in that, The control circuit also includes: A rectification selection circuit, connected between the sampling circuit and the integration module, rectifies the sampling signal and selects to output either a first polarity sampling signal corresponding to the current flowing out of the connection point or a second polarity sampling signal corresponding to the current flowing into the connection point, according to the selection signal provided by the controller. The integration module integrates the first polarity sampling signal and the second polarity sampling signal after rectification to obtain the integrated charge value.

7. The power converter according to claim 6, characterized in that, When the voltage across a pair of switching transistors is a DC voltage, at the moment the high-side switching transistor in the pair is turned off, the selection signal controls the output of the rectifier selection circuit to switch to a rectified sampling signal of the first polarity; and / or When the switch on the lower side of the pair of switches is turned off, the selection signal controls the output of the rectifier selection circuit to switch to a rectified sampling signal of the second polarity.

8. The power converter according to claim 6, characterized in that, When the voltage across a pair of switching transistors is AC voltage, during the positive half-cycle of the power frequency, at the moment when the high-side switching transistor in the pair of switching transistors is turned off, the selection signal controls the output of the rectifier selection circuit to switch to the rectified sampling signal of the first polarity. When the low-side switch in the pair of switches is turned off, the selection signal controls the output of the rectifier selection circuit to switch to a rectified sampling signal of the second polarity.

9. The power converter according to claim 6, characterized in that, The rectifier selection circuit includes: The separation unit is used to separate the positive and negative polarities of the sampling signal output by the sampling circuit to obtain a sampling signal of the first polarity corresponding to the current flowing out of the connection point and a sampling signal of the second polarity corresponding to the current flowing into the connection point. A rectification unit is used to rectify the sampling signal of the first polarity and the sampling signal of the second polarity, respectively; The selection unit is used to select, based on the selection signal, the first polarity of the rectified sampled signal or the second polarity of the sampled signal to be output.

10. The power converter according to claim 5 or 6, characterized in that, The power conversion circuit includes: An inverter circuit for converting direct current (DC) into alternating current (AC); A resonant circuit is connected to the inverter circuit. A frequency conversion circuit, connected to the resonant circuit, includes two pairs of switching transistors connected in opposite directions for performing cross-conversion; After one of the switching transistors in the frequency conversion circuit is turned off, the integration module obtains a first integrated charge value that represents the total charge change of the pair of switching transistors, and when the first integrated charge value reaches a first charge threshold, the control module controls the other switching transistor in the pair to turn on.

11. The power converter according to claim 10, characterized in that, During the positive half-cycle of the power frequency of the output voltage of the frequency conversion circuit, at the turn-off time of the high-side switch in one of the two pairs of switches, the integration module begins to integrate the sampled signal corresponding to the current flowing out of the connection point of the rectified pair of switches; at the turn-off time of the low-side switch in the pair of switches, the integration module begins to integrate the sampled signal corresponding to the current flowing into the connection point of the rectified pair of switches. During the negative half-cycle of the power frequency of the output voltage of the frequency conversion circuit, at the time when the high-side switch of the other pair of switches is turned off, the integration module begins to integrate the sampled signal corresponding to the current flowing into the connection point of the rectified switch pair; at the time when the low-side switch of the other pair of switches is turned off, the integration module begins to integrate the sampled signal corresponding to the current flowing out of the connection point of the rectified switch pair.

12. The power converter according to claim 2, characterized in that, When the integrated charge value reaches the corresponding charge threshold, the control module controls the integration module to discharge until the integrated charge value drops to 0.

13. The power converter according to claim 10, characterized in that, The inverter circuit includes at least one pair of switching transistors. After one of the switching transistors in the inverter circuit is turned off, the integration module obtains a second integrated charge value that represents the total charge change of the pair of switching transistors. When the second integrated charge value reaches a second charge threshold, the control module controls the other switching transistor in the pair to be turned on.

14. The power converter according to claim 13, characterized in that, The integration module includes: The first integrating circuit is used to integrate the rectified sampled signal based on the first dead zone signal to obtain the first integrated charge value. The first dead zone signal is generated by the control module based on the turn-off time of the switching transistor in the frequency conversion circuit and the comparison result between the first integrated charge value and the first charge threshold. The second integrator circuit is used to integrate the rectified sampled signal based on the second dead-time signal to obtain the second integrated charge value. The second dead-time signal is generated by the control module based on the turn-off time of the switching transistor in the inverter circuit and the comparison result between the second integrated charge value and the second charge threshold.

15. The power converter according to claim 13, characterized in that, The power conversion circuit also includes a transformer connected between the inverter circuit and the frequency conversion circuit; The first charge threshold is determined based on the output voltage of the frequency conversion circuit and / or the parasitic capacitance of the switching transistor in the frequency conversion circuit and the external parallel capacitance. The second charge threshold is determined based on the input voltage of the inverter circuit, the turns ratio of the transformer, and / or the parasitic capacitance of the switching transistor in the inverter circuit and the external parallel capacitance.

16. The power converter according to claim 14, characterized in that, When the first integrated charge value reaches the first charge threshold, the control module controls the first integrating circuit to discharge until the first integrated charge value drops to 0. When the second integrated charge value reaches the second charge threshold, the control module controls the second integrating circuit to discharge until the second integrated charge value drops to 0.

17. The power converter according to claim 1, characterized in that, The power conversion circuit is one of the following: BUCK type conversion circuit, BOOST type conversion circuit, LLC type conversion circuit, dual active bridge conversion circuit, cyclotron conversion circuit, half-bridge circuit, and full-bridge circuit.

18. The power converter according to claim 1, characterized in that, The power converter is a DC-DC type power converter, a DC-AC type power converter, an AC-AC type power converter, or an AC-DC type power converter.

19. A control method for a power converter, used in the power converter as described in any one of claims 1 to 18, characterized in that, The method includes: After one of the switching transistors in a pair is turned off, the electrical signals of the pair of switching transistors are sampled to obtain a sampled signal. The sampled signal is then integrated to obtain an integrated charge value that characterizes the total charge change of the pair of switching transistors. The sampled signal is a current signal. When the integrated charge value reaches the corresponding charge threshold, the other switch in the pair of switches is turned on.

20. The method according to claim 19, characterized in that, The electrical signal is a current signal that characterizes the magnitude of the current flowing out of and into the connection point of the pair of switching transistors.

21. The method according to claim 20, characterized in that, The method further includes: The turn-off time of the switching transistor is detected. When the turn-off of one of the pair of switching transistors is detected, the integration of the sampled signal begins.

22. The method according to claim 20, characterized in that, The method further includes: The sampled signal is rectified, and the rectified sampled signal is integrated to obtain the integrated charge value.

23. The method according to claim 20, characterized in that, The method further includes: The sampled signal is rectified, and the sampled signal corresponding to the current flowing out of the connection point or the sampled signal corresponding to the current flowing into the connection point is integrated according to the voltage polarity across the pair of switching transistors and the turn-off time of the switching transistors to obtain the integrated charge value.

24. The method according to claim 20, characterized in that, When the voltage across a pair of switching transistors is positive, at the moment the high-side switching transistor in the pair turns off, the sampled signal corresponding to the current flowing out of the connection point is integrated; and / or At the moment when the switch on the lower side of the pair of switches is turned off, the sampled signal corresponding to the current flowing into the connection point is integrated.

25. The method according to claim 19, characterized in that, The method further includes: When the integrated charge value reaches the corresponding charge threshold, discharge begins until the integrated charge value drops to 0.

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