Semiconductor structure and method of forming the same

Abstract

The present disclosure relates to a semiconductor structure and a method for forming the same. The method for forming the semiconductor structure comprises the following steps: providing an initial substrate; etching the initial substrate to form a substrate and a semiconductor block protruding from a top surface of the substrate; epitaxially growing a plurality of semiconductor layers on sidewalls of the semiconductor block, the semiconductor layers being spaced apart along a first direction, the first direction being perpendicular to the top surface of the substrate; and forming a plurality of memory cells in each of the semiconductor layers, the memory cells being spaced apart along a direction parallel to the top surface of the substrate. The present disclosure reduces internal defects of the semiconductor structure, improves manufacturing yield of the semiconductor structure, and improves electrical performance of the semiconductor structure.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor manufacturing technology, and in particular to a semiconductor structure and a method for forming the same. Background Technology

[0002] Dynamic Random Access Memory (DRAM) is a commonly used semiconductor device in computers and other electronic devices. It consists of multiple memory cells, each of which typically includes a transistor and a capacitor. The gate of the transistor is electrically connected to the word line, the source is electrically connected to the bit line, and the drain is electrically connected to the capacitor. The word line voltage on the word line can control the transistor to turn on and off, thereby allowing data information stored in the capacitor to be read or written to the capacitor via the bit line.

[0003] To meet the requirements of high storage density and high integration, memory devices such as DRAM have gradually evolved from two-dimensional structures to three-dimensional structures. The manufacturing process of semiconductor structures such as DRAM with three-dimensional structures requires the formation of a superlattice stack structure of semiconductor layers and sacrificial layers through deposition processes. This inevitably leads to defects such as stress in the final semiconductor structure, resulting in a decrease in semiconductor yield and limiting further improvements in semiconductor product performance.

[0004] Therefore, how to avoid the impact of superlattice stacking structures on the yield of semiconductor structure products, thereby improving the performance of semiconductor structures, is a technical problem that urgently needs to be solved. Summary of the Invention

[0005] This disclosure provides semiconductor structures and methods for forming the same in some embodiments, which are used to reduce defects in semiconductor structures, thereby improving the manufacturing yield of semiconductor structures and enhancing their performance.

[0006] According to some embodiments, this disclosure provides a method for forming a semiconductor structure, including the following steps: Provide initial substrate; The initial substrate is etched to form a substrate and a semiconductor block protruding from the top surface of the substrate; Multiple semiconductor layers are epitaxially grown on the sidewall of the semiconductor block, spaced apart along a first direction, which is perpendicular to the top surface of the substrate.

[0007] In some embodiments, the step of forming a substrate and a semiconductor block protruding from the top surface of the substrate includes: The initial substrate is etched from the top surface using a deep etching process to form at least one opening. The portion of the initial substrate remaining on the side of the opening serves as the semiconductor block, and the opening and the portion of the initial substrate remaining below the semiconductor block serve as the substrate.

[0008] In some embodiments, the number of openings is multiple, and the multiple openings are spaced apart along the second direction, with the semiconductor block located between two adjacent openings; Along the second direction, the width of the opening is greater than the width of the semiconductor block.

[0009] In some embodiments, the opening exposes multiple sidewalls of the semiconductor block; the step of epitaxially growing multiple semiconductor layers spaced apart along a first direction on the sidewalls of the semiconductor block includes: Multiple semiconductor layers are epitaxially grown simultaneously on multiple sidewalls of the semiconductor block, arranged at intervals along the first direction, and the semiconductor layers grown on the multiple sidewalls have the same width in the direction parallel to the substrate.

[0010] In some embodiments, the step of epitaxially growing a plurality of semiconductor layers spaced apart along a first direction on the sidewall of the semiconductor block includes: A dielectric layer is formed on the substrate on the side of the semiconductor block, the dielectric layer including a plurality of first trenches exposing the semiconductor block, the plurality of first trenches being spaced apart along the first direction; The semiconductor layer is epitaxially grown laterally on the sidewall of the semiconductor block along the first trench.

[0011] In some embodiments, the step of forming a dielectric layer on the substrate located on the side of the semiconductor block includes: A first dielectric layer and a second dielectric layer are formed on the side of the semiconductor block, and the first dielectric layer and the second dielectric layer are stacked alternately along the first direction; The first dielectric layer is removed to form the first trench located between adjacent second dielectric layers along the first direction, wherein the second dielectric layer and the first trench constitute the dielectric layer.

[0012] In some embodiments, the step of forming a first dielectric layer and a second dielectric layer on the side of the semiconductor block includes: The first dielectric layer and the second dielectric layer are alternately deposited along the first direction using a selective atomic layer deposition process.

[0013] In some embodiments, before removing the first dielectric layer, the following steps are further included: A support column is formed that penetrates the first dielectric layer and the second dielectric layer along the first direction.

[0014] In some embodiments, before forming a plurality of semiconductor layers spaced apart along a first direction on the sidewall of the semiconductor block, the following steps are further included: A protective layer is formed covering the top surface of the semiconductor block.

[0015] In some embodiments, the initial substrate is made of silicon; the step of laterally epitaxially growing the semiconductor layer along the first trench on the sidewall of the semiconductor block includes: Perform at least one of the following first cyclic steps until the semiconductor layer filling the first trench is formed, the first cyclic step including: Silicon material is epitaxially grown laterally on the sidewall of the semiconductor block along the first trench; The silicon material epitaxially grown is etched along the first trench using a first etchant, wherein the first etchant has an effect on the silicon material. <100> The etching rate in a crystal orientation is lower than that in other crystal orientations.

[0016] In some embodiments, the step of laterally epitaxially growing silicon material on the sidewall of the semiconductor block along the first trench includes: A selective epitaxial growth process is used to laterally epitaxially grow silicon material on the sidewall of the semiconductor block along the first trench, and the silicon material is... <100> The epitaxial growth rate in one crystal orientation is greater than or equal to the growth rate in other crystal orientations.

[0017] In some embodiments, the step of etching the epitaxially grown silicon material along the first trench using a first etchant includes: The silicon material epitaxially grown is etched along the first trench using an atomic layer etching process.

[0018] In some embodiments, the first etchant comprises tetramethylammonium hydroxide.

[0019] In some embodiments, the first etchant further includes an additive, which is any one or a combination of two or more of isopropanol, butanol, and tritium.

[0020] In some embodiments, the initial substrate is made of silicon; the step of laterally epitaxially growing the semiconductor layer along the first trench on the sidewall of the semiconductor block includes: Perform at least one second cyclic step as follows until the semiconductor layer filling the first trench is formed, the second cyclic step including: Silicon material is epitaxially grown laterally on the sidewall of the semiconductor block along the first trench; The silicon material is converted along the first trench to form a conversion layer, and the silicon material is... <100> The transformation rate of crystal orientation is lower than that of other crystal orientations; The conversion layer is etched along the first trench using a second etchant, wherein the etching rate of the conversion layer by the second etchant is greater than the etching rate of the silicon material.

[0021] In some embodiments, the conversion process is an oxidation process, and the conversion layer is a silicon oxide layer.

[0022] In some embodiments, after epitaxially growing a plurality of semiconductor layers spaced apart along a first direction on the sidewall of the semiconductor block, the method further includes the following steps: Doped ions are implanted into the semiconductor block to form bit lines.

[0023] In some embodiments, after epitaxially growing a plurality of semiconductor layers spaced apart along a first direction on the sidewall of the semiconductor block, the method further includes the following steps: Remove the semiconductor block located on the side of the second dielectric layer, and retain the semiconductor block located on the side of the semiconductor layer to form a second trench located on the side of the second dielectric layer; The filling medium material is placed in the second trench.

[0024] In some embodiments, after epitaxially growing a plurality of semiconductor layers spaced apart along a first direction on the sidewall of the semiconductor block, the method further includes the following steps: Remove the semiconductor block to form a third trench; Silicon material is epitaxially grown along the third trench on the side of the semiconductor layer.

[0025] According to other embodiments, this disclosure also provides a semiconductor structure, including: Substrate; A semiconductor block protruding from the top surface of the substrate, the semiconductor block having the same crystal orientation as the substrate; a plurality of semiconductor layers spaced apart along a first direction on the sidewall of the semiconductor block, the first direction being perpendicular to the top surface of the substrate.

[0026] The semiconductor structure and its formation method provided in some embodiments of this disclosure first form a semiconductor block by etching an initial substrate, and then use the semiconductor block as a seed layer to laterally epitaxially grow multiple semiconductor layers spaced apart in a direction perpendicular to the top surface of the substrate on the sidewalls of the semiconductor block. This eliminates the need for alternating deposition processes to form multiple semiconductor layers spaced apart in a direction perpendicular to the substrate, reducing or even eliminating stress and other defect problems caused by alternating deposition layer by layer, thereby improving the manufacturing yield of the semiconductor structure and enhancing its electrical performance. Furthermore, some embodiments of this disclosure form a first dielectric layer and a second dielectric layer alternately stacked in a direction perpendicular to the top surface of the substrate, and form a first trench by removing the first dielectric layer. This laterally epitaxially grows the semiconductor block using a self-aligned process, improving the controllability of the position and thickness of individual semiconductor layers, as well as the position and width of the spacing between adjacent semiconductor layers, thus increasing the flexibility of semiconductor structure manufacturing. In addition, some embodiments of this disclosure form bit lines by implanting doped ions into the semiconductor block, and the semiconductor block and the substrate have the same crystal orientation, thereby ensuring the consistency of the internal crystal orientation of the finally formed bit lines and improving the electrical performance of the bit lines. Attached Figure Description

[0027] Appendix Figure 1 This is a flowchart of a method for forming a semiconductor structure according to a specific embodiment of this disclosure; Appendix Figure 2 -Appendix Figure 9 This is a schematic diagram of the main process structure in the formation of the semiconductor structure according to the specific embodiments of this disclosure; Appendix Figure 10 This is a schematic diagram showing the relationship between the thickness of the oxide layer in different crystal orientations of silicon and the oxidation time during the oxidation process in a specific embodiment of this disclosure. Detailed Implementation

[0028] The specific embodiments of the semiconductor structure and its formation method provided in this disclosure will be described in detail below with reference to the accompanying drawings.

[0029] This specific embodiment provides a method for forming a semiconductor structure, with appended... Figure 1 This is a flowchart illustrating the method for forming a semiconductor structure according to a specific embodiment of this disclosure, with appended... Figure 2 -Appendix Figure 9 This is a schematic diagram of the main process structure in the formation of the semiconductor structure according to a specific embodiment of this disclosure. For example... Figures 1-9 As shown, the method for forming the semiconductor structure includes the following steps: Step S11, provide an initial substrate 20, such as Figure 2 As shown.

[0030] Specifically, the initial substrate 20 may be, but is not limited to, a silicon substrate. This specific embodiment uses a silicon substrate as an example for illustration. In other embodiments, the initial substrate 20 may also be a semiconductor substrate such as gallium nitride, gallium arsenide, gallium carbide, silicon carbide, or SOI.

[0031] Step S12: Etch the initial substrate 20 to form a substrate 40 and a semiconductor block 41 protruding from the top surface of the substrate 40, as shown below. Figure 4 As shown.

[0032] In some embodiments, the specific steps for forming the substrate 40 and the semiconductor block 41 protruding from the top surface of the substrate 40 include: The initial substrate 20 is etched from the top surface using a deep etching process to form at least one opening 42. The portion of the initial substrate 20 remaining on the side of the opening 42 serves as the semiconductor block 41, and the opening 42 and the portion of the initial substrate 20 remaining below the semiconductor block 41 serve as the substrate 40.

[0033] Specifically, a first mask layer 30 is formed on the top surface of the initial substrate 20, and the first mask layer 30 is patterned to form a first etching window in the first mask layer 30 that exposes the top surface of the initial substrate 20. Then, a deep etching process is used to etch the initial substrate 20 downwards along the first etching window to form the opening 42. The portion of the initial substrate 20 retained on the side of the opening 42 serves as the semiconductor block 41, and the portion of the initial substrate 20 retained below the opening 42 and the semiconductor block 41 serves as the substrate 40. The semiconductor block 41 protrudes from the top surface of the substrate 40, thereby forming a stepped structure together with the substrate 40. During the etching of the initial substrate 20 to form the semiconductor block 41, the width of the semiconductor block 41 along the second direction D2 can be adjusted by adjusting the size of the first etching window in the first mask layer 30, wherein the second direction D2 is parallel to the top surface of the substrate 40.

[0034] In some embodiments, to improve the utilization rate of the initial substrate 20, only one opening 42 may be formed, with the semiconductor block 41 located on the side of the opening 42. In this specific embodiment, the top surface of the substrate 40 refers to the surface of the substrate 40 facing the semiconductor block 41.

[0035] In other embodiments, there are multiple openings 42, and the multiple openings 42 are arranged at intervals along the second direction D2, with the semiconductor block 41 located between two adjacent openings 42; Along the second direction D2, the width of the opening 42 is greater than the width of the semiconductor block 41.

[0036] Specifically, to improve the efficiency of subsequent epitaxial growth of the semiconductor layer and further simplify the manufacturing process of the semiconductor structure, the number of openings 42 can be multiple, and the multiple openings 42 are distributed around the outer periphery of the semiconductor block 41, so that subsequent epitaxial growth of the semiconductor layer can be performed simultaneously from multiple sidewalls of the semiconductor block 41, for example... Figure 4 The number of openings 42 shown is two, and they are symmetrically distributed on opposite sides of the semiconductor block 41 along the second direction D2. In this specific embodiment, "multiple" refers to two or more.

[0037] In some embodiments, the plurality of openings 42 may be arranged at intervals along the second direction D2, and a semiconductor block 41 is provided between any two adjacent openings 42, thereby enabling the semiconductor layers to be epitaxially grown on the sidewalls of the plurality of semiconductor blocks 41 simultaneously to form a plurality of stacked layers, the stacked layers including a plurality of semiconductor layers arranged at intervals along the first direction D1, wherein the first direction D1 is perpendicular to the top surface of the substrate 40.

[0038] Step S13: A plurality of semiconductor layers 70 are epitaxially grown on the sidewall of the semiconductor block 41, spaced apart along a first direction D1, wherein the first direction D1 is perpendicular to the top surface of the substrate 41, as shown below. Figure 7 As shown.

[0039] In some embodiments, the opening 42 exposes multiple sidewalls of the semiconductor block 41; the specific steps of epitaxially growing multiple semiconductor layers 70 arranged at intervals along a first direction D1 on the sidewalls of the semiconductor block 41 include: Multiple semiconductor layers 70 are epitaxially grown simultaneously on multiple sidewalls of the semiconductor block 41, arranged at intervals along the first direction D1, and the semiconductor layers 70 grown on the multiple sidewalls have the same width in the direction parallel to the substrate 40.

[0040] In one example, such as Figure 4As shown, the semiconductor block 41 and two openings 42 symmetrically distributed on opposite sides of the semiconductor block 41 along the second direction D2 are formed by etching the initial substrate 20. During epitaxial growth, semiconductor layers 70 are simultaneously epitaxially grown on the two opposite sidewalls of the semiconductor block 41 along the second direction D2. The semiconductor layers 70 grown on the two opposite sidewalls of the semiconductor block 41 along the second direction D2 are also symmetrically distributed about the semiconductor block 41. That is, the semiconductor layers 70 grown on the multiple sidewalls of the multiple semiconductor blocks 41 have the same width in a direction parallel to the substrate 40. This not only helps to improve the efficiency of the epitaxial growth of the semiconductor layers 70 but also improves the integration density of the subsequently formed semiconductor structure. The direction parallel to the substrate 40 can be any one or a combination of two or more of the second direction D2, a third direction D3, or other directions parallel to the substrate 40. The third direction D3 intersects the second direction D2. In this specific embodiment, the intersection can be perpendicular or oblique.

[0041] In another example, the opening 42 may also be located on adjacent sides of the semiconductor block 41, that is, two openings 42 located on adjacent sides of the semiconductor block 41 expose two adjacent sidewalls of the semiconductor block 41. During the epitaxial growth process, simultaneously epitaxially growing the semiconductor layer 70 on two adjacent sidewalls of the semiconductor block 41 can also improve the efficiency of the epitaxial growth of the semiconductor layer 70.

[0042] In some embodiments, the specific steps of epitaxially growing a plurality of semiconductor layers 70 arranged at intervals along a first direction D1 on the sidewall of the semiconductor block 41 include: A dielectric layer is formed on the substrate 41 on the side of the semiconductor block 41. The dielectric layer includes a plurality of first trenches 60 exposing the semiconductor block 41. The plurality of first trenches 60 are arranged at intervals along the first direction D1, such as... Figure 6 As shown; The semiconductor layer 70 is epitaxially grown laterally on the sidewall of the semiconductor block 41 along the first trench 60, such as... Figure 7 As shown.

[0043] In some embodiments, the specific steps of forming a dielectric layer on the substrate 41 located on the side of the semiconductor block 41 include: A first dielectric layer 51 and a second dielectric layer 52 are formed on the side of the semiconductor block 41. The first dielectric layer 51 and the second dielectric layer 52 are alternately stacked along the first direction D1, as shown below. Figure 5 As shown; The first dielectric layer 51 is removed to form the first trench 60 located between adjacent second dielectric layers 52 along the first direction D1. The second dielectric layer 52 and the first trench 60 constitute the dielectric layer. Figure 6 As shown.

[0044] In some embodiments, the specific steps of forming a first dielectric layer 51 and a second dielectric layer 52 on the side of the semiconductor block 41 include: The first dielectric layer 51 and the second dielectric layer 52 are alternately deposited along the first direction D1 using a selective atomic layer deposition process.

[0045] Specifically, selective atomic layer deposition (SLD) can be used to simultaneously and alternately deposit a first dielectric material and a second dielectric material in multiple openings 42 to form a first dielectric layer 51 and a second dielectric layer 52 alternately stacked along the first direction D1 within each opening 42. Using SLD to form the first dielectric layer 51 and the second dielectric layer 52 allows control over the stacking of the first dielectric layer 51 and the second dielectric layer 52 only along the first direction D1, without stacking along other directions (e.g., not along the second direction D2), thereby ensuring that the semiconductor layer 70 can be epitaxially grown subsequently through a self-aligned process. To facilitate the subsequent selective removal of the first dielectric layer 51 to form the first trench 60, a high etch selectivity ratio should be maintained between the first dielectric layer 51 and the second dielectric layer 52, for example, an etch selectivity ratio greater than 3. In one example, the material of the first dielectric layer 51 can be an oxide material (e.g., silicon dioxide), and the material of the second dielectric layer 52 can be a nitride material (e.g., silicon nitride).

[0046] Since the subsequent process involves removing the first dielectric layer 51 to form the first trench 60 located between adjacent second dielectric layers 52, and then epitaxially growing the semiconductor layer 70 along the first trench 60 on the sidewall of the semiconductor block 41, thus achieving self-aligned epitaxial growth, the thickness of the first dielectric layer 51 and the second dielectric layer 52, as well as the number of alternating stacks of the first dielectric layer 51 and the second dielectric layer 52, can be adjusted to control the thickness of the epitaxially grown semiconductor layer 70 along the first direction D1 and the number of semiconductor layers 70 stacked along the first direction D1, thereby further improving the flexibility of the semiconductor structure manufacturing process.

[0047] This specific embodiment combines deep etching with lateral epitaxy to form multiple semiconductor layers 70 stacked at intervals along the first direction D1. This reduces or even avoids the internal stress problems associated with forming multiple semiconductor layers stacked at intervals along the first direction D1 using deposition processes, thereby reducing internal defects in the final semiconductor structure and improving its yield. Furthermore, this embodiment uses self-aligned epitaxy to grow multiple semiconductor layers 70 on the sidewalls of the semiconductor block 41, and can flexibly adjust the number and thickness of the semiconductor layers 82. This not only improves the controllability and flexibility of the semiconductor structure manufacturing process but also lays the foundation for increasing the integration and storage density of the semiconductor structure.

[0048] In some embodiments, before removing the first dielectric layer 51, the following steps are further included: A support column is formed that penetrates the first dielectric layer 51 and the second dielectric layer 52 along the first direction D1.

[0049] Specifically, after forming the first dielectric layer 51 and the second dielectric layer 52 alternately stacked along the first direction D1, a second mask layer can be formed above the topmost second dielectric layer 52. The second mask layer has a second etching window that exposes a portion of the topmost dielectric layer 52. The first dielectric layer 51 and the second dielectric layer 52 are etched downwards along the second etching window to form a support hole that penetrates the first dielectric layer 51 and the second dielectric layer 52 along the first direction D1 and exposes the substrate 40. Next, an insulating dielectric material such as a nitride (e.g., silicon nitride) can be deposited into the support hole to form a support pillar filling the support hole. The support pillar supports the second dielectric layer 52, preventing it from tilting or collapsing during the removal of the first dielectric layer 51. To provide stable support for the dielectric layer while reducing the space occupied by the first trench 60, thereby further ensuring the smooth implementation of subsequent self-aligned epitaxial processes, in some embodiments, the support pillar is located in the middle or at the end of the second dielectric layer 52.

[0050] To avoid damage to the top surface of the semiconductor block 41 during the removal of the first dielectric layer 51 and the epitaxial growth of the semiconductor layer 70, and to ensure the flatness of the top surface of the formed top semiconductor layer 70, in some embodiments, before forming a plurality of semiconductor layers 70 spaced apart along the first direction D1 on the sidewall of the semiconductor block 41, the following steps are also included: A protective layer is formed covering the top surface of the semiconductor block 41. In one example, the material of the protective layer may be the same as the material of the second dielectric layer 52, for example, both being nitride materials (e.g., silicon nitride).

[0051] In some embodiments, the initial substrate 20 is made of silicon; the specific steps of laterally epitaxially growing the semiconductor layer 70 along the first trench 60 on the sidewall of the semiconductor block 41 include: Perform at least one of the following first cyclic steps until the semiconductor layer 70 filling the first trench 60 is formed, the first cyclic step including: Silicon material is epitaxially grown laterally on the sidewall of the semiconductor block 41 along the first trench 60; The first etchant is used to etch the epitaxially grown silicon material along the first trench 60, the first etchant having an effect on the silicon material on... <100> The etching rate in a crystal orientation is lower than that in other crystal orientations.

[0052] In some embodiments, the specific steps of laterally epitaxially growing silicon material on the sidewall of the semiconductor block 41 along the first trench 60 include: Silicon material is epitaxially grown laterally along the first trench 60 on the sidewall of the semiconductor block 41 using a selective epitaxial growth process, and the silicon material is... <100> The epitaxial growth rate in one crystal orientation is greater than or equal to the growth rate in other crystal orientations.

[0053] In some embodiments, the specific steps of etching the epitaxially grown silicon material along the first trench 60 using a first etchant include: The epitaxially grown silicon material is etched along the first trench 60 using an atomic layer etching process.

[0054] Specifically, the top surface of the substrate 40 is <100> Crystal orientation. When silicon material is epitaxially grown on the sidewall of semiconductor block 41 along the first trench 60 using semiconductor block 41 as a seed layer, the silicon material in... <100> Crystal orientation and other non- <100> Growth occurs in all crystal orientations, wherein, the <100> Crystal orientations include six crystal orientations: crystal orientation

[100] , crystal orientation

[010] , crystal orientation

[001] , and the opposite crystal orientations of the above three; non- <100> Crystal orientation includes <110> Crystal orientation and <111> Crystal orientation. To improve the uniformity and density of the epitaxially grown semiconductor layer 70, it is necessary to minimize the non-crystalline orientation in the epitaxially grown semiconductor layer 70. <100> Regarding the crystal orientation, a selective epitaxial growth process is used to grow silicon material laterally along the first trench 60 onto the sidewall of the semiconductor block 41. By adjusting various parameters during the epitaxial growth process, such as temperature, the grown silicon material can be allowed to... <100> The epitaxial growth rate in one crystal orientation is greater than or equal to the growth rate in other crystal orientations.

[0055] To further reduce the impact of epitaxial growth on the silicon material in non- <100> The crystal orientation portion further improves the uniformity and density of the atomic layer structure of the semiconductor layer 70, allowing the first cycle step to be performed multiple times. Specifically, during one execution of the first cycle step, after a first preset time for epitaxial growth of silicon material along the first trench 60 on the sidewall of the semiconductor block 41, the epitaxial growth process is paused, and the epitaxially grown silicon material 70 is etched along the first trench 60 for a second preset time. During the etching of the epitaxially grown silicon material, by selecting a suitable first etchant, the epitaxially grown silicon material is... <100> The etching rate in one crystal orientation is lower than that in other crystal orientations, thereby achieving anisotropic etching of the epitaxially grown silicon material. Then, the first cycle step is executed again, i.e., the silicon material is epitaxially grown again along the first trench 60, and after the first preset time of epitaxial growth, the epitaxially grown silicon material is anisotropically etched again along the first trench 60 for a second preset time. After each execution of the first cycle step, the epitaxially grown silicon material retained in the first trench 60 has high structural uniformity, density, and surface flatness. By executing the first cycle step multiple times, i.e., alternating between epitaxial growth and anisotropic etching processes multiple times, a semiconductor layer 70 filling the first trench 60 is formed. This specific embodiment, by executing the first cycle step multiple times, not only improves the density and atomic layer structure uniformity of the finally generated semiconductor layer 70, but also helps to improve the surface morphology and surface flatness of the semiconductor layer 70. The relative magnitudes of the first preset time and the second preset time, as well as the number of times the first loop step is executed, can be selected according to actual needs, such as the specific type of the first etchant and the thickness of the semiconductor layer 70 to be formed. This specific embodiment does not limit these factors.

[0056] To further improve the performance of epitaxially grown silicon materials <100> Crystal orientation and non- <100> In some embodiments, the first etchant comprises tetramethylammonium hydroxide, which is the etching selectivity between crystal orientations. In one example, the first etchant comprises 15% to 30% (e.g., 25%) of tetramethylammonium hydroxide by volume.

[0057] In some embodiments, the first etchant further includes an additive, which is any one or a combination of two or more of isopropanol, butanol, and tritium.

[0058] Specifically, to improve the morphology of the silicon material retained after etching the epitaxially grown silicon material, the additive can be added to the first etchant, which can be any one or a combination of two or more of isopropanol, butanol, and tritium. By adjusting the ratio of tetramethylammonium hydroxide to the additive in the first etchant and the etching temperature during lateral etching of the epitaxially grown silicon material, the etching rate between different crystal planes and the surface roughness of the epitaxially grown silicon material retained after etching can be more precisely controlled. For example, the first etchant may include 19% to 23% tetramethylammonium hydroxide and 10% to 25% isopropanol by volume; or, the first etchant may include 19% to 23% tetramethylammonium hydroxide and 4% to 15% butanol by volume; or, the first etchant may include 19% to 23% tetramethylammonium hydroxide, 10% to 25% isopropanol by volume, and 0.1% to 0.2% tritium by volume; or, the first etchant may include 19% to 23% tetramethylammonium hydroxide, 4% to 15% butanol by volume, and 0.1% to 0.2% tritium by volume.

[0059] In some embodiments, the initial substrate 20 is made of silicon; the specific steps of laterally epitaxially growing the semiconductor layer 70 along the first trench 60 on the sidewall of the semiconductor block 41 include: Perform at least one second cyclic step as follows until the semiconductor layer 70 filling the first trench 60 is formed, the second cyclic step including: Silicon material is epitaxially grown laterally along the first trench 60 on the sidewall of the semiconductor block 41 to form the semiconductor layer 70; The silicon material is converted along the first trench 60 to form a conversion layer, and the silicon material is... <100> The transformation rate of crystal orientation is lower than that of other crystal orientations; The conversion layer is etched along the first trench 60 using a second etchant, wherein the etching rate of the conversion layer by the second etchant is greater than the etching rate of the silicon material.

[0060] In some embodiments, the conversion process is an oxidation process, and the conversion layer is a silicon oxide layer.

[0061] The following explanation uses oxidation as an example of the conversion process. (Appendix) Figure 10 This is a schematic diagram illustrating the relationship between the thickness of the oxide layer in different crystal orientations of silicon and the oxidation time during the oxidation process in a specific embodiment of this disclosure. Figure 10The first curve, 1301, represents the oxidation process of silicon at 900℃. <100> The curves show the change in the thickness of the oxide layer formed on silicon with different crystal orientations over time. The second curve, 1311, represents the oxidation process of silicon at 900℃. <110> The curves show the change in the thickness of the oxide layer formed on silicon with different crystal orientations over time. The third curve, 1321, represents the oxidation process of silicon at 900℃. <111> The curves showing the change in the thickness of the oxide layer formed on silicon with different crystal orientations over time; the fourth curve, 1302, represents the oxidation process of silicon at 1000℃. <100> The curves showing the change in the thickness of the oxide layer formed on silicon with different crystal orientations over time; curve 1312 represents the oxidation process of silicon at 1000℃. <110> The curves show the change in the thickness of the oxide layer formed on silicon with different crystal orientations over time. The sixth curve represents the oxidation process of silicon at 1000℃. <111> The curve showing the change in thickness of the oxide layer formed on silicon with different crystal orientations over time. Figure 10 It can be seen that, under the same oxidation time, <111> The thickness of the oxide layer formed on silicon with different crystal orientations is greater than <110> The thickness of the oxide layer formed on the silicon crystal orientation, and <110> The thickness of the oxide layer formed on silicon with different crystal orientations is greater than <100> The thickness of the oxide layer formed on silicon with the desired crystal orientation, i.e. <111> The oxidation rate of silicon with different crystal orientations is greater than that of silicon with different crystal orientations. <110> The oxidation rate of silicon with different crystal orientations, and <110> The oxidation rate of silicon with different crystal orientations is greater than that of silicon with different crystal orientations. <100> Oxidation rate of silicon with specific crystal orientation.

[0062] Therefore, during one execution of the second cycle step, after a third preset time of epitaxial growth of silicon material along the first trench 60 on the sidewall of the semiconductor block 41, the epitaxial growth process is paused, and the epitaxially grown silicon material is oxidized along the first trench 60. After the oxidation process continues for a fourth preset time, the oxidation process is paused again, and the conversion layer is etched along the first trench 60 for a fifth preset time. Because silicon material is in non- <100> The oxidation rate of the crystal orientation is greater than that of the crystal orientation. <100> The oxidation rate of the crystal orientation, therefore, under the same oxidation time and etching time, the amount of non-crystalline material removed... <100> The amount of silicon material with crystal orientation is greater than <100> The amount of silicon material with crystal orientation. After each execution of the second cycle step, the epitaxially grown silicon material retained in the first trench 60 has high structural uniformity, density, and surface flatness. In this embodiment, during the epitaxial process, a selective epitaxial growth process can also be used to epitaxially grow silicon material laterally along the first trench 60 on the sidewall of the semiconductor block 41. By adjusting various parameters in the epitaxial growth process, such as temperature, the amount of epitaxially grown silicon material can be adjusted. <100> The epitaxial growth rate in one crystal orientation is greater than or equal to the growth rate in other crystal orientations. By repeatedly executing the second cyclic step—that is, alternately performing the epitaxial growth process, conversion process, and conversion layer etching process multiple times—the semiconductor layer 70 filling the first trench 60 is formed. This specific embodiment, by executing the second cyclic step multiple times, not only improves the density and uniformity of the atomic layer structure of the finally generated semiconductor layer 70, but also helps to improve the surface morphology and surface flatness of the semiconductor layer 70. The relative magnitudes of the third, fourth, and fifth preset times, as well as the number of times the second cyclic step is executed, can be selected by those skilled in the art according to actual needs, such as the type of the second etchant selected and the desired thickness of the semiconductor layer 70.

[0063] This specific embodiment uses oxidation as an example for illustration. In other embodiments, those skilled in the art can also choose other conversion methods according to actual needs, as long as the silicon material is kept in a state of flux during the conversion process. <100> The transformation rate for crystal orientation should be lower than that for other crystal orientations.

[0064] In some embodiments, after epitaxially growing a plurality of semiconductor layers 70 spaced apart along a first direction D1 on the sidewall of the semiconductor block 41, the following steps are further included: Doped ions are implanted into the semiconductor block 41 to form bit lines.

[0065] The semiconductor structure formed in this specific embodiment can be, but is not limited to, DRAM. The following description uses DRAM as an example. A stacked layer, consisting of semiconductor layers 70 and a second dielectric layer 52 alternately stacked along the first direction D1, defines the transistor region and the capacitor region and bit line region distributed along a third direction D3 on opposite sides of the transistor region, wherein the semiconductor block 41 is located in the bit line region. Then, by etching the stacked layer, each semiconductor layer 70 is divided into a plurality of semiconductor pillars 121 spaced apart along the third direction D3, thereby forming a plurality of semiconductor pillars 121 stacked in a three-dimensional array along the first direction D1, the second direction D2, and the third direction D3. The third direction D3 is parallel to the top surface of the substrate 40, and the second direction D2 intersects the third direction D3.

[0066] Subsequently, a channel region and source and drain regions distributed along the second direction D2 on opposite sides of the channel region are formed in the semiconductor pillar 121 of the transistor region. Word lines 111 extending along the third direction D3 and covering the plurality of channel regions spaced apart along the third direction D3 are formed in the transistor region. Before forming the word lines 111, a gate dielectric layer 120 can be formed by an in-situ oxidation process (e.g., in-situ moisture oxidation). A capacitor is formed in the capacitor region. The capacitor includes the semiconductor pillar 121 located in the capacitor region, a conductive layer 123 covering the surface of the semiconductor pillar 121, a dielectric layer 122 covering the surface of the conductive layer 123, and an upper electrode layer 112 covering the surface of the dielectric layer 122, wherein the semiconductor pillar 121 and the conductive layer 123 of the capacitor region together serve as the lower electrode layer of the capacitor. The capacitor region may also include a common electrode layer 113 covering the plurality of capacitors. Dopant ions are implanted into the semiconductor block 41 to heavily dope the semiconductor block 41, thereby enhancing the conductivity of the semiconductor block 41 and forming the bit line 110 electrically connected to the source region of the transistor. The word line 110 can be tungsten metal or TiN. The above description uses a horizontal word line structure and a vertical bit line structure as examples; in other embodiments, a vertical word line structure and a horizontal bit line structure can also be formed.

[0067] This specific embodiment forms the bit line 110 by directly heavily doping the semiconductor block 41. On the one hand, since the semiconductor block 41 and the substrate 40 have the same crystal orientation, heavy doping can improve the consistency of electrical performance at various positions of the formed bit line 110, thereby improving the performance of the semiconductor structure and increasing its yield. On the other hand, since there is no need to remove the semiconductor block 41 through an etching process, it not only reduces damage to the epitaxially grown semiconductor layer 70, but also simplifies the semiconductor structure fabrication process and improves the manufacturing efficiency of the semiconductor structure.

[0068] This specific embodiment is illustrated by taking two transistors arranged at intervals along the third direction D3 as an example, sharing a single bit line 110. In other embodiments, a bit line electrically connected to each transistor may also be provided.

[0069] In other embodiments, after epitaxially growing a plurality of semiconductor layers 70 spaced apart along a first direction D1 on the sidewall of the semiconductor block 41, the following steps are further included: Remove the semiconductor block 41 located on the side of the second dielectric layer 52, and retain the semiconductor block 41 located on the side of the semiconductor layer 70 to form a second trench located on the side of the second dielectric layer 52. The filling medium material is placed in the second trench.

[0070] Specifically, by removing the semiconductor block 41 on the side of the second dielectric layer 52 and retaining the semiconductor block 41 on the side of the semiconductor layer 70, and filling the second trench with the dielectric material, it is possible to form an interlayer dielectric layer (including the second dielectric layer and the dielectric material filling between two adjacent second dielectric layers) and a silicon layer (including the semiconductor layer and the semiconductor block retained between two adjacent semiconductor layers) that are alternately stacked along the first direction on the substrate 40, forming a stacked structure so that the stacked structure can be processed by conventional processes to form the semiconductor structure.

[0071] In other embodiments, after epitaxially growing a plurality of semiconductor layers 70 spaced apart along a first direction D1 on the sidewall of the semiconductor block 41, the following steps are further included: Remove the semiconductor block 41 to form a third trench; Silicon material is epitaxially grown along the third trench on the side of the semiconductor layer 70.

[0072] In one example, the semiconductor block 41 can be removed using a vertical etching process to form a third trench. Then, silicon material can be epitaxially grown within the third trench using the semiconductor layer 70 as a seed layer, and a dielectric material can be filled between the two epitaxially grown silicon layers to form an interlayer dielectric layer (including a second dielectric layer and the dielectric material filling between two adjacent second dielectric layers) and a silicon layer (including the semiconductor layer and an epitaxially grown silicon layer between two adjacent semiconductor layers) alternately stacked along the first direction on the substrate 40, forming a stacked structure. This allows for subsequent processing of the stacked structure using conventional processes to form the semiconductor structure.

[0073] In another example, after removing the semiconductor block 41 and forming the third trench, a conductive material such as tungsten is directly filled into the third trench to form the bit line in the third trench.

[0074] This specific embodiment also provides a semiconductor structure, employing, as in... Figures 1-9 The semiconductor structure is formed by the method described above. The structure of the semiconductor structure formed in this specific embodiment can be found in [reference needed]. Figures 2-9 The semiconductor structure described in this specific embodiment may be, but is not limited to, DRAM. The semiconductor structure includes: Substrate 40; A semiconductor block 41 protrudes from the top surface of the substrate 40, the semiconductor block 41 having the same crystal orientation as the substrate 40; a plurality of semiconductor layers 70 are arranged at intervals along a first direction D1 on the sidewall of the semiconductor block 41, the first direction D1 being perpendicular to the top surface of the substrate 40.

[0075] The semiconductor structure and its formation method provided in some embodiments of this specific implementation first form a semiconductor block by etching an initial substrate. Then, using the semiconductor block as a seed layer, multiple semiconductor layers are laterally epitaxially grown on the sidewalls of the semiconductor block, spaced apart in a direction perpendicular to the top surface of the substrate. This eliminates the need for alternating deposition processes to form multiple semiconductor layers spaced apart in a direction perpendicular to the substrate, reducing or even eliminating stress and other defect problems caused by alternating deposition layer by layer. This improves the manufacturing yield of the semiconductor structure and enhances its electrical performance. Furthermore, some embodiments of this specific implementation form a first dielectric layer and a second dielectric layer alternately stacked in a direction perpendicular to the top surface of the substrate. A first trench is formed by removing the first dielectric layer, i.e., the semiconductor block is laterally epitaxially grown using a self-aligned process. This improves the controllability of the position and thickness of individual semiconductor layers, as well as the position and width of the spacing between adjacent semiconductor layers, thus increasing the flexibility of semiconductor structure manufacturing. In addition, some embodiments of this specific implementation form bit lines by implanting doped ions into the semiconductor block, and the semiconductor block and the substrate have the same crystal orientation, thereby ensuring the consistency of the internal crystal orientation of the finally formed bit lines and improving the electrical performance of the bit lines.

[0076] The above description is only a preferred embodiment of this disclosure. It should be noted that those skilled in the art can make several improvements and modifications without departing from the principles of this disclosure, and these improvements and modifications should also be considered within the scope of protection of this disclosure.

Claims

1. A method for forming a semiconductor structure, characterized in that, Includes the following steps: Provide initial substrate; The initial substrate is etched to form a substrate and a semiconductor block protruding from the top surface of the substrate; A first dielectric layer and a second dielectric layer are formed on the side of the semiconductor block, and the first dielectric layer and the second dielectric layer are stacked alternately along a first direction; The first dielectric layer is removed to form a first trench located between adjacent second dielectric layers along the first direction. The second dielectric layer and the first trench constitute the dielectric layer. The dielectric layer includes a plurality of first trenches exposing the semiconductor block. The plurality of first trenches are spaced apart along the first direction. A semiconductor layer is epitaxially grown laterally on the sidewall of the semiconductor block along the first trench, and a plurality of semiconductor layers are spaced apart along a first direction, the first direction being perpendicular to the top surface of the substrate; Each of the semiconductor layers is divided into a plurality of semiconductor pillars spaced apart along a third direction. A channel region and a source region and a drain region distributed on opposite sides of the channel region along a second direction are formed in the semiconductor pillars. The third direction is parallel to the top surface of the substrate, and the second direction intersects the third direction.

2. The method for forming a semiconductor structure according to claim 1, characterized in that, The steps of forming a substrate and a semiconductor block protruding from the top surface of the substrate include: The initial substrate is etched from the top surface using a deep etching process to form at least one opening. The portion of the initial substrate remaining on the side of the opening serves as the semiconductor block, and the opening and the portion of the initial substrate remaining below the semiconductor block serve as the substrate.

3. The method for forming a semiconductor structure according to claim 2, characterized in that, The number of openings is multiple, and the multiple openings are arranged at intervals along the second direction, with the semiconductor block located between two adjacent openings; Along the second direction, the width of the opening is greater than the width of the semiconductor block.

4. The method for forming a semiconductor structure according to claim 2, characterized in that, The opening exposes multiple sidewalls of the semiconductor block; The step of epitaxially growing a plurality of semiconductor layers spaced apart along a first direction on the sidewall of the semiconductor block includes: Multiple semiconductor layers are epitaxially grown simultaneously on multiple sidewalls of the semiconductor block, arranged at intervals along the first direction, and the semiconductor layers grown on the multiple sidewalls have the same width in the direction parallel to the substrate.

5. The method for forming a semiconductor structure according to claim 1, characterized in that, The steps of forming a first dielectric layer and a second dielectric layer on the side of the semiconductor block include: The first dielectric layer and the second dielectric layer are alternately deposited along the first direction using a selective atomic layer deposition process.

6. The method for forming a semiconductor structure according to claim 1, characterized in that, Before removing the first dielectric layer, the following steps are also included: A support column is formed that penetrates the first dielectric layer and the second dielectric layer along the first direction.

7. The method for forming a semiconductor structure according to claim 1, characterized in that, Before forming a plurality of semiconductor layers spaced apart along a first direction on the sidewall of the semiconductor block, the method further includes the following steps: A protective layer is formed covering the top surface of the semiconductor block.

8. The method for forming a semiconductor structure according to claim 1, characterized in that, The initial substrate is made of silicon; The step of laterally epitaxially growing the semiconductor layer along the first trench on the sidewall of the semiconductor block includes: Perform at least one of the following first cyclic steps until the semiconductor layer filling the first trench is formed, the first cyclic step including: Silicon material is epitaxially grown laterally on the sidewall of the semiconductor block along the first trench; The silicon material epitaxially grown is etched along the first trench using a first etchant, wherein the first etchant has an effect on the silicon material. <100> The etching rate in a crystal orientation is lower than that in other crystal orientations.

9. The method for forming a semiconductor structure according to claim 8, characterized in that, The step of epitaxially growing silicon material laterally along the first trench on the sidewall of the semiconductor block includes: A selective epitaxial growth process is used to laterally epitaxially grow silicon material on the sidewall of the semiconductor block along the first trench, and the silicon material is... <100> The epitaxial growth rate in one crystal orientation is greater than or equal to the growth rate in other crystal orientations.

10. The method for forming a semiconductor structure according to claim 8, characterized in that, The step of etching the epitaxially grown silicon material along the first trench using a first etchant includes: The silicon material epitaxially grown is etched along the first trench using an atomic layer etching process.

11. The method for forming a semiconductor structure according to claim 8, characterized in that, The first etching agent comprises tetramethylammonium hydroxide.

12. The method for forming a semiconductor structure according to claim 11, characterized in that, The first etchant further includes an additive, which is any one or a combination of two or more of isopropanol, butanol, and tritium.

13. The method for forming a semiconductor structure according to claim 1, characterized in that, The initial substrate is made of silicon; The step of laterally epitaxially growing the semiconductor layer along the first trench on the sidewall of the semiconductor block includes: Perform at least one second cyclic step as follows until the semiconductor layer filling the first trench is formed, the second cyclic step including: Silicon material is epitaxially grown laterally on the sidewall of the semiconductor block along the first trench; The silicon material is converted along the first trench to form a conversion layer, and the silicon material is... <100> The transformation rate of crystal orientation is lower than that of other crystal orientations; The conversion layer is etched along the first trench using a second etchant, wherein the etching rate of the conversion layer by the second etchant is greater than the etching rate of the silicon material.

14. The method for forming a semiconductor structure according to claim 13, characterized in that, The conversion process is an oxidation process, and the conversion layer is a silicon oxide layer.

15. The method for forming a semiconductor structure according to claim 1, characterized in that, After epitaxially growing a plurality of semiconductor layers spaced apart along a first direction on the sidewall of the semiconductor block, the method further includes the following steps: Doped ions are implanted into the semiconductor block to form bit lines.

16. The method for forming a semiconductor structure according to claim 6, characterized in that, After epitaxially growing a plurality of semiconductor layers spaced apart along a first direction on the sidewall of the semiconductor block, the method further includes the following steps: Remove the semiconductor block located on the side of the second dielectric layer, and retain the semiconductor block located on the side of the semiconductor layer to form a second trench located on the side of the second dielectric layer; The filling medium material is placed in the second trench.

17. The method for forming a semiconductor structure according to claim 1, characterized in that, After epitaxially growing a plurality of semiconductor layers spaced apart along a first direction on the sidewall of the semiconductor block, the method further includes the following steps: Remove the semiconductor block to form a third trench; Silicon material is epitaxially grown along the third trench on the side of the semiconductor layer.

18. A semiconductor structure, characterized in that, The semiconductor structure is formed according to the formation method of any one of claims 1 to 17, wherein the semiconductor structure comprises: Substrate; A semiconductor block protruding from the top surface of the substrate, the semiconductor block having the same crystal orientation as the substrate; a plurality of semiconductor layers spaced apart along a first direction on the sidewall of the semiconductor block, the first direction being perpendicular to the top surface of the substrate.

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