Constant output power circuit and electronic device

Abstract

The application provides a constant output power circuit, comprising: a power supply unit for supplying power to a load; a power control unit electrically connected between the power supply unit and the load, comprising: a switching unit for turning on or off the connection between the power supply unit and the load; a signal acquisition unit for acquiring a load voltage at a first preset time and a reference voltage at a second preset time; an analog-to-digital conversion unit for converting the load voltage into a load voltage digital signal and converting the reference voltage into a reference voltage digital signal; a power integration unit for performing power integration according to the load voltage digital signal and the reference voltage digital signal, and outputting a PWM control signal according to the integration result; and a PWM control unit for outputting a switching signal to the signal acquisition unit according to the first preset time and the second preset time, and outputting a PWM signal with adjustable duty cycle to the switching unit according to the PWM control signal to control the on-off of the switching unit, so as to realize constant output of the load power.

Description

Technical Field

[0001] This invention relates to the field of electronic circuit technology, and in particular to a constant output power circuit and electronic device. Background Technology

[0002] Currently, electronic heating devices on the market need to maintain a constant output power during the heating process to improve their performance. For example, a typical application of electronic heaters is in portable electric mosquito repellents. Portable electric mosquito repellents are powered by rechargeable batteries. After activation, a certain operating voltage is applied across the heating wire, which generates heat. This heat is conducted to the mosquito repellent pad, causing the mosquito-repelling ingredients in the heated pad to volatilize, thus achieving a mosquito-repelling effect. If the heating power is too high, the mosquito repellent pad will quickly become ineffective; conversely, if the power is too low, the mosquito-repelling effect will be poor. To ensure a continuous and stable mosquito-repelling effect, it is usually required to maintain a constant output power for the heating wire. In existing technologies, voltage is typically applied across the load, and the load power is controlled by adjusting the duty cycle of the voltage applied to the load. However, in practical applications, battery voltage fluctuates during use and cannot remain constant. The resistance of the heating wire also changes with temperature, resulting in variations in heating power. This makes it impossible to guarantee a constant power output, affecting the user experience of the heated electronic product. Summary of the Invention

[0003] The purpose of this invention is to provide a constant output power circuit and electronic device that can solve the above-mentioned problems.

[0004] One aspect of this invention provides a constant output power circuit, comprising: a power supply unit electrically connected to a load and a reference resistor for supplying power to the load; a power control unit electrically connected between the power supply unit and the load, comprising: a switching unit electrically connected between the power supply unit and the load for connecting or disconnecting the connection between the power supply unit and the load; a signal acquisition unit electrically connected to the load, the reference resistor, and the switching unit for acquiring the load voltage of the load at a first preset time and acquiring the reference voltage of the reference resistor at a second preset time; and an analog-to-digital conversion unit electrically connected to the signal acquisition unit for converting the load voltage into a digital load voltage signal. It is also used to convert the reference voltage into a reference voltage digital signal; a power integration unit, electrically connected to the analog-to-digital conversion unit, is used to perform power integration based on the load voltage digital signal and the reference voltage digital signal, and output a PWM control signal based on the integration result; a PWM control unit, electrically connected to the power integration unit, the switching unit and the signal acquisition unit, is used to output a switching signal to the signal acquisition unit according to the first preset time and the second preset time to control the signal acquisition unit to select to acquire the load voltage or the reference voltage, and is also used to output a duty cycle adjustable PWM signal to the switching unit according to the PWM control signal to control the switching unit to turn on and off.

[0005] Preferably, the signal acquisition unit includes: a current mirror, the input terminal of which is electrically connected to one end of the load, and the output terminal of which is electrically connected to one end of the reference resistor, wherein the mirror factor of the current mirror is N such that the current flowing through the load is N times the current flowing through the reference resistor; and a multiplexer, including a first input terminal, a second input terminal, an output terminal, and a control terminal, wherein the output terminal of the multiplexer is electrically connected to the analog-to-digital converter unit, the first input terminal of the multiplexer is electrically connected to the common terminal of the switching unit and the load, the second input terminal of the multiplexer is electrically connected to the common terminal of the current mirror and the reference resistor, and the control terminal of the multiplexer is electrically connected to the PWM control unit to receive the switching signal, and select, according to the switching signal, to turn on the first input terminal and the output terminal of the multiplexer to transmit the load voltage to the analog-to-digital converter unit or to turn on the second input terminal and the output terminal of the multiplexer to transmit the reference voltage to the analog-to-digital converter unit.

[0006] Preferably, the PWM control unit includes a clock and a counter, the clock being used to output a clock signal, and the counter being used to calculate the clock period of the clock signal; the PWM control unit is also used to: output a first-level switching signal to the multiplexer during even-numbered periods of the clock signal, and output a second-level switching signal to the multiplexer during odd-numbered periods of the clock signal.

[0007] Preferably, the multiplexer is further configured to connect the first input terminal of the multiplexer and the output terminal of the multiplexer according to the first level switching signal to select the load voltage to be acquired, and to connect the second input terminal of the multiplexer and the output terminal of the multiplexer according to the second level switching signal to select the reference voltage to be acquired.

[0008] Preferably, the reference voltage is: U ref = I ref R ref =I0 / N R ref The current flowing through the load is: I0 = U ref N / R ref The transient power of the load is: P0 = U0 I0 = U0 U ref N / R ref The multiplication result of the load voltage digital signal and the reference voltage digital signal is: mult = data data_d1=U0 U ref / LSB / LSB=P0 R ref / (N LSB LSB); where U ref I is the reference voltage of the reference resistor. ref R is the reference current flowing through the reference resistor. refHere, N is the resistance value of the reference resistor, I0 is the load current flowing through the load, U0 is the load voltage of the load, P0 is the transient power of the load, data alternately represents the digital signal of the load voltage and the digital signal of the reference voltage according to the clock cycle, data_d1 is the delay step signal of data, if the current data is the digital signal of the load voltage, then data_d1 is the digital signal of the reference voltage, and vice versa, LSB is the minimum resolution of the analog-to-digital conversion unit, and the mirror coefficient N and the resistance value R of the reference resistor are also specified. ref If the minimum resolution LSB of the analog-to-digital conversion unit is a known constant, then the product of the reference voltage and the load voltage, U0, is... U ref The multiplication result mult and the transient power P0 of the load have a defined proportional relationship.

[0009] Preferably, the power integration unit includes: a delay unit electrically connected to the analog-to-digital converter unit, used to delay the reference voltage digital signal or the load voltage digital signal by one clock cycle; a multiplier electrically connected to the analog-to-digital converter unit and the delay unit, used to perform multiplication on the reference voltage digital signal and the load digital signal, and output the multiplication result; a subtraction register electrically connected to the multiplier, preset with an initial value, used to perform repeated subtractions after receiving a multiplication result, and output the subtraction result; and a comparator including a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of the comparator is electrically connected to the multiplier unit for receiving the multiplication result, the second input terminal of the comparator is electrically connected to the subtraction register for receiving the subtraction result, and the output terminal of the comparator is electrically connected to the PWM generation unit.

[0010] Preferably, when the subtraction result is less than the multiplication result by a preset multiple, the comparator outputs a first-level PWM control signal; when the subtraction result is greater than or equal to the multiplication result by the preset multiple, the comparator outputs a second-level PWM control signal; the PWM control unit adjusts the duty cycle of the PWM signal according to the first-level PWM control signal and the second-level PWM control signal.

[0011] Preferably, when the counter completes one counting cycle, the subtraction register resets the initial value, and the counter starts counting again.

[0012] Preferably, the switching unit includes: a first electronic switch, the first electronic switch including a first terminal, a second terminal and a control terminal, the first terminal of the first electronic switch being electrically connected to the power supply unit, the second terminal of the first electronic switch being electrically connected to one end of the load, and the control terminal of the first electronic switch being electrically connected to the PWM control unit.

[0013] Another aspect of the present invention provides an electronic device including the constant output power circuit described in any of the preceding claims.

[0014] Compared to existing technologies, the constant output power circuit and electronic device proposed in this invention acquires the load voltage and reference voltage in a time-division multiplexing manner through a signal acquisition unit. Then, the load voltage and reference voltage are converted into load voltage signals and reference voltage signals respectively through an analog-to-digital conversion unit. The power integration unit performs power integration based on the load voltage digital signal and the reference voltage digital signal, and outputs a PWM control signal based on the integration result to control the PWM control unit to output a PWM signal with an adjustable duty cycle to the switching unit, thereby controlling the on / off state between the power supply unit and the load and realizing constant power output from the load.

[0015] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0016] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained from these drawings without creative effort.

[0017] Figure 1 The schematic diagram illustrates a module diagram of a constant output power circuit according to Embodiment 1 of the present invention.

[0018] Figure 2 The schematic diagram illustrates the analog-to-digital conversion process according to Embodiment 1 of the present invention.

[0019] Figure 3 The diagram illustrates the waveform of the PWM signal according to Embodiment 1 of the present invention.

[0020] Figure 4 The schematic diagram illustrates a module diagram of a constant output power circuit according to Embodiment 2 of the present invention.

[0021] Figure 5The diagram illustrates the integration method of the power integration unit of the constant output power circuit according to Embodiment 2 of the present invention.

[0022] Figure 6 A timing diagram of a constant output power circuit according to Embodiment 2 of the present invention is shown schematically.

[0023] Figure 7 The schematic diagram illustrates the control flowchart of a constant output power circuit according to Embodiment 2 of the present invention.

[0024] Explanation of key component symbols: Constant output power circuit 1 Power supply unit 10 Power control unit 20 Load 30 Reference resistor 40 Switching unit 201 Signal acquisition unit 202 Analog-to-digital conversion unit 203 Power Integrator 204 Delay Unit 2041 Multiplier 2042 Subtraction Register 2043 Comparator 2044 PWM control unit 205 Clock 2051 Counter 2052 Current mirror Ir Multiplexer M1 First MOSFET Q1 Detailed Implementation The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can be arranged and designed in various different configurations. The present invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to make the disclosure of the present invention more thorough and complete. Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0025] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0026] In the description of this invention, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set up," "connected," and "electrically connected" should be interpreted broadly. For example, they can refer to a direct connection or an indirect connection through an intermediate medium, or they can refer to the internal connection of two elements. It should be noted that when one element is considered to be "connected" to another element, it can be directly connected to the other element or there may be an intervening element present.

[0027] The following detailed description of some embodiments of the present invention is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0028] The terminology involved in this invention is explained as follows: Constant power: The output power of the circuit load is constant.

[0029] PWM: Pulse Width Modulation, a pulse signal with a fixed frequency and adjustable duty cycle.

[0030] ADC: Analog-to-Digital Converter, which converts continuous analog signals into discrete digital signals.

[0031] SAR ADC: Successive Approximation Register Analog-to-Digital Converter.

[0032] Sigma-delta ADC: Σ-Δ analog-to-digital converter.

[0033] Flash ADC: Parallel Comparator Analog-to-Digital Converter.

[0034] Pipeline ADC: A pipelined analog-to-digital converter.

[0035] The inventors have discovered that existing electronic heating devices require a constant output power during the heating process to improve their performance. However, in practical applications, battery voltage fluctuates and cannot remain constant, and the resistance of the heating wire changes with temperature, resulting in variations in heating power. This makes it impossible to guarantee a constant power output and negatively impacts the user experience of the heated electronic product.

[0036] The inventors discovered that voltage can be applied across a load, and the load's power can be controlled by adjusting the duty cycle of this applied voltage. However, in practical applications, battery voltage fluctuates during use and cannot remain constant. The resistance of the heating wire also changes with temperature, leading to variations in heating power and making it impossible to guarantee constant power output. This negatively impacts the user experience of heated electronic products. Therefore, precise control of output power is crucial for maintaining a constant power output.

[0037] In view of this, embodiments of the present invention provide a constant output power circuit and an electronic device, thereby solving the problem that the electronic device cannot maintain a constant power output.

[0038] Specifically: A new constant output power circuit is provided. This new constant output power circuit acquires the load voltage and reference voltage in a time-division multiplexing manner through a signal acquisition unit. Then, the load voltage and reference voltage are converted into load voltage signals and reference voltage signals respectively through an analog-to-digital converter. The power integration unit performs power integration based on the load voltage digital signal and the reference voltage digital signal, and outputs a PWM control signal based on the integration result. This PWM control unit then outputs a PWM signal with an adjustable duty cycle to the switching unit, thereby controlling the on / off state between the power supply unit and the load, and achieving constant power output to the load.

[0039] Example 1 Figure 1 A schematic diagram of a constant output power circuit 1 according to Embodiment 1 of the present invention is shown. The constant output power circuit 1 is mainly used in electronic devices that require heating, such as portable electric mosquito coils, atomizers, etc. Figure 1 As shown, the constant output power circuit 1 includes a power supply unit 10, a power control unit 20, a load 30, and a reference resistor 40. The power supply unit 10 is electrically connected to the load 30 and the reference resistor 40, supplying power to the load 30, which then heats the electronic device. The power control unit 20 is electrically connected between the power supply unit 10 and the load 30, controlling the on / off state of the power supply unit 10 to control the output power of the load 30, ensuring a constant output power. In this embodiment, the reference resistor 40 requires high precision; a 1KΩ ± 1% precision resistor is preferred. Adjusting the resistance value of the reference resistor 40 can also adjust the output power of the load 30. Without changing the circuit structure, if the reference resistor 40 is changed from 1KΩ to 2KΩ, the output power of the load 30 is reduced by half.

[0040] Specifically, the power control unit 20 includes a switching unit 201, a signal acquisition unit 202, an analog-to-digital converter (ADC) 203, a power integration unit 204, and a PWM control unit 205. The switching unit 201 is electrically connected between the power supply unit 10 and the load 30, and is used to connect or disconnect the connection between the power supply unit 10 and the load 30. The signal acquisition unit 202 is electrically connected to the load 30, the reference resistor 40, and the switching unit 201, and is used to acquire the load voltage of the load 30 and the reference voltage of the reference resistor 40. The signal acquisition unit 202 acquires the load voltage and the reference voltage in a time-division multiplexing manner, acquiring the load voltage at a first preset time and the reference voltage at a second preset time. The analog-to-digital converter (ADC) 203 is electrically connected to the signal acquisition unit 202, and is used to convert the load voltage into a digital load voltage signal, and also to convert the reference voltage into a digital reference voltage signal. The ADC 203 can be any one of SAR ADC, Sigma-delta ADC, Flash ADC, Pipeline ADC, etc. In this embodiment, the analog-to-digital conversion unit 203 uses a 10-bit SAR ADC with a sampling rate of 32kHz. At this operating frequency of 32kHz, it outputs a 10-bit converted result per clock cycle. Combined with... Figure 2 , Figure 2 This is a schematic diagram of the analog-to-digital conversion process according to Embodiment 1 of the present invention. Figure 2 As shown, the analog-to-digital converter 203 converts continuous analog signals into discrete digital signals.

[0041] The power integration unit 204 is electrically connected to the analog-to-digital converter 203. It performs power integration based on the digital load voltage signal and the digital reference voltage signal, and outputs a PWM control signal based on the integration result. The PWM control unit 205 is electrically connected to the power integration unit 204, the switching unit 201, and the signal acquisition unit 202. It outputs a switching signal to the signal acquisition unit 202 according to the first preset time and the second preset time to control the signal acquisition unit 202 to select whether to acquire the load voltage or the reference voltage. It also outputs a PWM signal with an adjustable duty cycle to the switching unit 201 according to the PWM control signal to control the switching unit 201's on / off state, thereby controlling the output power of the load 30 to achieve constant power output. Figure 3 As shown, Figure 3 This is a schematic diagram of a PWM signal. The PWM control unit 205 dynamically adjusts the duty cycle of the PWM signal based on the power integral to offset the effects of voltage changes and temperature variations in the internal resistance of the load 30.

[0042] Example 2 Figure 4A schematic diagram of a constant output power circuit 1 according to Embodiment 2 of the present invention is shown. The difference between Embodiment 2 and Embodiment 1 is that: In this embodiment, the signal acquisition unit 202 includes a current mirror Ir and a multiplexer M1. The input terminal of the current mirror Ir is electrically connected to one end of the load 30, and the output terminal of the current mirror Ir is electrically connected to one end of the reference resistor 40. The mirror factor of the current mirror Ir is N, such that the current flowing through the load 30 is N times the current flowing through the reference resistor 40. The other end of the load 30 is grounded, and the other end of the reference resistor 40 is grounded. In this embodiment, N is taken as 8000, but is not limited thereto. The multiplexer M1 includes a first input terminal, a second input terminal, an output terminal, and a control terminal. The first input terminal of the multiplexer M1 is electrically connected to the common terminal of the switching unit 201 and the load 30, thereby inputting the load voltage U0 to the first input terminal of the multiplexer M1. The second input terminal of the multiplexer M1 is electrically connected to the common terminal of the current mirror Ir and the reference resistor 40, thereby inputting the reference voltage U0 to the first input terminal of the multiplexer M1. ref The input is given to the second input terminal of the multiplexer M1. The control terminal of the multiplexer M1 is electrically connected to the PWM control unit 205 to receive the switching signal sel. The output terminal of the multiplexer M1 is electrically connected to the analog-to-digital converter 203, used to select whether to switch the load voltage U0 or the reference voltage U0. ref Output to analog-to-digital conversion unit 203.

[0043] In this embodiment, the PWM control unit 205 integrates a clock 2051 and a counter 2052. The clock 2051 outputs a clock signal clk. The counter 2052 is a loop counter used to calculate the clock cycle of the clock 2051. The PWM control unit 205 outputs a first-level switching signal sel to the multiplexer M1 during even-numbered cycles of the clock signal clk, and outputs a second-level switching signal sel to the multiplexer M1 during odd-numbered cycles of the clock signal clk. In other embodiments of the invention, the control unit may also output a second-level switching signal sel during even-numbered cycles of the clock signal clk, and a first-level switching signal sel during odd-numbered cycles of the clock signal clk. The multiplexer M1 selects to acquire the load voltage U0 based on the first-level switching signal sel, and acquires the load voltage U based on the second-level switching signal. ref and the collected reference voltage U ref The load voltage U0 is transmitted to the analog-to-digital conversion unit 203.

[0044] In this embodiment, the operating clock frequency of clock 2051 is 32kHz, and the counting period n of counter 2052 is 256 (counting cnt from 0 to n-1 and then from 0 to n-1, cyclically counting). That is, the period of the PWM signal is 8ms, so the duty cycle can be adjusted 125 times per second, and the adjustment error e = 1 / 256. 0.5 = 1 / 512.

[0045] In this embodiment, the reference voltage is: U ref = I ref R ref =I0 / N R ref ; The current flowing through the load 30 is: I0 = U ref N / R ref ; The transient power of load 30 is: P0 = U0 I0 = U0 U ref N / R ref ; The multiplication result of the load voltage digital signal and the reference voltage digital signal is: mult = data data_d1= U0 U ref / LSB / LSB=P0 R ref / (N LSB LSB).

[0046] Among them, U ref The reference voltage for the reference resistor 40 is I. ref R is the reference current flowing through the reference resistor 40. ref The resistance value of reference resistor 40 is given; N is the mirror coefficient of the current mirror Ir; I0 is the load current flowing through load 30; U0 is the load voltage of load 30; P0 is the transient power of load 30; data alternately represents the digital signal of the load voltage and the digital signal of the reference voltage according to the clock cycle; data_d1 is the delay step signal of data; if the current data is the digital signal of the load voltage, then data_d1 is the digital signal of the reference voltage; if the current data is the digital signal of the reference voltage, then data_d1 is the digital signal of the load voltage; LSB is the minimum resolution of the analog-to-digital conversion unit. The mirror coefficient N and the resistance value R of reference resistor 40 are also given. refIf the minimum resolution LSB of the analog-to-digital conversion unit 203 is a known constant, then the reference voltage U ref The product of the load voltage U0 and U0 U ref The transient power P0 of load 30 has a defined proportional relationship with the load. Therefore, the transient power P0 of load 30 can be calculated by multiplying the digital signal of the reference voltage and the digital signal of the load voltage, mult.

[0047] The purpose of the power integrator 204 in performing integration is to determine when to control the PWM signal pwm_en to output a low level to disconnect the switching unit 201, thereby controlling the output power of the load 30. This is based on the power calculation formula P=U. As can be seen from I, if the voltage and current are both constant, the power is also stable. If the voltage and resistance change over time, the instantaneous power can be continuously calculated, and the duty cycle of the PWM signal pwm_en can be dynamically adjusted based on the instantaneous power. In this embodiment, power is calculated using an integral method, combined with... Figure 5 , Figure 5 This is a schematic diagram of the integration method for the power integrator unit 204. (Example) Figure 5 As shown, the power integration unit 204 uses a subtraction integration method; the smaller the sampling interval Δt, the smaller the calculation error. In this embodiment, the sampling frequency is 32kHz, so Δt = 31.25µs.

[0048] Specifically, the power integration unit 204 includes a delay unit 2041, a multiplier 2042, a subtraction register 2043, and a comparator 2044. The delay unit 2041 is electrically connected to the analog-to-digital converter 203 and is used to delay the reference voltage digital signal or the load voltage digital signal. In this embodiment, the delay unit 2041 delays the reference voltage digital signal by one clock cycle. In a specific embodiment of the present invention, the delay unit 2041 can be a D flip-flop. `data` is the output of the analog-to-digital converter 203, and `data` alternately represents the load voltage U0 and the reference voltage U0. ref The digital signal after analog-to-digital conversion. data_d1 is the output of delay unit 2041, representing the digital signal data after a one-clock-cycle delay by delay unit 2041. Combined with... Figure 6 , Figure 6 For the timing diagram of the constant output power circuit 1 according to Embodiment 2 of the present invention, except for the first invalid data period of the PWM signal, at any time in the subsequent timing, if the digital signal data is the load voltage digital signal after analog-to-digital conversion of the load voltage U0, then the digital signal data_d1 is the reference voltage U from one clock cycle ago. refThe reference voltage digital signal after analog-to-digital conversion. Similarly, if the digital signal data is the reference voltage U... ref The reference voltage signal after analog-to-digital conversion is represented by the digital signal data_d1, which is the load voltage U0 converted from its value one clock cycle prior. Multiplier 2042 is electrically connected to the analog-to-digital conversion unit 203 and the delay unit 2041. It performs a multiplication operation on the reference voltage digital signal and the load digital signal, and outputs the multiplication result mult. The multiplication result mult has a defined proportional relationship with the transient power P0.

[0049] Subtraction register 2043 is electrically connected to multiplier 2042. Subtraction register 2043 has a preset initial value and is used to perform repeated subtractions upon receiving a multiplication result `mult`, and output the subtraction result `sub_reg`. Specifically, upon receiving a multiplication result `mult`, subtraction register 2043 subtracts one multiplication result `mult` from subtraction result `sub_reg` and updates the subtracted subtraction result `sub_reg`. Comparator 2044 includes a first input terminal, a second input terminal, and an output terminal. The first input terminal of comparator 2044 is electrically connected to multiplier 2042 to receive the multiplication result. The second input terminal of comparator 2044 is electrically connected to subtraction register 2043 to receive the subtraction result `sub_reg`. The output terminal of comparator 2044 is electrically connected to PWM control unit 205. When the subtraction result `sub_reg` is less than a preset multiple of the multiplication result `m`... When mult occurs, comparator 2044 outputs a first-level PWM control signal and maintains the first-level output for subsequent PWM counting cycles until a new PWM counting cycle begins; when the subtraction result sub_reg is greater than or equal to the multiplication result m by the preset multiple... When mult is reached, comparator 2044 outputs a second-level PWM control signal. Then, PWM control unit 205 adjusts the duty cycle of the PWM signal pwm_en according to the first-level and second-level PWM control signals. In this embodiment, the first level is low, the second level is high, and the preset multiplier m is 2.5.

[0050] In this embodiment, the switching unit includes a first electronic switch. The first electronic switch includes a first terminal, a second terminal, and a control terminal. The first terminal of the first electronic switch is electrically connected to the power supply unit 10, the second terminal of the first electronic switch is electrically connected to one end of the load 30, and the control terminal of the first electronic switch is electrically connected to the PWM control unit 205. In this embodiment, the first electronic switch is described using an NMOS transistor as an example. Specifically, the drain of the NMOS transistor Q1 is electrically connected to the power supply unit 10, the source of the NMOS transistor Q1 is electrically connected to one end of the load 30, and the gate of the NMOS transistor Q1 is electrically connected to the PWM control unit 205. When the PWM signal pwm_en is high, the NMOS transistor Q1 is turned on, and the power supply unit 10 supplies power to the load 30; when the PWM signal pwm_en is low, the NMOS transistor Q1 is turned off, and the power supply unit 10 stops supplying power to the load 30. In other embodiments, the first electronic switch can also be a PMOS transistor, which is not limited here.

[0051] Specifically, in conjunction with the appendix Figure 7 , attached Figure 7 The control flowchart of the constant output power circuit 1 according to Embodiment 2 of the present invention is as follows: Figure 7 As shown, the control flow includes: S701, whether the PWM control unit 205 outputs a PWM signal.

[0052] Specifically, when the constant output power circuit 1 is powered on and heating is required, if the PWM control unit 205 outputs a PWM signal, i.e., the PWM signal is enabled, step S702 is executed; otherwise, step S701 is returned.

[0053] S702, clock cycle counter.

[0054] Specifically, the PWM control unit 205 integrates a clock 2051 and a counter 2052. The clock 2051 outputs a clock signal clk, and the counter 2052 calculates the counting period n of the clock signal clk. Combined with... Figure 5 In the timing diagram, the counter cnt counts from 0 to n-1 and then from 0 to n-1 in a cyclical manner. In this embodiment, the clock 2051 operates at a frequency of 32kHz, the counter 2052 has a counting period n of 256, and the period of the PWM signal pwm_en is 8ms.

[0055] S703, clock cycle parity determination.

[0056] Specifically, the PWM control unit 205 also determines whether the current clock cycle is an odd or even number of cycles. If the current clock cycle number is even, step S7031 is executed; if the current clock cycle number is odd, step S7032 is executed.

[0057] S7031, the load voltage U0 is converted from analog to digital to obtain a digital load voltage signal.

[0058] S7032, for the reference voltage U ref Analog-to-digital conversion is performed to obtain the reference voltage digital signal.

[0059] Specifically, the PWM control unit 205 outputs a low-level control signal to the multiplexer M1 during even-numbered clock cycles to control the multiplexer M1 to select the load voltage U0 to be transmitted to the analog-to-digital converter unit 203 for analog-to-digital conversion. The PWM control unit 205 outputs a high-level control signal to the multiplexer M1 during odd-numbered clock cycles to control the multiplexer M1 to select the reference voltage U0 to be transmitted to the analog-to-digital converter unit 203 for analog-to-digital conversion. ref The signal is transmitted to analog-to-digital conversion unit 203 for analog-to-digital conversion. In other embodiments of the present invention, the control unit may also output a high-level control signal during even-numbered periods of the PWM signal and a low-level control signal during odd-numbered periods of the PWM signal.

[0060] S7033 calculates the multiplication result mult of the load voltage digital signal and the reference voltage digital signal.

[0061] In this embodiment, the control flow further includes: Step S704: Determine whether the clock cycle count cnt is less than or equal to 1.

[0062] Specifically, if the control unit determines that the clock cycle count cnt is less than or equal to 1, it executes step S7041; if the control unit determines that the clock cycle count cnt is greater than 1, it executes step S7042.

[0063] Step S7041: Initialize subtraction register 2043 and load the initial value.

[0064] Specifically, the initial value includes the aforementioned known constant information, the constant output power of load 30, and the PWM signal period, among other information.

[0065] In step S7042, the subtraction register 2043 performs repeated subtractions and outputs the subtraction result sub_reg.

[0066] Step S7043: Compare whether the subtraction result sub_reg is greater than or equal to the multiplication result m of the preset multiple. mult.

[0067] Specifically, comparator 2044 compares whether the subtraction result sub_reg is greater than or equal to the multiplication result m of the preset multiple. If mult is true, proceed to step S7044; otherwise, proceed to step S7045. In this embodiment, m is 2.5.

[0068] Step S7044: Control the PWM signal pwm_en to output a high level.

[0069] Step S7045: Control the PWM signal pwm_en to output a low level.

[0070] In this embodiment, the control flow further includes: Step S705: Determine if the counting period n has been completed.

[0071] Specifically, the counter 2052 also determines whether a counting cycle n has been completed. The counting cycle n is 256, and the count cnt is recorded from 0 to n-1. When a counting cycle n is completed, that is, when a PWM cycle is completed, the system returns to step S701; otherwise, it returns to step S702.

[0072] Table 1 illustrates the repeated subtraction and comparison results. Table 1

[0073] As shown in Table 1, the subtraction register 2043 is preset with an initial value of 10000. Each time the subtraction register 2043 receives a multiplication result (mult), it performs an iterative subtraction and updates the subtraction result (sub_reg). Then, the comparator 2044 compares the subtraction result (sub_reg) with 2.5. mult, when sub_reg ≥ 2.5 When mult is reached, the PWM signal pwm_en is high until sub_reg < 2.5. When mult is reached, the PWM signal pwm_en jumps to a low level, dynamically adjusting the duty cycle of the PWM signal. (See attached...) Figure 5 The timing diagram shows that at time t-1, the PWM signal pwm_en transitions from high to low. When one counting cycle n is completed, i.e., one PWM signal pwm_en cycle is finished, the subtraction register 2043 is reset to its preset value, and the counter 2052 restarts the counting cycle. It should be understood that Table 1 is only for better explanation of the present invention and is not intended to limit the invention.

[0074] Compared to existing technologies, the constant output power circuit and electronic device proposed in this invention acquires the load voltage and reference voltage in a time-division multiplexing manner through a signal acquisition unit. Then, the load voltage and reference voltage are converted into load voltage signals and reference voltage signals respectively through an analog-to-digital conversion unit. The power integration unit performs power integration based on the load voltage digital signal and the reference voltage digital signal, and outputs a PWM control signal based on the integration result to control the PWM control unit to output a PWM signal with an adjustable duty cycle to the switching unit, thereby controlling the on / off state between the power supply unit and the load and realizing constant power output from the load.

[0075] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A constant output power circuit, characterized in that, include: The power supply unit is electrically connected to the load and the reference resistor to supply power to the load. A power control unit, electrically connected between the power supply unit and the load, includes: A switching unit is electrically connected between the power supply unit and the load, and is used to connect or disconnect the connection between the power supply unit and the load; A signal acquisition unit is electrically connected to the load, the reference resistor, and the switching unit, and is used to acquire the load voltage of the load at a first preset time and the reference voltage of the reference resistor at a second preset time. An analog-to-digital converter unit, electrically connected to the signal acquisition unit, is used to convert the load voltage into a digital load voltage signal and also to convert the reference voltage into a digital reference voltage signal. A power integration unit, electrically connected to the analog-to-digital converter, is used to perform power integration based on the load voltage digital signal and the reference voltage digital signal, and output a PWM control signal based on the integration result. The PWM control unit is electrically connected to the power integration unit, the switching unit, and the signal acquisition unit. It is used to output a switching signal to the signal acquisition unit according to the first preset time and the second preset time to control the signal acquisition unit to select to acquire the load voltage or the reference voltage. It is also used to output a PWM signal with an adjustable duty cycle to the switching unit according to the PWM control signal to control the switching unit to turn on and off. The power integration unit includes: The delay unit, electrically connected to the analog-to-digital conversion unit, is used to delay the reference voltage digital signal or the load voltage digital signal by one clock cycle. The multiplier, electrically connected to the analog-to-digital conversion unit and the delay unit, is used to perform a multiplication operation on the reference voltage digital signal and the load digital signal, and output the multiplication result; The subtraction register, electrically connected to the multiplier, is preset with an initial value and is used to perform repeated subtractions for each received multiplication result and output the subtraction result. The comparator includes a first input terminal, a second input terminal, and an output terminal. The first input terminal of the comparator is electrically connected to the multiplier to receive the multiplication result. The second input terminal of the comparator is electrically connected to the subtraction register to receive the subtraction result. The output terminal of the comparator is electrically connected to the PWM control unit.

2. The constant output power circuit according to claim 1, characterized in that, The signal acquisition unit includes: A current mirror, wherein the input terminal of the current mirror is electrically connected to one end of the load, the output terminal of the current mirror is electrically connected to one end of the reference resistor, and the mirror factor of the current mirror is N such that the current flowing through the load is N times the current flowing through the reference resistor; A multiplexer includes a first input terminal, a second input terminal, an output terminal, and a control terminal. The output terminal of the multiplexer is electrically connected to the analog-to-digital converter (ADC). The first input terminal of the multiplexer is electrically connected to the common terminal of the switching unit and the load. The second input terminal of the multiplexer is electrically connected to the common terminal of the current mirror and the reference resistor. The control terminal of the multiplexer is electrically connected to the PWM control unit to receive the switching signal and, according to the switching signal, selects to turn on the first input terminal and the output terminal of the multiplexer to transmit the load voltage to the ADC, or to turn on the second input terminal and the output terminal of the multiplexer to transmit the reference voltage to the ADC.

3. The constant output power circuit according to claim 2, characterized in that: The PWM control unit is equipped with a counter, which is used to calculate the clock period of the clock signal; The PWM control unit is also configured to output a first-level switching signal to the multiplexer during even-numbered cycles of the clock signal, and to output a second-level switching signal to the multiplexer during odd-numbered cycles of the clock signal.

4. The constant output power circuit according to claim 3, characterized in that, The multiplexer is also configured to connect the first input terminal of the multiplexer and the output terminal of the multiplexer according to the first level switching signal to select the load voltage to be acquired, and to connect the second input terminal of the multiplexer and the output terminal of the multiplexer according to the second level switching signal to select the reference voltage to be acquired.

5. The constant output power circuit according to claim 3, characterized in that: The reference voltage is: U ref = I ref R ref =I0 / N R ref ; The current flowing through the load is: I0 = U ref N / R ref ; The transient power of the load is: P0 = U0 I0 = U0 U ref N / R ref ; The multiplication result of the load voltage digital signal and the reference voltage digital signal is: mult = data data_d1= U0 U ref / LSB / LSB=P0 R ref / (N LSB LSB); Among them, U ref I is the reference voltage of the reference resistor. ref R is the reference current flowing through the reference resistor. ref Here, N is the resistance value of the reference resistor, I0 is the load current flowing through the load, U0 is the load voltage of the load, P0 is the transient power of the load, data alternately represents the digital signal of the load voltage and the digital signal of the reference voltage according to the clock cycle, data_d1 is the delay step signal of data, if the current data is the digital signal of the load voltage, then data_d1 is the digital signal of the reference voltage, and vice versa, LSB is the minimum resolution of the analog-to-digital conversion unit, and the mirror coefficient N and the resistance value R of the reference resistor are also specified. ref If the minimum resolution LSB of the analog-to-digital conversion unit is a known constant, then the product of the reference voltage and the load voltage, U0, is... U ref The multiplication result mult and the transient power P0 of the load have a defined proportional relationship.

6. The constant output power circuit according to claim 1, characterized in that, When the subtraction result is less than the multiplication result by a preset multiple, the comparator outputs a first-level PWM control signal; when the subtraction result is greater than or equal to the multiplication result by the preset multiple, the comparator outputs a second-level PWM control signal. The PWM control unit adjusts the duty cycle of the PWM signal according to the first-level PWM control signal and the second-level PWM control signal.

7. The constant output power circuit according to claim 3, characterized in that, When the counter completes one counting cycle, the subtraction register resets the initial value, and the counter starts counting again.

8. The constant output power circuit according to claim 4, characterized in that, The switching unit includes: A first electronic switch, comprising a first terminal, a second terminal, and a control terminal, wherein the first terminal of the first electronic switch is electrically connected to the power supply unit, the second terminal of the first electronic switch is electrically connected to one end of the load, and the control terminal of the first electronic switch is electrically connected to the PWM control unit.

9. An electronic device, characterized in that, Includes the constant output power circuit as described in any one of claims 1-8.

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