Organic light emitting display apparatus

Abstract

An organic light emitting display apparatus is provided. The organic light emitting display apparatus includes a plurality of pixels, a scan driver configured to supply a scan signal to a scan line, a data driver configured to supply a data signal to a data line, and a control driver configured to supply a control signal to a control line. One of the plurality of pixels includes a first transistor connected between the data line and a first node, a second transistor connected between a first power supply and a second node, the second transistor including a gate electrode connected to the first node, a third transistor connected between the first node and a third power supply, a fourth transistor connected between the second node and a fourth power supply, a capacitor connected between the first node and the second node, and an organic light emitting diode (OLED) connected between the second node and a second power supply.

Description

[0001] This application is a divisional application of the invention patent application filed on June 24, 2016, with application number 201610474401.X and entitled "Pixel, Method for Driving Pixels and Organic Light Emitting Display Device Including Pixels".

[0002] Cross-references to related applications

[0003] This application claims priority and benefit to Korean Patent Application No. 10-2015-0091376, filed on June 26, 2015, with the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. Technical Field

[0004] One or more aspects of exemplary embodiments of the present invention relate to pixels, methods of driving pixels, and organic light-emitting display devices including pixels. Background Technology

[0005] Organic light-emitting diodes (OLEDs) use organic light-emitting diodes (OLEDs) to generate light through the recombination of electrons and holes to display images. OLEDs have a fast response time and can display clear images concurrently (e.g., simultaneously).

[0006] Generally, organic light-emitting display devices include multiple pixels, each pixel comprising a driving transistor and an organic light-emitting diode (OLED). Each of the multiple pixels uses a driving transistor to control the amount of current supplied to the OLED, thereby representing grayscale (e.g., grayscale level).

[0007] The information disclosed in this background section is only intended to enhance the understanding of the background of the present invention, and therefore may contain information that does not constitute prior art. Summary of the Invention

[0008] One or more aspects of the exemplary embodiments of the present invention relate to pixels that can improve image quality and display large-size screens, methods for driving pixels, and organic light-emitting display devices including pixels.

[0009] According to an exemplary embodiment of the present invention, a pixel includes: a first transistor connected between a data line and a first node; a second transistor connected between a first power supply and a second node, the second transistor including a gate electrode connected to the first node; a third transistor connected between the first node and a third power supply; a fourth transistor connected between the second node and a fourth power supply; a capacitor connected between the first node and the second node; and an organic light-emitting diode (OLED) connected between the second node and the second power supply.

[0010] The first transistor may include a first electrode connected to a data line, a second electrode connected to a first node, and a gate electrode connected to a second control line; the second transistor may further include a first electrode connected to a first power supply and a second electrode connected to a second node; the third transistor may include a first electrode connected to a first node, a second electrode connected to a third power supply, and a gate electrode connected to a first control line; and the fourth transistor may include a first electrode connected to a second node, a second electrode connected to a fourth power supply, and a gate electrode connected to a third control line.

[0011] Each of the first to fourth transistors can be an n-channel transistor.

[0012] The third transistor can be configured to be in the on state during the first time period and the second time period, and the fourth transistor can be configured to be in the on state during the first time period.

[0013] The first transistor can be configured to be in the on state during the third time period, and the fourth transistor can be further configured to be in the on state during the fourth time period.

[0014] The fourth power supply can be configured to operate at the same voltage level as the second power supply.

[0015] The third power supply can be configured to operate at the same voltage level as the second power supply.

[0016] The active layer of each of the first to fourth transistors may include an oxide semiconductor.

[0017] According to another exemplary embodiment of the present invention, a method for driving a pixel including a first transistor, a second transistor, a third transistor, a fourth transistor, a capacitor, and an organic light-emitting diode (OLED) includes: a first initialization operation of supplying a reference voltage to the gate electrode of a second transistor by turning on the third transistor and supplying an initialization voltage to the source electrode of the second transistor by turning on the fourth transistor; a threshold voltage compensation operation of keeping the third transistor in an on state and storing a threshold voltage of the second transistor in the capacitor; a data writing operation of supplying a data voltage to the gate electrode of the second transistor by turning on the first transistor; a second initialization operation of supplying an initialization voltage to the source electrode of the second transistor by turning on the fourth transistor; and an emission operation of supplying a driving current corresponding to the voltage stored in the capacitor from the second transistor to the OLED.

[0018] The first transistor can be in the off state during the first initialization operation, the threshold voltage compensation operation, the second initialization operation, and the emit operation.

[0019] The third transistor can be in the off state during data write operation, second initialization operation, and emit operation.

[0020] The fourth transistor can be in the off state during threshold voltage compensation operation, data write operation, and transmit operation.

[0021] According to another exemplary embodiment of the present invention, an organic light-emitting display device includes: a plurality of pixels connected to (n+1) (where n is a natural number greater than or equal to 2) scan lines, m (where m is a natural number greater than or equal to 2) data lines and n control lines; a scan driver configured to supply scan signals to the scan lines; a data driver configured to supply data signals to the data lines; and a control driver configured to supply control signals to the control lines, wherein one of the plurality of pixels is connected to the i-th (where i is a natural number less than or equal to n) scan line, the (i+1)-th scan line, the i-th control line and the j-th (where j is a natural number less than or equal to m) data line, and said one pixel includes: connected to the j-th scan line, the (i+1)-th scan line, the i-th control line and the j-th (where j is a natural number less than or equal to m) data line. A first transistor between the data line and the first node, the first transistor being configured to be turned on when the i-th scan signal is supplied to the i-th scan line; a second transistor connected between the first power supply and the second node, the second transistor including a gate electrode connected to the first node; a third transistor connected between the first node and the third power supply, the third transistor being configured to be turned on when a control signal is supplied to the i-th control line; a fourth transistor connected between the second node and the fourth power supply, the fourth transistor being configured to be turned on when the (i+1)-th scan signal is supplied to the (i+1)-th scan line; a capacitor connected between the first node and the second node; and an organic light-emitting diode (OLED) connected between the second node and the second power supply.

[0022] The first transistor may include a first electrode connected to the j-th data line, a second electrode connected to the first node, and a gate electrode connected to the i-th scan line; the second transistor may further include a first electrode connected to the first power supply and a second electrode connected to the second node; the third transistor may include a first electrode connected to the first node, a second electrode connected to the third power supply, and a gate electrode connected to the i-th control line; and the fourth transistor may include a first electrode connected to the second node, a second electrode connected to the fourth power supply, and a gate electrode connected to the (i+1)-th scan line.

[0023] Each of the first to fourth transistors can be an n-channel transistor.

[0024] The i-th scan signal can be supplied to the i-th scan line during the first and fourth time periods, the (i+1)-th scan signal can be supplied to the (i+1)-th scan line during the second and fifth time periods, and the control signal can be supplied to the i-th control line during the second and third time periods.

[0025] OLEDs can be configured to emit light during the sixth time period.

[0026] The fourth power supply can be configured to operate at the same voltage level as the second power supply.

[0027] The third power supply can be configured to operate at the same voltage level as the second power supply.

[0028] The active layer of each of the first to fourth transistors may include an oxide semiconductor.

[0029] According to one or more embodiments of the present invention, since the driving current supplied to the OLED is determined regardless of the threshold voltage of the driving transistor, pixels, methods of driving pixels, and organic light-emitting display devices including pixels can be provided to eliminate or reduce brightness non-uniformity caused by the difference between the threshold voltages of the driving transistors.

[0030] In addition, according to one or more embodiments of the present invention, pixels, methods for driving pixels, and organic light-emitting display devices including pixels can be provided to display large-size screens. Attached Figure Description

[0031] Exemplary embodiments will now be described more fully below with reference to the accompanying drawings; however, the invention may be embodied in various different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the spirit and scope of the invention to those skilled in the art.

[0032] In the figures, dimensions may be enlarged for clarity. The same reference numerals always refer to the same elements.

[0033] Figure 1 A pixel is shown according to an exemplary embodiment of the present invention.

[0034] Figure 2 This is a waveform diagram illustrating a method for driving pixels according to an exemplary embodiment of the present invention.

[0035] Figure 3 A pixel is shown according to another exemplary embodiment of the present invention.

[0036] Figure 4 A pixel is shown according to another exemplary embodiment of the present invention.

[0037] Figure 5 An organic light-emitting display device according to an exemplary embodiment of the present invention is shown.

[0038] Figure 6 This is a waveform diagram illustrating the operation of the scan driver and the control driver according to an exemplary embodiment of the present invention.

[0039] Figure 7 Shown in Figure 5 An exemplary embodiment of the pixels shown.

[0040] Figure 8 It shows the driver Figure 7 The waveform diagram of the pixel method shown. Detailed Implementation

[0041] In the following description, exemplary embodiments will be illustrated in more detail with reference to the accompanying drawings, in which the same reference numerals throughout denote the same elements. However, the invention may be embodied in various different forms and should not be construed as being limited to the embodiments illustrated herein. Rather, these embodiments are provided as examples so that this disclosure will be thorough and complete, and will fully convey aspects and features of the invention to those skilled in the art. Therefore, processes, elements, and techniques not essential for a full understanding of the aspects and features of the invention by those skilled in the art may be omitted from the description. Unless otherwise indicated, the same reference numerals refer to the same elements throughout the drawings and written description, and thus their description may not be repeated.

[0042] Figure 1 A pixel is shown according to an exemplary embodiment of the present invention.

[0043] refer to Figure 1 According to an exemplary embodiment of the present invention, the pixel PXL1 may include a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a capacitor Cst, and an organic light-emitting diode (OLED).

[0044] The first transistor T1 can be connected between the data line DL and the first node N1.

[0045] For example, the first electrode of the first transistor T1 can be connected to the data line DL, the second electrode of the first transistor T1 can be connected to the first node N1, and the gate electrode of the first transistor T1 can be connected to the second control line CL2.

[0046] Therefore, the first transistor T1 can be turned on in response to the control signal supplied to the second control line CL2.

[0047] When the first transistor T1 is turned on, the data signal of the data line DL can be transmitted to the first node N1.

[0048] The second transistor T2 can be connected between the first power supply ELVDD and the second node N2.

[0049] For example, the first electrode of the second transistor T2 can be connected to the first power supply ELVDD, the second electrode of the second transistor T2 can be connected to the second node N2, and the gate electrode of the second transistor T2 can be connected to the first node N1.

[0050] The second transistor T2 can be used as a driving transistor to supply driving current to the OLED.

[0051] For example, the second transistor T2 can supply a drive current to the OLED corresponding to the voltage stored in the capacitor Cst.

[0052] The third transistor T3 can be connected between the first node N1 and the third power supply (reference power supply) REF.

[0053] For example, the first electrode of the third transistor T3 can be connected to the first node N1, the second electrode of the third transistor T3 can be connected to the reference power supply REF, and the gate electrode of the third transistor T3 can be connected to the first control line CL1.

[0054] Therefore, the third transistor T3 can be turned on in response to the control signal supplied to the first control line CL1.

[0055] When the third transistor T3 is turned on, the voltage of the reference power supply REF can be transmitted to the first node N1.

[0056] The fourth transistor T4 can be connected between the second node N2 and the fourth power supply (initialization power supply) INT.

[0057] For example, the first electrode of the fourth transistor T4 can be connected to the second node N2, the second electrode of the fourth transistor T4 can be connected to the initialization power supply INT, and the gate electrode of the fourth transistor T4 can be connected to the third control line CL3.

[0058] Therefore, the fourth transistor T4 can be turned on in response to the control signal supplied to the third control line CL3.

[0059] When the fourth transistor T4 is turned on, the voltage of the initial power supply INT can be transmitted to the second node N2.

[0060] Here, the first electrode of each of the first to fourth transistors T1, T2, T3 and T4 can be the source electrode or the drain electrode, and the second electrode of each of the first to fourth transistors T1, T2, T3 and T4 can be an electrode different from the first electrode.

[0061] For example, when the first electrode is the drain electrode, the second electrode can be the source electrode, and when the first electrode is the source electrode, the second electrode can be the drain electrode.

[0062] Each of the first to fourth transistors T1, T2, T3 and T4 included in pixel PXL1 may have the same channel shape.

[0063] For example, each of the first to fourth transistors T1, T2, T3 and T4 can have an n-channel shape.

[0064] Therefore, each of the first to fourth transistors T1, T2, T3 and T4 can be implemented using a polycrystalline silicon thin-film transistor (poly-Si TFT), an amorphous silicon (a-Si) TFT or an oxide TFT.

[0065] An n-channel transistor (e.g., an n-channel transistor) can be turned off when the level of a control signal applied to its gate is low, and can be turned on when the level of the control signal is high. Furthermore, the operating speed of an n-channel transistor is greater than that of a p-channel transistor (e.g., a p-channel transistor), making n-channel transistors potentially ideal for large-size display devices.

[0066] In other words, electrons have a higher mobility than holes. Because n-channel transistors use electrons as charge carriers, they respond to control signals faster than p-channel transistors, which use holes as charge carriers.

[0067] When each of the first to fourth transistors T1, T2, T3 and T4 is implemented using an oxide TFT, the active layer of each of the first to fourth transistors T1, T2, T3 and T4 may include an oxide semiconductor.

[0068] The oxide semiconductor may be an oxide comprising at least one selected from titanium (Ti), hafnium (Hf), zirconium (Zr), aluminum (Al), tantalum (Ta), germanium (Ge), zinc (Zn), gallium (Ga), tin (Sn), and indium (In).

[0069] For example, oxide semiconductors may include indium gallium zinc oxide (In-Ga-Zn-O), indium zinc oxide (In-Zn-O), zinc tin oxide (Zn-Sn-O), indium gallium oxide (In-Ga-O), indium tin oxide (In-Sn-O), indium zirconium oxide (In-Zr-O), indium zirconium zinc oxide (In-Zr-Zn-O), indium zirconium tin oxide (In-Zr-Sn-O), indium zirconium gallium oxide (In-Zr-Ga-O), indium aluminum oxide (In-Al-O), indium zinc aluminum oxide (In-Zn-Al-O), and indium tin aluminum oxide (In-Sn-Al). The indium aluminum gallium oxide (In-Al-Ga-O), indium tantalum oxide (In-Ta-O), indium tantalum zinc oxide (In-Ta-Zn-O), indium tantalum tin oxide (In-Ta-Sn-O), indium tantalum gallium oxide (In-Ta-Ga-O), indium germanium oxide (In-Ge-O), indium germanium zinc oxide (In-Ge-Zn-O), indium germanium tin oxide (In-Ge-Sn-O), indium germanium gallium oxide (In-Ge-Ga-O), titanium indium zinc oxide (Ti-In-Zn-O), and hafnium indium zinc oxide (Hf-In-Zn-O) are selected from at least one of the following: indium aluminum gallium oxide (In-Al-Ga-O), indium tantalum oxide (In-Ta-O), indium tantalum zinc oxide (In-Ta-Zn-O), indium germanium oxide (In-Ge-O), indium germanium gallium oxide (In-Ge-Ga-O), titanium indium zinc oxide (Ti-In-Zn-O), and hafnium indium zinc oxide (Hf-In-Zn-O).

[0070] The oxide semiconductors described above are merely examples, and the invention is not limited thereto. For example, any suitable oxide semiconductor can be used.

[0071] The capacitor Cst can be connected between the first node N1 and the second node N2.

[0072] For example, the first electrode of capacitor Cst can be connected to the first node N1, and the second electrode of capacitor Cst can be connected to the second node N2.

[0073] The OLED can be connected between the second node N2 and the second power supply ELVSS.

[0074] For example, the anode of the OLED can be connected to the second node N2, and the cathode of the OLED can be connected to the second power supply ELVSS.

[0075] The OLED can receive a driving current from the second transistor T2 and can emit light with a brightness corresponding to the driving current.

[0076] Furthermore, as indicated by the dashed line, parasitic capacitors Cp can exist in OLEDs.

[0077] The first node N1 can be a node where the first transistor T1, the second transistor T2, the third transistor T3, and the capacitor Cst are connected together.

[0078] For example, the second electrode of the first transistor T1, the gate electrode of the second transistor T2, the first electrode of the third transistor T3, and the first electrode of the capacitor Cst can be connected together to the first node N1.

[0079] The second node N2 can be a node where the second transistor T2, the fourth transistor T4, the capacitor Cst, and the OLED are all connected together.

[0080] For example, the second electrode of the second transistor T2, the first electrode of the fourth transistor T4, the second electrode of the capacitor Cst, and the anode of the OLED can be connected together to the second node N2.

[0081] The first power supply ELVDD can be a high-potential power supply, and the second power supply ELVSS can be a low-potential power supply.

[0082] For example, the first power supply ELVDD can have a positive voltage, and the second power supply ELVSS can have a negative voltage or a ground voltage.

[0083] Furthermore, each of the reference power supply REF and the initialization power supply INT may have a voltage level that is different from or equal to the voltage level of the second power supply ELVSS.

[0084] Figure 2 This is a waveform diagram illustrating a method for driving pixels according to an exemplary embodiment of the present invention.

[0085] For convenience, the reference will be... Figure 1 and Figure 2 Describes the operation of driving pixel PXL1 during cell time period Pu.

[0086] refer to Figure 2 The method for driving pixel PXL1 according to an exemplary embodiment of the present invention may include a first initialization operation, a threshold voltage compensation operation, a data writing operation, a second initialization operation, and a transmission operation.

[0087] The first initialization operation can be performed during the first time period P1. During the first initialization operation, the third transistor T3 can be turned on to supply the voltage of the reference power supply REF (hereinafter referred to as the reference voltage) to the first node N1, and the fourth transistor T4 can be turned on to supply the voltage of the initialization power supply INT (hereinafter referred to as the initialization voltage) to the second node N2.

[0088] Therefore, during the first initialization operation, a reference voltage can be supplied to the gate electrode of the second transistor T2, and an initialization voltage can be supplied to the second electrode of the second transistor T2, such as the source electrode.

[0089] Therefore, during the first time period P1, a control signal (e.g., a signal with a high level) can be supplied to the first control line CL1 and the third control line CL3.

[0090] Therefore, during the first time period P1, the third transistor T3 and the fourth transistor T4 can be kept in the on state, and the first transistor T1 can be kept in the off state.

[0091] Since the OLED needs to be held or substantially kept in a non-emission state during the first time period P1, the initialization voltage can have a voltage level that the OLED can be set to in the non-emission state at that point.

[0092] For example, the initialization voltage can have a voltage level equal to or less than the voltage level obtained by applying the threshold voltage of the OLED to the voltage of the second power supply ELVSS.

[0093] Through the above initialization operations, pixel PXL1 can be initialized to be unaffected by the previous cell time period.

[0094] The threshold voltage compensation operation can be performed during the second time period P2. During the threshold voltage compensation operation, the on state of the third transistor T3 can be maintained, so that the threshold voltage of the second transistor T2 can be stored in the capacitor Cst.

[0095] Therefore, during the second time period P2, a control signal can be supplied to the first control line CL1.

[0096] Therefore, during the second time period P2, the third transistor T3 can be kept in the on state, while the first transistor T1 and the fourth transistor T4 can be in the off state.

[0097] During the second time period P2, the voltage of the first node N1 can be maintained or substantially maintained at the reference voltage, and the voltage of the second node N2 can be changed from the initial voltage to the voltage value obtained by subtracting the threshold voltage of the second transistor T2 from the reference voltage.

[0098] In other words, through source-follower operation, the voltage VN2 of the second node N2 is changed to the voltage value obtained using the following formula 1:

[0099] (1) VN2=Vref-Vth

[0100] Where VN2 is the voltage of the second node N2, Vref is the reference voltage, and Vth is the threshold voltage of the second transistor T2.

[0101] Since capacitor Cst stores the voltage corresponding to the difference between the voltage of the first node N1 and the voltage of the second node N2, capacitor Cst can store the threshold voltage of the second transistor T2.

[0102] In order to keep the OLED in a non-emission state during threshold voltage compensation operation, the voltage of the second node N2 can have a voltage level at which the OLED can be kept in a non-emission state.

[0103] The timing for performing threshold voltage compensation is determined by the control signal supplied to the first control line CL1.

[0104] Therefore, the width of the control signal supplied to the first control line CL1 is adjusted so that the time for performing the threshold voltage compensation operation can be adjusted. Thus, the pixel PXL1 according to an exemplary embodiment of the present invention can be applied to a large-size display device in which the time for performing the threshold voltage compensation operation is short.

[0105] The data write operation can be performed during the third time period P3. During the data write operation, the first transistor T1 can be turned on to supply the data signal to the first node N1.

[0106] Therefore, during a data write operation, the data signal transmitted from the data line DL can be supplied to the gate electrode of the second transistor T2.

[0107] Therefore, during the third time period P3, a control signal (e.g., a signal with a high level) can be supplied to the second control line CL2.

[0108] Therefore, during the third time period P3, the first transistor T1 can be turned on, and the third transistor T3 and the fourth transistor T4 can be kept in the off state.

[0109] During the third time period P3, the voltage of the first node N1 can be maintained or substantially maintained at the voltage of the data signal (hereinafter referred to as the data voltage), and during the third time period P3, the voltage VN2 of the second node N2 can be changed to a value obtained using the following formula 2:

[0110] (2)

[0111] Where VN2 is the voltage of the second node N2, Vref is the reference voltage, Vth is the threshold voltage of the second transistor T2, Cst1 is the capacitance of capacitor Cst, Cp1 is the capacitance of parasitic capacitor Cp, and Vdata is the data voltage.

[0112] Since capacitor Cst stores the voltage corresponding to the difference between the voltage of the first node N1 and the voltage of the second node N2, capacitor Cst can store the voltage obtained using the following formulas (3) and (4):

[0113] (3) Vgs=VN1-VN2

[0114] (4)

[0115] Where Vgs is the voltage stored in capacitor Cst, VN1 is the voltage of the first node N1, VN2 is the voltage of the second node N2, Vref is the reference voltage, Vth is the threshold voltage of the second transistor T2, Cst1 is the capacitance of capacitor Cst, Cp1 is the capacitance of parasitic capacitor Cp, and Vdata is the data voltage.

[0116] When a plurality of pixels PXL1 are included according to an exemplary embodiment of the present invention, the second transistor T2 included in the plurality of pixels PXL1 may have threshold voltages that are different from each other due to the manufacturing process.

[0117] Therefore, the voltage of the second node N2 of multiple pixels PXL1 may be set differently. Consequently, differences in the emission times of multiple pixels PXL1 may occur.

[0118] Therefore, in the method for driving pixel PXL1 according to an exemplary embodiment of the present invention, a second initialization operation can be performed such that the voltages of the second nodes N2 of the plurality of pixels PXL1 can be initialized equally or substantially equally, and the emission time difference that may occur due to the difference between the threshold voltages of the second transistor T2 can be eliminated or reduced.

[0119] The second initialization operation can be performed during the fourth time period P4. During the second initialization operation, the fourth transistor T4 can be turned on to supply the initialization voltage again (e.g., a second supply) to the second node N2.

[0120] Therefore, during the second initialization operation, the initialization voltage can be supplied to the second electrode of the second transistor T2.

[0121] Therefore, during the fourth period P4, the control signal can be supplied again to the third control line CL3.

[0122] Therefore, during the fourth time period P4, the fourth transistor T4 can be turned on, while the first transistor T1 and the third transistor T3 can be turned off.

[0123] Since the initial voltage can be set to a voltage level at which the OLED can be held or substantially held in a non-emission state, the OLED can be held or substantially held in a non-emission state during the fourth period P4.

[0124] Furthermore, the drive current transmitted from the second transistor T2 can flow to the initialization power supply INT via the fourth transistor T4.

[0125] When the initial voltage is supplied to the second node N2, the voltage of the first node N1 is changed together through the coupling operation of the capacitor Cst, so that the voltage stored in the capacitor Cst can be maintained or substantially maintained without any change during the data write operation.

[0126] The emission operation can be performed during the fifth time period P5. During the emission operation, the drive current corresponding to the voltage stored in the capacitor Cst can be supplied to the OLED from the second transistor T2.

[0127] Therefore, during the fifth time period P5, control signals were not supplied to control lines CL1, CL2 and CL3 respectively.

[0128] Therefore, during the fifth time period P5, the first transistor T1, the third transistor T3, and the fourth transistor T4 can be in the off state.

[0129] During the fifth time period P5, the second transistor T2 can supply the drive current to the OLED using the following formulas (5) and (6):

[0130] (5) Io=k(Vgs-Vth) 2

[0131] (6)

[0132] Where Io is the drive current output from the second transistor T2, k is a constant, Vgs is the voltage stored in the capacitor Cst, Vth is the threshold voltage of the second transistor T2, Cst1 is the capacitance of the capacitor Cst, Cp1 is the capacitance of the parasitic capacitor Cp, Vdata is the data voltage, and Vref is the reference voltage.

[0133] Therefore, the OLED can emit light with a brightness corresponding to the driving current Io during the fifth time period P5.

[0134] In this case, the drive current output from the second transistor T2 is determined regardless of the threshold voltage Vth. Therefore, the brightness non-uniformity caused by the difference between the threshold voltages of the second transistor T2 included in pixel PXL1 can be eliminated or reduced.

[0135] Figure 3 A pixel is shown according to another exemplary embodiment of the present invention. Here, the above embodiments and... Figure 3 The differences between the embodiments shown will be described, so repeated descriptions of the same or substantially the same elements and components may be omitted.

[0136] refer to Figure 3 The initial power supply INT can have a voltage level equal to or substantially equal to the voltage level of the second power supply ELVSS.

[0137] For example, the initial power supply INT can be implemented using the same power supply as the second power supply ELVSS.

[0138] Therefore, in pixel PXL2 according to another exemplary embodiment of the present invention, the fourth transistor T4 can be connected between the second node N2 and the second power supply ELVSS.

[0139] For example, the first electrode of the fourth transistor T4 can be connected to the second node N2, the second electrode of the fourth transistor T4 can be connected to the second power supply ELVSS, and the gate electrode of the fourth transistor T4 can be connected to the third control line CL3.

[0140] The pixel PXL2 includes more than Figure 1 The PXL1 pixel shown has fewer power supplies, which makes manufacturing easier and reduces manufacturing costs.

[0141] Figure 4 A pixel is shown according to another exemplary embodiment of the present invention. Here, the above embodiments and... Figure 4 The differences between the embodiments shown will be described, so repeated descriptions of the same or substantially the same elements and components may be omitted.

[0142] refer to Figure 4 The reference power supply REF can have a voltage level that is equal to or substantially equal to the voltage level of the second power supply ELVSS.

[0143] For example, the reference power supply REF can be implemented using the same power supply as the second power supply ELVSS.

[0144] Therefore, in pixel PXL3 according to another exemplary embodiment of the present invention, the third transistor T3 can be connected between the first node N1 and the second power supply ELVSS.

[0145] For example, the first electrode of the third transistor T3 can be connected to the first node N1, the second electrode of the third transistor T3 can be connected to the second power supply ELVSS, and the gate electrode of the third transistor T3 can be connected to the first control line CL1.

[0146] Pixel PXL3 can be driven when the threshold voltage of the second transistor T2 is negatively offset, and includes a higher voltage rating than... Figure 1 The PXL1 pixel shown has fewer power supplies, which makes manufacturing easier and reduces manufacturing costs.

[0147] However, the present invention is not limited to Figure 1 , Figure 3 and Figure 4 The pixels PXL1, PXL2, and PXL3 are shown in the figure, and according to another embodiment of the invention, in order to minimize or further reduce the number of power supplies, the second power supply ELVSS, the initialization power supply INT, and the reference power supply REF may include the same or substantially the same voltage level.

[0148] For example, the second power supply ELVSS, the initialization power supply INT, and the reference power supply REF can be implemented as the same power supply.

[0149] In this configuration, the third transistor T3 can be connected between the first node N1 and the second power supply ELVSS, and the fourth transistor T4 can be connected between the second node N2 and the second power supply ELVSS.

[0150] Figure 5 An organic light-emitting display device according to an exemplary embodiment of the present invention is shown, and Figure 6 This is a waveform diagram illustrating the operation of the scan driver and the control driver according to an exemplary embodiment of the present invention.

[0151] refer to Figure 5 According to an exemplary embodiment of the present invention, an organic light-emitting display device 1 may include: a pixel unit (e.g., a pixel region) 10 including a plurality of pixels PXL4, a scan driver 20, a data driver 30, a control driver 40, and a timing controller 50.

[0152] Furthermore, the organic light-emitting display device 1 according to an exemplary embodiment of the present disclosure may further include (n+1) scan lines S1 to Sn+1 connected between the scan driver 20 and the pixel PXL4, m data lines D1 to Dm connected between the data driver 30 and the pixel PXL4, and n control lines C1 to Cn connected between the control driver 40 and the pixel PXL4 (where n and m are natural numbers greater than or equal to 2).

[0153] Pixel PXL4 can be connected to (n+1) scan lines S1 to Sn+1, m data lines D1 to Dm, and n control lines C1 to Cn.

[0154] For example, each pixel in the PXL4 can be connected to one data line, one control line, and two scan lines.

[0155] That is, the pixel PXL4 placed at the h-th line (e.g., the h-th horizontal line) can be connected to the h-th scan line Sh, the (h+1)-th scan line Sh+1, and the h-th control line Ch (where h is a natural number less than or equal to n).

[0156] Pixel PXL4 can receive the first power supply ELVDD, the second power supply ELVSS, the reference power supply REF, and the initialization power supply INT from the power supply unit.

[0157] Furthermore, due to the current flowing from the first power source ELVDD through the OLED to the second power source ELVSS, each of the pixels PXL4 can generate light corresponding to the data signal.

[0158] The scan driver 20 can generate scan signals under the control of the timing controller 50, and can supply the generated scan signals to scan lines S1 to Sn+1.

[0159] Therefore, pixel PXL4 can receive scan signals through scan lines S1 to Sn+1.

[0160] refer to Figure 6 According to an exemplary embodiment of the present invention, the scan driver 20 can supply the corresponding scan signal to each of the scan lines S1 to Sn+1 twice during a frame period Pf.

[0161] For example, the scan driver 20 may sequentially supply a first scan signal to scan lines S1 to Sn+1 during a first sub-period Ps1, and may sequentially supply a second scan signal to scan lines S1 to Sn+1 during a second sub-period Ps2.

[0162] The data driver 30 can generate data signals under the control of the timing controller 50, and can supply the generated data signals to data lines D1 to Dm.

[0163] Therefore, pixel PXL4 can receive data signals from data lines D1 to Dm.

[0164] The control driver 40 can generate control signals through the control of the timing controller 50, and can supply the generated control signals to control lines C1 to Cn.

[0165] Therefore, pixel PXL4 can receive control signals from control lines C1 to Cn.

[0166] refer to Figure 6 According to an exemplary embodiment of the present invention, the control driver 40 may supply control signals to control lines C1 to Cn during a third sub-period Ps3 included in a frame period Pf.

[0167] exist Figure 5 In this illustration, for ease of illustration, the components of the scan driver 20, data driver 30, control driver 40, and timing controller 50 are shown separately. However, the invention is not limited thereto, and at least some of the components may be integrated together.

[0168] Figure 7 Shown in Figure 5 An exemplary embodiment of the pixels shown. Specifically, in Figure 7 For ease of illustration, pixel PXL4 is shown as being connected to the i-th scan line Si, the (i+1)-th scan line Si+1, the j-th data line Dj, and the i-th control line Ci (where i is a natural number less than or equal to n, and j is a natural number less than or equal to m).

[0169] refer to Figure 7 Each of the pixels PXL4 according to another exemplary embodiment of the present invention may include a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a capacitor Cst, and an OLED.

[0170] However, Figure 7 The pixel PXL4 shown is... Figure 1 The difference in pixel PXL1 shown is that the gate electrode of the first transistor T1 is connected to the i-th scan line Si, the gate electrode of the third transistor T3 is connected to the i-th control line Ci, and the gate electrode of the fourth transistor T4 is connected to the (i+1)-th scan line Si+1.

[0171] because Figure 1 The pixel PXL1 shown is connected to three control lines CL1, CL2 and CL3, so the three drive units (e.g. drivers) used to supply control signals to the control lines CL1, CL2 and CL3 are used to drive the pixel PXL1.

[0172] However, due to Figure 7 The pixel PXL4 shown uses two scan lines Si and Si+1 and one control line Ci, so the pixel PXL4 can be driven using only two drive units or drivers (e.g., scan driver 20 and control driver 40).

[0173] The above and Figure 1 , Figure 3 and Figure 4 The relevant content can also be applied to Figure 7 The pixel PXL4. Here, repeated descriptions of the above will be omitted.

[0174] Figure 8 It shows the driver Figure 7 The waveform diagram of the pixel method shown.

[0175] Reference Figure 7 and Figure 8 Describes the operation of driving pixel PXL4 during cell time period Pu.

[0176] refer to Figure 8 , and reference Figure 2 Compared to the described embodiments, the method for driving pixel PXL4 according to another exemplary embodiment of the present invention may further include an initial driving operation.

[0177] When the gate electrode of the first transistor T1 is connected to the i-th scan line Si, an initial drive operation is additionally performed.

[0178] That is, the method for driving pixel PXL4 according to another exemplary embodiment of the present invention may include an initial driving operation, a first initialization operation, a threshold voltage compensation operation, a data writing operation, a second initialization operation, and an emission operation.

[0179] Initial drive operation can be performed at Figure 2 The first time period P1 shown is performed before the first time period P1. During the initial drive operation, a first scan signal (e.g., the i-th scan signal), such as a scan signal with a high level, can be supplied to the i-th scan line Si.

[0180] Therefore, during the first time period P1, the first transistor T1 can be turned on, and the third transistor T3 and the fourth transistor T4 can be kept in the off state.

[0181] The first initialization operation can be performed during the second time period P2. During the first initialization operation, a control signal, such as a signal with a high level, can be supplied to the i-th control line Ci, a first scan signal (such as the (i+1)-th scan signal), such as a scan signal with a high level, can be supplied to the (i+1)-th scan line Si+1, and the first scan signal supplied to the i-th scan line can be stopped (e.g., changed to a low level).

[0182] Therefore, during the second time period P2, the third transistor T3 and the fourth transistor T4 can be in the on state, and the first transistor T1 can be turned off.

[0183] As a result, during the first initialization operation, the reference voltage and the initialization voltage can be supplied to the first node N1 and the second node N2 of pixel PXL4, respectively.

[0184] The threshold voltage compensation operation can be performed during the third time period P3. During the threshold voltage compensation operation, a control signal can be supplied to (or held at) the i-th control line Ci, and the first scan signal supplied to the (i+1)-th scan line Si+1 can be stopped (e.g., changed to a low level).

[0185] Therefore, during the third time period P3, the third transistor T3 can be kept in the on state, while the first transistor T1 and the fourth transistor T4 can be in the off state.

[0186] During the third period P3, the voltage of the first node N1 can be maintained or substantially maintained at the reference voltage, and the voltage of the second node N2 can be changed from the initial voltage to the value obtained by subtracting the threshold voltage of the second transistor T2 from the reference voltage.

[0187] In other words, the voltage of the second node N2 is changed to the value obtained using the above formula (1).

[0188] Since capacitor Cst stores the voltage corresponding to the difference between the voltage of the first node N1 and the voltage of the second node N2, capacitor Cst can store the threshold voltage of the second transistor T2.

[0189] The data write operation can be performed during the fourth time period P4. During the data write operation, a second scan signal (e.g., the i-th scan signal), such as a scan signal with a high level, can be supplied to the i-th scan line Si.

[0190] Therefore, during the fourth time period P4, the first transistor T1 can be turned on, and the third transistor T3 and the fourth transistor T4 can be turned off.

[0191] As a result, during the fourth time period P4, the voltage of the first node N1 is maintained or substantially maintained as the data voltage transmitted from the j-th data line Dj, and the voltage of the second node N2 is changed to the value obtained using the above formula 2.

[0192] In addition, the capacitor Cst can store the voltage obtained using Equations 3 and 4 above.

[0193] The second initialization operation can be performed during the fifth time period P5. During the second initialization operation, the second scan signal (e.g., the (i+1)th scan signal), such as a scan signal with a high level, can be supplied to the (i+1)th scan line Si+1.

[0194] Therefore, during the fifth time period P5, the fourth transistor T4 can be turned on, and the first transistor T1 and the third transistor T3 can be turned off.

[0195] As a result, during the second initialization operation, the initialization voltage can be supplied to the second node N2.

[0196] The transmission operation can be performed during the sixth time period P6. During the transmission operation, the scan signal is not supplied to the i-th scan line Si and the (i+1)-th scan line Si+1, and the control signal is not supplied to the i-th control line Ci.

[0197] Therefore, during the sixth time period P6, the first transistor T1, the third transistor T3, and the fourth transistor T4 can be in the off state.

[0198] As a result, during the emission operation, the second transistor T2 can supply the driving current to the OLED using the formulas 5 and 6 above. Therefore, the OLED can emit light with a brightness corresponding to the driving current during the emission operation.

[0199] In the figures, for clarity, the relative dimensions of elements, layers, and regions may be magnified. For ease of interpretation, spatial relative terms such as “below,” “under,” “down,” “below,” “above,” and “above” are used herein to describe the relationship of one element or feature relative to another element(s) shown in the figures. It will be understood that, in addition to the orientations described in the figures, spatial relative terms are intended to encompass different orientations of the device in use or operation. For example, if the device in the figure is flipped, an element described as “below,” “under,” or “below” other elements or features would then be oriented as “above” other elements or features. Thus, the example terms “below” and “below” can encompass both above and below orientations. The device may be otherwise oriented (e.g., rotated 90 degrees or in other orientations), and the spatial relative descriptors used herein should be interpreted accordingly.

[0200] It will be understood that while the terms "first," "second," "third," etc., may be used herein to describe various elements, components, regions, layers, and / or portions, these elements, components, regions, layers, and / or portions should not be limited by these terms. These terms are used to distinguish one element, component, region, layer, or portion from another element, component, region, layer, or portion. Therefore, the first element, component, region, layer, or portion described below may be referred to as a second element, component, region, layer, or portion without departing from the spirit and scope of the invention.

[0201] It will be understood that when a component or layer is referred to as being "on," "connected to," or "linked to" another component or layer, it can be directly on, directly connected to, or directly linked to the other component or layer, or one or more intermediate components or layers may exist. Additionally, it will be understood that when a component or layer is referred to as being "between" two components or two layers, it can be the only component or layer between the two components or two layers, or one or more intermediate components or layers may exist.

[0202] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used herein, the singular form “a” is intended to include the plural form as well, unless the context clearly indicates otherwise. It will be further understood that, when used herein, the terms “comprising,” “including,” “containing,” and variations thereof indicate the presence of the stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. As used herein, the term “and / or” includes any and all combinations of one or more of the items listed in the associated list. When placed after a list of elements, expressions such as “…at least one of” modify the entire list of elements, without modifying any individual element in that list.

[0203] As used herein, the terms “substantially,” “approximately,” and similar terms are used as terms of approximation rather than as terms of degree, and are intended to take into account the inherent tolerances in measured or calculated values ​​recognized by those skilled in the art. Furthermore, when describing embodiments of the invention, the use of “may” refers to “one or more embodiments of the invention.” As used herein, the terms “use” and “being used” can be considered synonymous with the terms “utilize” and “being exploited,” respectively. Additionally, the term “exemplary” indicates an example or illustration.

[0204] The electrical or electronic devices and / or any other related devices or components according to the embodiments of the invention described herein can be implemented using any suitable hardware, firmware (e.g., application-specific integrated circuits), software, or a combination of software, firmware, and hardware. For example, various components of these devices can be formed on an integrated circuit (IC) chip or a separate IC chip. Furthermore, various components of these devices can be implemented on flexible printed circuit films, tape-on-a-package (TCP), printed circuit boards (PCBs), or formed on a substrate. Additionally, various components of these devices can be processes or threads running on one or more processors in one or more computing devices, executing computer program instructions and interacting with other system components for performing the various functions described herein. The computer program instructions are stored in memory implemented in the computing device using standard memory devices such as, for example, random access memory (RAM). The computer program instructions can also be stored on other non-transitory computer-readable media, such as, for example, CD-ROMs, flash drives, etc. Furthermore, those skilled in the art will recognize that the functions of various computing devices can be combined or integrated into a single computing device, or the functions of a particular computing device can be distributed across one or more other computing devices without departing from the spirit and scope of the exemplary embodiments of the invention.

[0205] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. It will be further understood that terms defined, for example, in common dictionaries should be interpreted as having the same meaning as they have in the relevant field and / or the context of this specification, and will not be interpreted in an idealized or overly formal sense unless expressly defined herein.

[0206] Example embodiments have been disclosed herein, and although specific terminology has been used, it is used and interpreted in a general and descriptive sense only and not for limiting purposes. In some instances, as will be apparent to those skilled in the art as of the date of this application, features, characteristics, and / or elements described in connection with particular embodiments may be used alone or in combination with features, characteristics, and / or elements described in connection with other embodiments, unless otherwise expressly indicated. Therefore, those skilled in the art will understand that various changes in form and detail may be made without departing from the spirit and scope of the invention as set forth in the appended claims and their equivalents.

Claims

1. An organic light-emitting display device, comprising: Multiple pixels connected to (n+1) scan lines, m data lines and n control lines, where n and m are natural numbers greater than or equal to 2; A scan driver configured to supply scan signals to the scan lines; A data driver configured to supply data signals to the data line; as well as A control driver configured to supply control signals to the control line. One of the plurality of pixels is connected to the i-th scan line, the (i+1)-th scan line, the i-th control line, and the j-th data line, where i is a natural number less than or equal to n, and j is a natural number less than or equal to m, and the one pixel comprises: A first transistor connected between the j-th data line and the first node, the first transistor being configured to be turned on when the i-th scan signal is supplied to the i-th scan line; A second transistor is connected between a first power source and a second node, the second transistor including a gate electrode connected to the first node; A third transistor is connected between the first node and the third power supply, and the third transistor is configured to be turned on when a control signal is supplied to the i-th control line; A fourth transistor is connected between the second node and the fourth power supply, the fourth transistor being configured to be turned on when the (i+1)th scan signal is supplied to the (i+1)th scan line; The capacitor connected between the first node and the second node; and An organic light-emitting diode connected between the second node and the second power supply. The i-th scan signal is supplied to the i-th scan line during the first and fourth time periods, the (i+1)-th scan signal is supplied to the (i+1)-th scan line during the second and fifth time periods, and the control signal is supplied to the i-th control line during the second and third time periods. During the fifth time period, the drive current transmitted from the second transistor flows to the fourth power source via the fourth transistor.

2. The organic light-emitting display device according to claim 1, wherein: The first transistor includes a first electrode connected to the j-th data line, a second electrode connected to the first node, and a gate electrode connected to the i-th scan line; The second transistor further includes a first electrode connected to the first power supply and a second electrode connected to the second node; The third transistor includes a first electrode connected to the first node, a second electrode connected to the third power supply, and a gate electrode connected to the i-th control line; and The fourth transistor includes a first electrode connected to the second node, a second electrode connected to the fourth power supply, and a gate electrode connected to the (i+1)th scan line.

3. The organic light-emitting display device according to claim 1, wherein each of the first to fourth transistors is an n-channel transistor.

4. The organic light-emitting display device according to claim 1, wherein the organic light-emitting diode is configured to emit light during a sixth time period.

5. The organic light-emitting display device according to claim 1, wherein the fourth power supply is configured to be at the same voltage level as the second power supply.

6. The organic light-emitting display device according to claim 1, wherein the third power supply is configured to be at the same voltage level as the second power supply.

7. The organic light-emitting display device according to claim 1, wherein the active layer of each of the first to fourth transistors comprises an oxide semiconductor.

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