An inverter control system and a bus current reconstruction system of an inverter thereof

Abstract

The application discloses an inverter control system and a bus current reconstruction system of an inverter thereof, and belongs to the field of signal detection. It is considered that the three-phase output current of the inverter has strong correlation with the currents of the three bridge arms of the single side of the three-phase bridge in the inverter, and the sum of the current values of the three bridge arms of the single side of the three-phase bridge is the bus current of the inverter. Therefore, in the application, the real-time current value of the three-phase output current of the inverter is acquired through a current sensing circuit, then the real-time current value of the three bridge arms of the single side is determined according to the control signal of the three-phase bridge and the real-time current value of the three-phase output current through an operation circuit, and the bus current value of the inverter is obtained by summing the real-time current value of the three bridge arms of the single side. Since the bus current value is reconstructed based on the hardware circuit of the three-phase output current in the application, there is almost no delay, and the overall cost is relatively low.

Description

Technical Field

[0001] This invention relates to the field of signal detection, and in particular to a bus current reconfiguration system for an inverter. This invention also relates to an inverter control system. Background Technology

[0002] Inverters have important applications in various fields (such as AC motor drives and inverter power supplies). The inverter bus current (DC) can be used for overload detection, output short circuit protection, and power closed-loop calculation. Therefore, it is necessary to obtain the bus current in real time. However, there is a lack of mature methods for obtaining the inverter bus current in related technologies, which results in high cost and long delay when obtaining the inverter bus current.

[0003] Therefore, how to provide a solution to the above-mentioned technical problems is a problem that needs to be solved by those skilled in the art. Summary of the Invention

[0004] The purpose of this invention is to provide a bus current reconfiguration system for an inverter. Because this invention uses hardware circuitry to determine the real-time current values ​​of the three arms on one side of the three-phase bridge based on the control signals of the three arms and the real-time current values ​​of the three-phase output current, and then sums these real-time current values ​​to obtain the inverter's bus current value, there is almost no delay, and the overall cost is low. Another purpose of this invention is to provide an inverter control system including the aforementioned bus current reconfiguration system. Because this invention uses hardware circuitry to determine the real-time current values ​​of the three arms on one side of the three-phase bridge based on the control signals of the three arms and the real-time current values ​​of the three-phase output current, and then sums these real-time current values ​​to obtain the inverter's bus current value, there is almost no delay, and the overall cost is low.

[0005] To address the aforementioned technical problems, this invention provides a bus current reconfiguration system for an inverter, comprising:

[0006] The current sensing circuit is used to obtain the real-time current value of the three-phase output current of the inverter;

[0007] The operation circuit is used to determine the real-time current value of the three bridge arms on one side of the three-phase bridge based on the control signal of the three-phase bridge in the inverter and the real-time current value of the three-phase output current.

[0008] The adder circuit is used to sum the real-time current values ​​of the three bridge arms on one side to obtain the bus current value of the inverter.

[0009] On the other hand, the current sensing circuit includes:

[0010] A current sensing module connected to the three-phase output terminal of the inverter is used to obtain the real-time current value of a specified two-phase output current of the inverter.

[0011] The phase current reconstruction circuit is used to determine the real-time current value of the output current of the inverter other than the specified two phases based on the real-time current values ​​of the specified two-phase output currents obtained by the current sensing module.

[0012] On the other hand, the current sensing module includes:

[0013] Two phase current detection modules are connected to the input terminals of the inverter and to the single-phase output terminals of the three-phase output terminals, respectively, to detect the real-time current value of the corresponding single-phase output terminals.

[0014] The phase current reconstruction circuit includes:

[0015] The first resistor, the second resistor, the third resistor, the fourth resistor, and the first operational amplifier;

[0016] The first end of the first resistor is connected to the output of one of the phase current detection modules, the first end of the second resistor is connected to the output of the other phase current detection module, the second ends of the first resistor, the second ends of the second resistor, and the first end of the third resistor are all connected to the inverting input of the first operational amplifier, the second end of the third resistor is connected to the output of the first operational amplifier, the first end of the fourth resistor is grounded, and the second end of the fourth resistor is connected to the non-inverting input of the first operational amplifier.

[0017] On the other hand, the arithmetic circuit includes:

[0018] A control signal supply device is used to provide control signals for each upper arm of the three-phase bridge in the inverter.

[0019] The control terminal is connected to the control signal supply device, the input terminal is connected to a corresponding output terminal of the current sensing module, and the output terminals are all connected to the controllable switch of the adder circuit, which is used to perform closing and closing actions under the control of the control signal of the upper arm of the three-phase bridge in the inverter.

[0020] On the other hand, the control signal supply device is the controller of the inverter.

[0021] On the other hand, the adder circuit includes a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, and a second operational amplifier;

[0022] The first ends of the fifth resistor, the sixth resistor, and the seventh resistor are respectively connected to the output of a corresponding controllable switch. The second ends of the fifth resistor, the sixth resistor, and the seventh resistor are all connected to the non-inverting input of the second operational amplifier. The first ends of the eighth resistor and the ninth resistor are jointly connected to the inverting input of the second operational amplifier. The second end of the eighth resistor is grounded, and the second end of the ninth resistor is connected to the output of the second operational amplifier.

[0023] On the other hand, the inverter's bus current reconfiguration system also includes:

[0024] The input terminals are connected one-to-one with the output terminals of the phase current detection module, and the output terminals are connected to the arithmetic circuit to a impedance conversion circuit, which is used to reduce the signal internal resistance of the received real-time current value.

[0025] On the other hand, the impedance conversion circuit is a voltage follower.

[0026] On the other hand, the phase current detection module includes:

[0027] The inverter originally has a current-type current sensor installed at the corresponding single-phase output terminal of the three-phase output terminal of the inverter, which is used to detect the real-time current value of the corresponding single-phase output terminal.

[0028] The current sensing resistor connected in series with the secondary coil of the current-type current sensor is used to convert the current signal of the real-time current value output by the current-type current sensor into a voltage signal.

[0029] To address the aforementioned technical problems, the present invention also provides an inverter control system, including the inverter bus current reconfiguration system described above.

[0030] This invention provides a bus current reconfiguration system for an inverter. Considering the strong correlation between the three-phase output current of the inverter and the current of the three arms on one side of the three-phase bridge in the inverter, and that the sum of the current values ​​of the three arms on one side of the three-phase bridge is the inverter bus current, this invention first obtains the real-time current value of the inverter's three-phase output current through a current sensing circuit. Then, the calculation circuit determines the real-time current value of the three arms on one side based on the control signal of the three-phase bridge and the real-time current value of the three-phase output current. Finally, the bus current value of the inverter is obtained by summing the real-time current values ​​of the three arms on one side. Since this invention obtains the bus current value by reconfiguring the three-phase output current based on hardware circuitry, there is almost no delay, and the overall cost is low.

[0031] The present invention also provides an inverter control system that has the same beneficial effects as the bus current reconfiguration system of the inverter described above. Attached Figure Description

[0032] To more clearly illustrate the technical solutions in the embodiments of the present invention, the relevant technologies and the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0033] Figure 1 A schematic diagram of the structure of a bus current reconfiguration system for an inverter provided by the present invention;

[0034] Figure 2 A logic diagram of the bridge arm current and bus current of an inverter provided by the present invention;

[0035] Figure 3 A logic diagram for bus current reconfiguration of an inverter provided by the present invention;

[0036] Figure 4 A schematic diagram of the bus current reconfiguration system for another inverter provided by the present invention. Detailed Implementation

[0037] The core of this invention is to provide a bus current reconfiguration system for an inverter. Because this invention uses hardware circuitry to determine the real-time current values ​​of the three arms on one side of the three-phase bridge based on the control signals of the three arms and the real-time current values ​​of the three-phase output current, and then sums these real-time current values ​​to obtain the inverter's bus current value, there is almost no delay, and the overall cost is low. Another core aspect of this invention is to provide an inverter control system that includes the aforementioned bus current reconfiguration system. Because this invention uses hardware circuitry to determine the real-time current values ​​of the three arms on one side of the three-phase bridge based on the control signals of the three arms and the real-time current values ​​of the three-phase output current, and then sums these real-time current values ​​to obtain the inverter's bus current value, there is almost no delay, and the overall cost is low.

[0038] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0039] Please refer to Figure 1 , Figure 1 This is a schematic diagram of the structure of a bus current reconfiguration system for an inverter provided by the present invention. The bus current reconfiguration system for the inverter includes:

[0040] Current sensing circuit 1 is used to obtain the real-time current value of the three-phase output current of the inverter;

[0041] Operational circuit 2 is used to determine the real-time current value of the three arms on one side of the single-phase bridge based on the control signal of the three-phase bridge in the inverter and the real-time current value of the three-phase output current.

[0042] Adder circuit 3 is used to sum the real-time current values ​​of the three bridge arms on one side to obtain the bus current value of the inverter.

[0043] Specifically, for a better explanation of the embodiments of the present invention, please refer to... Figure 2 , Figure 2 This invention provides a logic diagram of the bridge arm current and bus current of an inverter. Figure 2 The six controllable switches in the diagram form the three-phase bridge of the inverter. Ibus is the bus current, M on the far right is the motor, Ia, Ib, and Ic are the three-phase output currents of the inverter, Iau, Ibu, and Icu are the currents of each upper bridge arm, and Iad, Ibd, and Icd are the currents of each lower bridge arm. Specifically, Iau = Ia × Gau, Ibu = Ib × Gbu, Icu = Ic × Gcu; Iad = Ia × Gad, Ibd = Ib × Gbd Icd = Ic × Gcd, and Ibus = Iau + Ibu + Icu or Iad + Ibd + Icd; Gau is the control signal of the upper arm of the phase Ia, Gbu is the control signal of the upper arm of the phase Ib, and Gcu is the control signal of the upper arm of the phase Ic; similarly, Gad is the control signal of the lower arm of the phase Ia, Gbd is the control signal of the lower arm of the phase Ib, and Gcd is the control signal of the lower arm of the phase Ic.

[0044] Specifically, considering the technical problems mentioned above, and taking into account the strong correlation between the three-phase output current of the inverter and the current of the three arms on one side of the three-phase bridge in the inverter, and the sum of the current values ​​of the three arms on one side is the bus current of the inverter, this embodiment of the invention aims to collect the three-phase output current of the inverter and convert it into the bus current of the inverter through hardware circuitry. This not only has a low implementation cost but also virtually no delay. Specifically, the real-time current value of the three-phase output current of the inverter can be obtained through the current sensing circuit 1, so as to convert the real-time current value of the three-phase output current into the bus current value of the inverter.

[0045] Specifically, considering the real-time current value of the three-phase output current of the inverter and the control signal value of the three bridge arms on one side of the corresponding phase, the real-time current value of the three bridge arms on one side of the three-phase bridge in the inverter can be obtained. Therefore, in this embodiment of the invention, the real-time current value of each upper bridge arm is determined by the hardware calculation circuit 2 based on the control signal of the three bridge arms on one side of the three-phase bridge in the inverter and the real-time current value of the three-phase output current.

[0046] Specifically, considering that Ibus = Iau + Ibu + Icu or Iad + Ibd + Icd, the bus current value of the inverter can be obtained by summing the real-time current values ​​of each upper bridge arm through the adder circuit 3 in this embodiment of the invention.

[0047] This invention provides a bus current reconfiguration system for an inverter. Considering the strong correlation between the three-phase output current of the inverter and the current of the three arms on one side of the three-phase bridge in the inverter, and that the sum of the current values ​​of the three arms on one side of the three-phase bridge is the inverter bus current, this invention first obtains the real-time current value of the inverter's three-phase output current through a current sensing circuit. Then, the calculation circuit determines the real-time current value of the three arms on one side based on the control signal of the three-phase bridge and the real-time current value of the three-phase output current. Finally, the bus current value of the inverter is obtained by summing the real-time current values ​​of the three arms on one side. Since this invention obtains the bus current value by reconfiguring the three-phase output current based on hardware circuitry, there is almost no delay, and the overall cost is low.

[0048] Based on the above embodiments:

[0049] In a preferred embodiment, the current sensing circuit 1 includes:

[0050] A current sensing module connected to the three-phase output terminals of the inverter is used to obtain the real-time current value of a specified two-phase output current of the inverter.

[0051] The phase current reconstruction circuit is used to determine the real-time current value of the output current of the inverter in the other phase besides the specified two phases based on the real-time current values ​​of the specified two phase output currents obtained by the current sensing module.

[0052] Specifically, considering that the current value of the third phase can be obtained from two of the three-phase output currents of the inverter, in this embodiment of the invention, the real-time current value of the specified two-phase output current of the inverter can be obtained by a current sensing module, and then the real-time current value of the other phase output current of the inverter can be determined by a phase current reconstruction circuit based on the real-time current value of the specified two-phase output current obtained by the current sensing module. Since the cost of the phase current reconstruction circuit is lower than the cost of the current sensor device, this embodiment of the invention can save costs.

[0053] The two phases can be any two phases, and this embodiment of the invention does not limit them.

[0054] In a preferred embodiment, the current sensing module includes:

[0055] The input terminal is connected to two phase current detection modules corresponding to the single-phase output terminals of the three-phase output terminals of the inverter, which are used to detect the real-time current value of the corresponding single-phase output terminals.

[0056] The phase current reconstruction circuit includes:

[0057] The first resistor, the second resistor, the third resistor, the fourth resistor, and the first operational amplifier;

[0058] The first end of the first resistor is connected to the output of one of the phase current detection modules, the first end of the second resistor is connected to the output of another phase current detection module, the second ends of the first resistor, the second ends of the second resistor, and the first end of the third resistor are all connected to the inverting input of the first operational amplifier, the second end of the third resistor is connected to the output of the first operational amplifier, the first end of the fourth resistor is grounded, and the second end of the fourth resistor is connected to the non-inverting input of the first operational amplifier.

[0059] Specifically, the current sensing module in this embodiment of the invention includes two independent phase current detection modules, and the phase current reconstruction circuit can be connected to these two phase current detection modules respectively, and can calculate the real-time current value of another third phase based on the real-time current values ​​of two specified phases.

[0060] For a better explanation of the embodiments of the present invention, please refer to Figure 3 and Figure 4 , Figure 3 A logic diagram for bus current reconfiguration of an inverter provided by the present invention; Figure 4 This is a schematic diagram of the bus current reconfiguration system for another inverter provided by the present invention. Figure 3 In this context, Udc is the input voltage of the inverter, Motor is the motor, and Ca and Cb are both current sensors.

[0061] Specifically, in Figure 4 In the phase current reconstruction circuit, R3 to R6 correspond to the first to fourth resistors in sequence, and Q3 is the first operational amplifier; Figure 4 The phase current reconstruction circuit in the circuit constructs the C-phase current signal Ic through the adder circuit 3 and the inverting circuit. The circuit uses an operational amplifier to perform an addition operation and an inverting operation. The operational relationship between the output signal and the input signal of the circuit is Uout=0-(Ia+Ib)=Ic, which yields the C-phase output current.

[0062] Specifically, the phase current reconstruction adopts the form of inverting proportional adder circuit 3, which realizes the addition of signals and also inverts the signals. The entire circuit only requires one operational amplifier. The external resistors R3, R4, and R5 should be selected with a value of 10kΩ to ensure low signal noise without increasing the circuit's quiescent current. The resistor R6 at the non-inverting input should be the value of the parallel connection of resistors R3, R4, and R5, i.e., R6 = (R3 × R4 × R5) / (R3 + R4 + R5).

[0063] Since the sum of the three-phase output currents of the inverter is 0, i.e., Ia+Ib+Ic=0, the inherent Ic=-Ia-Ib.

[0064] Of course, in addition to this specific embodiment, the structure of the current sensing module and the phase current reconstruction circuit can also be of other types, and the embodiments of the present invention are not limited here.

[0065] In a preferred embodiment, the operational circuit 2 includes:

[0066] A control signal supply device is used to provide control signals to each upper arm of the three-phase bridge in the inverter.

[0067] The control terminal is connected to the control signal supply device, the input terminal is connected to a corresponding output terminal of the current sensing module, and the output terminals are all connected to the controllable switch of the adder circuit 3, which is used to perform closing and closing actions under the control of the control signal of the upper arm of the three-phase bridge in the inverter.

[0068] Specifically, after obtaining the three-phase output current signals Ia, Ib, and Ic, multiplying them by the inverter's switching function yields the current in the upper arm of the inverter. Since the switching function has only two values: 1 and 0, this operational circuit 2 can be implemented using a gating circuit. For example... Figure 4 As shown in the operational circuit 2, the drive signals Gau, Gbu, and Gcu of the upper bridge arm IGBT (Insulated-Gate Bipolar Transistor) of the inverter can be combined with controllable switches (Sa, Sb, and Sc) to realize multiplication operations.

[0069]

[0070] When the control signal is positive, the controllable switch is turned on and the signal is selected. When the control signal is 0, the output is equal to the input signal, the controllable switch is turned off, the signal is blocked, and the output is 0.

[0071] Of course, in addition to this specific construction, the operational circuit 2 can also be of many other types, and the embodiments of the present invention are not limited here.

[0072] In a preferred embodiment, the control signal supply device is the inverter controller.

[0073] Specifically, since the controller needs to send the control signals of the three-phase bridge controlling the inverter to the driver board to turn on the corresponding IGBTs when controlling the inverter, it is only necessary to multiplex the corresponding control signals to... Figure 4 The operational circuit 2 shown is sufficient; no additional hardware circuitry is required. The inverter's A-phase upper bridge arm current Iau can be obtained by enabling the IGBT's control signal Gau through the A-phase current signal. Similarly, enabling the B-phase current signal Ib using Gbu yields the B-phase upper bridge arm current Ibu, and enabling the C-phase current signal Ic using Gcu yields the C-phase upper bridge arm current Icu.

[0074] In a preferred embodiment, the adder circuit 3 includes a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, and a second operational amplifier;

[0075] The first ends of the fifth resistor, the sixth resistor, and the seventh resistor are respectively connected to the output of a corresponding controllable switch. The second ends of the fifth resistor, the sixth resistor, and the seventh resistor are all connected to the non-inverting input of the second operational amplifier. The first ends of the eighth resistor and the ninth resistor are connected to the inverting input of the second operational amplifier. The second end of the eighth resistor is grounded, and the second end of the ninth resistor is connected to the output of the second operational amplifier.

[0076] Specifically, by adding the obtained Iau, Ibu, and Icu, the bus current Ibus can be obtained. The specific circuit is as follows: Figure 4 The three-input adder circuit shown in Figure 3 utilizes a second operational amplifier Q4 to perform addition of three input signals. Figure 4 R7-R11 in the circuit correspond to the fifth to ninth resistors in sequence. The output of the adder circuit 3 is Uout=Iau+Ibu+Icu=Ibus;

[0077] Among them, the adder circuit 3 adopts the form of non-inverting proportional adder circuit 3. The entire circuit only requires one operational amplifier and is equipped with 5 resistors. Resistors R7, R8 and R9 should be 30k resistance. R10 and R11 have the same resistance value and their resistance value should be twice the parallel resistance value of R7, R8 and R9, that is, R10 = R11 = (R7 × R8 × R9) / (R7 + R8 + R9).

[0078] Of course, besides this specific construction, the adder circuit 3 can also be of many other types, and the embodiments of the present invention are not limited here.

[0079] As a preferred embodiment, the inverter's bus current reconfiguration system further includes:

[0080] The input terminals are connected one-to-one with the output terminals of the phase current detection module, and the output terminals are connected to the impedance conversion circuit of the operation circuit 2 to reduce the signal internal resistance of the received real-time current value.

[0081] Specifically, in order to reduce the signal internal resistance of the real-time current signal and improve the signal quality, this embodiment of the invention also provides an impedance conversion circuit whose input terminals are connected to the output terminals of the phase current detection module and whose output terminals are connected to the operational circuit 2.

[0082] As a preferred embodiment, the impedance conversion circuit is a voltage follower.

[0083] Specifically, a voltage follower is... Figure 4 The operational amplifiers Q1 and Q2 in the middle have the advantages of small size and low cost.

[0084] Of course, in addition to voltage followers, impedance conversion circuits can be of many other types, and the embodiments of the present invention are not limited to these types.

[0085] In a preferred embodiment, the phase current detection module includes:

[0086] The inverter originally has a current-type current sensor installed at the corresponding single-phase output terminal of the three-phase output terminal of the inverter, which is used to detect the real-time current value of the corresponding connected single-phase output terminal.

[0087] The current sensing resistor connected in series with the secondary coil of the current-type current sensor is used to convert the current signal of the real-time current value output by the current-type current sensor into a voltage signal.

[0088] Specifically, the phase current detection module for phase A is... Figure 4 The current sensor Ca and the current sensing resistor R1 in the middle, and the phase current detection module of phase B are... Figure 4 The current-type current sensor Cb and the current sensing resistor R2 in the middle have the advantages of low cost and simple structure.

[0089] Of course, in addition to this specific form, the phase current detection module can also be of other types, and the embodiments of the present invention are not limited here.

[0090] The present invention also provides an inverter control system, including the inverter bus current reconfiguration system as described in the foregoing embodiments.

[0091] For an introduction to the inverter control system provided in this embodiment of the invention, please refer to the aforementioned embodiment of the inverter bus current reconfiguration system. This embodiment of the invention will not be repeated here.

[0092] The various embodiments described in this specification are presented in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. It should also be noted that in this specification, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising a..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0093] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A bus current reconfiguration system for an inverter, characterized in that, include: The current sensing circuit is used to obtain the real-time current value of the three-phase output current of the inverter; The operation circuit is used to determine the real-time current value of the three bridge arms on one side of the three-phase bridge based on the control signal of the three-phase bridge in the inverter and the real-time current value of the three-phase output current. An adder circuit is used to sum the real-time current values ​​of the three bridge arms on one side to obtain the bus current value of the inverter. The current sensing circuit includes: A current sensing module connected to the three-phase output terminal of the inverter is used to obtain the real-time current value of a specified two-phase output current of the inverter. A phase current reconfiguration circuit is used to determine the real-time current value of the output current of the inverter other than the specified two phases based on the real-time current values ​​of the specified two-phase output currents obtained by the current sensing module. The arithmetic circuit includes: A control signal supply device is used to provide control signals for each upper arm of the three-phase bridge in the inverter. The control terminal is connected to the control signal supply device, the input terminal is connected to a corresponding output terminal of the current sensing module, and the output terminals are all connected to the controllable switch of the adder circuit, which is used to perform closing and closing actions under the control of the control signal of the upper arm of the three-phase bridge in the inverter.

2. The inverter bus current reconfiguration system according to claim 1, characterized in that, The current sensing module includes: Two phase current detection modules are connected to the input terminals of the inverter and to the single-phase output terminals of the three-phase output terminals, respectively, to detect the real-time current value of the corresponding single-phase output terminals. The phase current reconstruction circuit includes: The first resistor, the second resistor, the third resistor, the fourth resistor, and the first operational amplifier; The first end of the first resistor is connected to the output of one of the phase current detection modules, the first end of the second resistor is connected to the output of the other phase current detection module, the second ends of the first resistor, the second ends of the second resistor, and the first end of the third resistor are all connected to the inverting input of the first operational amplifier, the second end of the third resistor is connected to the output of the first operational amplifier, the first end of the fourth resistor is grounded, and the second end of the fourth resistor is connected to the non-inverting input of the first operational amplifier.

3. The inverter bus current reconfiguration system according to claim 2, characterized in that, The control signal supply device is the controller of the inverter.

4. The inverter bus current reconfiguration system according to claim 2, characterized in that, The adder circuit includes a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, and a second operational amplifier; The first ends of the fifth resistor, the sixth resistor, and the seventh resistor are respectively connected to the output of a corresponding controllable switch. The second ends of the fifth resistor, the sixth resistor, and the seventh resistor are all connected to the non-inverting input of the second operational amplifier. The first ends of the eighth resistor and the ninth resistor are jointly connected to the inverting input of the second operational amplifier. The second end of the eighth resistor is grounded, and the second end of the ninth resistor is connected to the output of the second operational amplifier.

5. The inverter bus current reconfiguration system according to claim 2, characterized in that, The inverter's bus current reconfiguration system also includes: The input terminals are connected one-to-one with the output terminals of the phase current detection module, and the output terminals are connected to the arithmetic circuit to a impedance conversion circuit, which is used to reduce the signal internal resistance of the received real-time current value.

6. The inverter bus current reconfiguration system according to claim 5, characterized in that, The impedance conversion circuit is a voltage follower.

7. The bus current reconfiguration system for an inverter according to any one of claims 2 to 6, characterized in that, The phase current detection module includes: The inverter originally has a current-type current sensor installed at the corresponding single-phase output terminal of the three-phase output terminal of the inverter, which is used to detect the real-time current value of the corresponding single-phase output terminal. The current sensing resistor connected in series with the secondary coil of the current-type current sensor is used to convert the current signal of the real-time current value output by the current-type current sensor into a voltage signal.

8. An inverter control system, characterized in that, Includes the bus current reconfiguration system of the inverter as described in any one of claims 1 to 7.

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