Intelligent data collector with automatic signal adaptation and self-checking

Abstract

The application provides an intelligent data collector with automatic signal adaptation and fault self-checking, and aims at solving the technical problems that the existing collector does not have the functions of signal link self-diagnosis and sensor signal self-adaptation, and the problems are difficult to check and the sensor signal is difficult to adapt. The application comprises a signal processing board and a core board, the signal processing board is connected with sensors through a signal interface board, the signal processing board is connected with the core board, and the core board is connected with an upper computer. The application realizes the functions of automatic signal type adaptation and sensor acquisition channel self-checking, automatically adapts the signal type under the condition of multiple types of sensor deployment, reduces the possibility that the collector is damaged due to operation errors, realizes the hardware self-diagnosis of the overall data acquisition link, and improves the efficiency of checking the faults of the collector.

Description

Technical Field

[0001] This invention relates to the technical field of data acquisition in tunnel construction, and in particular to an intelligent data acquisition device with automatic signal adaptation and fault self-diagnosis. Background Technology

[0002] Online monitoring and diagnosis of tunnel boring equipment status is a current research hotspot. This requires installing sensors on components to acquire operational data, which is then analyzed, processed, and converted by a data acquisition unit before being sent to a host computer. Because sensors output various signal types, when installed on the same data acquisition unit, the signal type must be manually set. This method is cumbersome and prone to errors due to negligence, leading to incorrect signal acquisition or even sensor damage. Furthermore, the harsh tunnel construction environment easily causes sensor and data acquisition unit failures. Limited by the tunnel construction setting, personnel debugging and maintenance are difficult, making it challenging to pinpoint the source of the fault. Therefore, there is an urgent need to solve the problem of quickly identifying and locating hardware fault points in the sensor link.

[0003] Although existing data acquisition devices have the functions of acquiring different signals (current and IEPE) and monitoring sensor faults (short circuit and open circuit), the switching of different signals requires manual settings of the acquisition device, which is time-consuming, labor-intensive and inefficient. Although they have sensor fault diagnosis functions, they lack the function of monitoring acquisition channel link faults. Damage to the acquisition link may also lead to misjudgment of sensor faults.

[0004] A utility model patent with application number 202221283350.X discloses a tunnel data acquisition device based on 2.4G communication, including a device housing and a main control board located therein, as well as an external sensor group and a data terminal. The main control board includes a matching circuit, an A / D conversion circuit, a central control circuit (CPU), and a radio frequency communication circuit. The sensor group is connected to the matching circuit; the switching output of the matching circuit is connected to the CPU; the analog output of the matching circuit is connected to the A / D conversion circuit; the output of the A / D conversion circuit is connected to the CPU; and the CPU is connected to the data terminal via the radio frequency communication circuit. This utility model patent acquires tunnel working condition data and transmits it wirelessly to an external data terminal, improving construction efficiency and reliability. It also features a small system size, light weight for easy portability, and good system integration. However, while this patent achieves data acquisition and wireless transmission to a host computer, it cannot efficiently and intelligently match the input signals of different sensors used for monitoring tunnel boring machines, requiring manual configuration. Furthermore, it lacks a fault diagnosis function for the acquisition link.

[0005] Patent application number 201911395101.2 discloses a circuit design device and method for self-detection of speed sensor faults in aero-engines. It designs fault self-detection circuits and methods for two speed frequency signal processing methods: single-ended frequency signal processing and double-ended frequency signal processing. The single-ended speed signal processing fault self-detection circuit includes a power supply, a transistor, a resistor, an optocoupler, and a controller circuit. The double-ended speed signal processing fault self-detection circuit includes a resistor, a power supply, a filter circuit, a comparator, an optocoupler, and a controller circuit. This invention can detect whether the speed sensor is disconnected. When a disconnection is detected, it prohibits starting, switches to a backup channel, or shuts down the engine, ensuring the safety of the aero-engine.

[0006] Patent application No. 201911326833.6 discloses a device and method for self-detection of faults in aero-engine resistance temperature sensors (RTS). It designs fault self-detection circuits and methods for two RTS signal processing methods: constant-voltage excitation bridge circuit and constant-current excitation bridge circuit. The constant-voltage excitation RTS fault self-detection circuit includes an unbalanced bridge circuit, a filter circuit, an amplifier circuit, an analog-to-digital converter (ADC), and a controller circuit. The constant-current excitation RTS fault self-detection circuit includes a reference resistor, an amplifier circuit, an ADC, and a controller circuit. When the sensor is properly connected, the output voltages of both the constant-voltage and constant-current excitation fault self-detection circuits are within the normal range. When the sensor experiences a disconnection or short-circuit fault, the output voltages of both circuits exceed the normal range, and the controller can determine that the RTS sensor is faulty. This invention can detect disconnection and short-circuit faults in RTS sensors, and in the event of a RTS sensor fault, it switches to a backup channel, prohibits starting, and shuts down the engine, ensuring the safety of the aero-engine.

[0007] However, the two invention patent applications mentioned above require the design of relatively complex circuits and are only suitable for fault diagnosis of specific speed sensors and thermocouple sensors, and do not involve specific data acquisition architectures. Summary of the Invention

[0008] To address the technical challenges of existing data acquisition devices lacking signal link self-diagnosis and sensor signal self-adaptation capabilities under tunneling machine operating conditions, which make troubleshooting and sensor signal adaptation complex, this invention proposes an intelligent data acquisition device with automatic signal adaptation and fault self-diagnosis. This solves the problems of acquiring different sensor signals and locating faults, achieving efficient and intelligent acquisition of different fault data of shield tunneling machines under tunnel conditions.

[0009] To achieve the above objectives, the technical solution of the present invention is as follows: an intelligent data acquisition device with automatic signal adaptation and fault self-diagnosis, comprising a signal processing board and a core board, wherein the signal processing board is connected to a sensor through a signal interface board, the signal processing board is connected to the core board, and the core board is connected to a host computer.

[0010] Preferably, the core board communicates with the signal processing board via an I2C bus, and the core board is connected to the host computer via an Ethernet network.

[0011] Preferably, the core board includes an MCU and an FPGA. The FPGA is connected to the signal processing board via an I2C bus, the FPGA is connected to the MCU, and the MCU is connected to the host computer via an Ethernet connection.

[0012] Preferably, the core board is a CPU processor, a GPU processor, or a programmable logic device.

[0013] Preferably, the signal interface board includes an air-mounted connector and a simple plug connector. The air-mounted connector is matched with the sensor, and the simple plug connector is connected to the signal interface board. The air-mounted connector is a multi-core terminal that includes at least a power pin, a signal pin, and a ground pin. The power pin and the ground pin are of the same length and the length of the power pin and the ground pin is greater than the length of the signal pin.

[0014] Preferably, the signal interface board is provided with LED indicator lights, including power indicator lights and network status indicator lights.

[0015] Preferably, the signal processing board includes a controllable double-pole double-throw switch, a channel self-test circuit, an IEPE sensor fault detection circuit, and an IEPE signal and current recognition circuit. The IEPE signal and current recognition circuit is connected in parallel across the sampling resistor RS1 at the front end of the female connector of the aircraft plug. The IEPE signal and current recognition circuit is connected to the first ADC conversion circuit, which is connected to the core board via an I2C bus. The rear end of the female connector of the aircraft plug is connected to the controllable double-pole double-throw switch. The controllable double-pole double-throw switch is connected to both the current signal link and the IEPE signal link. Both the current signal link and the IEPE signal link are connected to a two-to-one analog switch. The two-to-one analog switch is connected to a first voltage follower. The device is connected to a controllable low-pass filter, which is connected to a second ADC conversion circuit. The second ADC conversion circuit is connected to the core board via an I2C bus. A controllable constant current source and a sampling resistor RS2 are also provided on the IEPE signal link. The sampling resistor RS2 is connected to the controllable constant current source, which is connected to the core board via an I2C bus. A fault detection circuit for the IEPE sensor is connected in parallel to the sampling resistor RS2. This fault detection circuit is connected to a third ADC conversion circuit, which is connected to the core board via an I2C bus. One end of the channel self-test circuit is connected to the input of a controllable double-pole double-throw switch, and the other end is connected to the core board via an I2C bus.

[0016] Preferably, the signal processing board is provided with an IEPE signal and current signal selection switch circuit. The control terminals of the controllable double-pole double-throw switch and the two-to-one analog switch are both connected to the IEPE signal and current signal selection switch circuit. The IEPE signal and current signal selection switch circuit is connected to the core board through the I2C bus.

[0017] Preferably, the current signal link is connected to one end of the first pull-down resistor, and the other end of the first pull-down resistor is grounded. The first pull-down resistor is used to convert the acquired current signal into a voltage signal. The IEPE signal link is connected to the attenuation circuit after being coupled by capacitor I. One end of the attenuation circuit and one end of the first pull-down resistor are respectively connected to the two input terminals of the two-to-one analog switch.

[0018] Preferably, the attenuation circuit includes a first resistor and a second resistor. One end of the first resistor is connected to capacitor I, and the other end of the first resistor is connected to one input terminal of a two-to-one analog switch and one end of the second resistor, respectively. The other end of the second resistor is grounded. The first ADC conversion circuit and the third ADC conversion circuit are both ADS11151D chips, which convert the acquired voltage signal into a digital signal. The second ADC conversion circuit is an ADS7830 chip, which converts the analog signal into a digital signal.

[0019] Preferably, the controllable low-pass filter is connected to a programmable sampling cutoff circuit, which is connected to the core board via an I2C bus. The programmable sampling cutoff circuit controls the cutoff frequency of the controllable low-pass filter to prevent aliasing interference.

[0020] Preferably, the IEPE sensor fault detection circuit, the IEPE signal, and the current recognition circuit all include a current acquisition chip, a second pull-down resistor, and a second voltage follower. The input terminal of the current acquisition chip is connected to the sampling resistor RS1 or RS2, the output terminal of the current acquisition chip is connected to one end of the second pull-down resistor, the other end of the second pull-down resistor is grounded, one end of the second pull-down resistor is connected to the input terminal of the second voltage follower, and the output terminal of the second voltage follower is connected to the input terminal of the third ADC conversion circuit.

[0021] Preferably, the channel self-test circuit includes a programmable waveform generator, the input of which is connected to the core board via an I2C bus, and the output of which is connected to a controllable double-pole double-throw circuit; the IEPE signal and current signal selection switch circuit, the third ADC conversion circuit, the second ADC conversion circuit, the first ADC conversion circuit, the programmable waveform generator, and the programmable sampling cutoff circuit are all equipped with multiple channels.

[0022] Preferably, the method for automatic identification and adaptation of the current signal and the IEPE signal is as follows: (1) The sensor was already connected before power was applied: The data acquisition unit is powered on and initializes all peripherals. At the same time, it polls and controls the first ADC conversion circuit and the ADC conversion circuit to turn on the ADC acquisition of sampling resistor RS1 and sampling resistor RS2 in sequence at certain intervals. If the voltage of sampling resistor RS1 is not 0, the sensor connected is a current sensor. At the same time, the core board (2) controls the IEPE signal and current signal selection switch circuit to connect the controllable double-pole double-throw to the current signal link, and controls the two-to-one analog switch to connect the current signal link to the voltage follower. If the voltage on sampling resistor RS1 is 0, the ADC acquisition of sampling resistor RS2 is performed. If the voltage of sampling resistor RS2 is not 0, the sensor connected is a current sensor. Otherwise, the sensor is not connected. (2) After the data acquisition unit is running, insert the sensor: After the data acquisition unit is powered on, the sensor is connected. Since the power supply pin and ground pin of the aviation terminal are longer than the signal pin, when the male aviation terminal is inserted into the female aviation terminal, the power supply pin contacts first. When the IEPE signal and current identification circuit detects that the voltage of the sampling resistor RS1 is 0, it is a current-type sensor. At the same time, the core board (2) controls the IEPE signal and current signal selection switch circuit to connect the controllable double-pole double-throw to the current signal link, and controls the two-to-one analog switch to connect the current signal link to the voltage follower. When the voltage on the sampling resistor RS1 is 0, the sampling resistor RS2 is then sampled by ADC. If the IEPE sensor fault detection circuit detects that there is voltage across the sampling resistor RS2, the inserted sensor is an IEPE type sensor. At the same time, the controllable double-pole double-throw is connected to the IEPE signal link, and the two-to-one analog switch is controlled to connect the IEPE signal link to the voltage follower. If there is no voltage on both the sampling resistor RS2 and the sampling resistor RS1, the connected sensor is neither a current-type sensor nor an IEPE sensor.

[0023] Preferably, the method for implementing the self-test function of the acquisition channel is as follows: After the data acquisition unit is powered on, the core board successfully configures the AD9833 chip of the programmable waveform generator. Then, it connects the self-test channel to the current signal link or the IEPE signal link via a controllable double-pole double-throw switch. It controls the two-to-one analog switch to connect the corresponding acquisition link. The programmable waveform generator emits a sine wave with a certain amplitude and frequency. The main control circuit enters the acquisition mode and performs data analysis on the data acquired by the second ADC conversion circuit to obtain the frequency and amplitude of the acquired signal. If the calculated signal frequency and amplitude are the same as the set signal frequency and amplitude, the acquisition channel is normal; otherwise, the acquisition link of the data acquisition unit is faulty.

[0024] Compared with existing technologies, the beneficial effects of this invention are: it possesses the functions of intelligent identification and adaptation of sensor signals (IEPE signal and current signal) to the subsequent acquisition circuit and self-testing of the sensor acquisition channel link. To achieve intelligent identification and adaptation of sensor signals to the subsequent processing circuit, a special aviation connector is designed, utilizing the characteristics that IEPE signals only have signal and ground lines, and current signals require both signal and power lines. This design requires the male connector pins to have two long and one short pin; the two long pins are power pins, and the short pin is a signal pin. That is, when the aviation connectors are in contact, the main control circuit continuously acquires the voltage of sampling resistors RS1 and RS2. When the voltage across sampling resistors RS1 and RS2 changes, it can be determined whether the inserted signal is an IEPE signal or a current-type signal sensor. Then, the software configures the acquisition stage circuit to adapt to different signals. For the self-diagnostic function of the acquisition stage circuit, the main control circuit configures the programmable waveform generator to generate a certain amplitude and frequency. The main control circuit then acquires the waveform and compares it with the waveform generated by the programmable waveform generator to determine whether there is a fault in the acquisition and processing circuit. In this way, it is possible to quickly determine whether the acquisition unit is faulty, and it can also be indirectly determined whether the acquisition unit is faulty.

[0025] This invention achieves automatic signal type adaptation and sensor acquisition channel self-testing functions. In multi-sensor deployment scenarios, the data acquisition unit automatically adapts to the signal type, reducing the possibility of damage due to operational errors. The implementation of hardware self-diagnosis for the entire data acquisition link improves the efficiency of troubleshooting the data acquisition unit. This invention achieves hardware self-diagnosis for the entire data acquisition link, particularly in multi-sensor deployment scenarios, solving the problem of automatic sensor signal identification and adaptation. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 This is a schematic diagram of the present invention.

[0028] Figure 2 This is a circuit diagram of the signal processing board of the present invention.

[0029] Figure 3 This is a schematic diagram of the structure of the aviation terminal female connector of the present invention.

[0030] Figure 4 This is a front view of the male aviation terminal of the present invention.

[0031] In the diagram, 1 is the signal processing board, 2 is the core board, 3 is the signal interface board, 4 is the sensor, 5 is the aviation terminal, 51 is the power pin, 52 is the signal pin, and 53 is the ground pin. Detailed Implementation

[0032] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0033] Example 1 like Figure 1 As shown, a fault-inspection-enabled intelligent data acquisition device includes a signal processing board 1 and a core board 2. The signal processing board 1 is connected to a sensor 4 via a signal interface board 3. The signal processing board 1 is used to acquire signals from the sensor 4. The signal processing board 1 is connected to the core board 2, which is used to process the information acquired by the signal processing board 1. The core board 2 is connected to a host computer, thereby sending the processed sensor data to the host computer. Therefore, this invention mainly consists of three boards: the core board 2, the signal processing board 1, and the signal interface board 3. The signal flow is as follows: the signal from the sensor 4 first flows through the signal interface board 3, then to the signal processing board 1, and then to the core board 2. After processing by the core board 2, the processed data is finally sent to the PC.

[0034] Core board 2 serves as the main control circuit of the data acquisition device of this invention. Core board 2 communicates with all circuit modules of signal processing board 1 via an I2C bus. Multiple slave devices can be connected to the I2C bus, each with a different address. The main control circuit communicates with the slave devices through these different addresses, offering simplicity and flexibility. Core board 2 connects to the host computer via Ethernet, facilitating wireless data transmission.

[0035] Core board 2 mainly consists of an STM32F407 MCU and an EP4CE10F17 FPGA. The FPGA is connected to signal processing board 1 via an I2C bus and is also connected to the MCU, acting as a coprocessor to control the relevant parameters of the ADC acquisition. The MCU is connected to the host computer via Ethernet, responsible for communication with the host computer. Simultaneously, the MCU receives instructions from the host computer and forwards them to the FPGA, thereby achieving the purpose of controlling ADC acquisition. Core board 2 is implemented using a heterogeneous dual-core architecture of "MCU + FPGA". The combination of the MCU and FPGA fully leverages the advantages of the FPGA's parallel operation and the MCU's control advantages, thus achieving high-speed ADC acquisition and rapid interaction with the host computer.

[0036] The signal interface board 3 mainly consists of a specially structured aviation connector 5, LED indicator lights, and a simple plug terminal. The aviation connector 5 is used to connect the sensor, and the simple plug terminal is used to connect the signal interface board 3. The simple plug terminal has a foolproof design to prevent incorrect insertion and avoid damage to the circuit. The LED indicator lights include a power indicator and a network status indicator. The power indicator lights up when powered on and turns off when powered off, while the network status indicator lights up when the network is connected and turns off when the network is disconnected. The aviation connector 5 is a multi-core terminal that includes at least a power pin 51, a signal pin 52, and a ground pin 53. The power pin 51 and the ground pin 53 must be of the same length, and their lengths must be greater than the length of the signal pin 52. This design ensures that different pins are contacted first when different sensors are inserted, and this difference can be used to determine the type of sensor being connected. (See Appendix) Figure 3 and Figure 4 As shown.

[0037] The main circuit of signal processing board 1 is shown below. Figure 2 As shown, it includes an IEPE signal and current signal selection switch circuit, a controllable double-pole double-throw switch, a controllable constant current source, an IEPE (piezoelectric integrated circuit) sensor fault detection circuit, an attenuation circuit, a controllable low-pass filter, a channel self-test circuit, an IEPE signal and current identification circuit, and an ADC conversion circuit.

[0038] The IEPE signal and current identification circuit is located across the sampling resistor RS1 at the front end of the female connector of terminal 5. This circuit is connected to the first ADC conversion circuit, which in turn is connected to the core board 2 via an I2C bus. The IEPE signal and current identification circuit is used to acquire the voltage signal across the sampling resistor RS1. The first ADC conversion circuit uses an ADS11151D chip, a low-sampling-rate analog-to-digital signal converter, which converts the voltage signal acquired by the IEPE signal and current identification circuit into a digital signal and transmits it to the FPGA on the core board 2.

[0039] Both the female connector terminal 5 and the IEPE / current signal selection switch circuit SW2 are connected to the input terminals of the controllable double-pole double-throw (DPDT) connector. The IEPE / current signal selection switch circuit is connected to the FPGA of core board 2 via an I2C bus. The IEPE / current signal selection switch circuit switches the controllable DPDT according to control commands sent by core board 2, thereby selecting whether to connect the current link or the IEPE link to the female connector of the female connector 5. The two output terminals of the controllable DPDT connector are connected to the current link and the IEPE link respectively. The current link is connected to one end of the first pull-down resistor RS3, and the other end of the first pull-down resistor is grounded through a capacitor. The first pull-down resistor is used to convert the acquired current signal into a voltage signal. Current acquisition chips are installed at both ends of the first pull-down resistor RS3, and the current acquisition chips are connected to core board 2 via an ADC conversion circuit. The IEPE link, after capacitive coupling, is connected to an attenuation circuit. This attenuation circuit attenuates the acquired signal. Both the attenuation circuit and one end of the first pull-down resistor are connected to a controllable low-pass filter via a 2-to-1 analog switch SW3, a voltage follower, and a controllable low-pass filter. This filter performs low-pass filtering on the voltage signal. The controllable low-pass filter is connected to a second ADC conversion circuit, which is connected to the core board 2 via an I2C bus. The controllable low-pass filter is also connected to a programmable sampling cutoff circuit, which is connected to the core board 2 via an I2C bus. This programmable sampling cutoff circuit controls the cutoff frequency of the controllable low-pass filter, thus preventing aliasing interference. The second ADC conversion circuit uses an ADS7830 chip, which features high sampling accuracy and an I2C interface, making it easy to connect to the I2C bus of this data acquisition unit to convert analog signals to digital signals. The programmable sampling cutoff circuit is an I2C to 8-channel PWM converter. The IEPE signal and current signal selection switch is a PCF8574T chip.

[0040] The IEPE link is connected to a controllable constant current source via sampling resistor RS2. A fault detection circuit for the IEPE sensor is connected to both ends of sampling resistor RS2. This fault detection circuit is connected to the third ADC conversion circuit. Both the controllable constant current source and the third ADC conversion circuit are connected to core board 2 via an I2C bus. The controllable constant current source is a circuit with a constant current output, the magnitude of which is configured by the main control circuit. Its main function is to provide a constant current to the IEPE sensor. The fault detection circuit for the IEPE sensor is used to detect the voltage across sampling resistor RS2. The third ADC conversion circuit converts the voltage signal into a digital signal and transmits it to core board 2. The third ADC conversion circuit uses an ADS11151D chip.

[0041] The circuit for detecting IEPE sensor faults, the IEPE signal, and the current recognition circuit all include a current acquisition chip, a second pull-down resistor, and a second voltage follower. The input terminal of the current acquisition chip is connected to either sampling resistor RS1 or sampling resistor RS2. The output terminal of the current acquisition chip is connected to one end of the second pull-down resistor, and the other end of the second pull-down resistor is grounded. One end of the second pull-down resistor is connected to the input terminal of the second voltage follower, and the output terminal of the second voltage follower is connected to the input terminal of the third ADC conversion circuit.

[0042] The channel self-test circuit includes a programmable waveform generator. The input of the programmable waveform generator is connected to core board 2 via an I2C bus, and its output is connected to a controllable double-pole double-throw circuit. The programmable waveform generator can be configured to output waveforms of a specific frequency and amplitude to test for faults in the sampling channel. Core board 2 connects the signal link of the programmable waveform generator to the IEPE signal link via the I2C bus, while simultaneously disconnecting other inputs.

[0043] The IEPE signal and current signal selection switch circuit, the third ADC conversion circuit, the second ADC conversion circuit, the first ADC conversion circuit, the programmable waveform generator, and the programmable sampling cutoff circuit are all equipped with 8 channels, which can be used to judge the signals of multiple sensors.

[0044] When the sensor's IEPE signal flows through signal processing board 1, it is powered by a controllable constant current source. The IEPE signal sequentially passes through a controllable double-pole double-throw circuit, an attenuation circuit, a voltage follower, a controllable low-pass filter, and an ADS7830 acquisition circuit, finally being transmitted to core board 2 via the I2C bus. When the sensor's current signal flows through signal processing board 1, it sequentially passes through a controllable double-pole double-throw circuit, a first pull-down resistor, a voltage follower, a controllable low-pass filter, and an ADS7830 acquisition circuit, finally being transmitted to the core board via I2C.

[0045] This invention has the following functions: 1. Automatic identification and adaptation of current signals and IEPE signals. This function can be explained in two cases: (1) Before powering on, sensor 4 was already connected. At this point, the data acquisition unit powers on and initializes all peripherals. Simultaneously, it polls the ADS11151D chip at regular intervals, sequentially activating the ADC acquisition through sampling resistors RS1 and RS2. If the voltage across sampling resistor RS1 is not zero, the connected sensor is a current-type sensor. Since RS1 generates voltage, the sensor connection creates a loop in the acquisition signal link. Since the IEPE type sensor does not require an external power supply, a current-type sensor is connected. Simultaneously, core board 2 controls the IEPE signal and current signal selection switch circuit to connect the controllable double-pole double-throw switch to the current signal link, and controls the 2-to-1 analog switch SW3 to connect the current signal link to pin 3 of the voltage follower. If the voltage across sampling resistor RS1 is zero, sampling is then performed on sampling resistor RS2. If the voltage across RS2 is not zero, the connected sensor is a current-type sensor. Otherwise, sensor 4 is not connected.

[0046] (2) After the data acquisition unit is running, insert sensor 4. After the data acquisition unit is powered on, sensor 4 is connected. Since the power and ground pins of aviation terminal 5 are longer than the signal pins, when the male aviation terminal is inserted into the female aviation terminal, the power pin 51 contacts first. When the IEPE signal and current identification circuit detect that the voltage across sampling resistor RS1 is 0, it is a current-type sensor. Because IEPE sensors do not require external power supply, while current-type sensors do, the voltage generated by sampling resistor RS1 indicates that a loop has been formed with the acquisition link, thus identifying it as a current-type sensor. Simultaneously, core board 2 controls the IEPE signal and current signal selection switch circuit to connect the controllable double-pole double-throw switch to the current signal link, and controls the two-to-one analog switch SW3 to connect the current signal link to pin 3 of the voltage follower. When the voltage across sampling resistor RS1 is 0, sampling resistor RS2 is then sampled. If the IEPE sensor fault detection circuit detects voltage across sampling resistor RS2, it is an IEPE-type sensor. Simultaneously, the controllable double-pole double-throw switch is connected to the IEPE signal link, controlling the 2-to-1 analog switch SW3 to connect the IEPE signal link to pin 3 of the voltage follower. If neither sampling resistor RS2 nor sampling resistor RS1 has voltage, then the connected sensor is neither a current-type sensor nor an IEPE sensor. Sampling resistor RS1 is on the power supply pin; if the voltage across sampling resistor RS1 is 0, it indicates that this sensor does not require external power, therefore it is not a current-type sensor. An IEPE sensor, however, requires sampling resistor RS2 to power itself, and after the IEPE sensor is connected, a loop is formed, and sampling resistor RS2 generates voltage. If the voltage across sampling resistor RS2 is 0, then the connected sensor is not an IEPE type sensor.

[0047] 2. Acquisition Channel Self-Test Function After the data acquisition unit is powered on, the FPGA on core board 2 successfully configures the AD9833 chip (including configuring the AD9833's registers, including the frequency and amplitude of the waveform). Then, it connects the self-test channel to the current link or IEPE link via a controllable double-pole double-throw switch and closes the corresponding acquisition link of the two-to-one analog switch SW3. At this time, the programmable waveform generator (AD9833) emits a sine wave with a certain amplitude and frequency. The main control circuit enters the acquisition mode and performs data analysis on the data acquired by the ADS7830 chip in the second ADC conversion circuit to obtain the frequency and amplitude of the acquired signal. If the calculated signal frequency and amplitude are the same as the set signal frequency and amplitude emitted by the AD9833 chip, the acquisition channel is normal. Otherwise, the acquisition link of the data acquisition unit is faulty, thus achieving the purpose of the data acquisition unit's self-test of the acquisition channel.

[0048] Example 2 like Figure 1 As shown, a fault-detecting intelligent data acquisition device is described. The MCU+FPGA in the core board 2 can be replaced by a CPU processor. For high-frequency data acquisition systems, the main frequency of the main control chip directly determines the sampling frequency of the data acquisition system. High-performance CPUs generally have higher main frequencies and can directly replace MCU+FPGA, thereby reducing the size of the acquisition device and reducing the complexity of development.

[0049] The other structures are the same as in Example 1.

[0050] Example 3 like Figure 1 As shown, a fault-inspection-enabled intelligent data acquisition device is described. The MCU+FPGA in the core board 2 can also be replaced by a GPU processor. Replacing the MCU+FPGA with a GPU allows for the embedding of complex data processing algorithms, enabling edge data processing and display.

[0051] The other structures are the same as in Example 1.

[0052] Example 4 like Figure 1 As shown, a fault-inspection-enabled intelligent data acquisition device is described. The MCU+FPGA in the core board 2 can also be replaced by a programmable logic device. Using a programmable logic device instead of the MCU+FPGA can realize data acquisition and transmission. However, due to the resource limitations of the programmable logic device, complex data processing algorithms cannot be implemented.

[0053] The other structures are the same as in Example 1.

[0054] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. An intelligent data acquisition device with automatic signal adaptation and fault self-diagnosis, characterized in that, It includes a signal processing board (1) and a core board (2). The signal processing board (1) is connected to the sensor (4) through the signal interface board (3). The signal processing board (1) is connected to the core board (2). The core board (2) is connected to the host computer. The signal processing board (1) is equipped with a controllable double-pole double-throw switch, a channel self-test circuit, an IEPE sensor fault detection circuit, and an IEPE signal and current identification circuit. The IEPE signal and current identification circuit is connected in parallel across the sampling resistor RS1 at the front end of the female connector of the aviation connector (5). The IEPE signal and current identification circuit is connected to the first ADC conversion circuit, which is connected to the core board (2) via an I2C bus. The rear end of the female connector of the aviation connector (5) is connected to the controllable double-pole double-throw switch. The controllable double-pole double-throw switch is connected to the current signal link and the IEPE signal link, respectively. Both the current signal link and the IEPE signal link are connected to a two-to-one analog switch. The two-to-one analog switch is connected to a first voltage follower. The first voltage follower... The controllable low-pass filter is connected to the second ADC conversion circuit, which is connected to the core board (2) via an I2C bus. The IEPE signal link is also equipped with a controllable constant current source and a sampling resistor RS2. The sampling resistor RS2 is connected to the controllable constant current source, which is connected to the core board (2) via an I2C bus. The sampling resistor RS2 is connected in parallel with an IEPE sensor fault detection circuit, which is connected to the third ADC conversion circuit. The third ADC conversion circuit is connected to the core board (2) via an I2C bus. One end of the channel self-test circuit is connected to the input end of the controllable double-pole double-throw switch, and the other end of the channel self-test circuit is connected to the core board (2) via an I2C bus.

2. The intelligent data acquisition device with automatic signal adaptation and fault self-diagnosis according to claim 1, characterized in that, The core board (2) communicates with the signal processing board (1) via the I2C bus and is connected to the host computer via Ethernet.

3. The intelligent data acquisition device with automatic signal adaptation and fault self-diagnosis according to claim 2, characterized in that, The core board (2) includes an MCU and an FPGA. The FPGA is connected to the signal processing board (1) via an I2C bus. The FPGA is connected to the MCU. The MCU is connected to the host computer via Ethernet.

4. The intelligent data acquisition device with automatic signal adaptation and fault self-diagnosis according to claim 2, characterized in that, The core board (2) is a CPU processor, GPU processor or programmable logic device.

5. The intelligent data acquisition device with automatic signal adaptation and fault self-diagnosis according to claim 3, characterized in that, The signal interface board (3) includes a flight plug terminal (5) and a simple plug terminal. The flight plug terminal is matched with the sensor (4), and the simple plug terminal is connected to the signal interface board (3). The flight plug terminal (5) is a multi-core terminal that includes at least a power pin (51), a signal pin (52), and a ground pin (53). The power pin (51) and the ground pin (53) are of the same length and the length of the power pin (51) and the ground pin (53) is greater than the length of the signal pin (52).

6. The intelligent data acquisition device with automatic signal adaptation and fault self-diagnosis according to claim 3, characterized in that, The signal interface board (3) is equipped with LED indicator lights, including power indicator lights and network status indicator lights.

7. The intelligent data acquisition device with automatic signal adaptation and fault self-diagnosis according to claim 1, characterized in that, The signal processing board (1) is equipped with an IEPE signal and current signal selection switch circuit. The control terminals of the controllable double-pole double-throw switch and the two-to-one analog switch are connected to the IEPE signal and current signal selection switch circuit. The IEPE signal and current signal selection switch circuit is connected to the core board (2) through the I2C bus.

8. The intelligent data acquisition device with automatic signal adaptation and fault self-diagnosis according to claim 1, characterized in that, The current signal link is connected to one end of the first pull-down resistor, and the other end of the first pull-down resistor is grounded. The first pull-down resistor is used to convert the acquired current signal into a voltage signal. The IEPE signal link is connected to the attenuation circuit after being coupled by capacitor I. One end of the attenuation circuit and one end of the first pull-down resistor are respectively connected to the two input terminals of the two-to-one analog switch.

9. The intelligent data acquisition device with automatic signal adaptation and fault self-diagnosis according to claim 8, characterized in that, The attenuation circuit includes a first resistor and a second resistor. One end of the first resistor is connected to capacitor I, and the other end of the first resistor is connected to one input terminal of a two-to-one analog switch and one end of the second resistor. The other end of the second resistor is grounded. The first and third ADC conversion circuits are both ADS11151D chips, which convert the acquired voltage signal into a digital signal. The second ADC conversion circuit is an ADS7830 chip, which converts the analog signal into a digital signal.

10. The intelligent data acquisition device with automatic signal adaptation and fault self-diagnosis according to claim 1, characterized in that, The controllable low-pass filter is connected to the programmable sampling cutoff circuit, which is connected to the core board (2) via the I2C bus. The programmable sampling cutoff circuit controls the cutoff frequency of the controllable low-pass filter to prevent aliasing interference.

11. The intelligent data acquisition device with automatic signal adaptation and fault self-diagnosis according to any one of claims 7-10, characterized in that, The circuit for detecting IEPE sensor faults, the IEPE signal, and the current recognition circuit all include a current acquisition chip, a second pull-down resistor, and a second voltage follower. The input terminal of the current acquisition chip is connected to the sampling resistor RS1 or RS2, the output terminal of the current acquisition chip is connected to one end of the second pull-down resistor, the other end of the second pull-down resistor is grounded, one end of the second pull-down resistor is connected to the input terminal of the second voltage follower, and the output terminal of the second voltage follower is connected to the input terminal of the first ADC conversion circuit or the third ADC conversion circuit.

12. The intelligent data acquisition device with automatic signal adaptation and fault self-diagnosis according to claim 11, characterized in that, The channel self-test circuit includes a programmable waveform generator. The input terminal of the programmable waveform generator is connected to the core board (2) via an I2C bus, and the output terminal of the programmable waveform generator is connected to a controllable double-pole double-throw circuit. The IEPE signal and current signal selection switch circuit, the third ADC conversion circuit, the second ADC conversion circuit, the first ADC conversion circuit, the programmable waveform generator, and the programmable sampling cutoff circuit are all equipped with multiple channels.

13. The intelligent data acquisition device with automatic signal adaptation and fault self-diagnosis according to any one of claims 7-10 and 12, characterized in that, The method for automatic identification and adaptation of current signals and IEPE signals is as follows: (1) The sensor was already connected before power was applied: The data acquisition unit is powered on and initializes all peripherals. At the same time, it polls and controls the first ADC conversion circuit and the third ADC conversion circuit to turn on the ADC acquisition of sampling resistor RS1 and sampling resistor RS2 in sequence at certain intervals. If the voltage of sampling resistor RS1 is not 0, the sensor connected is a current sensor. At the same time, the core board (2) controls the IEPE signal and current signal selection switch circuit to connect the controllable double-pole double-throw to the current signal link, and controls the two-to-one analog switch to connect the current signal link to the voltage follower. If the voltage on sampling resistor RS1 is 0, the ADC acquisition of sampling resistor RS2 is performed. If the voltage of sampling resistor RS2 is not 0, the sensor connected is an IEPE sensor. Otherwise, the sensor is not connected. (2) After the data acquisition unit is running, insert the sensor: After the data acquisition unit is powered on, the sensor is connected. Since the power supply pin and ground pin of the aviation terminal are longer than the signal pin, when the male aviation terminal is inserted into the female aviation terminal, the power supply pin contacts first. When the IEPE signal and current identification circuit detects that the voltage of the sampling resistor RS1 is not 0, it is a current-type sensor. At the same time, the core board (2) controls the IEPE signal and current signal selection switch circuit to connect the controllable double-pole double-throw to the current signal link, and controls the two-to-one analog switch to connect the current signal link to the voltage follower. When the voltage on the sampling resistor RS1 is 0, the sampling resistor RS2 is then sampled by ADC. If the IEPE sensor fault detection circuit detects that there is voltage across the sampling resistor RS2, the inserted sensor is an IEPE type sensor. At the same time, the controllable double-pole double-throw is connected to the IEPE signal link, and the two-to-one analog switch is controlled to connect the IEPE signal link to the voltage follower. If there is no voltage on both the sampling resistor RS2 and the sampling resistor RS1, the connected sensor is neither a current-type sensor nor an IEPE type sensor.

14. The intelligent data acquisition device with automatic signal adaptation and fault self-diagnosis according to claim 13, characterized in that, The implementation method of the self-test function of the acquisition channel is as follows: After the data acquisition unit is powered on, the core board (2) successfully configures the AD9833 chip of the programmable waveform generator. Then, it connects the self-test channel to the current signal link or the IEPE signal link through the controllable double-pole double-throw, controls the two-to-one analog switch to connect the corresponding acquisition link, and the programmable waveform generator emits a sine wave with a certain amplitude and frequency. The main control circuit enters the acquisition mode and performs data analysis on the data acquired by the second ADC conversion circuit to obtain the frequency and amplitude of the acquired signal. If the calculated signal frequency and amplitude are the same as the set signal frequency and amplitude, the acquisition channel is normal; otherwise, the acquisition link of the data acquisition unit is faulty.

Images