A resource exchange method for relieving internal access conflicts of a ZNS solid state disk

Abstract

The application discloses a resource exchange method for relieving internal access conflict of a zone-based namespace solid state disk (ZNS SSD), which comprises the following steps: 1, monitoring the working condition of flash memory chips; the working condition of each flash memory chip in the SSD is monitored in real time, and the state of each flash memory chip is divided into a working state and an idle state; 2, scheduling I / O requests of access conflict; whenever an I / O request arrives, if the request hits a flash memory chip in the working state, a flash memory chip in the idle state is selected to process the request; 3, writing data in a new address; after resource exchange, data is written in the flash memory chip in the idle state, and address information before and after resource exchange is recorded; 4, mapping table records mapping information; after request processing, the mapping table records mapping information, so that data can be normally accessed when accessed again. Through resource exchange in the ZNS SSD, the access conflict between I / O requests can be effectively reduced; in addition, through scheduling of I / O requests, the utilization rate of the flash memory chip can be further improved, and finally the overall performance of the device is improved.

Description

Technical Field

[0001] This invention relates to the field of computer storage technology, and in particular to a resource exchange method for mitigating internal access conflicts in ZNS solid-state drives. Background Technology

[0002] ZNS is an emerging storage interface that allows hosts to access SSDs via a Zone Block interface. By dividing the SSD's physical address space into logical zones, migrating implicit garbage collection from the device side to explicit garbage collection on the host side, and eliminating random write access, ZNS SSDs significantly reduce device DRAM requirements, solve write amplification problems, minimize over-provisioning (OP) space overhead, and mitigate I / O interference.

[0003] In ZNS SSDs, a Zone is mapped across different flash blocks spanning multiple flash chips to leverage chip-level parallelism. Recently, there has been increasing research on smaller writable capacity Zones. This is because smaller Zones offer advantages that larger Zones lack. For example, smaller Zones have faster zone reclamation efficiency and are more efficient for data migration. Furthermore, smaller Zones have smaller capacities, storing fewer different types of files within a single Zone, which mitigates the impact of space amplification issues to some extent. However, the high parallelism offered by large Zones is unattainable by smaller Zones. Therefore, some researchers have proposed that one way for smaller Zones to catch up with the performance of larger Zones is to increase the number of application processes on the host side, i.e., activating more Zones on the host to attempt to improve the parallelism of smaller Zones. However, because the host's information about the device is ambiguous, the host may simultaneously allocate different requests to conflicting internal resources. For example, two different Zones operating on the same flash chip simultaneously will inevitably lead to resource contention, resulting in longer request processing times, and consequently, underutilization of resources and reduced throughput. To address the aforementioned issues, this invention presents a resource exchange method to mitigate internal access conflicts within the ZNS solid-state drive, thereby improving overall device performance by reducing the time required to resolve access conflicts. Summary of the Invention

[0004] To address the aforementioned problems that existing technologies struggle to solve, this invention provides a resource-swapping method to mitigate internal access conflicts within a ZNS SSD. By swapping resources within the ZNS SSD, write request access conflicts are reduced. Furthermore, by scheduling I / O requests, the utilization rate of flash memory chips is further improved, ultimately enhancing the overall performance of the device.

[0005] The technology employed in this invention includes the following steps:

[0006] Step 1: Monitor the operational status of flash memory chips. Conflict identifiers categorize each flash memory chip queue into different states, enabling targeted scheduling of transactions. Specifically, conflict identifiers set inactive flash memory chips to the idle state and active flash memory chips to the working state. Understanding the current state of each flash memory chip through conflict identifiers prepares for subsequent transaction scheduling.

[0007] Step 2: Schedule conflicting I / O requests. The transaction scheduler can understand the status information of each flash memory chip through the conflict identifier and can schedule conflicting transactions from the same flash memory chip queue to another idle flash memory chip. Through transaction scheduling, the utilization of flash memory chip resources can be improved, access conflict time can be reduced, and ultimately the request processing speed and throughput can be improved.

[0008] Step 3: Write data to the new address. After the flash memory chip resource exchange, write the data to the idle flash memory chip and record the address information before and after the resource exchange.

[0009] Step 4: The mapping table records mapping information. The mapping table stores address information before and after the resource exchange. When accessing data again, the original mapping relationship will not allow correct access. After the resource exchange, a mapping table must be established to store the new mapping relationship. When accessing data after the resource exchange, the mapping table is accessed first to obtain the data's actual physical address, and then addressing access is performed.

[0010] The beneficial effects of this invention are that by exchanging resources within the ZNS SSD, access conflicts between I / O requests can be effectively reduced; furthermore, by scheduling I / O requests, the utilization rate of flash memory chips can be further improved, ultimately enhancing the overall performance of the device. This invention has advantages such as simple strategy implementation, low cost, and ease of implementation, while also possessing good scalability. Attached Figure Description

[0011] The accompanying drawings of this invention are described below;

[0012] Figure 1 This is a diagram showing the overall architecture and implementation principle of the present invention;

[0013] Figure 2 This is a diagram illustrating the specific implementation of the resource exchange strategy.

[0014] Figure 3 This is a flowchart of the resource exchange strategy of the present invention; Detailed Implementation

[0015] The present invention will be further described below with reference to the accompanying drawings and embodiments:

[0016] Figure 1 This is a diagram illustrating the overall architecture and implementation principle of the present invention. The diagram shows the internal structure of the ZNS SSD and the process of processing ZNS SSD commands. First, the PCIe bus transmits commands and data to the ZNS SSD device. Second, the Host Interface Logic (HIL) divides each command into one or more transactions, each based on a flash-page size, and inserts these transactions into a device-level queue. Third, the Zone-based Flash Translation Layer (Zone FTL) parses each transaction by querying Zone mapping information. Finally, the Transaction Scheduling Unit (TSU) inserts the transactions into the corresponding flash memory chips and schedules them as needed. In this invention, the resource exchange strategy reduces access conflict time by utilizing the TSU to schedule transactions in the chip queue.

[0017] Figure 2 This diagram illustrates the specific implementation of the resource exchange strategy. As shown, the arrows in the mapping table point to the Blocks that make up the Zone. First, the conflict identifier identifies the status of each flash memory chip and informs the transaction scheduler. Second, the transaction scheduler selects an empty Block from an idle flash memory and replaces the logical address of this Block with the original Blocks that make up the Zone, which is equivalent to performing a resource exchange process for the Zone. The next step is to write the data that was originally to be written to Block0 to Block5. In this way, transactions in an access conflict state can be processed synchronously. Finally, the new mapping relationship is updated in the mapping table, so that normal access can still be performed when this part of the data is accessed again.

[0018] Figure 3 This is a flowchart of the resource exchange strategy of the present invention. Starting from step 101, the specific steps are as follows:

[0019] In step 102, the conflict identifier divides the flash memory chip state into an active state and an idle state.

[0020] In step 103, whenever an I / O request arrives, it is determined whether an access conflict has occurred based on the current state of the flash memory chip it is accessing.

[0021] In step 104, an access conflict occurs, and the I / O request is scheduled to be processed on an idle flash memory chip.

[0022] In step 105, the request is processed on the reallocated flash memory chip resources, the data is written into the flash memory chip at the new address, and the address information, data size and other information before and after the resource allocation are recorded.

[0023] In step 106, the mapping information before and after resource allocation is recorded in the mapping table to ensure that the data can be accessed normally when the request hits it again.

[0024] In step 107, no access conflict occurred, and the I / O request was processed normally.

[0025] Step 108, End.

[0026] A resource exchange method for mitigating internal access conflicts in a ZNS solid-state drive, characterized by comprising the following steps:

[0027] Step 1: Monitor the operational status of flash memory chips and classify their states into active and idle states. Conflict identifiers differentiate each flash memory chip queue into different states, enabling targeted transaction scheduling. Specifically, conflict identifiers set inactive flash memory chips to the idle state and active flash memory chips to the active state. The conflict identifiers provide information about the current state of each flash memory chip and prepare for subsequent transaction scheduling. Step 2: Schedule conflicting I / O requests. When an I / O request hits an active flash memory chip, an idle flash memory chip is selected to process the request. The transaction scheduler can understand the status information of each flash memory chip through conflict identifiers and can schedule conflicting transactions from the same flash memory chip queue. The data is transferred to another idle flash memory chip. Through transaction scheduling, the utilization of flash memory chip resources can be improved and access conflict time can be reduced, ultimately improving device performance. Step 3: Write data to the new address. After resource exchange, write the data to the flash memory chip after resource exchange and record the address information and data size information before and after resource exchange. Step 4: The mapping table records the mapping information to ensure normal access when accessing data again. The mapping table is used to store the address information before and after resource exchange. When accessing data again, the original mapping relationship cannot be used to access the data correctly. After resource exchange, a mapping table is established to store the new mapping relationship. When accessing data after resource exchange, the mapping table is accessed first to obtain the real physical address of the data, and then the addressing access is performed.

Claims

1. A resource exchange method for mitigating internal access conflicts in a ZNS solid-state drive, characterized in that, Includes the following steps: Step 1: Monitor the working status of flash memory chips and divide the status of each flash memory chip into working state and idle state. Conflict identifiers distinguish each flash memory chip queue into different states, realizing the targeted scheduling process of transactions. Specifically, the conflict identifiers set the state of inactive flash memory chips to idle state and set the state of active flash memory chips to working state. The conflict identifiers are used to understand the current state of each flash memory chip and prepare for subsequent transaction scheduling. Step 2: Schedule conflicting I / O requests. When an I / O request hits a working flash memory chip, an idle flash memory chip is selected to process the request. The transaction scheduler can understand the status information of each flash memory chip through the conflict identifier and can schedule conflicting transactions from the same flash memory chip queue to another idle flash memory chip. Through transaction scheduling, the utilization of flash memory chip resources can be improved and the access conflict time can be reduced, ultimately improving device performance. Step 3: Write data to the new address. After resource swapping, write the data to the flash memory chip after resource swapping and record the address information and data size information before and after resource swapping. Step 4: The mapping table records the mapping information to ensure that the data can be accessed normally when accessed again. The mapping table is used to store the address information before and after the resource exchange. When accessing the data again, the original mapping relationship cannot be used to access the data correctly. After the resource exchange, a mapping table is established to store the new mapping relationship. When accessing the data after the resource exchange, the mapping table is accessed first to obtain the real physical address of the data, and then the addressing access is performed.

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