A bridge chip for bidirectional conversion between SATA interface and network interface

Abstract

The application discloses a bridge chip for bidirectional conversion between a SATA interface and a network interface, wherein data in one or more storage medium devices is simultaneously transmitted through the SATA interface, the data from the SATA interface is subjected to decoding operation through a SATA protocol encoding and decoding module; a data storage path is output according to a preset address mapping table through a data processing module, and a data address list is acquired through a multiplexing encoding and decoding module; the output of the multiplexing encoding and decoding module is subjected to encoding operation through a network port protocol encoding and decoding module and is output to a host device through a network interface; in addition, the SATA protocol encoding and decoding module can perform bidirectional encoding and decoding, the multiplexing encoding and decoding module can simultaneously establish contact with multiple SATA protocol encoding and decoding modules through the data processing module, and the bridge chip can complete the process of data transmission from the host device to the storage medium device through data reverse transmission. The application has a simple data transmission link and solves the problems of long-distance high-speed data transmission and the like.

Description

Technical Field

[0001] This invention relates to the field of chip circuit technology, and in particular to a bridge chip for bidirectional conversion between SATA interface and network interface. Background Technology

[0002] Among current big data storage media devices, the SATA interface is one of the most common interfaces, and the SATA protocol is also one of the mainstream high-speed storage interface protocols. SATA 3.0's actual read / write speed can reach 6Gb / s. With the rapid development of information technology, big data storage and processing have become an indispensable core element of contemporary society. Big data storage and processing mainly include: multi-point sharing and collaboration of big data, distributed storage of big data, multi-point backup of big data, and scalability of big data storage. Network technology, as the foundational technology for information transmission, provides crucial support for big data storage and processing: network technology can distribute and back up data across multiple nodes, improving storage performance and ensuring reliability; network technology can enable real-time sharing and collaborative processing of data among multiple nodes, improving efficiency; network technology can protect data security by providing data encryption and access control functions; network technology can expand storage nodes and storage devices according to demand, achieving scalability; and network technology can achieve real-time storage and sharing of data across different locations through network transmission and access.

[0003] Based on the actual read and write speeds of the SATA interface, to obtain larger volumes of data more quickly, it is necessary to perform read and write operations on multiple SATA interface storage media devices simultaneously. This necessitates an interface technology with higher data transfer speeds. Currently, most solutions address this issue using SATA-to-SAS or SATA-to-PCIe interfaces. While the SAS interface can achieve data transfer speeds of up to 12Gb / s, SAS cables use copper, which severely limits its transmission distance, typically capped at 10 meters. Furthermore, the thick and stiff cables are difficult to lay out, thus limiting the application prospects of SAS technology. As for PCIe interface technology, the current PCIe 4.0x1 can achieve transfer rates of up to 16Gb / s. Although this technology offers faster data transfer speeds, factors such as high-speed signal attenuation, crosstalk, and jitter prevent long-distance data transfer. Additionally, the higher requirements of PCIe technology significantly increase costs.

[0004] With the rapid development of network technology, network transmission speeds have reached a standard of 40Gb / s, and the maximum effective transmission distance of a network cable is 100 meters. Therefore, network technology meets these technical requirements. In systems using SATA interface storage media devices for high-speed, long-distance big data storage and processing, a bridge chip that can bidirectionally convert between SATA and network interfaces is needed. Summary of the Invention

[0005] This invention provides a bridge chip for bidirectional conversion between SATA and network interfaces to overcome the aforementioned technical problems.

[0006] To achieve the above objectives, the technical solution of the present invention is as follows:

[0007] A bridge chip for bidirectional conversion between SATA interface and network interface includes: a multiplexing codec module, a network protocol codec module, a network interface and multiple SATA interfaces, a SATA protocol codec module, and a data processing module;

[0008] Each of the SATA protocol codec modules is connected to a corresponding SATA interface, and the SATA interface is used to transmit data from the storage media device to the SATA protocol codec module;

[0009] The SATA protocol encoding / decoding module is used to decode data from the SATA interface; or to encode data from the data processing module.

[0010] The data processing module is connected to a multiplexing codec module and a SATA protocol codec module at both ends, respectively.

[0011] Furthermore, the data processing module is used to obtain the storage path of the output data of each SATA protocol encoding and decoding module according to the preset address mapping table;

[0012] Alternatively, the data from the multiplexed codec module can be transmitted to the SATA protocol codec module for encoding.

[0013] The multiplexing codec module is used to obtain a data address list based on the output data of each data processing module;

[0014] Alternatively, the output data of the network port protocol encoding / decoding module can be allocated to the corresponding data processing module according to a preset data address list;

[0015] The network port protocol encoding and decoding module is connected to the multiplexing encoding and decoding module and the network interface, respectively.

[0016] The network interface protocol encoding / decoding module is used to encode the output of the multiplexing encoding / decoding module and output it to the host device, or to decode the host device data obtained from the network interface and output it to the multiplexing encoding / decoding module.

[0017] Furthermore, it also includes a system control module;

[0018] The system control module is communicatively connected to the multiplexing codec module, the network port protocol codec module, the network interface, the SATA interface, the SATA protocol codec module, and the data processing module, respectively.

[0019] Furthermore, the system control module is used to control the various modules inside the bridge chip by executing instructions;

[0020] The execution instructions include, but are not limited to, interface mounting instructions, storage medium device power-on instructions, send request instructions, data read / write instructions, data encryption instructions, and module initialization instructions.

[0021] Furthermore, the data processing module is used to perform read and write operations on data from the SATA protocol codec module or the multiplexing codec module;

[0022] During the data writing operation, the system control module sends an execution instruction to the data processing module. The data processing module encrypts the decoded frame data received from the SATA protocol encoding and decoding module, and adds and caches the address of the encrypted decoded frame data based on a preset address mapping table.

[0023] The address mapping table is a storage address sequence table obtained by numbering and sorting each SATA protocol codec module;

[0024] During data reading operations, the data cached by the data processing module is sent to the multiplexing codec module according to the execution instructions of the system control module;

[0025] or

[0026] During the data writing operation, the system control module sends an execution instruction to the data processing module. The data processing module encrypts the host device data received by the network interface protocol encoding and decoding module after decoding, and adds and caches the address of the encrypted decoded frame data based on a preset data address list.

[0027] During data read operations, according to the execution instructions of the system control module, each data processing module retrieves the corresponding cached data in the multiplexing codec module and sends it to the storage medium device through the SATA interface connected to each data processing module.

[0028] Furthermore, the method by which the multiplexing codec module obtains the data address list based on the output data of each data processing module is as follows:

[0029] Each of the aforementioned data processing modules is assigned a number;

[0030] After the data processing module, which has processed the corresponding number, completes the address writing and caching, it sends a frame data end notification to the multiplexing codec module.

[0031] The multiplexing codec module, based on the frame data end notification received from the corresponding numbered data processing module, stores and sorts the frame data in chronological order to obtain a data address list.

[0032] Furthermore, it also includes I2C and JTAG interfaces;

[0033] The system control module accesses the bridge chip configuration space and initializes the module via the I2C interface;

[0034] The system control module uses the JTAG interface to perform software debugging of the bridging chip and print debugging information.

[0035] Furthermore, the system control module includes an arbitration module;

[0036] When the system control module sends execution instructions to each module inside the bridging chip, each module inside the bridging chip receives the instructions and sends a response instruction back to the arbitration module.

[0037] The arbitration module is used to send an interrupt request command to the host device through the network interface when the response instructions from the modules inside the bridging chip are different from the received execution instructions.

[0038] Beneficial Effects: This invention provides a bridge chip for bidirectional conversion between SATA and network interfaces. By simultaneously transmitting data from one or more storage media devices through the SATA interface, the SATA protocol codec module decodes the data from the SATA interface. The data processing module outputs the data storage path according to a preset address mapping table and uses a multiplexing codec module to obtain the data address list. The network protocol codec module encodes the output of the multiplexing codec module and outputs it to the host device through the network interface. Furthermore, the SATA protocol codec module can perform bidirectional encoding and decoding, and the multiplexing codec module can simultaneously establish connections with multiple SATA protocol codec modules through the data processing module. The bridge chip can complete the data transmission process from the host device to the storage media device through reverse data transmission. This invention provides a simple data transmission link and effectively solves the problems of long-distance high-speed data transmission. Attached Figure Description

[0039] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0040] Figure 1 This is a schematic diagram of a bridge chip structure for bidirectional conversion between SATA interface and network interface according to the present invention. Detailed Implementation

[0041] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0042] This embodiment provides a bridge chip for bidirectional conversion between SATA and network interfaces, such as... Figure 1 As shown, it includes: a multiplexing codec module, a network port protocol codec module, a network interface and multiple SATA interfaces, a SATA protocol codec module, and a data processing module;

[0043] Each of the SATA protocol codec modules is connected to a corresponding SATA interface, and the SATA interface is used to transmit data from the storage media device to the SATA protocol codec module;

[0044] The SATA protocol encoding / decoding module is used to decode data from the SATA interface; or to encode data from the data processing module.

[0045] The data processing module is connected to a multiplexing codec module and a SATA protocol codec module at both ends, respectively.

[0046] Furthermore, the data processing module is used to obtain the storage path of the output data of each SATA protocol encoding and decoding module according to the preset address mapping table;

[0047] Alternatively, the data from the multiplexed codec module can be transmitted to the SATA protocol codec module for encoding.

[0048] Specifically, an address mapping table is installed within the bridge chip, defining the address of each SATA interface, meaning each SATA interface has a unique address. In the data transmission link, each SATA interface corresponds one-to-one with the SATA protocol encoding / decoding module and data processing module it is connected to. During system initialization, the system control module automatically assigns the addresses in the address mapping table to each data processing module, ensuring that each data transmission link has a unique address.

[0049] The multiplexing codec module is used to obtain a data address list based on the output data of each data processing module;

[0050] Alternatively, the output data of the network port protocol encoding / decoding module can be allocated to the corresponding data processing module according to a preset data address list;

[0051] The network port protocol encoding and decoding module is connected to the multiplexing encoding and decoding module and the network interface, respectively.

[0052] The network interface protocol encoding / decoding module is used to encode the output of the multiplexing encoding / decoding module and output it to the host device, or to decode the host device data obtained from the network interface and output it to the multiplexing encoding / decoding module.

[0053] In this embodiment, data from one or more storage media devices is simultaneously transmitted through a SATA interface. The SATA protocol codec module decodes the data from the SATA interface. A data processing module outputs the data storage path according to a preset address mapping table, and a multiplexing codec module obtains the data address list. A network protocol codec module encodes the output of the multiplexing codec module and outputs it to the host device via a network interface. Furthermore, the SATA protocol codec module can perform bidirectional encoding and decoding. The multiplexing codec module can establish connections with multiple SATA protocol codec modules simultaneously through the data processing module. The bridging chip can complete the data transmission process from the host device to the storage media device through reverse data transmission. This invention provides a simple data transmission link and effectively solves the problems of long-distance high-speed data transmission.

[0054] In a specific embodiment, a system control module is also included;

[0055] The system control module is communicatively connected to the multiplexing codec module, the network port protocol codec module, the network interface, the SATA interface, the SATA protocol codec module, and the data processing module, respectively.

[0056] Furthermore, the system control module is used to control the various modules inside the bridge chip by executing instructions;

[0057] The execution instructions include, but are not limited to, interface mounting instructions, storage medium device power-on instructions, send request instructions, data read / write instructions, data encryption instructions, and module initialization instructions.

[0058] Specifically, the main function of the system control module is to control the normal operation of each functional module inside the bridge chip, including: judging the SATA interface 1 mounting status, negotiating the power-on sequence of storage media devices and data transmission speed, initializing each functional module and internal register inside the chip, controlling the operation of each functional module inside the chip and handling abnormal interrupts, receiving and executing external instructions, and sending request instructions.

[0059] In another specific embodiment, the data processing module is used to perform read and write operations on data from the SATA protocol codec module or the multiplexing codec module;

[0060] The data processing module performs read and write operations on data from the SATA protocol encoding / decoding module as follows:

[0061] During the data writing operation, the system control module sends an execution instruction to the data processing module. The data processing module encrypts the decoded frame data received from the SATA protocol encoding and decoding module, and adds and caches the address of the encrypted decoded frame data based on a preset address mapping table.

[0062] The address mapping table is a storage address sequence table obtained by numbering and sorting each SATA protocol codec module;

[0063] During data reading operations, the data cached by the data processing module is sent to the multiplexing codec module according to the execution instructions of the system control module;

[0064] or

[0065] The data processing module performs read and write operations on data from the multiplexing codec module as follows:

[0066] During the data writing operation, the system control module sends an execution instruction to the data processing module. The data processing module will encrypt the host device data received by the network interface protocol encoding and decoding module after decoding, and add and cache the address of the encrypted decoded frame data based on the preset data address list.

[0067] During data read operations, according to the execution instructions of the system control module, each data processing module retrieves the corresponding cached data in the multiplexing codec module and sends it to the storage medium device through the SATA interface connected to each data processing module.

[0068] The network interface protocol encoding / decoding module connects to only one network interface. Its main functions are decoding data transmitted from the network interface and encoding data sent from the multiplexing encoding / decoding module. In addition to encoding and decoding data, the module also decodes commands sent from the host device and sends them to the system control module to control the corresponding actions of the modules within the bridging chip. It can also encode status information collected by the system control module from the modules within the bridging chip and send it to the host device for processing. Furthermore, the module also identifies the permissions of the command sender and encrypts or decrypts external commands and incoming / outgoing data.

[0069] The data processing module primarily adds addresses to the data so that the host device can determine which storage medium the data was read from. It also removes addresses from the data, restoring it to frame data usable by the SATA protocol encoding / decoding module. When reading data from a storage medium, the data is transmitted via the SATA interface to the SATA protocol encoding / decoding module for decoding. The corresponding frame data is retrieved, added with an address by the data processing module, and then transmitted to the multiplexing encoding / decoding module for data sorting and integration. Conversely, when writing data to a storage medium, the SATA protocol encoding / decoding module performs the reverse operation, converting the address-removed frame data from the data processing module into SATA protocol data, which is then written to the corresponding storage medium via the SATA interface.

[0070] In a specific embodiment, the method by which the multiplexing codec module obtains the data address list based on the output data of each data processing module is as follows:

[0071] Each of the aforementioned data processing modules is assigned a number;

[0072] After the data processing module, which has processed the corresponding number, completes the address writing and caching, it will send a frame data end notification to the multiplexing codec module.

[0073] The multiplexing codec module, based on the frame data end notification received from the corresponding numbered data processing module, stores and sorts the frame data in chronological order to obtain a data address list.

[0074] Specifically, the multiplexing codec module can simultaneously establish connections with one or more data processing modules, and complete the reassembly or allocation of frame data based on a set address list. When reading data from the storage medium device, the data processing module adds addresses to the frame data and then sends an end notification to the multiplexing codec module. The multiplexing codec module, according to the chronological order of the end notifications sent by each data processing module, rearranges the data sent by the data processing modules at each address, adds checksum and other information, and then sends it to the network interface protocol codec module for processing.

[0075] In specific embodiments, it also includes an I2C interface and a JTAG interface;

[0076] The system control module accesses the bridge chip configuration space and initializes the module via the I2C interface;

[0077] The system control module uses the JTAG interface to perform software debugging of the bridging chip and print debugging information.

[0078] In a specific embodiment, the system control module includes an arbitration module;

[0079] When the system control module sends execution instructions to each module inside the bridging chip, each module inside the bridging chip receives the instructions and sends a response instruction back to the arbitration module.

[0080] The arbitration module is used to send an interrupt request command to the host device through the network interface when the response instructions from the modules inside the bridging chip are different from the received execution instructions.

[0081] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A bridge chip for bidirectional conversion between SATA interface and network interface, characterized in that, include: Multiplexing codec module, network port protocol codec module, network interface and multiple SATA interfaces, SATA protocol codec module and data processing module; The data processing module is used to perform read and write operations on data from the SATA protocol encoding / decoding module or the multiplexing encoding / decoding module. During the data writing operation, the system control module sends an execution instruction to the data processing module. The data processing module encrypts the decoded frame data received from the SATA protocol encoding and decoding module, and adds and caches the address of the encrypted decoded frame data based on a preset address mapping table. The address mapping table is a storage address sequence table obtained by numbering and sorting each SATA protocol codec module; During data reading operations, the data cached by the data processing module is sent to the multiplexing codec module according to the execution instructions of the system control module; or During the data writing operation, the system control module sends an execution instruction to the data processing module. The data processing module encrypts the decoded host device data received by the network port protocol encoding and decoding module, and adds and caches the address of the encrypted decoded frame data based on a preset data address list. During data read operations, according to the execution instructions of the system control module, each of the data processing modules retrieves the corresponding cached data in the multiplexing codec module and sends it to the storage medium device through the SATA interface connected to each data processing module. Each of the SATA protocol codec modules is connected to a corresponding SATA interface, and the SATA interface is used to transmit data from the storage media device to the SATA protocol codec module; The SATA protocol encoding / decoding module is used to decode data from the SATA interface; or to encode data from the data processing module. The data processing module is connected to a multiplexing codec module and a SATA protocol codec module at both ends, respectively. Furthermore, the data processing module is used to obtain the storage path of the output data of each SATA protocol encoding and decoding module according to the preset address mapping table; Alternatively, the data from the multiplexed codec module can be transmitted to the SATA protocol codec module for encoding. The multiplexing codec module is used to obtain a data address list based on the output data of each data processing module; Alternatively, the output data of the network port protocol encoding / decoding module can be allocated to the corresponding data processing module according to a preset data address list; The network port protocol encoding and decoding module is connected to the multiplexing encoding and decoding module and the network interface, respectively. The network interface protocol encoding / decoding module is used to encode the output of the multiplexing encoding / decoding module and output it to the host device, or to decode the host device data obtained from the network interface and output it to the multiplexing encoding / decoding module.

2. The bridge chip for bidirectional conversion between SATA interface and network interface according to claim 1, characterized in that, It also includes a system control module; The system control module is communicatively connected to the multiplexing codec module, the network port protocol codec module, the network interface, the SATA interface, the SATA protocol codec module, and the data processing module, respectively. Furthermore, the system control module is used to control the various modules inside the bridge chip by executing instructions; The execution instructions include, but are not limited to, interface mounting instructions, storage medium device power-on instructions, send request instructions, data read / write instructions, data encryption instructions, and module initialization instructions.

3. A bridge chip for bidirectional conversion between SATA interface and network interface according to claim 2, characterized in that, The method by which the multiplexing codec module obtains the data address list based on the output data of each data processing module is as follows: Each of the aforementioned data processing modules is assigned a number; After the data processing module, which has processed the corresponding number, completes the address writing and caching, it sends a frame data end notification to the multiplexing codec module. The multiplexing codec module, based on the frame data end notification received from the corresponding numbered data processing module, stores and sorts the frame data in chronological order to obtain a data address list.

4. A bridge chip for bidirectional conversion between SATA interface and network interface according to claim 3, characterized in that, It also includes I2C and JTAG interfaces; The system control module accesses the bridge chip configuration space and initializes the module via the I2C interface; The system control module uses the JTAG interface to perform software debugging of the bridging chip and print debugging information.

5. A bridge chip for bidirectional conversion between SATA interface and network interface according to claim 4, characterized in that, The system control module includes an arbitration module; When the system control module sends execution instructions to each module inside the bridging chip, each module inside the bridging chip receives the instructions and sends a response instruction back to the arbitration module. The arbitration module is used to send an interrupt request command to the host device through the network interface when the response instructions from the modules inside the bridging chip are different from the received execution instructions.

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