A kernel code protection method, device, apparatus and storage medium

Abstract

The application discloses a kind of kernel code protection method, device, equipment and storage medium.The present application is by increasing code read protection module in MCU, read protection security field is set in code read protection module;Receive the read protection security field change signal set by outside, wherein, read protection security field change signal includes read protection opening signal or read protection closing signal;Control code read protection module to read protection security field;According to the value of protection security field, judge read protection mode is in opening state or closed state;If read protection mode is in opening state, illegal read-write operation of FLASH and SRAM in debugging mode will be judged as discard by code read protection module;If change read protection mode is in closed state, control code read protection module will automatically trigger FLASH erase.A kind of kernel code protection method of the present application can realize the effective protection of program code stored in FLASH, and reliability is high.

Description

Technical Field

[0001] This invention relates to the field of MCU chip program code encryption and protection technology, and in particular to a kernel code protection method, apparatus, device and storage medium. Background Technology

[0002] In the field of MCU applications, program code runs directly in FLASH memory. In order to prevent the program code from being read illegally and modified, special code encryption methods are needed in MCU design to prevent the program code from being stolen, so as to protect the program code.

[0003] RISC-V is an open-source CPU instruction set architecture. MCU chips based on the RISC-V architecture use the international standard JTAG interface and the open-source RISC-V debugging protocol for debugging. Theoretically, the program code of any RISC-V MCU chip can be completely read using the standard RISC-V debugging protocol. This is a significant disadvantage for applications developed using RISC-V architecture MCU chips, meaning that after the product is developed and released to the market, others can easily read and copy the software program code. Therefore, special protection mechanisms need to be implemented in the MCU design to prevent the program code from being easily read.

[0004] In existing technologies, the most common MCU code protection solutions in the industry include the following: 1) The protection method for a certain domestic 32-bit RISC-V MCU is to use a manufacturer-defined PC-side host computer tool to set a security option word to prevent the flash code from being read. The recovery method is to use the PC-side tool in conjunction with the MCU's built-in BOOT (bootloader) to erase the security word through other interfaces, and then erase the FLASH.

[0005] The disadvantages of this method are twofold: firstly, it requires the use of manufacturer-defined PC-based host computer tools, which are not convenient to use; secondly, it does not protect SRAM read / write operations in debug mode, making it unable to prevent malicious code from being launched from SRAM. 2) A certain foreign 32-bit ARM MCU uses a protection method that sets security option words with several levels: level 0 provides no protection; level 1 prohibits reading FLASH and RAM; and level 2 prohibits the JTAG / SWD interface. Level 1 can be restored to the programming state, while level 2 is irreversible and cannot be reprogrammed via the JTAG / SWD interface. The disadvantages of this method are twofold: firstly, while disabling JTAG on the MCU prevents reading FLASH and SRAM in debug mode, it prevents reprogramming, hindering product development and upgrades. Secondly, the program can be reprogrammed by embedding a BOOT program in the MCU, but the BOOT program requires additional memory space. 3) Some MCU manufacturers generate a 96-bit or 128-bit globally unique UID during production. Before the program code runs, it reads the chip's UID and performs encryption and decryption operations using a confidential key. The program can only run normally if the operation result is correct; otherwise, it will fail. The goal is that even if the program code is illegally read, the encryption and decryption operations will fail because the key cannot be obtained, thus preventing the program from running normally. The drawbacks of this method are twofold: firstly, after reading the complete program code, disassembly analysis can reveal the key points in the code that determine the encryption / decryption result jump; deleting these points and then running the program again will complete the cracking process; secondly, the generation and management of the unique ID increases complexity and cost during the production stage, and a private key must be maintained. Furthermore, if the key is lost, the code protection will also fail.

[0006] Therefore, how to reliably and efficiently encrypt MCU chip program code has become an urgent problem for technicians in this field. Summary of the Invention

[0007] To address the above-mentioned deficiencies, this invention provides a kernel code protection method, apparatus, device, and storage medium to solve the problems existing in the prior art.

[0008] To address the aforementioned technical problems, embodiments of the present invention provide a kernel code protection method, the method comprising: Add a code read protection module inside the MCU, and set a read protection security field within the code read protection module; Receive an externally configured read protection security field change signal, wherein the read protection security field change signal includes a read protection enable signal or a read protection disable signal; The code read protection module is controlled to read the protection security field; The read protection mode is controlled to be either enabled or disabled based on the value of the security field. If the read protection mode is enabled, illegal read and write operations on FLASH and SRAM in debug mode will be discarded by the code read protection module. If the read protection mode is turned off, the code read protection module will automatically trigger FLASH erasure.

[0009] Preferably, controlling the read protection mode to be on or off based on the value of the security field includes: The code read protection module is positioned between the debug module and the FMC (flash memory controller); Upon reset release, the read protection security field is loaded from the NVR; Compare the read protection security field with the preset read protection value; If the read protection security field is the same as the preset read protection value; Then the read protection state will be enabled, and the MCU will be controlled to enter the read protection mode.

[0010] Preferably, the kernel code protection method further includes: If the read protection mode is enabled; In debug mode, any illegal read / write operations on FLASH and SRAM will be discarded by the code read protection module. Access to other addresses within the MCU can be transmitted normally.

[0011] Preferably, controlling the read protection mode to be on or off based on the value of the security field includes: Enable the read protection security field in the NVR via the JTAG interface or user code; The control takes effect after the MCU is reset, and the NVR security field is automatically loaded into the code read protection module; Enable read protection and control the MCU to enter read protection mode.

[0012] Preferably, controlling the read protection mode to be on or off based on the value of the security field further includes: The read protection security field in the NVR is set to an unprotected state via the JTAG interface and the RISC-V debugging protocol, which means the read protection security field is made invalid. The code read protection module controls the erasure of the FLASH memory. After confirming that the erase is complete, erase the read protection security field in the NVR to an invalid value, and then disable the read protection status in the code read protection module.

[0013] Preferably, the kernel code protection method further includes: When read protection mode is enabled, programming operations are performed on the FLASH.

[0014] Preferably, when the read protection mode is enabled, the programming operation on the FLASH includes: The FLASH was erased using the JTAG interface and the RISC-V debugging protocol. If the code read protection module determines that the instruction is to erase FLASH, it directly transmits the command to FMC to erase the FLASH. After the erasure is completed normally, the code read protection module will turn off the read protection status. If the MCU is not reset, read / write operations are performed on the FLASH / SRAM in debug mode; The code read protection module controls all read and write operations to be transparently transmitted to the FMC; After the operation is completed, the control reset MCU will re-enter the read protection state.

[0015] To address the aforementioned technical problems, embodiments of the present invention provide an automatic splicing control device for video walls, the device comprising: The field addition module is used to add a code read protection module inside the MCU, and to set a read protection security field within the code read protection module; The receiving module is used to receive externally set read protection security field change signals, wherein the read protection security field change signals include read protection enable signals or read protection disable signals; The read value module is used to control the code read protection module to read the protection security field; The switch control module is used to control the read protection mode to be in an on or off state based on the value of the protection safety field; The discard module is used to discard any illegal read / write operations on FLASH and SRAM in debug mode if the read protection mode is enabled. An automatic triggering module is used to control the code read protection module to automatically trigger FLASH erasure if the read protection mode is changed to the off state.

[0016] To address the aforementioned technical problems, this invention provides an automatic splicing control device for video walls, comprising: at least one processor, at least one memory, and computer program instructions stored in the memory, wherein when the computer program instructions are executed by the processor, the method described in the first aspect of the above embodiments is implemented.

[0017] To address the aforementioned technical problems, embodiments of the present invention provide a storage medium storing computer program instructions, which, when executed by a processor, implement the method of the first aspect described above.

[0018] In summary, the embodiments of the present invention provide a kernel code protection method, apparatus, device, and storage medium. The present invention adds a code read protection module inside the MCU, sets a read protection security field within the code read protection module; receives an externally set read protection security field change signal, wherein the read protection security field change signal includes a read protection enable signal or a read protection disable signal; controls the code read protection module to read the security field; determines whether the read protection mode is enabled or disabled based on the value of the security field; if the read protection mode is enabled, illegal read / write operations on FLASH and SRAM in debug mode will be discarded by the code read protection module; if the read protection mode is disabled, the code read protection module will automatically trigger FLASH erasure. Therefore, the kernel code protection method of the present invention can effectively protect the program code stored in FLASH with high reliability. Attached Figure Description

[0019] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments of the present invention will be briefly introduced below. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is a flowchart of a kernel code protection method according to an embodiment of the present invention.

[0021] Figure 2 This is a schematic diagram illustrating the working principle of the code read protection module in an embodiment of the present invention.

[0022] Figure 3 This is a schematic diagram of the code read protection module in an embodiment of the present invention.

[0023] Figure 4 This is a flowchart illustrating a method for controlling the read protection mode to be in an enabled or disabled state based on the value of the security field in an embodiment of the present invention.

[0024] Figure 5 This is a flowchart of the read protection opening operation process according to an embodiment of the present invention.

[0025] Figure 6 This is a flowchart of the read protection shutdown operation process according to an embodiment of the present invention.

[0026] Figure 7 This is a schematic diagram of the process of programming FLASH without disabling read protection according to an embodiment of the present invention.

[0027] Figure 8 This is a schematic diagram of the automatic splicing control device for splicing screens according to an embodiment of the present invention.

[0028] Figure 9 This is a schematic diagram of the structure of the automatic splicing control device for splicing screens according to an embodiment of the present invention. Detailed Implementation

[0029] The features and exemplary embodiments of various aspects of the present invention will now be described in detail. To make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only configured to explain the present invention and are not configured to limit the present invention. For those skilled in the art, the present invention can be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present invention by illustrating examples of the invention.

[0030] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes said element.

[0031] Please see Figure 1 , Figure 1 This application provides a kernel code protection method, which includes the following steps: S1. Add a code read protection module inside the MCU, and set a read protection security field within the code read protection module; S2. Receive the read protection security field change signal set externally, wherein the read protection security field change signal includes a read protection enable signal or a read protection disable signal; S3, the control code read protection module reads the protection security field; S4. Control the read protection mode to be on or off based on the value of the security protection field; S5. If the read protection mode is enabled, illegal read and write operations on FLASH and SRAM in debug mode will be discarded by the code read protection module. S6. If the read protection mode is off, the control code read protection module will automatically trigger FLASH erasure.

[0032] Specifically, in this embodiment, this application presents a code protection scheme for an MCU based on a RISC-V architecture. A code read protection module is added inside the MCU. A read protection security field is set in the code read protection module, allowing read protection to be enabled via the JTAG interface or through MCU software. After read protection is enabled, the MCU chip is reset once. The code read protection module reads the protection field and determines whether read protection mode is enabled or disabled based on the value of the protection field, before releasing the CPU's reset execution program code.

[0033] Specifically, when read protection mode is enabled, illegal read and write operations on FLASH and SRAM in debug mode will be discarded by the read protection circuit, thereby protecting the program code stored in FLASH.

[0034] Specifically, when read protection mode is off, the read protection security field address can be directly written through the standard JTAG interface and RISC-V debug protocol without the need for manufacturer-defined PC tools and interface protocols. Once read protection is set to off, the read protection circuit will automatically trigger a FLASH erase, thereby protecting the program code stored in the FLASH.

[0035] Please see Figure 2 , Figure 2 A schematic diagram illustrating the working principle of a code read protection module provided in this application.

[0036] Specifically, the security field of the code read protection module is placed in non-volatile memory, such as NVR (non-volatile register sectors). The read / write address and read protection value of the security field are open to the user. The security field can be set through MCU software or accessed and set in debug mode.

[0037] Specifically, each time the MCU is reset, the code read protection module first reads the read protection security field from the non-volatile memory, determines the current read protection status (enabled or disabled) based on the value of the read protection security field, and then releases the MCU's CPU reset to run the user program code. When the chip receives a debug command, it determines whether to execute or discard it based on the operation address of the debug command.

[0038] In summary, this application provides a kernel code protection method. This solution eliminates the need for vendor-defined PC-based host computer tools; instead, it utilizes tools supporting RISC-V standard debugging, such as the open-source on-chip debugger OpenOn-Chip Debugger (OpenOCD), to enable and disable the read protection security field of the code protection circuit, thus ensuring compatibility with the RISC-V standard debugging process. Therefore, this kernel code protection method effectively protects program code stored in FLASH memory with high reliability.

[0039] Based on the above embodiments: Please see Figure 3 , Figure 3 This application provides a schematic diagram of the architecture of a code read protection module.

[0040] Please see Figure 4 , Figure 4 The flowchart of a method for controlling the read protection mode to be in an on or off state based on the value of a protected security field provided in this application is shown.

[0041] The read protection mode is controlled to be on or off based on the value of the security field, including: S41. Set the code read protection module between the debug module and the FMC (flash memory controller); S42. Upon reset release, load the read protection security field from the NVR; S43. Compare the read protection security field with the preset read protection value; S44. If the read protection security field is the same as the preset read protection value; S45 will enable the read protection state and control the MCU to enter the read protection mode.

[0042] Specifically, in this embodiment, the code read protection module is located between the debug module and the FMC (flash memory controller). Upon reset and release, the read protection security field loaded from the NVR is compared with the preset read protection value. If they are the same, the read protection state is enabled, and the MCU enters read protection mode.

[0043] Specifically, when the RISC-V MCU is in debug mode, the address comparator inside the code read protection module determines whether read / write operations issued by the debug module should be passed through or discarded, depending on whether read protection is enabled or disabled. When a command to disable read protection is received, the FLASH memory is automatically erased first, then the NVR security field is erased, and finally read protection is disabled. When a command to erase FLASH is received, read protection is directly disabled without erasing the NVR security field. Without resetting, subsequent read / write operations issued by the debug module are passed through to the FMC.

[0044] In a preferred embodiment, the method further includes: If read protection mode is enabled; In debug mode, any illegal read or write operations on FLASH and SRAM will be discarded by the code read protection module; Access to other addresses within the MCU can be transmitted normally.

[0045] Specifically, when read protection mode is enabled, illegal read and write operations on FLASH and SRAM in debug mode will be discarded by the read protection circuit, while access to other addresses in the MCU can be passed through normally, thereby achieving the purpose of protecting the program code stored in FLASH.

[0046] Please see Figure 5 , Figure 5 A flowchart of a read protection unlocking operation procedure provided in this application.

[0047] As a preferred embodiment, controlling the read protection mode to be on or off based on the value of the security field includes: Enable the read protection security field in the NVR via the JTAG interface or user code; The control takes effect after the MCU is reset, and the NVR security field will be automatically loaded into the code read protection module. Enable read protection and control the MCU to enter read protection mode.

[0048] Specifically, in this embodiment, the read protection security field in the NVR is enabled via the JTAG interface or user code. This setting takes effect after the MCU is reset. The NVR security field is automatically loaded into the code read protection module, which then sets the read protection status, and the MCU enters read protection mode. When a JTAG debug command is received in debug mode, the code read protection module first uses an address comparator to determine the address. If it is a FLASH / SRAM address, the operation is discarded, and the read data is returned as all FF. If it is another non-FLASH / SRAM address, the read / write operation command is passed through and executed normally.

[0049] Please see Figure 6 , Figure 6 A flowchart of a read protection shutdown operation procedure provided in this application.

[0050] Specifically, in this embodiment, the read protection security field in the NVR is set to an unprotected state via the JTAG interface and the RISC-V debug protocol, meaning the read protection security field is invalid. The security field read / write control module in the code read protection module first erases the FLASH, confirms the erasure is complete, then erases the read protection security field in the NVR to an invalid value, and finally disables the read protection state in the code read protection module. It can be understood that this operational sequence ensures that the FLASH content is erased before the read protection security field is erased. After the MCU is reset, the read protection state is disabled, and subsequent normal read / write operations on the FLASH / SRAM can be performed through debug mode.

[0051] As a preferred embodiment, controlling the read protection mode to be on or off based on the value of the security field further includes: The read protection security field in the NVR is set to an unprotected state via the JTAG interface and the RISC-V debug protocol, which means that the read protection security field is disabled. The FLASH memory is erased in the control code read protection module; After confirming that the erase is complete, erase the read protection security field in the NVR to an invalid value, and then disable the read protection status in the code read protection module.

[0052] As a preferred embodiment, a kernel code protection method further includes: When read protection mode is enabled, programming operations are performed on the FLASH memory.

[0053] Please see Figure 7 , Figure 7 This application provides a flowchart illustrating a process for programming FLASH without disabling read protection.

[0054] In a preferred embodiment, when read protection mode is enabled, programming the FLASH memory includes: S71, erase FLASH through JTAG interface and RISC-V debugging protocol; S72. If the code read protection module determines that the instruction is to erase FLASH, it directly transmits the command to FMC to erase FLASH. S73. After the erase is completed normally, the control code read protection module will turn off the read protection status. S74. If read / write operations are performed on FLASH / SRAM in debug mode without resetting the MCU; Both the S75 and the control code read protection module transmit read and write operations to the FMC transparently. S76. After the operation is completed, the control reset MCU will re-enter the read protection state.

[0055] Specifically, in this embodiment, the FLASH is directly erased via the JTAG interface and the RISC-V debug protocol. If the code read protection module determines the instruction is to erase the FLASH, it will directly transmit the command to the FMC to erase the FLASH. After successful erasure, the code read protection module will disable read protection. At this point, without resetting the MCU, read / write operations can be performed on the FLASH / SRAM in debug mode, with the code read protection module transmitting read / write operations to the FMC in all cases. After all operations are completed, because the read protection security field value in the NVR has not changed, resetting the MCU will return it to read protection mode.

[0056] Please see Figure 8 This invention provides an automatic splicing control device for video walls, the device comprising: Field addition module 1 is used to add a code read protection module inside the MCU and set a read protection security field within the code read protection module; Receiver module 2 is used to receive read protection security field change signals set externally, wherein the read protection security field change signals include read protection enable signals or read protection disable signals; Read value module 3 is used to control the code read protection module to read the protected security field; Switch control module 4 is used to control whether the read protection mode is in the on or off state based on the value of the protection safety field; Discard module 5 is used to discard illegal read and write operations on FLASH and SRAM in debug mode if read protection mode is enabled. Automatic trigger module 6 is used to control the read protection module to automatically trigger FLASH erasure if the change read protection mode is in the off state.

[0057] In addition, combined Figure 1 The kernel code protection method described in this embodiment of the invention can be implemented by a video wall automatic splicing control device. Figure 9 A schematic diagram of the hardware structure of the automatic splicing control device for video walls provided in an embodiment of the present invention is shown.

[0058] The automatic splicing control device for video walls may include a processor 401 and a memory 402 storing computer program instructions.

[0059] Specifically, the processor 401 may include a central processing unit (CPU), an application specific integrated circuit (ASIC), or one or more integrated circuits that can be configured to implement the embodiments of the present invention.

[0060] Memory 402 may include mass storage for data or instructions. For example, and not limitingly, memory 402 may include a hard disk drive (HDD), a floppy disk drive, flash memory, optical disk, magneto-optical disk, magnetic tape, or a Universal Serial Bus (USB) drive, or a combination of two or more of these. Where appropriate, memory 402 may include removable or non-removable (or fixed) media. Where appropriate, memory 402 may be internal or external to a data processing device. In a particular embodiment, memory 402 is a non-volatile solid-state memory. In a particular embodiment, memory 402 includes read-only memory (ROM). Where appropriate, the ROM may be a mask-programmed ROM, a programmable ROM (PROM), an erasable PROM (EPROM), an electrically erasable PROM (EEPROM), an electrically rewritable ROM (EAROM), or flash memory, or a combination of two or more of these.

[0061] The processor 401 implements any of the kernel code protection methods described in the above embodiments by reading and executing computer program instructions stored in the memory 402.

[0062] In one example, the automatic splicing control device for the video wall may also include a communication interface 403 and a bus 410. For example, Figure 9 As shown, the processor 401, memory 402, and communication interface 403 are connected through bus 410 and complete communication with each other.

[0063] The communication interface 403 is mainly used to realize communication between various modules, devices, units and / or equipment in the embodiments of the present invention.

[0064] Bus 410 includes hardware, software, or both, that couples components of the automatic splicing control device for the video wall together. For example, and not limitingly, the bus may include an Accelerated Graphics Port (AGP) or other graphics bus, an Enhanced Industry Standard Architecture (EISA) bus, a Front Side Bus (FSB), HyperTransport (HT) interconnect, an Industry Standard Architecture (ISA) bus, an Infinite Bandwidth Interconnect, a Low Pin Count (LPC) bus, a memory bus, a Microchannel Architecture (MCA) bus, a Peripheral Component Interconnect (PCI) bus, a PCI-Express (PCI-X) bus, a Serial Advanced Technology Attachment (SATA) bus, a Video Electronics Standards Association Local (VLB) bus, or other suitable buses, or combinations of two or more of these. Where appropriate, bus 410 may include one or more buses. Although specific buses are described and illustrated in embodiments of the invention, the invention contemplates any suitable bus or interconnect.

[0065] Furthermore, in conjunction with one of the kernel code protection methods in the above embodiments, this invention can be implemented using a computer-readable storage medium. This computer-readable storage medium stores computer program instructions; when these computer program instructions are executed by a processor, they implement any of the kernel code protection methods in the above embodiments.

[0066] It should also be noted that the exemplary embodiments mentioned in this invention describe methods or systems based on a series of steps or apparatus. However, this invention is not limited to the order of the steps described above; that is, the steps can be performed in the order mentioned in the embodiments, or in a different order, or several steps can be performed simultaneously.

[0067] The above are merely specific embodiments of the present invention. Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, modules, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here. It should be understood that the protection scope of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and these modifications or substitutions should all be covered within the protection scope of the present invention.

Claims

1. A kernel code protection method, characterized in that, The method includes: Add a code read protection module inside the MCU, and set a read protection security field within the code read protection module; Receive an externally configured read protection security field change signal, wherein the read protection security field change signal includes a read protection enable signal or a read protection disable signal; The code read protection module is controlled to read the read protection security field; The value of the read protection security field controls whether the read protection mode is enabled or disabled. If the read protection mode is enabled, illegal read and write operations on FLASH and SRAM in debug mode will be discarded by the code read protection module. If the read protection mode is turned off, the code read protection module will automatically trigger FLASH erasure. The step of controlling the read protection mode to be on or off based on the value of the read protection security field includes: The code read protection module is positioned between the debug module and the FMC; Upon reset release, the read protection security field is loaded from the NVR; Compare the read protection security field with the preset read protection value; If the read protection security field is the same as the preset read protection value; Then the read protection state will be enabled, and the MCU will be controlled to enter the read protection mode.

2. The kernel code protection method according to claim 1, characterized in that, Also includes: If the read protection mode is enabled; In debug mode, any illegal read / write operations on FLASH and SRAM will be discarded by the code read protection module. Access to other addresses within the MCU proceeds normally via pass-through.

3. The kernel code protection method according to claim 1, characterized in that, The step of controlling the read protection mode to be on or off based on the value of the read protection security field includes: Enable the read protection security field in the NVR via the JTAG interface or user code; The control takes effect after the MCU is reset, and the NVR security field is automatically loaded into the code read protection module; Enable read protection and control the MCU to enter read protection mode.

4. A kernel code protection method according to claim 1, characterized in that, The method of controlling the read protection mode to be on or off based on the value of the read protection security field also includes: The read protection security field in the NVR is set to an unprotected state via the JTAG interface and the RISC-V debugging protocol, which means the read protection security field is made invalid. The code read protection module controls the erasure of the FLASH memory. After confirming that the erase is complete, erase the read protection security field in the NVR to an invalid value, and then disable the read protection status in the code read protection module.

5. A kernel code protection method according to claim 1, characterized in that, Also includes: When read protection mode is enabled, programming operations are performed on the FLASH.

6. A kernel code protection method according to claim 5, characterized in that, The step of programming the FLASH memory when the read protection mode is enabled includes: The FLASH was erased using the JTAG interface and the RISC-V debugging protocol. If the code read protection module determines that the instruction is to erase FLASH, it directly transmits the command to FMC to erase the FLASH. After the erasure is completed normally, the code read protection module will turn off the read protection status. If the MCU is not reset, read / write operations are performed on the FLASH / SRAM in debug mode; The code read protection module controls all read and write operations to be transparently transmitted to the FMC; After the operation is completed, the control reset MCU will re-enter the read protection state.

7. A kernel code protection device, characterized in that, The device includes: The field addition module is used to add a code read protection module inside the MCU, and to set a read protection security field within the code read protection module; The receiving module is used to receive externally set read protection security field change signals, wherein the read protection security field change signals include read protection enable signals or read protection disable signals; The read value module is used to control the code read protection module to read the read protection security field; The switch control module is used to control the read protection mode to be in an on or off state based on the value of the read protection security field; The discard module is used to discard any illegal read / write operations on FLASH and SRAM in debug mode if the read protection mode is enabled. An automatic triggering module is used to control the code read protection module to automatically trigger FLASH erasure if the read protection mode is turned off. The step of controlling the read protection mode to be on or off based on the value of the read protection security field includes: The code read protection module is positioned between the debug module and the FMC; Upon reset release, the read protection security field is loaded from the NVR; Compare the read protection security field with the preset read protection value; If the read protection security field is the same as the preset read protection value; Then the read protection state will be enabled, and the MCU will be controlled to enter the read protection mode.

8. A kernel code protection device, characterized in that, include: At least one processor, at least one memory, and computer program instructions stored in the memory, which, when executed by the processor, implement the method as described in any one of claims 1-6.

9. A storage medium storing computer program instructions thereon, characterized in that, The method as described in any one of claims 1-6 is implemented when the computer program instructions are executed by the processor.

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